a0f8d43744
[gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM ( #5802 )
...
* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
2022-04-20 09:56:04 +08:00
b1a9c4c4ea
[libcpu/arm]: add dsb and isb instructions in the end of rt_hw_context_switch_to ( #5748 )
2022-04-08 12:52:22 +08:00
563e49890c
[asm] 解决tab和空格混用的问题
2022-01-20 20:57:35 +08:00
0e46c8a33d
[update] support armclang
2021-09-26 10:46:21 +08:00
1997113fbc
FINSH_USING_BUILT_IN_COMMANDS改MSH_USING_BUILT_IN_COMMANDS
2021-08-28 16:48:08 -04:00
29828dc94f
[finsh] finsh组件可以选择是否包含内置命令
2021-08-25 19:48:15 -04:00
6c907c3a47
[libcpu] auto formatted
2021-03-27 17:51:56 +08:00
ef62febf1f
[SConscript]update group name
2020-12-19 16:49:11 +08:00
ba83ddc3c4
[SConscript] change libcpu to LIBARCH,and correcte letter case
2020-11-30 15:52:43 +08:00
91261e25b9
[SConscript]rename group name
2020-11-20 13:38:11 +08:00
c3d63e49de
set Systick interrupt priority to the lowest
2020-05-30 15:23:25 +08:00
94551979e0
Fix Cortex-M0 Cannot Execute Reboot
...
Signed-off-by: xiaofan <xfan1024@live.com>
2019-09-07 21:20:46 +08:00
bde47018b8
[libcpu] Add SConscript in libcpu.
2019-01-07 06:09:45 +08:00
b40a8f816b
添加cpu复位函数
...
RT_WEAK void rt_hw_cpu_reset(void)
2018-12-14 08:58:40 +08:00
7c425408b4
[license] Change the license of libarm to Apache.
2018-10-15 01:35:07 +08:00
cb247e913f
update libcpu: cortex-m0 fault handlers always enable.
2017-09-01 10:22:55 +08:00
9b7303e511
update libcpu: ensure fault enable.
2017-08-18 11:12:58 +08:00
73df162d3f
fixed assembly warnings.
2015-05-13 11:57:34 +08:00
2c47f2e683
Fix some spell error;
2014-07-31 13:59:25 +08:00
06987e72e5
Fix hardfault bug for gcc port
...
for 2013-02-20 aozima commmit "port for gcc", but the commit is
not tested,and the kernel is breakdown in context_gcc.S, the file
is a copy from cortex-m3,but not port for cortex-m0, so i complete
this port for aozima, test it in stm32f0discovery board ,
and it works fine.
2013-11-04 16:10:11 +08:00
b045f93b47
fixed bug: correct cortex-m SCB->VTOR address.
2013-06-23 18:08:16 +08:00
93b9b28297
format code by Astyle.
2013-06-23 18:07:10 +08:00
a2ff85c03f
update libcpu/arm/cortex-m0: restore MSP.
2013-06-22 18:59:51 +08:00
d80888a194
port stm32f0x to gcc.
2013-02-20 22:03:31 +08:00
72782e9203
convert end of line
2013-01-08 05:05:02 -08:00
468ade5e98
fixed the coding style in libcpu/arm
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2518 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-24 06:59:14 +00:00
5be0c53dd8
stack addr align to 8byte.
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2509 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-23 07:40:31 +00:00
056228cce6
fixed bug: store r8 - r11.
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2258 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-08-22 15:53:54 +00:00
a9aa8d503e
add libcpu/cortex-m0.
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2142 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-05-31 17:41:58 +00:00
Man, Jianting (Meco)
blta
liukangcc
yangjie
aozima
xiaofan
Bernard Xiong
yufanyufan77
Bright Pan
dzzxzz@gmail.com