e933c1f610
调整异常处理代码结构，以支持backtrace功能
2021-07-05 14:43:33 +08:00
eb79a8a244
修改irq handle接口rt_hw_trap_irq，支持核间IPI中断处理
2021-07-05 14:06:32 +08:00
da701d6b3a
添加dcache invalidate/dcache clean&invalidate接口
2021-07-03 17:34:45 +08:00
a6060a41df
Adjust the stack_top to bss
2021-07-03 10:25:30 +08:00
7d3bac8b6e
[libcpu] remove gtimer/pmu from cortex-a
2021-07-02 15:07:21 +08:00
d6e86a67bb
[add] 在cortex-a中增加，打开RT_USING_CPU_FFS宏定义时的_rt_ffs实现。
2021-05-27 17:39:03 +08:00
ffe8d06bd3
[update] 增加获取cortex-a generic timer频率接口
2021-05-14 16:08:32 +08:00
1523e4680d
[add] 添加gicv3中断控制器代码，更新menuconfig配置选项与utest的config.h
2021-05-14 16:08:31 +08:00
42ce237dc9
[update] 整理cortex-a aarch32启动代码
...
1. 去除start_gcc.s中set_secondary_cpu_boot_address代码，这部分提取到qemu-vexpress-a9 bsp中。
2. 移动cpu.c中rt_hw_cpu_id函数到cp15_gcc.s，使用汇编实现，采用wake属性，方便bsp根据cpu特性获取CPU ID（多cpu集群中，不同厂家使用组合不一样）.
3. 整理start_gcc.s 适应多核启动，原来的代码只考虑到双核的情况。
2021-05-14 15:30:31 +08:00
f358426c49
Merge pull request #4583 from fenghuijie/master
...
[Cortex-A]add gic>imer interface
2021-04-09 15:46:03 +08:00
62f764edc1
add type modifier for immediate data
2021-04-09 11:07:58 +08:00
0b4416f0b4
add gic>imer interface
2021-04-08 15:46:15 +08:00
e939ffe355
优化未定义异常时自动开启FPU的判断条件，当FPU末开启时将自动开启。
2021-04-08 10:01:26 +08:00
6c907c3a47
[libcpu] auto formatted
2021-03-27 17:51:56 +08:00
eeaf1fcc50
resolve Conflicts
...
bsp/nrf52832/board/Sconscript
bsp/nrf52832/startups/Sconscript
bsp/raspberry-pi/raspi4-32/driver/SConscript
2020-12-28 12:02:31 +08:00
ef62febf1f
[SConscript]update group name
2020-12-19 16:49:11 +08:00
ba83ddc3c4
[SConscript] change libcpu to LIBARCH,and correcte letter case
2020-11-30 15:52:43 +08:00
91261e25b9
[SConscript]rename group name
2020-11-20 13:38:11 +08:00
355f8dd95c
[libcpu][update]重启与关机函数：rt_hw_cpu_shutdown、rt_hw_cpu_reset，补充WEAK属性
2020-11-20 08:49:51 +08:00
dae274e1f2
fix gic ack irq problem
2020-06-30 17:32:14 +08:00
92ab0fd593
fix startup code address relative jump
2020-06-04 00:03:07 +08:00
38f400d50a
add raspi4 32bit mode bsp
2020-05-25 17:30:05 +08:00
525d353403
fixed linker script and stack align issues.
2019-10-22 09:47:41 +08:00
cb07e5fb24
开放spinlock相关函数
2019-09-27 14:38:33 +08:00
fc155f8810
fix cortex-a cahce
2019-06-19 10:40:13 +08:00
043611b98a
add cortex-a fpu support
2019-05-29 08:40:41 +08:00
ec6cb9f260
[BSP][qemu-vexpress-a9] code cleaup for compiling warning.
2019-05-12 15:07:26 +08:00
6cdfb2ac92
fix signal code
2019-05-11 09:34:26 +08:00
d729448f5e
[libcpu][arm/cortex-a] Add correct comments.
2019-05-09 08:48:38 +08:00
1e7bd3d8a1
修改lwp支持中arm cortex-a的swi入口函数处理
2019-04-27 13:54:51 +08:00
61f2a71511
Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.
...
This filename conflicts with the 'mbedtls' package. They are renamed
in the name of the corresponding chips and included in 'board.h'.
Files that rely on this file should include 'board.h' instead.
2019-04-26 10:50:48 +08:00
b10039f396
Disable the data alignment check.
2019-04-01 14:21:59 +08:00
fbd40fc5b8
Add standard rt-thread cache interfaces for arm/cortex-a.
...
Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-29 20:22:25 +08:00
2eb1bef773
Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
2019-03-25 20:03:49 +08:00
bde47018b8
[libcpu] Add SConscript in libcpu.
2019-01-07 06:09:45 +08:00
cbe07afabe
[libcpu/arm/cortex-a]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:34 +08:00
7c425408b4
[license] Change the license of libarm to Apache.
2018-10-15 01:35:07 +08:00
fc7a5abc76
[libcpu]: add 8-byte alignment for arm architecture && optimize code format
2017-12-21 16:37:38 +08:00
f6170a6e5b
[BSP] add i.MX 6UL BSP
2017-11-01 13:30:17 +08:00
fenghuijie
wanghaijing
Bernard Xiong
zhouji
Meco Man
yangjie
张世争
shaojinchun
bigmagic
aozima
ZYH
qz721
liruncong
SummerGift