Commit Graph

34 Commits

Author SHA1 Message Date
Meco Man c6a2f5b7bd rt_hw_cpu_shutdown: implement default weak function
and remvoe duplicated default functions in each cpu/bsp level
2023-08-08 22:34:25 -04:00
Meco Man cb810dfe75 rt_hw_cpu_reset: remove all other rt_weak 2023-08-08 22:34:25 -04:00
Shicheng Chu 93f3cb30e4
[kernel] 将rt_thread结构体改为显式继承rt_object (#7131) 2023-04-04 09:06:27 -04:00
Man, Jianting (Meco) 99bdf978d7
[rtdef] use lower-case to define attributes (#6728)
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
2022-12-11 13:12:03 -05:00
Meco Man 83b3aadaa3 [Scons][iar][iccarm] IAR统一使用iccarm作为判断条件而不是是用IDE的名字来进行判断
因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链
此外,将判断条件改为列表方式,这样更方便后续增加其他可能的IAR编译链
2022-06-09 07:01:59 +08:00
Meco Man 50f041f5c2 [Scons] 将GCC判断条件改为列表方式,方便后续增加新的编译工具链 2022-06-09 07:01:59 +08:00
Man, Jianting (Meco) a0f8d43744
[gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM (#5802)
* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
2022-04-20 09:56:04 +08:00
changzehai 3f7cc54449
1、解决未在rtconfig.h中定义“RT_USING_CPU_FFS”宏时,使用arm-gcc编译会出现__rt_ffs() 函数重定义,导致编译不通过的问题; (#5755)
2、解决bsp/rm48x50工程使用arm-gcc编译下载后,程序运行出现prefetch abort异常的问题。
2022-04-05 10:26:12 +08:00
Meco Man 563e49890c [asm] 解决tab和空格混用的问题 2022-01-20 20:57:35 +08:00
liukangcc 0e46c8a33d [update] support armclang 2021-09-26 10:46:21 +08:00
Meco Man 1997113fbc FINSH_USING_BUILT_IN_COMMANDS改MSH_USING_BUILT_IN_COMMANDS 2021-08-28 16:48:08 -04:00
Meco Man 29828dc94f [finsh] finsh组件可以选择是否包含内置命令 2021-08-25 19:48:15 -04:00
Meco Man 6c907c3a47 [libcpu] auto formatted 2021-03-27 17:51:56 +08:00
yangjie eeaf1fcc50 resolve Conflicts
bsp/nrf52832/board/Sconscript
	bsp/nrf52832/startups/Sconscript
	bsp/raspberry-pi/raspi4-32/driver/SConscript
2020-12-28 12:02:31 +08:00
yangjie ef62febf1f [SConscript]update group name 2020-12-19 16:49:11 +08:00
yangjie11 ba83ddc3c4 [SConscript] change libcpu to LIBARCH,and correcte letter case 2020-11-30 15:52:43 +08:00
yangjie11 91261e25b9 [SConscript]rename group name 2020-11-20 13:38:11 +08:00
张世争 355f8dd95c [libcpu][update]重启与关机函数:rt_hw_cpu_shutdown、rt_hw_cpu_reset,补充WEAK属性 2020-11-20 08:49:51 +08:00
aozima 525d353403 fixed linker script and stack align issues. 2019-10-22 09:47:41 +08:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
liruncong 8ce36092c5 [libcpu/arm/cortex-r4]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:35:43 +08:00
Bernard Xiong 7c425408b4 [license] Change the license of libarm to Apache. 2018-10-15 01:35:07 +08:00
SummerGift fc7a5abc76 [libcpu]: add 8-byte alignment for arm architecture && optimize code format 2017-12-21 16:37:38 +08:00
Grissiom 0c9b9ced31 cortex-r4: use byte to allocate the stack
Unit of "byte" is more intuitive than "long".
2013-11-17 12:49:08 +08:00
Grissiom a8520ed383 cortex-r4: let svc mode reuse the stack of IRQ on startup
As the svc stack is the stack of threads, there is no need to allocate a
separate stack for the startup. Reuse the IRQ stack should be OK.

Tested on rm48 board.
2013-11-17 12:49:07 +08:00
Grissiom 377c6e6cc9 cortex-r4: dump register on traps
We could not handle any traps except IRQ/FIQ.
2013-10-20 23:46:50 +08:00
Grissiom e1e563e85c cortex-r4: remove RM48x50.h and add armv7.h 2013-10-20 21:10:26 +08:00
Grissiom 81ab083ae5 rm48: move some asm file to libcpu 2013-10-20 18:51:46 +08:00
Grissiom 9568669109 rm48x50: add GCC support 2013-10-20 18:51:45 +08:00
Grissiom 009239ceed rm48x50: rt_interrupt_nest should be `volatile rt_uint8_t` 2013-06-12 23:56:10 +08:00
Grissiom 9b949c28b7 rm48x50: add cache_{enable, disable} 2013-06-12 21:03:04 +08:00
Grissiom e8bbbe6788 cortex-r4: wrap asm functions with .asmfunc/.endasmfunc 2013-06-05 23:21:06 +08:00
Grissiom 228a6be077 cortex-r4: add __rt_ffs 2013-06-05 23:20:39 +08:00
Grissiom e74befca44 move libcpu/arm/rm48x50/ to libcpu/arm/cortex-r4 2013-05-31 21:06:26 +08:00