Bernard Xiong
86358d0830
[BSP] code cleanup for usart and gpio driver in STM32F4
2015-01-21 12:36:34 +08:00
Bernard Xiong
756f2c67ab
[BSP] rename the rt_hw_usart_init to stm32_hw_usart_init
2015-01-20 16:02:33 +08:00
Bernard Xiong
bff1bb3d7b
[BSP] update MDK project file for STM32F4
2015-01-20 15:58:37 +08:00
Bernard Xiong
080c8912ea
Merge remote-tracking branch 'upstream/master'
2015-01-20 15:56:52 +08:00
Bernard Xiong
9261c37e0e
[BSP] Add GPIO driver for STM32F4
2015-01-20 07:55:52 +00:00
Bernard Xiong
2b7600bdf3
[BSP] update MDK project file for STM32F4
2015-01-20 15:52:39 +08:00
Bernard Xiong
73d5acecba
[DeviceDrivers] Add pin.h in the rtdevice.h
2015-01-20 07:24:49 +00:00
Bernard Xiong
6acf4a4528
[BSP] Update UART and GPIO driver with framework in STM32F4
2015-01-20 07:23:59 +00:00
Bernard Xiong
1bb425e839
[DeviceDrivers] code cleanup for hardware pin
2015-01-19 08:56:43 +00:00
Bernard Xiong
765ac35e13
add AStyle shell script file
2015-01-19 08:54:18 +00:00
Bernard Xiong
d01b2ca84b
[DeviceDrivers] Add pin io driver framework
2015-01-19 06:18:16 +00:00
Bernard Xiong
2475568190
Merge pull request #413 from grissiom/fix-memheap
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memheap: check against over written in rt_memheap_free
2015-01-16 15:09:40 +08:00
Grissiom
f8c171d5ad
memheap: check against over written in rt_memheap_free
2015-01-16 11:41:20 +08:00
Bernard Xiong
571095e84c
Merge pull request #411 from grissiom/fix-cortex-m
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bsp/{cortex-M}: fix the SysTick_Config
2015-01-10 08:46:05 +08:00
Bernard Xiong
e395c8c6f0
Merge pull request #410 from grissiom/lpc43xx
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vbus: remove the rt_ prefix in the watermark queue source file
2015-01-10 08:45:44 +08:00
Grissiom
c565925169
bsp/{cortex-M}: fix the SysTick_Config
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SysTick_Config substract one inside the function. So there is no need to
substract one when passing the parameter.
2015-01-09 15:26:06 +08:00
Grissiom
d7fb5d5444
vbus: remove the rt_ prefix in the watermark queue source file
2015-01-09 10:11:32 +08:00
Bernard Xiong
56ab0995c1
Merge pull request #409 from grissiom/lpc43xx
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Lpc43xx
2015-01-09 10:00:25 +08:00
Grissiom
81b37fb1f9
lpc43xx: add copy-right info in vbus drivers
2015-01-08 17:16:26 +08:00
Grissiom
17aa3b1975
vbus: update copy-right information
2015-01-08 17:05:56 +08:00
Grissiom
05a01884e6
lpc43xx: fix clock configure
2015-01-07 17:15:50 +08:00
Grissiom
11026d0579
lpc43xx: clean the .o before building M0 and M4
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SCons will omit the file in parent dir of SConstruct somehow and build
the object files in that dir instead of in variant dir. This cause
problem because we cannot mix the object files between M0 and M4 which
SCons failed to rebuild. So we have to manually remove the files before
building.
2015-01-07 17:15:49 +08:00
Grissiom
17a75eaa02
lpc43xx: remove the fpu settings in startup_LPC43xx_M0
2015-01-07 17:15:49 +08:00
Grissiom
22938a93ef
lpc43xx: fix some compile warnings
2015-01-07 17:15:49 +08:00
Grissiom
f7415e595e
VBus: added
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Currently only lpc43xx is supported.
2015-01-07 17:15:49 +08:00
Grissiom
fcff552626
lpc43xx: fix the SConscripts
2015-01-07 10:25:44 +08:00
Grissiom
03a2847f12
lpc43xx: fix some compile warnings
2015-01-07 10:25:44 +08:00
Grissiom
7965708050
lpc43xx: add -Wall
2015-01-07 10:25:44 +08:00
Grissiom
df31744178
lpc43xx: fix the M0 project template
2015-01-07 10:25:43 +08:00
Bernard Xiong
da139a4a2f
Merge pull request #408 from Coing/rt-threadCoing
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fix project.uvoptx can't open,recreate the project.uvoptx. this commit i...
2015-01-06 22:09:10 +08:00
Coing
70aaf4237f
fix project.uvoptx can't open,recreate the project.uvoptx. this commit is for post
2015-01-06 21:54:47 +08:00
Grissiom
0ca281c162
lpc43xx: add flash linker script for GCC
2015-01-06 13:40:46 +08:00
Grissiom
bcbe180886
lpc43xx: fix the default RTT_ROOT in SConstruct
2015-01-06 13:39:54 +08:00
Grissiom
fca84daa9d
lpc43xx: fix the startup code for GCC
2015-01-06 12:42:12 +08:00
Grissiom
833339e1c6
lpc43xx: output a newline in the header file
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Some compiler is brain-damaged that it will yeild a warning for headers
not ended with a newline. Yes, I mean you, Keil.
2015-01-06 11:03:01 +08:00
Grissiom
ff3ab9c0ab
lpc43xx: add readme
2015-01-06 10:46:32 +08:00
Grissiom
090adcf4c0
lpc43xx: don't set the Clock again in M0 core
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M0 core is always booted by the M4 core. It means that if we are running
in M0, the clock is always configured.
2015-01-06 10:46:32 +08:00
Grissiom
21ef733251
lpc43xx: use the RIT timer as SysTick in M0 core
2015-01-06 10:46:31 +08:00
Grissiom
773a884a4b
lpc43xx: move board.c into M0/M4
2015-01-06 10:46:31 +08:00
Grissiom
d2e4050a70
lpc43xx: update template.uvproj and add sct files
2015-01-06 10:46:31 +08:00
Grissiom
959f6c695f
lpc43xx: move the application code into its own space
2015-01-06 10:46:31 +08:00
Grissiom
5542af8b7c
lpc43xx/driver: fix the VTOR setting
2015-01-06 10:25:43 +08:00
Grissiom
f609a63564
lpc43xx: add uart3 support
2015-01-06 10:25:43 +08:00
Grissiom
a447b5f3cf
lpc43xx: refactor uart drivers
2015-01-06 10:25:43 +08:00
Bernard Xiong
c3515abf93
Merge pull request #407 from grissiom/misc-fix
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Misc fix
2015-01-05 17:07:23 +08:00
bernard
f6ed27b863
[DeviceDrivers] Fix sensor_poll issue.
2015-01-04 20:01:52 +08:00
Grissiom
57b5c74a71
rt_kprintf: force the open_flag to be RT_DEVICE_FLAG_STREAM
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Commit a6251a439e
changed the serial device to check open_flag
instead of flag. So we should change the rt_kprintf counterpart as well.
2015-01-04 19:43:33 +08:00
Grissiom
099ada6699
finsh: open the finsh device with RT_DEVICE_FLAG_STREAM
2015-01-04 19:42:58 +08:00
bernard
06454fd484
[DeviceDrivers] change tab to space in sensor.
2015-01-04 13:14:53 +08:00
bernard
09602fd9d8
If there is no CPPDEFINES, generate an empty GetCPPDEFINES function.
2015-01-04 12:26:01 +08:00