480 Commits

Author SHA1 Message Date
yuqingli
8a1e6b2df5 [ipc/workqueue.c] delete timer, using list. 2025-01-02 14:54:53 +08:00
zhujiale
e4760364f1 [serial] add bypass testcase in utest 2024-12-17 11:08:14 +08:00
zhujiale
27cf024585 [serial] add bypass hook to direct processing char when uart irq coming 2024-12-17 11:08:14 +08:00
GuEe-GUI
a729a82706 [BSP/FIXUP] remove old reset drivers for RK3500
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-13 10:39:20 +08:00
GuEe-GUI
d248a3a288 [DM/FIXUP] Fixup PCI build
1. Add PCI include in rtdevice.h
2. Fixup `RT_KEY_ENABLED` loss.
3. remove waring type of `dw_pcie_ep_get_func_from_ep` return.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-13 10:39:20 +08:00
GuEe-GUI
63bbce1c1f [DM/FIXUP] include name default
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-13 10:39:20 +08:00
Supper Thomas
5b75e1c8bf doc(doxyge):fix doxygen path 2024-12-09 17:12:59 -05:00
GuEe-GUI
429c0c5257 [DM/FEATURE] Support thermal
Thermal drivers offer a generic mechanism for thermal management.
Usually it's made up of one or more thermal zones and cooling devices.
Each thermal zone contains its own temperature, trip points, and cooling devices.
All platforms with ACPI or OFW thermal support can use this driver.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:17:24 +08:00
GuEe-GUI
e3340eca34 [DM/FEATURE] Support virtual pin
1. There is only one GPIO device in System.
2. For Pin API input is pin number
3. Add sets pin debounce time API.

So we need a virtual pin for multi gpio chip.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:15:17 +08:00
GuEe-GUI
72a78a268f [DM/DMA] merge ofw_parse and request_chan
Work together can make DMA engine device drivers
knows how want a chan easy.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-12-02 21:14:13 +08:00
GuEe-GUI
50982cd970 [DM/PCI] Add memory window pool for EP
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:58 +08:00
GuEe-GUI
175a7d26bf [DM/FEATURE] Support LED
Provides general LED control API and drivers.
It can work on PWM, GPIO and Syscon...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-28 09:46:02 +08:00
GuEe-GUI
6f68ca7c71 [DM/SPI] Support DM mode in SPI
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:04:07 +08:00
GuEe-GUI
56614a4cb9 [DM/FEATURE] Support regulator
1. Add the regulator driver framework.
2. Add the generic voltage and current regulator API support
  for drivers.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-27 18:02:23 +08:00
GUI
d025072837
[DM/FEATURE] Support ATA AHCI (#9683)
Add ACHI drivers to support some old platform
driver such as SATA.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 11:22:09 +08:00
GUI
1a24ae06f3
[DM/FEATURE] Support reset controller (#9630)
* [DM/FEATURE] Support reset controller

Reset controllers are central units that control
the reset signals to multiple peripherals.
The reset controller API is split into two parts:
  1. The consumer driver interface, which allows
    peripheral drivers to request control over
    their reset input signals
  2. The reset controller driver interface
which is used by drivers for reset controller devices to
register their reset controls to provide them to the consumers.

* [RESET/SIMPLE] Support simple reset

Currently this driver supports:
 - Altera SoCFPGAs
 - ASPEED BMC SoCs
 - Bitmain BM1880 SoC
 - Realtek SoCs
 - RCC reset controller in STM32 MCUs
 - Allwinner SoCs
 - SiFive FU740 SoCs
 - Sophgo SoCs

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-26 10:02:50 +08:00
GUI
f849afb5ca
[DM/FEATURE] Support hardware mailbox (#9599)
* [DM/FEATURE] Support hardware mailbox
* [MAILBOX/PIC] Add PIC Mailbox drivers.

The mailbox device(s) may be instantiated in one of three equivalent way:

Device Tree node, eg.:

```dts
interrupt-controller@0 {
	interrupt-controller;
	#interrupt-cells = <1>;
};

pic_mailbox@10000 {
	compatible = "rt-thread,pic-mailbox";
	reg = <0x10000 0x100>;
	position = <0>;
	interrupts = <34>;
	peer-interrupts = <35>;
	uid = <0>;
	#mbox-cells = <1>;
};
```
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 11:00:04 +08:00
GUI
c2545cdd7b
[DM/FEATURE] Support PHY (external) (#9597)
This framework will be of use only to devices that use
external PHY (PHY functionality is not embedded within the controller).

Use in PCIE, USB, HDMI, DP...

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-25 10:23:01 +08:00
GUI
945114fd59
[DM/FEATURE] Support NVME (#9591)
* [DM/FEATURE] Support NVME

1. Support PRP and SGL (>= NVME v1.1) transport.
2. Support MSI/MSI-X for IO queues.
3. Support NVME on PCI.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-24 13:57:37 +08:00
GUI
42a41c696d
[DM/FEATURE] Support SCSI bus (#9592)
* [DM/FEATURE] Support block for SCSI
1. Support SD and CD-ROM.
2. SD will port to UFS and ATA device.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 16:59:37 +08:00
GUI
c055261177
[DM/FEATURE] Support DMA management (#9682)
1. DMA pool management for platform.
2. DMA engine driver API.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-22 14:11:40 +08:00
GUI
f797eccbf1
[DM/FEATURE] Support IIO (Industrial I/O) (#9598)
[DM/FEATURE] Support IIO (Industrial I/O)

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-21 20:44:25 +08:00
GuEe-GUI
33785ca68a [DEVICE/SDIO] port to the block
1. remove gpt.
2. remove block device custom.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI
c424cb8186 [DM/FEATURE] Support simple block layer
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 16:11:10 +08:00
GuEe-GUI
10cac76d3b [DM/FEATURE] Support MFD syscon
MFD (Multifunction device) with System Controller Register Read/Write.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 15:53:23 +08:00
GuEe-GUI
b6dff44054 [DM/FIXUP] Fixup CLK
1. Default return OK when input NULL (if is not necessary in device).
2. Support object parse in OFW.
3. Support CLK depends fix auto.
4. Fixup rt_clk_array_prepare_enable and rt_clk_array_disable_unprepare.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-20 11:08:28 +08:00
zhuzhuzhu
bdf4da8ee1
[components][driver]add phy and mdio bus
old phy bus is too simple add phy_bus is not adapt rt_bus framework,so writer a stronger phy bus framework.

here is my commit message:
add mdio bus and phy bus to kernel,the phy bus use rt_bus framewok ,driver writer can write phy_driver first .when mac driver need to use phy they can register phy_device and pjhy_devie will serach for driver which match by uid and mask,if no driver match with the device that you register,phy_bus will return the genphy to you device,the genphy driver is the general driver for phy,so you can use it but it can not support the capcity of chip it may be cause performance is not up to peak
2024-11-19 21:34:03 -05:00
GuEe-GUI
cefe6d6380 [DM/FEATURE] Support driver depends fix auto
We need a API to fix the driver load auto when
a second driver get it in probe process that
we can not be careful of the driver-to-driver's
depends in different SoC.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 15:03:23 +08:00
GuEe-GUI
b6f67285e9 [DM/FIXUP] remove OFW switch macros
The drivers will support OFW and name probe both.
We should make build OK when OFW is disable.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 15:03:23 +08:00
GuEe-GUI
3b22dbd049 [DM/FEATURE] DM Device IDA management
Drivers can manage their own IDs without having to concern
themselves with the register/unregister in system

Link: https://github.com/RT-Thread/rt-thread/issues/9534

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-11-18 14:23:25 +08:00
wdfk-prog
4c18fa7e21 fix:[CAN][STM32]open时立刻启动can_start,还未完成其他配置,可能导致异常 2024-11-13 22:56:17 -05:00
Kai
5e34298f99 add missing extern "C" in header to support cpp 2024-10-24 20:22:48 +08:00
CYFS
2b281ff0cb
[doxygen][rsoc]add pwm touch can i2c spi driver example for doxygen 2024-10-08 17:57:52 -04:00
wdfk-prog
99503d3ff6 feat:[drivers][spi] rt_spi_bus_configure 添加 -RT_EBUSY 返回值,并增加说明注释 2024-10-06 00:02:53 -04:00
CYFS3
9bcb904a0b [doxygen]add pin driver example for doxygen 2024-10-05 23:33:58 -04:00
zhuzhuzhu
ef426851ea
[feat] add pci api,the pci/pcie driver
add pci api,the pci/pcie driver writer can use this to get resource of current device with flag,there are three flag :
1. PCI_BUS_REGION_F_MEM it mean memory space
2. PCI_BUS_REGION_F_IO it mean io space
3. PCI_BUS_REGION_F_PREFETCH it mean prefetchable memory
2024-10-05 02:30:52 -04:00
hydevcode
66d54ea8c0
[bsp][nxp][rsoc] Fix compilation issues with bsp of nxp/lxp series 2024-09-29 20:47:39 -04:00
CYFS
6fb31d486d
[doxygen][rsoc]add dac driver example for doxygen (#9483) 2024-09-29 08:59:17 +08:00
CYFS
684bcc8d16 [doxygen]add rtc devices example for doxygen 2024-09-26 18:07:40 -04:00
CYFS
d55931493a [doxygen]add dac driver example for doxygen 2024-09-25 21:04:19 -04:00
CYFS
f4a92e5e86
[doxygen][rsoc] add adc driver example for doxygen (#9465)
* [doxygen] add adc driver example for doxygen

* add data structures
2024-09-25 22:19:53 +08:00
GuEe-GUI
94e49755af [FEATURE/PIC] support PIC cancel (only in debug)
PIC may free because some wrongs in debug.
We should remove in PIC list or there are
some undefined behavior will happen.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-19 21:14:42 +08:00
Supper Thomas
6320f184f5
[doxygen] add driver example for doxygen (#9446) 2024-09-15 08:22:44 +08:00
CXSforHPU
bb91502465
[drivers] Specifies the name of the drivers driver file
https://github.com/RT-Thread/rt-thread/pull/9420
2024-09-13 17:40:40 -04:00
GuEe-GUI
2d026a316a [FEATURE/OFW] add address reverse/translate for DMA/CPU's address
DMA and CPU address view is different, we need to convert them:

    +--------+    +--------+  +---------+          +--------+
    |        |    |        |  |         |          |        |
    |  CPUs  |    |  DEV0  |  |  IOMMU  <----+     |  DEV1  |
    |        |    |        |  |         |    |     |        |
    +----+---+    +----+---+  +----+----+    |     +----+---+
         |             |           |         |          |
0x200000 |      0x1000 |    0x1000 |         |   0x8000 |
         |             |           |         |          |
         +-------------+-----------+         +----------+
         |
         |
+--------v----------------------------------------------------+
|                                                             |
|                          Address BUS                        |
|                                                             |
+-------------------------------------------------------------+

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-13 17:33:29 -04:00
GuEe-GUI
117e6ed347 [FEATURE/FDT] Add bootargs select in early
Maybe use for memory/DMA buffer init before
ofw_node unflatten.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-13 17:33:29 -04:00
GuEe-GUI
9fd9c1ee45 [FIXUP/OFW] rt_ofw_foreach_node_by_compatible args
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-13 17:33:29 -04:00
GuEe-GUI
f9b632d52d [DM/MISC] Add error no for ptr
When the driver request a API gets RT_NULL which return value is ptr,
they could not know why get a RT_NULL.

some API return RT_NULL, is not error internal maybe, it just not
supported for this platform, but the driver still could work ok,
the API can return (RT_NULL + -RT_EEMPTY) to driver.

on the other hand, the driver can do more behaviors by error no.
When the API return the -RT_EBUSY, driver can wait for a moment and retry.
When the API return the -RT_ENOSYS, driver can try the next mode or request's name.

Signed-off-by: GuEe-GUI <wusongjie@rt-thread.com>
2024-09-11 14:34:13 +08:00
CYFS
cb0b5b05ad
[components][sensor]增加电源检测类型 2024-09-10 19:54:03 -04:00
GuEe-GUI
2168ed8e7d [DM/Feature] Basic PCI/PCIe (Peripheral Component Interconnect Express) bus
PCI/PCIe have better performance and more devices support, such as
NVMe, GPU, Powerful NIC (Like RDMA). PCI/PCIe can access control by
IOMMU that the virtualiztion and userspace driver will more safety.
PCI/PCIe device could hot plugging, no design modifications SoC required,
PCI/PCIe on Embedded SoC is popular now.
We make a simple framework to support them.

Feature Lists:
1.PCI INTx: the INT[A-D] pin IRQ for legacy PCI, work with platform PIC.
2.MSI/MSI-X: the message write IRQ for PCIe, work with platform's PIC.
3.PME: we only support the D0, D1, D2, D3HOT, D3COLD init by framework.
4.Endpoint: a simple EP framework for PCI FPGA or NTB function.
5.OFW: we only support work on OFW SoC, ACPI support in the future maybe.

Host controller:
1. Common PCI host controller on ECAM.
2. Generic PCI host controller on ECAM.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-06 17:45:03 -04:00