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77 Commits

Author SHA1 Message Date
guozhanxin d8a2084c05 [libcpu/cortex-a] Fix the problem of circular include of cpuport.h 2023-09-27 10:16:46 +08:00
Shell 47b183a297
[smart/syscall] fix exit(2) and add exit_group(2) (#8005) 
Signed-off-by: shell <smokewood@qq.com>
Signed-off-by: shell <wangxiaoyao@rt-thread.com>
Signed-off-by: Shell <smokewood@qq.com>
 2023-09-09 09:35:56 +08:00
Shell d862816a51
[components/mm] add unmap page API (#7834) 
Signed-off-by: Shell <smokewood@qq.com>
 2023-08-16 15:38:59 +08:00
Meco Man c6a2f5b7bd rt_hw_cpu_shutdown: implement default weak function 
and remvoe duplicated default functions in each cpu/bsp level
 2023-08-08 22:34:25 -04:00
Shell acfa74f078
[libcpu/arm] fix race condition with ldrex,strex (#7842) 
Signed-off-by: Shell <smokewood@qq.com>
 2023-07-25 14:07:44 +08:00
lepus 2741bec8f7
[libcpu][cortex-a]modified start_gcc.S (#7810) 2023-07-14 23:12:04 +08:00
Wayne ed4b4ca9e6
[libcpu] [cortex-a] Revert RT_SMP_AUTO_BOOT. (#7549) 
Co-authored-by: Wayne Lin <wclin@nuvoton.com>
 2023-05-29 15:23:42 +08:00
huanghe 9217865c6a
[libcpu] fix arm/cortex-a/start_gcc.S (#7515) 2023-05-19 11:32:58 +08:00
Shell b7554a70d2
[libcpu][component][debug] add debug info for gdb (#7033) 2023-05-14 23:48:16 +08:00
huanghe 50a4e8c662
[bsp][phytium]适配rt-thread5.0.0 版本 (#7441) 
Co-authored-by: 朱耿宇 <zhugengyu@phytium.com.cn>
 2023-05-11 10:25:21 +08:00
wangqinglin fbc1d6f4fd
[fix]:修复GICv2、GICv3中断触发模式设置无效的问题 (#7358) 2023-04-24 17:06:31 +08:00
wangqinglin ac07f40670
优化设置中断模式api (#7359) 2023-04-24 14:16:21 +08:00
Wayne 3309ef6001
[libcpu/arm/cortex-a] Revert safety MMU initialization. (#6796) 
* Revert safety MMU initialization.

Co-authored-by: Wayne Lin <wclin@nuvoton.com>
 2023-03-31 10:06:28 +08:00
Shell eec78d9f5d
[rt-smart] testcase & improvements for memory management (#7099) 
* [utest/mm] add testcase for create/init
format codes of create/init in components/mm

* [libcpu/aarch64] fix user stack check routine

* [kservice] export API for utest

* [utest/mm] testcase for aspace_map
format & modify the files under components/mm related with aspace_map

* [lwp/user_mm] add user_map_varea for mmap feature

* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix

* [utest/mm] testcase for synchronization

* [mm] modify unmap api to improve throughput

* [utest/mm] testcases for cache and varea map

* [format] remove extra space

* [utest/mm] fix testcase problem in header

* [lwp] extend map_user_varea with a flag

* [utest/mm] testcase for lwp_map_user_varea

* [libcpu/arm/cortex-a] fix kernel space layout

* [utest/mm] adjust for armv7 arch
 2023-03-30 08:25:15 +08:00
Shell 18a14cc935
[rt-smart] move sys_cacheflush to lwp_syscall.c (#7048) 
* [syscall] move sys_cacheflush to lwp_syscall.c

* [syscall] improve assertion

* [format] rename to rt_ctassert

* [debug] modified ct assertion on mm_page.c
 2023-03-17 15:11:38 +08:00
wangxiaoyao 484a0d602e [fixup] add cache maintenance ops; 
fix bugs on cache maintenance when starting user app
 2023-02-21 08:48:49 +08:00
Shell 2d09749086
[rt-smart] PV_OFFSET as a variable (#6904) 
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces
 2023-02-14 23:08:32 +08:00
Shell 7450ef6c4d
[rt-smart] kernel virtual memory management layer (#6809) 
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
 2023-01-08 21:08:55 -05:00
guo 68ca9f07a6
[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740) 
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.
 2022-12-16 18:38:28 +08:00
guozhanxin e2bdd8a184 [libcpu] fix cpp11 error 2022-12-14 11:04:00 +08:00
Man, Jianting (Meco) 99bdf978d7
[rtdef] use lower-case to define attributes (#6728) 
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
 2022-12-11 13:12:03 -05:00
guo ecf2d82159
sync branch rt-smart. (#6641) 
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
 2022-12-03 12:07:44 +08:00
xiaoguang_ma 16f6157b1e [bsp] faster startup for cortex-a 
If the application defines dozens of global variables,
the speed of clearing the bss segment will be slower.

Because icache can be enabled before the mmu enabled.
Therefore, in order to speed up the process of clearing the BSS segment,
enable icache needs to be put ahead.
 2022-11-25 18:04:35 +09:00
Wayne Lin ece0c6eef8 Move gtimer driver to libcpu. 2022-10-11 08:46:01 +08:00
Wayne 5d014e8d31 Revert "[libcpu] remove gtimer/pmu from cortex-a" 2022-10-11 08:46:01 +08:00
Meco Man 83b3aadaa3 [Scons][iar][iccarm] IAR统一使用iccarm作为判断条件而不是是用IDE的名字来进行判断 
因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链
此外，将判断条件改为列表方式，这样更方便后续增加其他可能的IAR编译链
 2022-06-09 07:01:59 +08:00
Meco Man 50f041f5c2 [Scons] 将GCC判断条件改为列表方式，方便后续增加新的编译工具链 2022-06-09 07:01:59 +08:00
Tangyuxin c80993f713
[libcpu][arm] Add exception install function (#5827) 2022-04-24 01:03:54 +08:00
zhouji 60c96fbc12 [update] Removed C++ global constructor initialization, this method is not used in GCC4.7 and later versions. 2022-04-20 17:32:02 +08:00
thewon86 f5b0bfd3f4 uniform code writing-disable interrupt 2022-04-20 14:22:43 +08:00
Man, Jianting (Meco) a0f8d43744
[gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM (#5802) 
* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
 2022-04-20 09:56:04 +08:00
tyx d6c74af535 [libcpu][arm] Fix compilation warning 2022-04-19 11:26:11 +08:00
Meco Man 563e49890c [asm] 解决tab和空格混用的问题 2022-01-20 20:57:35 +08:00
mazhiyuan 99e9ea61bc 修复部分bsp编译报错 2021-10-13 11:02:01 +08:00
liukangcc 0e46c8a33d [update] support armclang 2021-09-26 10:46:21 +08:00
Meco Man 1997113fbc FINSH_USING_BUILT_IN_COMMANDS改MSH_USING_BUILT_IN_COMMANDS 2021-08-28 16:48:08 -04:00
Meco Man 29828dc94f [finsh] finsh组件可以选择是否包含内置命令 2021-08-25 19:48:15 -04:00
fenghuijie 0015af02e4 调整代码，以支持cpu usage 2021-07-05 18:33:22 +08:00
fenghuijie e933c1f610 调整异常处理代码结构，以支持backtrace功能 2021-07-05 14:43:33 +08:00
fenghuijie eb79a8a244 修改irq handle接口rt_hw_trap_irq，支持核间IPI中断处理 2021-07-05 14:06:32 +08:00
fenghuijie da701d6b3a 添加dcache invalidate/dcache clean&invalidate接口 2021-07-03 17:34:45 +08:00
wanghaijing a6060a41df Adjust the stack_top to bss 2021-07-03 10:25:30 +08:00
Bernard Xiong 7d3bac8b6e [libcpu] remove gtimer/pmu from cortex-a 2021-07-02 15:07:21 +08:00
zhouji d6e86a67bb [add] 在cortex-a中增加，打开RT_USING_CPU_FFS宏定义时的_rt_ffs实现。 2021-05-27 17:39:03 +08:00
zhouji ffe8d06bd3 [update] 增加获取cortex-a generic timer频率接口 2021-05-14 16:08:32 +08:00
zhouji 1523e4680d [add] 添加gicv3中断控制器代码，更新menuconfig配置选项与utest的config.h 2021-05-14 16:08:31 +08:00
zhouji 42ce237dc9 [update] 整理cortex-a aarch32启动代码 
1. 去除start_gcc.s中set_secondary_cpu_boot_address代码，这部分提取到qemu-vexpress-a9 bsp中。
2. 移动cpu.c中rt_hw_cpu_id函数到cp15_gcc.s，使用汇编实现，采用wake属性，方便bsp根据cpu特性获取CPU ID（多cpu集群中，不同厂家使用组合不一样）.
3. 整理start_gcc.s 适应多核启动，原来的代码只考虑到双核的情况。
 2021-05-14 15:30:31 +08:00
Bernard Xiong f358426c49
Merge pull request #4583 from fenghuijie/master 
[Cortex-A]add gic&gtimer interface
 2021-04-09 15:46:03 +08:00
fenghuijie 62f764edc1 add type modifier for immediate data 2021-04-09 11:07:58 +08:00
fenghuijie 0b4416f0b4 add gic&gtimer interface 2021-04-08 15:46:15 +08:00