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42 Commits

Author SHA1 Message Date
liuxianliang a4eb64b873 update the project for RT-Thread_V4.1.1 2022-08-16 19:38:48 +08:00
Meco Man c9878aacd2 [scons][iar] 将IAR的PLATFORM字段由iar调整为iccarm 
将路径更新为IAR最新版本的路径
 2022-06-09 07:01:59 +08:00
Meco Man 50f041f5c2 [Scons] 将GCC判断条件改为列表方式，方便后续增加新的编译工具链 2022-06-09 07:01:59 +08:00
Man, Jianting (Meco) a0f8d43744
[gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM (#5802) 
* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
 2022-04-20 09:56:04 +08:00
guozhanxin e353b2d5f1 [bsp] Update all projects. 2022-03-29 19:28:06 +08:00
liukangcc ccbd22f493 [update] refresh project 2022-01-26 18:30:23 +08:00
Man, Jianting (Meco) bb1084556f [console] 解决在没有定义RT_USING_DEVICE的情况下使用device报错的问题 
* [console] 解决在没有定义RT_USING_DEVICE的情况下使用device报错的问题

* format codes

* [libc] 整理格式

* refresh projects
 2022-01-09 00:20:32 +08:00
Meco Man 918ee6147c add RT_USING_POSIX_STDIO 2022-01-05 23:11:58 +08:00
guo 2babfedd52
Merge pull request #5397 from liukangcc/cflag 
[update] CFLAGS
 2021-12-21 17:50:54 +08:00
Man, Jianting (Meco) 6369e89502
[posix] POSIX standard implementation for PSE51 (#5384) 
* [posix] POSIX standard implementation for PSE51

- add some posix's interfaces that we haven't before.
- these PR have passed the interface definition test across gcc platfrom;
- have tested base on qemu-a9 and stm32h750-art-pi.

* [newlib] only enable POSIX.1-1990

* update projects
 2021-12-17 15:34:17 +08:00
liukangcc b0f6c2fbae [update] CFLAGS 2021-12-17 14:28:40 +08:00
Meco Man bd80b7a4a1 对finsh_set_device调用增加宏定义限制 2021-11-24 08:57:12 -05:00
guo b1baf42d4e
Revert "Fix compiler flags issue" 2021-10-14 14:36:18 +08:00
JCZou 0369db718c Fix compiler flags issue 
CCFLAGS is used by gcc and g++ compiler. So CFLAGS should be used for
gcc to avoid passing gcc flags to g++.
 2021-08-19 08:53:27 +02:00
yangjie 75e4c9dd0a [bsp]update GPL license to Apache-2.0, and format files 2021-04-09 10:52:34 +08:00
Meco Man 958d940575 [lpcxxx] auto formatted 2021-03-17 02:26:35 +08:00
Meco Man 6263211623 [CI]修复脚本语法错误，解决CI报警 2021-03-10 14:05:08 +08:00
liruncong 6df5634b52 [bsp]SECTION=>RT_SECTION(与catch2中SECTION冲突) 2021-02-09 23:25:56 +08:00
David Lin 95c76c6202
Update vbus_hw.h 2020-11-26 23:41:20 +08:00
Ernest 7be06b67bb [add] default environment 2019-10-22 16:48:57 +08:00
yangjie 2f0e312a7f [bsp]remove log_trace item from all bsp 2019-04-23 14:23:07 +08:00
armink 0d7ba79219 Remove the DBG_COLOR and DBG_ENABLE definition. 2019-03-06 17:54:30 +08:00
chenchaoqun@rt-thread.com bb8e89e851 【串口】宏定义对应增加 2018-12-17 09:38:53 +08:00
misonyo a454393994 [BSP][all NXP]change license to Apache-2.0 2018-10-22 11:02:50 +08:00
liang yongxiang cd39c2525a [bsp] support get compiler path by environment variables for IAR 2018-04-07 15:43:45 +08:00
moebius.ever 8160a4089a fixed #1261, modify "axf" to "elf" in rtconfig.py for GCC Toolchains configuration. 2018-03-07 15:28:51 +08:00
aozima 19433e0cf5 update SConscript: support scons 3. 2018-02-06 20:07:28 +08:00
Bernard Xiong 1368e01470 [BSP] fix RT_DFS_ELM_MAX_LFN to 255. 2017-04-09 19:23:28 +08:00
Grissiom 81b37fb1f9 lpc43xx: add copy-right info in vbus drivers 2015-01-08 17:16:26 +08:00
Grissiom 05a01884e6 lpc43xx: fix clock configure 2015-01-07 17:15:50 +08:00
Grissiom 11026d0579 lpc43xx: clean the .o before building M0 and M4 
SCons will omit the file in parent dir of SConstruct somehow and build
the object files in that dir instead of in variant dir. This cause
problem because we cannot mix the object files between M0 and M4 which
SCons failed to rebuild. So we have to manually remove the files before
building.
 2015-01-07 17:15:49 +08:00
Grissiom f7415e595e VBus: added 
Currently only lpc43xx is supported.
 2015-01-07 17:15:49 +08:00
Grissiom fcff552626 lpc43xx: fix the SConscripts 2015-01-07 10:25:44 +08:00
Grissiom 03a2847f12 lpc43xx: fix some compile warnings 2015-01-07 10:25:44 +08:00
Grissiom 7965708050 lpc43xx: add -Wall 2015-01-07 10:25:44 +08:00
Grissiom 0ca281c162 lpc43xx: add flash linker script for GCC 2015-01-06 13:40:46 +08:00
Grissiom bcbe180886 lpc43xx: fix the default RTT_ROOT in SConstruct 2015-01-06 13:39:54 +08:00
Grissiom 773a884a4b lpc43xx: move board.c into M0/M4 2015-01-06 10:46:31 +08:00
Grissiom d2e4050a70 lpc43xx: update template.uvproj and add sct files 2015-01-06 10:46:31 +08:00
Grissiom 959f6c695f lpc43xx: move the application code into its own space 2015-01-06 10:46:31 +08:00
nongxiaoming 7b32a2bd31 lpc43xx:add the linker script file. 2014-07-15 15:42:22 +08:00
nongxiaoming e152b68e33 add the lpc43xx bsp support. 2014-07-13 14:13:39 +08:00