Bernard Xiong
2bcb9edd91
Add gettimeofday declaration in sys/time.h
2013-09-08 15:01:29 +08:00
Grissiom
dacd2cb9a9
travis: add scan-build in PATH
2013-09-07 18:31:05 +08:00
Grissiom
4240ebd73f
travis: don't export RTT_CC in before_script if it's been set
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This gives ways for bsp to set it's own RTT_CC.
2013-09-07 17:17:58 +08:00
Grissiom
eae89b9576
travis: install the gcc-multilib to get the 32bit build OK
2013-09-07 16:15:43 +08:00
Grissiom
5ab9943eb5
travis: try to fix the SDL building
2013-09-07 16:01:03 +08:00
Grissiom
0168048f27
travis: auto build the simulator
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Building is only the first step. Correctness is what we need. There are
already many GCC builds for other bsp so GCC building for simulator is
not important. So I use clang-analyze to check all the source codes in
simulator project. Hope it will help us.
2013-09-07 15:46:11 +08:00
Grissiom
35cac170fa
simulator: add clang-analyze tool support
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When CROSS_TOOL or 'RTT_CC' env is setted to 'clang-analyze', it will
use Clang to check the codes.
2013-09-07 15:15:48 +08:00
Grissiom
c289aa9fc1
Scons: add a custom tool to do clang static analyze
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Bsps can use the clang analyzer as a tool:
env = Environment(toolpath=[os.path.join(RTT_ROOT, 'tools',
'tools')], tools = ['clang-analyze'])
When building the project, the static analyzer will be called to check
all the C code. The warnings are print to stderr.
2013-09-07 15:15:48 +08:00
Grissiom
3b4f3f5931
Scons: run `clang -Wall -fsyntax-only` in clang-analyze
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The `clang -fsyntax-only` will give us additional warning messages in
the console.
2013-09-07 15:15:47 +08:00
Grissiom
18692c29b8
simulator: get CROSS_TOOL and EXEC_PATH from env
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Simulator get it's way to Travis CI ready.
2013-09-06 21:54:27 +08:00
Grissiom
c6e81b58d9
simulator: move SDL setting staff into drivers/SConstruct
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This could not only make a cleaner SConstruct, but could also benefit
RTGUI building.
2013-09-06 21:49:53 +08:00
Bernard Xiong
15b9db80d6
Merge pull request #154 from grissiom/simulator
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sim/posix: move rt_hw_context_switch_interrupt after it's definition
2013-09-03 22:55:17 -07:00
Grissiom
3ebc766521
sim/posix: move rt_hw_context_switch_interrupt after it's definition
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This fix a compile error in Clang.
2013-09-04 00:05:03 +08:00
Bernard Xiong
b4166e0b25
Merge pull request #153 from grissiom/stm32f10x
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stm32f10x: fix the rtgui initialization
2013-09-03 05:46:20 -07:00
Grissiom
d70761222c
stm32f10x: fix the rtgui initialization
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The rtgui_system_server_init prototype is wrong. And if we use
RT_USING_COMPONENTS_INIT, there is no need to call
rtgui_system_server_init again.
2013-09-03 20:09:45 +08:00
Bernard Xiong
49e28c2629
Merge pull request #152 from grissiom/log-trace
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log_trace: cleanup
2013-09-03 05:00:40 -07:00
Grissiom
ea66b820e1
log_trace: cleanup
2013-09-03 16:09:16 +08:00
Bernard Xiong
51ce91f30b
Merge pull request #151 from grissiom/finsh
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finsh: use alias in the variable definition
2013-09-02 00:12:03 -07:00
Bernard Xiong
e2a0b1930b
Merge pull request #150 from grissiom/simulator-linux
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Simulator linux
2013-08-31 17:14:21 -07:00
Grissiom
c05b205390
finsh: use alias in the variable definition
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With this patch, one could define two alias for the same function like:
FINSH_FUNCTION_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reboot the cpu);
FINSH_FUNCTION_EXPORT_ALIAS(rt_hw_cpu_reset, __cmd_reboot, reboot the cpu);
Suitable for being used in MSH/Finsh.
2013-08-31 17:58:34 +08:00
Grissiom
6563ae6cab
simulator: init SDL after rt_components_init
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SDL may use DFS to open files. It should be run after
rt_components_init.
2013-08-31 16:46:36 +08:00
Grissiom
3d0c0af371
simulator: fix SDL initialization under Linux
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rt_hw_sdl_start should wait untill the rtgui_graphic_set_device is
called int the sdl_loop. Use pthread_cond_wait to achieve this in Linux.
2013-08-31 16:30:32 +08:00
Bernard Xiong
f7f14cf566
Merge pull request #146 from grissiom/rtt-next
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Some fix for the portal device
2013-08-26 21:12:55 -07:00
Grissiom
246bdde8de
dev/portal: fix bug in portal callback forwarding
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When forwarding rx/tx callback from the underlaying device(pipe), the
"dev" argument should be the portal. So the portal callback could think
itself as called.
2013-08-22 16:43:06 +08:00
Grissiom
824261d3bc
dev/portal: add checks on oflag
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It does not make sense to open portal without a flag. One should open a
portal with RT_DEVICE_OFLAG_RDWR in most cases.
2013-08-22 15:12:00 +08:00
Bernard Xiong
b4ba2657bb
Merge pull request #145 from grissiom/hot-fix
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finsh/cmd: add description for new pipe and portal device
2013-08-20 20:02:31 -07:00
Grissiom
b4ab82284f
finsh/cmd: add description for new pipe and portal device
2013-08-20 14:27:28 +08:00
Bernard Xiong
59f0f66996
Merge pull request #144 from grissiom/portal-device
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Portal device
2013-08-19 22:41:31 -07:00
Grissiom
6e676e7754
dev/portal: implement portal device
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Portal is a device that connect devices. Currently, you can only connect
pipes in portal. Pipes are unidirectional. But with portal, you can
construct a bidirectional device with two pipes.
2013-08-20 12:54:43 +08:00
Grissiom
7e68096a88
dev/pipe: make pipe a type of device
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Pipe have many differences with char device. The main difference is
altough pipe have both read and write, it is unidirectional in nature.
2013-08-20 10:16:55 +08:00
Bernard Xiong
a8f9f85f66
Merge pull request #143 from grissiom/ringbuffer-pipe
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Ringbuffer and Pipe
2013-08-19 02:39:56 -07:00
Grissiom
0340300f89
dev/pipe: cleanup
2013-08-19 16:25:17 +08:00
Grissiom
e8cca2315a
dev/pipe: call rx_indicate the time we resume reader
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Some reader(FinSh again) would like to block on a semaphore which is
released in rx_indicate. So we should invoke rx_indicate in
_rt_pipe_resume_reader.
2013-08-19 15:57:59 +08:00
Grissiom
d683d32bd5
device/pipe: add nonblocking read/write and force write mode
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The previous implementation will always blocks the reader/writer.
However, at least FinSh would expect the device to be nonblocking ---
read should return 0 when there is no data in it.
2013-08-19 15:35:56 +08:00
Grissiom
4919d29d69
ringbuffer: add put_force and putchar_force API
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Add the APIs that will discard the old data when rb is full.
2013-08-19 15:32:42 +08:00
Grissiom
981d929b56
ringbuffer: fix the ambiguous name
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RT_RINGBUFFER_SIZE could mean "the size of the whole buffer", "the size
of the empty space" or "the size of the data". Moreover, it's never a
micro anymore. Change it to rt_ringbuffer_data_len before it's too late.
Also, RT_RINGBUFFER_EMPTY is changed to rt_ringbuffer_space_len.
2013-08-19 14:12:35 +08:00
bernard
6f75988cee
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
2013-08-19 13:00:48 +08:00
Bernard Xiong
90c9c8a27a
Merge pull request #142 from grissiom/pipe-device
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device/pipe: add rt_pipe_{init,detach}
2013-08-18 21:47:46 -07:00
bernard
d8695085dc
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
2013-08-19 12:47:40 +08:00
bernard
fa934fa7bd
add shell device automatically setting for rx_ind
2013-08-19 12:46:04 +08:00
Grissiom
38ce3879d8
device/pipe: add rt_pipe_{init,detach}
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This provide the possibility that allocate the buffer of the ringbuffer
on a specific region, instead of always mallocing it. It also bring us
the benefit of using pipe device on the systems without heap.
2013-08-19 12:28:59 +08:00
Bernard Xiong
cb880fd763
Merge pull request #141 from grissiom/fix-schedule-debug
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fix debug output of scheduler
2013-08-18 19:28:20 -07:00
Grissiom
ad17bc2908
fix debug output of scheduler
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When print the thread names, we should use "%.*s" instead of bare "%s".
2013-08-19 10:08:11 +08:00
Bernard Xiong
0826efaab3
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
2013-08-12 07:22:04 -07:00
Bernard Xiong
05b9eb0b82
remove compiling warning
2013-08-12 07:21:29 -07:00
bernard
dce51ddf05
add buildlib for Keil MDK
2013-08-09 22:26:22 +08:00
bernard
60a0529553
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
2013-07-30 23:30:27 +08:00
Bernard Xiong
e301d14979
Merge pull request #132 from MrVan/sep6200
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SEP6200 Support
2013-07-29 22:35:31 -07:00
bernard
ac10730492
fix O_APPEND write issue in RAMFS
2013-07-29 14:50:12 +08:00
bernard
ac850ef3f0
add device_open/close in mkfs
2013-07-29 14:43:52 +08:00