Commit Graph

23 Commits

Author SHA1 Message Date
Meco Man 83b3aadaa3 [Scons][iar][iccarm] IAR统一使用iccarm作为判断条件而不是是用IDE的名字来进行判断
因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链
此外,将判断条件改为列表方式,这样更方便后续增加其他可能的IAR编译链
2022-06-09 07:01:59 +08:00
Meco Man 50f041f5c2 [Scons] 将GCC判断条件改为列表方式,方便后续增加新的编译工具链 2022-06-09 07:01:59 +08:00
thewon86 f5b0bfd3f4 uniform code writing-disable interrupt 2022-04-20 14:22:43 +08:00
Man, Jianting (Meco) a0f8d43744
[gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM (#5802)
* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
2022-04-20 09:56:04 +08:00
Meco Man 563e49890c [asm] 解决tab和空格混用的问题 2022-01-20 20:57:35 +08:00
liukangcc 0e46c8a33d [update] support armclang 2021-09-26 10:46:21 +08:00
Meco Man 1997113fbc FINSH_USING_BUILT_IN_COMMANDS改MSH_USING_BUILT_IN_COMMANDS 2021-08-28 16:48:08 -04:00
Meco Man 29828dc94f [finsh] finsh组件可以选择是否包含内置命令 2021-08-25 19:48:15 -04:00
Meco Man 6c907c3a47 [libcpu] auto formatted 2021-03-27 17:51:56 +08:00
liruncong 12d5ca60c5 [libcpu/arm]SECTION=>RT_SECTION(与catch2中SECTION冲突) 2021-02-09 23:25:34 +08:00
yangjie eeaf1fcc50 resolve Conflicts
bsp/nrf52832/board/Sconscript
	bsp/nrf52832/startups/Sconscript
	bsp/raspberry-pi/raspi4-32/driver/SConscript
2020-12-28 12:02:31 +08:00
yangjie ef62febf1f [SConscript]update group name 2020-12-19 16:49:11 +08:00
yangjie11 ba83ddc3c4 [SConscript] change libcpu to LIBARCH,and correcte letter case 2020-11-30 15:52:43 +08:00
yangjie11 91261e25b9 [SConscript]rename group name 2020-11-20 13:38:11 +08:00
张世争 355f8dd95c [libcpu][update]重启与关机函数:rt_hw_cpu_shutdown、rt_hw_cpu_reset,补充WEAK属性 2020-11-20 08:49:51 +08:00
aozima 525d353403 fixed linker script and stack align issues. 2019-10-22 09:47:41 +08:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
liruncong 96691760dc [libcpu/arm/realview-a8-vmm]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:36:34 +08:00
Bernard Xiong 7c425408b4 [license] Change the license of libarm to Apache. 2018-10-15 01:35:07 +08:00
SummerGift fc7a5abc76 [libcpu]: add 8-byte alignment for arm architecture && optimize code format 2017-12-21 16:37:38 +08:00
Grissiom 2b7be29cad [bsp/rva8] enable group{0,1} interrupt forwarding in gic initialization
When RT-Thread is running stand alone, it forgot to enable the
distributor of GIC.
2014-04-08 11:54:03 +08:00
Grissiom c0f0c2322f [libcpu/arm] remove useless cpsr updating in rt_hw_context_switch_to
This piece of code will enable the interrupt early before switching to
the first thread. Although it is harmless, but not prefect.
2014-04-08 11:24:04 +08:00
Grissiom 28f11fdd7b [vmm] add realview-pb-a8 VMM support 2014-04-03 17:59:14 +08:00