c236e8c5d5
[bsp] Adapt ls{1b,1c}dev to new mips common code
...
LS1C selfboot feature have been rewiritten, and we changed
bare boot base to 0x80000000 to better utilize memory.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-17 11:09:59 +08:00
f1bc40d697
ls1bdev: add uart3 support
2014-08-18 15:13:49 +08:00
83ce430902
update loongson 1B dev: Modify the interrupt interface implementations.
2013-03-31 17:32:25 +08:00
b4de7cce57
Re-normalizing the repo
2013-01-08 22:40:58 +08:00
f1e6f2f6ca
delete the useless files and update the file headers
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2186 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-06-26 03:45:53 +00:00
4dd1acf294
update ls1bdev
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2176 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-06-19 00:43:54 +00:00
Jiaxun Yang
Grissiom
aozima
Ming, Bai
dzzxzz@gmail.com