Commit Graph

1273 Commits

Author SHA1 Message Date
Bernard Xiong bff1bb3d7b [BSP] update MDK project file for STM32F4 2015-01-20 15:58:37 +08:00
Bernard Xiong 080c8912ea Merge remote-tracking branch 'upstream/master' 2015-01-20 15:56:52 +08:00
Bernard Xiong 9261c37e0e [BSP] Add GPIO driver for STM32F4 2015-01-20 07:55:52 +00:00
Bernard Xiong 2b7600bdf3 [BSP] update MDK project file for STM32F4 2015-01-20 15:52:39 +08:00
Bernard Xiong 6acf4a4528 [BSP] Update UART and GPIO driver with framework in STM32F4 2015-01-20 07:23:59 +00:00
Grissiom c565925169 bsp/{cortex-M}: fix the SysTick_Config
SysTick_Config substract one inside the function. So there is no need to
substract one when passing the parameter.
2015-01-09 15:26:06 +08:00
Bernard Xiong 56ab0995c1 Merge pull request #409 from grissiom/lpc43xx
Lpc43xx
2015-01-09 10:00:25 +08:00
Grissiom 81b37fb1f9 lpc43xx: add copy-right info in vbus drivers 2015-01-08 17:16:26 +08:00
Grissiom 05a01884e6 lpc43xx: fix clock configure 2015-01-07 17:15:50 +08:00
Grissiom 11026d0579 lpc43xx: clean the .o before building M0 and M4
SCons will omit the file in parent dir of SConstruct somehow and build
the object files in that dir instead of in variant dir. This cause
problem because we cannot mix the object files between M0 and M4 which
SCons failed to rebuild. So we have to manually remove the files before
building.
2015-01-07 17:15:49 +08:00
Grissiom 17a75eaa02 lpc43xx: remove the fpu settings in startup_LPC43xx_M0 2015-01-07 17:15:49 +08:00
Grissiom 22938a93ef lpc43xx: fix some compile warnings 2015-01-07 17:15:49 +08:00
Grissiom f7415e595e VBus: added
Currently only lpc43xx is supported.
2015-01-07 17:15:49 +08:00
Grissiom fcff552626 lpc43xx: fix the SConscripts 2015-01-07 10:25:44 +08:00
Grissiom 03a2847f12 lpc43xx: fix some compile warnings 2015-01-07 10:25:44 +08:00
Grissiom 7965708050 lpc43xx: add -Wall 2015-01-07 10:25:44 +08:00
Grissiom df31744178 lpc43xx: fix the M0 project template 2015-01-07 10:25:43 +08:00
Coing 70aaf4237f fix project.uvoptx can't open,recreate the project.uvoptx. this commit is for post 2015-01-06 21:54:47 +08:00
Grissiom 0ca281c162 lpc43xx: add flash linker script for GCC 2015-01-06 13:40:46 +08:00
Grissiom bcbe180886 lpc43xx: fix the default RTT_ROOT in SConstruct 2015-01-06 13:39:54 +08:00
Grissiom fca84daa9d lpc43xx: fix the startup code for GCC 2015-01-06 12:42:12 +08:00
Grissiom 833339e1c6 lpc43xx: output a newline in the header file
Some compiler is brain-damaged that it will yeild a warning for headers
not ended with a newline. Yes, I mean you, Keil.
2015-01-06 11:03:01 +08:00
Grissiom ff3ab9c0ab lpc43xx: add readme 2015-01-06 10:46:32 +08:00
Grissiom 090adcf4c0 lpc43xx: don't set the Clock again in M0 core
M0 core is always booted by the M4 core. It means that if we are running
in M0, the clock is always configured.
2015-01-06 10:46:32 +08:00
Grissiom 21ef733251 lpc43xx: use the RIT timer as SysTick in M0 core 2015-01-06 10:46:31 +08:00
Grissiom 773a884a4b lpc43xx: move board.c into M0/M4 2015-01-06 10:46:31 +08:00
Grissiom d2e4050a70 lpc43xx: update template.uvproj and add sct files 2015-01-06 10:46:31 +08:00
Grissiom 959f6c695f lpc43xx: move the application code into its own space 2015-01-06 10:46:31 +08:00
Grissiom 5542af8b7c lpc43xx/driver: fix the VTOR setting 2015-01-06 10:25:43 +08:00
Grissiom f609a63564 lpc43xx: add uart3 support 2015-01-06 10:25:43 +08:00
Grissiom a447b5f3cf lpc43xx: refactor uart drivers 2015-01-06 10:25:43 +08:00
unknown a0b71c1c77 fix stm32f407 uart3 TX config error 2014-12-30 14:18:05 +08:00
pangwei 3c1c093230 RT_TIMER_TICK_PER_SECOND in rtconfig.h for softtime scheduler ,maybe is not used. 2014-12-23 09:44:13 +08:00
Coing 056b3bed4f create project.uvprojx by scons mdk5 and delete some useless files 2014-12-17 20:34:19 +08:00
Coing f97062baa7 create project.uvprojx by scons and use mdk5 2014-12-17 20:27:39 +08:00
Coing e9825dc47f change project.uvprojx C/C++ path
Before the project was established with RB_ROOT
2014-12-16 20:49:49 +08:00
Coing 41f70431f5 add power_lib, Last ignored 2014-12-16 19:57:12 +08:00
Coing e4fdb84e96 add bsp lpc54102 2014-12-16 19:54:29 +08:00
Bernard Xiong 82ef447e44 [BSP] Update lpc176x GNU link script 2014-12-07 03:02:50 +00:00
Bright Pan 3abf1fd5ba Add uart driver and finsh function 2014-11-29 12:34:18 +08:00
Bright Pan d50ab16e6f Port to gcc and fix keil project 2014-11-25 01:08:13 +08:00
Arda 143d3b8224 Merge pull request #2 from RT-Thread/master
update from official source
2014-11-24 11:57:31 +08:00
Bright Pan 9957f94d0b [BSP] Port to NuMicro M051 Series support for Nuvoton corp.
1. adapt to M052xDN/xDE, M054xDN/xDE, M058xDN/xDE, M0516/xDN/xDE.
    2. support heap memory management.
2014-11-23 05:18:15 +08:00
Bernard Xiong 9ecd18411f Merge pull request #381 from bright-pan/master
Add mdk5 building
2014-11-19 18:43:40 +08:00
Bright Pan 3c65a522fd Add mdk5 project for stm32 bsps 2014-11-19 15:28:56 +08:00
Grissiom 6c1c83e6da efm32: return empty variable instead of Return('') 2014-11-19 13:20:32 +08:00
limxuzheng cbec4313b1 add rx62n driver library file 2014-11-12 01:18:33 +08:00
limxuzheng 4fea46c83c support rx62n 2014-11-12 01:09:43 +08:00
xiaonong d5332e2799 bsp:fix the bug of lpc43xx uart interrupt enable in driver initialize. 2014-11-03 23:02:36 +08:00
Bernard Xiong b6a9fad9ee [BSP] Add GCC compiler support for mb9bf568r 2014-11-03 13:23:56 +08:00
aozima 1f47eb88c8 [CME_M7] update gcc compile script. 2014-11-02 14:51:52 +08:00
aozima 4c31c22802 [CME_M7] update gcc linker script. 2014-11-02 14:51:47 +08:00
aozima c6d9d6e3f9 [CME_M7] change file name to lower case. 2014-11-02 14:50:14 +08:00
aozima 4c1eff52e2 [CME_M7] add GCC compile support. 2014-11-02 13:52:16 +08:00
Bernard Xiong fdfb4dad79 [BSP] fix GCC compiling issue in LPC408x bsp 2014-11-01 23:17:04 +08:00
Bernard Xiong 38be10cf89 [BSP] fix GCC compiling issue when enable C++ support 2014-11-01 14:06:51 +08:00
Bernard Xiong 796c49347e [BSP] Fix the gcc compiling issue in LPC408x bsp 2014-11-01 09:26:56 +08:00
Bernard Xiong 3bf721a6fb [BSP] Update C++ compiling options 2014-11-01 09:18:21 +08:00
Bernard Xiong 1b793ad039 [BSP] use RT_USING_LIBC instead of RT_USING_NEWLIB 2014-11-01 09:15:07 +08:00
Bernard Xiong 692e597847 [BSP] use RT_USING_LIBC instead of RT_USING_NEWLIB 2014-10-29 13:32:36 +00:00
yangfasheng e5953e671c Add mb9bf568r to bsp 2014-10-20 10:10:18 +08:00
Bernard Xiong 8c2008b050 [BSP] fix compiling error for beaglebone board 2014-09-25 09:42:21 +08:00
Bernard Xiong ab20554254 [BSP] change UART flag when register device driver. 2014-09-24 11:04:57 +08:00
Bernard Xiong 640db6bdbd [BSP] change UART flag when register device driver. 2014-09-24 11:01:07 +08:00
Bernard Xiong ec64b60c06 Merge pull request #343 from wzyy2/master
[GDB stub]add GDB stub
2014-09-24 10:59:14 +08:00
aozima f40d11e9bc update project. 2014-09-21 21:51:13 +08:00
aozima 4b99afc2b9 update EMAC driver. 2014-09-21 21:50:26 +08:00
aozima 89bcb70e5f add delay for PHY check. 2014-09-21 21:49:43 +08:00
aozima ff4fcd5b56 add EMAC driver. 2014-09-21 21:48:26 +08:00
aozima a8106442e1 update uart driver. 2014-09-21 21:46:50 +08:00
aozima 9da1668cfe import CM3-M7 project. 2014-09-21 21:45:36 +08:00
陈豪 daac5388af [bsp]change BBB uart flag 2014-09-20 20:56:02 +08:00
陈豪 2a1e7d56fc [bsp]Comment stm32f407 uart6 2014-09-20 01:44:56 +08:00
陈豪 62af08370b Merge pull request #2 from RT-Thread/master
sync
2014-09-20 01:19:42 +08:00
armink 77b214f1bc [BSP]Add serial receive overflow interrupt to stm32f10x ISR. 2014-09-13 11:53:21 +08:00
armink 04c4e5d9a4 [BSP]Fixes two writing mistake for stm32f10x. 2014-09-13 11:50:54 +08:00
tcz717 537beefa70 拼写错误
drvers->drivers
2014-09-08 19:53:55 +08:00
Bernard Xiong a5119d696c [BSP] Add RT_DEVICE_CTRL_BLK_GETGEOME command handling in device control of LPC176x bsp 2014-08-27 09:23:32 +08:00
Bernard Xiong a55fd4b9c1 Merge pull request #314 from grissiom/ls1b
Ls1b
2014-08-19 10:48:49 +08:00
Grissiom 39ac8baeac ls1bdev: format code in startup.c 2014-08-18 15:19:06 +08:00
Grissiom bfc140826a ls1bdev: init application after other things initialized 2014-08-18 15:17:36 +08:00
Grissiom 259cfdc79f ls1bdev: don't hardcode the uart base address in rt_hw_console_output 2014-08-18 15:14:22 +08:00
Grissiom f1bc40d697 ls1bdev: add uart3 support 2014-08-18 15:13:49 +08:00
MikeMao 45f0e289c6 [BSP]BM9BF618S:fix timer initialization issue. 2014-08-18 11:18:56 +08:00
MikeMao 45b2f2f07b [BSP]BM9BF618S:Fix timer initialization issue。 2014-08-18 10:52:17 +08:00
MikeMao b98c70fc3c test 2014-08-18 10:48:11 +08:00
MikeMao 915f1adc93 [BSP]BM9BF618S:fix timer initialization issue. 2014-08-18 10:11:32 +08:00
MikeMao 04a7c95037 [BSP]BM9BF618S:Fix timer initialization issue 2014-08-15 20:13:54 +08:00
陈豪 1f05b87e5a [bsp]stm32f4xx typo 2014-08-12 20:30:55 +08:00
陈豪 4cf77e255f [bsp]add gdb support for BBB 2014-08-12 18:39:53 +08:00
陈豪 ae8e46de1f Revert "[bsp]add gdb support for BBB"
This reverts commit a966dd3c38.
2014-08-12 18:27:50 +08:00
陈豪 a966dd3c38 [bsp]add gdb support for BBB 2014-08-12 18:27:22 +08:00
陈豪 ae3b6583ce [bsp]add gdb support for stm32f4xx 2014-08-12 18:22:04 +08:00
ArdaFu bc2a890ab0 [BSP] TM4C129X: fix the bug that components_init do not work in IAR project
1. modify each dirver's INIT_EXPORT micro.
2. modify the lwip parameters' in rtconfig.h
3. insert keep section .rti_fn* in IAR link file
4. change part id from TM4C129XNCZAD to TM4C1294NCPDT
2014-07-31 14:11:26 +08:00
Bernard Xiong 0fafa355f3 Merge pull request #307 from ArdaFu/master
[BSP] tm4c129x Add EMAC/PHY driver
2014-07-27 06:14:35 +08:00
ArdaFu baf608f156 [BSP] tm4c129x: fix compile bug when turn RT_USING_LWIP
1. Resize RT_LWIP_SEG_NUM drom 8 to 12
2. modify gcc compile switch, using C99
2014-07-25 23:25:32 +08:00
ArdaFu 3879133d90 [BSP] tm4c129x add eth driver
1. Add ETH MAC driver using DMA for Tx and Rx lwip pBuf.
2. Modify the tivaware emac library to fix the bug that PHY read is not stable when sysclk is 120MHz
3. In PHY IRQ handler, insert a dummy reading (REG_BMSR) before read PHY_STS to force update STS register.
2014-07-25 19:07:25 +08:00
ArdaFu 1e396417d8 Revert "[BSP] tm4c129x:"
This reverts commit 666d12988a.
2014-07-25 19:02:37 +08:00
ArdaFu 666d12988a [BSP] tm4c129x:
1. Add ETH MAC driver using DMA for Tx and Rx lwip pBuf.
2. Modify the tivaware emac library to fix the bug that PHY read is not stable when sysclk is 120MHz
3. In PHY IRQ handler, insert a dummy reading (REG_BMSR) before read PHY_STS to force update STS register.
2014-07-25 18:58:56 +08:00
Bernard Xiong 4e624d857e [bsp] Fix MB9BF618s scons building issue 2014-07-21 22:02:27 +08:00