rt-thread

Author	SHA1	Message	Date
Shell	7528645f59	feat: libcpu/risc-v: unify context on c906, virt64 Changes: - added config for NEW_CTX_SWITCH - used new context on c906 sched switch routine - update _rt_hw_stack_init to fit into NEW_CTX_SWITCH - separated vector ctx from the generic Signed-off-by: Shell <smokewood@qq.com>	2024-09-11 18:06:51 -04:00
flyingcys	82f30aa54f	rename c906 FPU macro (#9290 ) 1. 修改 ENABLE_FPU 为 ARCH_RISCV_FPU，与libcpu/common 保持统一 2. 对 bsp/cvitek/cv18xx_risc-v 中增加使能 ARCH_RISCV_FPU 的动作。解决了 issue #9075	2024-08-27 00:46:41 -04:00
Yuqiang Wang	c6bdee3c50	[ci] open ci check with function declaration warning (#8546 )	2024-02-20 22:45:04 -05:00
xqyjlj	1b6f0e88a3	🐞 fix: fix d1s smart build (#8212 )	2023-11-02 20:16:02 +08:00
Shell	7450ef6c4d	[rt-smart] kernel virtual memory management layer (#6809 ) synchronize virtual memory system works. adding kernel virtual memory management layer for page-based MMU enabled architecture porting libcpu MMU codes porting lwp memory related codes	2023-01-08 21:08:55 -05:00
guo	ecf2d82159	sync branch rt-smart. (#6641 ) * Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <zhangbingru@rt-thread.com> Co-authored-by: zhkag <zhkag@foxmail.com>	2022-12-03 12:07:44 +08:00