Commit Graph

17 Commits

Author SHA1 Message Date
GuEe-GUI 3d503e931b [DRIVER/PIC] Add ARM GICv2/v3 V2M, ITS support.
Fix some code style and init for V2M, ITS.

V2M is the PCI MSI/MSI-X for GICv2.
ITS is the PCI MSI/MSI-X for GICv3/v4.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-19 21:14:42 +08:00
GuEe-GUI 94e49755af [FEATURE/PIC] support PIC cancel (only in debug)
PIC may free because some wrongs in debug.
We should remove in PIC list or there are
some undefined behavior will happen.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-19 21:14:42 +08:00
GuEe-GUI 04cdbc647c [FIXUP/PIC] pirq's child handler should lock less
When call the child handler, the PIC ops needn't
lock again.
Critical zone protection by PIC implementers.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-19 21:14:42 +08:00
GuEe-GUI 55b40b5164 [FIXUP/PIC] set interrupt status when do traps
Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-19 21:14:42 +08:00
GuEe-GUI 584f4b869d [PIC/FIXUP] pirq reinit fail
don't reinit pirq's list if cascade

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-09-19 21:14:42 +08:00
zms123456 22b5e5fd7b
[components][ktime]support period ktime timeout and multiple ktimer_hrtimer (#8972)
* support period time

* enable multiple ktimer

* mv set delay_cnt to hrtimer_start

* add ktime debug info

* change current_irq_begin to local var

* fix bug: setting current timer and setting timeout in driver aren't atomicly

* create->init

* refactoring ktime
2024-06-23 22:08:54 +08:00
GUI 1d614a819d
[DM/feature] Implement PIC irq state { get; set } (#9006)
* [DM/feature] Implement PIC irq state { get; set }

There are some common state for irq:
1. Pending: IRQ was triggered, but software not ACK.
2. Active: IRQ was ACK, but not EOI.
3. Masked: IRQ was masked or umasked.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [DM/pic] Support IRQ state { get; set } for ARM GICv2/v3

Signed-off-by: GuEe-GUI <2991707448@qq.com>

---------

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-31 17:37:39 +08:00
zms123456 ef184d2157
[fix]fix compile err in pic-gic (#9015)
fix compile err in pic-gic
2024-05-31 17:33:34 +08:00
GUI de352aee62
[PIC] Make affinity helper interface (#8995)
* [PIC] Make affinity helper interface

Signed-off-by: GuEe-GUI <2991707448@qq.com>

* [PIC/GIC] Fixup GIC affinity init

GICv2 is not support if current CPU is not startup,
but RT-Thread SMP is startup after the devices init
in the `main` thread.

This patch fixup the cpumask to init once and check
the init status in affinity interface.

Signed-off-by: GuEe-GUI <2991707448@qq.com>

---------

Signed-off-by: GuEe-GUI <2991707448@qq.com>
2024-05-28 09:55:24 +08:00
zms123456 6101f1fd29
[components][driver]add isr statistics (#8955)
add isr statistics
2024-05-21 09:01:42 +08:00
zhao maosheng 5dba9a4214 remove intr disable 2024-05-10 14:39:53 +08:00
zhao maosheng e2214cc899 add percpu interrupt info 2024-05-10 14:39:53 +08:00
zms123456 0bcf5968c2
[components][drivers]delete nonexist include file 2024-04-16 22:15:51 -04:00
Shell 864055bf18
[fixup] aarch64 UMP compiler error (#8677)
Signed-off-by: Shell <smokewood@qq.com>
2024-03-30 17:58:38 +08:00
zms123456 195f94ef1d
[components][drivers]add pic-gic (#8388) 2024-02-29 09:39:56 +08:00
ErikChanHub 2f5e4ac27e
【dd2.0】Support the Core API for dd2.0 (#7791) 2023-07-13 14:49:35 +08:00
wusongjie 8aa4366cb2 Drivers: Support Open Firmware API and model of PIC
We support OFW API to replace fdt old API, and add
IRQ, IO, Platform-Bus, CPUs ... OFW node contorl.
To support work with Device Tree or ACPI in drivers
that use IRQ, we make a programmable interrupt
controller driver's model.

Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>
2023-07-05 16:45:16 +08:00