aozima
13c30f9269
update usart driver: use serial driver component.
2013-07-12 23:32:48 +08:00
aozima
b12f6bbdee
cleanup code.
2013-07-12 23:28:24 +08:00
aozima
fc9d7926e2
update project support auto initial.
2013-07-12 23:09:12 +08:00
aozima
c44b02f08c
support auto initial.
2013-07-12 23:08:46 +08:00
aozima
8890e83aa9
update DM9000 ethernet driver for auto initial.
2013-07-12 22:54:53 +08:00
aozima
020d05ca92
update SD card driver for auto initial.
2013-07-12 22:54:48 +08:00
aozima
5183697fd4
update linker script for components auto initial.
2013-07-12 22:50:50 +08:00
aozima
e749fb6e9a
cleanup code.
2013-07-12 18:38:30 +08:00
aozima
a183f1fbe9
update stm32f10x project.
2013-07-12 18:31:42 +08:00
aozima
8c2a11c234
update stm32f10x project directory structure.
2013-07-12 18:16:43 +08:00
aozima
f0d03af696
remove unused file.
2013-07-12 17:51:35 +08:00
Bernard Xiong
9b45002f27
Merge pull request #129 from BernardXiong/master
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fix compiling error in Linux.
2013-07-12 00:34:02 -07:00
Bernard Xiong
de5d4cbb94
fix compiling error in Linux
2013-07-12 03:32:59 -04:00
Bernard Xiong
ba0e1f6f18
Merge pull request #128 from prife/sim-init
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simulator: update code for new component initialization support on mingw
2013-07-11 15:55:34 -07:00
prife
02e74583c7
simulator: update code for new component initialization support on mingw
2013-07-11 23:31:34 +08:00
aozima
8711a0c986
update SConstruct.
2013-07-11 23:11:16 +08:00
aozima
5779f0abf0
CPPPATH should be string.
2013-07-11 23:10:32 +08:00
aozima
cc8301d0f1
update linker script for components auto initial.
2013-07-11 23:07:16 +08:00
reynoldxu
0f6131de40
add K60Fxxxx bsp for TWR-K60F120M board.
2013-07-11 18:15:38 +08:00
Grissiom
b9f9c3b2a4
remove RT_LWIP_TCP_SND_BUF setting
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When not configured in rtconfig.h, lwipopt.h will give us a reasonable
value(TCP_MSS * 2).
2013-07-04 18:04:47 +08:00
Bernard Xiong
1dd7e05336
fix lwip 1.4.1 compiling error when enable component init
2013-06-30 22:50:33 +08:00
Bernard Xiong
e468c6efdc
Merge pull request #112 from aozima/pulls
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update libcpu/arm/cortex-m4: support lazy stack optimized.
2013-06-23 08:54:59 -07:00
Bernard Xiong
f83a34b85e
Update rtthread-lpc17xx.ld
2013-06-24 00:45:10 +09:00
aozima
90ab472d61
update scons script: support THUMB-2 CODE.
2013-06-23 18:10:46 +08:00
Bernard Xiong
98c8a23e94
Add component initialization.
2013-06-23 07:48:42 +08:00
Bernard Xiong
3071e35c54
Merge pull request #109 from grissiom/rm48x50
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Rm48x50
2013-06-19 01:29:12 -07:00
visitor83
c986754c49
Signed-off-by: visitor83 <wolflouiswang@gmail.com>
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format the s3c24x0 serial.c and mini2440 rtconfig.py
2013-06-18 12:51:55 +08:00
Grissiom
2df7fc310f
RM48 does not have cache implemented
2013-06-12 23:48:29 +08:00
aozima
4807145a71
clean up code: remove the old file.
2013-06-08 20:50:09 +08:00
Grissiom
228a6be077
cortex-r4: add __rt_ffs
2013-06-05 23:20:39 +08:00
Grissiom
480ac34445
rm48x50: remove useless reg_test code
2013-06-03 22:25:25 +08:00
Grissiom
24fc6e6ebb
rm48x50: VFP lazy stacking
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You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.
Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
2013-05-31 20:58:08 +08:00
Grissiom
ec1203bfab
rm48x50: turn on VFP support
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This support Common VFPv2 sub-architecture.
2013-05-31 18:32:21 +08:00
Grissiom
939c58c295
rm48x50: remove unused vPortTaskUsesFPU
2013-05-30 17:39:32 +08:00
Grissiom
d8755ddd93
rm48x50: move uart.c to drv_uart.c
2013-05-30 10:02:26 +08:00
Grissiom
4d40978a70
rm48x50: add finsh support
2013-05-29 23:39:09 +08:00
Grissiom
eda09ab002
rm48x50/uart.c: fix bugs
2013-05-29 23:38:10 +08:00
Grissiom
50c8cbe1d5
rm48x50: now it has console
2013-05-29 17:26:34 +08:00
Grissiom
d22496aee8
rm48x50: update HALCoGen file
2013-05-29 16:42:26 +08:00
Grissiom
435f305fa2
rm48x50: temperately disable the VFP register test
2013-05-26 22:15:26 +08:00
Grissiom
56b640ecb6
rm48x50: add vRegTestTask2
2013-05-26 22:14:24 +08:00
Grissiom
2805d315bd
rm48x50: fix bug in reg_test from FreeRTOS
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It does not satisfy AAPCS.
2013-05-26 21:49:26 +08:00
Grissiom
85ec844de9
rm48x50: add reg_test from FreeRTOS
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The code is GPLv2 so I think we could use it for free(both free beer and
free speech).
2013-05-26 21:16:14 +08:00
Grissiom
f51bce3fed
add rm48x50 bsp and libcpu
...
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
2013-05-24 22:55:13 +08:00
Grissiom
60857630c0
simulator: fix serial_write
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printf("%s") will print a NULL terminated string, while rt_serial_write
should print buffer for size length. This also fix segfault when the
string is not null terminated but specified by size.
2013-05-15 20:16:03 +08:00
Bernard Xiong
e877a9868b
fengzi: Fix LM3S ETH driver: Ethernet RX interrupt will be disabled if pbuf_alloc failed.
2013-04-10 09:54:08 +08:00
yiyue.fang
483479acee
update the MDK project file in LPC178x
2013-04-10 01:16:56 +08:00
weety
d9d39a8d21
Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication.
2013-04-08 21:57:24 +08:00
weety
e7885df2f1
add At91SAM9260 SDIO highspeed and SDIO IRQ capability, fixed compiling warnning
2013-04-02 20:42:11 +08:00
weety
fb9ea5eada
enable at91sam9260 mmu, update SDIO and EMAC drivers
2013-04-02 20:24:51 +08:00