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Author SHA1 Message Date
Meco Man
8e10983c9b [klibc] add rt_vsnprintf_std.c and rename RT_KLIBC_USING_VSNPRINTF_LONGLONG 2024-11-24 11:29:28 +08:00
Kai
e4b02a28f8
[tools][cmake] fix processing groups with similar name (#9667) 2024-11-22 19:06:43 +08:00
GUI
42a41c696d
[DM/FEATURE] Support SCSI bus (#9592) 
* [DM/FEATURE] Support block for SCSI
1. Support SD and CD-ROM.
2. SD will port to UFS and ATA device.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-22 16:59:37 +08:00
GUI
c055261177
[DM/FEATURE] Support DMA management (#9682) 
1. DMA pool management for platform.
2. DMA engine driver API.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-22 14:11:40 +08:00
ligr
dd709c1cea [components/libc/posix]add comments for thread local storage APIs. 2024-11-21 21:46:47 -05:00
heyuanjie87
2a684126c0 [libcpu][riscv]纠正pv_offset的对齐检查 2024-11-21 19:23:11 -05:00
ligr
bb0a1ea453 [components/libc/posix]fix the problem that it doesn't check if barrier still in use and dosen't destory the mutex either. 2024-11-21 19:22:44 -05:00
ligr
0bac8c4f90 [components/libc/posix]fix the errors that assigning an integer to a pointer and always return EINVAL. 2024-11-21 19:22:44 -05:00
ligr
79324c0b4c [components/libc/posix]add comments for barrier APIs. 2024-11-21 19:22:44 -05:00
GUI
f797eccbf1
[DM/FEATURE] Support IIO (Industrial I/O) (#9598) 
[DM/FEATURE] Support IIO (Industrial I/O)

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-21 20:44:25 +08:00
GuEe-GUI
4a3fa385cb [DM/FEATURE] Support import SoC Pinctrl config 
Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-21 12:44:55 +08:00
GuEe-GUI
b0a5bfe66b [DM/FIXUP] Fixup pinctrl depend auto 
Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-21 12:44:55 +08:00
zhangjing
858813a081 [bsp][qemu-virt64-riscv]:remove the redundant UART1 configuration from the Kconfig 2024-11-20 21:49:49 -05:00
GuEe-GUI
0d2c84d89f [DM/FEATURE] make SoC Kconfig import easy 
Open Kconfig will not fail if using osource,
This way can make SoC Kconfig to DM easy.

Link: ecb89b1370ec27be650a0a2fae7c6802b4246933

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 23:52:34 +08:00
GuEe-GUI
86ba3b666f [DM/FIXUP] Fixup MSI first IRQ read offset 
Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 16:34:10 +08:00
GuEe-GUI
34cf382c8b [DM/FIXUP] Fixup PCI MSI global irq map 
Don't use `irq` as a var when clear MSI global
irq map, the irq which alloc before will rewrite.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 16:34:10 +08:00
GuEe-GUI
5dda65c21b [DM/FIXUP] add cortex-m23's cpuport.h 
Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 16:11:10 +08:00
GuEe-GUI
33785ca68a [DEVICE/SDIO] port to the block 
1. remove gpt.
2. remove block device custom.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 16:11:10 +08:00
GuEe-GUI
c424cb8186 [DM/FEATURE] Support simple block layer 
1. Disk and blk device management.
2. Support partitions probe auto.
3. Support DFS and user mode fops, ioctl.
4. Add a cmd for blk info.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 16:11:10 +08:00
GuEe-GUI
10cac76d3b [DM/FEATURE] Support MFD syscon 
MFD (Multifunction device) with System Controller Register Read/Write.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 15:53:23 +08:00
GuEe-GUI
f5aca55a26 [DM/FEATURE] Support import SoC CLK config 
Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 11:08:28 +08:00
GuEe-GUI
b6dff44054 [DM/FIXUP] Fixup CLK 
1. Default return OK when input NULL (if is not necessary in device).
2. Support object parse in OFW.
3. Support CLK depends fix auto.
4. Fixup rt_clk_array_prepare_enable and rt_clk_array_disable_unprepare.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-20 11:08:28 +08:00
zhuzhuzhu
bdf4da8ee1
[components][driver]add phy and mdio bus 
old phy bus is too simple add phy_bus is not adapt rt_bus framework,so writer a stronger phy bus framework.

here is my commit message:
add mdio bus and phy bus to kernel,the phy bus use rt_bus framewok ,driver writer can write phy_driver first .when mac driver need to use phy they can register phy_device and pjhy_devie will serach for driver which match by uid and mask,if no driver match with the device that you register,phy_bus will return the genphy to you device,the genphy driver is the general driver for phy,so you can use it but it can not support the capcity of chip it may be cause performance is not up to peak
 2024-11-19 21:34:03 -05:00
ligr
b023c15256 [components/libc/posix]add comments for rwlock APIs. 2024-11-19 18:26:16 -05:00
ligr
c1c7959bdb [components/libc/posix]add comments for condition variable APIs. 2024-11-19 18:26:16 -05:00
Meco Man
8ecfeb57ed Update src/Kconfig 2024-11-19 21:08:45 +08:00
Meco Man
b5a3c7e95d [ci] add RT_USING_CI_ACTION 2024-11-19 21:08:45 +08:00
Supper Thomas
cc1707e3b3
[bsp/nrf5x] Fix the nrf5340 bsp 2024-11-18 22:43:58 -05:00
ligr
07c8b571ce [components/libc/posix]add comments for mutex APIs. 2024-11-18 19:21:02 -05:00
GuEe-GUI
6185250c86 [DM/FEATURE] Support clock subprobe in OFW 
Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-18 15:03:23 +08:00
GuEe-GUI
cefe6d6380 [DM/FEATURE] Support driver depends fix auto 
We need a API to fix the driver load auto when
a second driver get it in probe process that
we can not be careful of the driver-to-driver's
depends in different SoC.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-18 15:03:23 +08:00
GuEe-GUI
1bef42c64c [DM/FIXUP] remove some redundant INIT_EXPORT 
Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-18 15:03:23 +08:00
GuEe-GUI
b6f67285e9 [DM/FIXUP] remove OFW switch macros 
The drivers will support OFW and name probe both.
We should make build OK when OFW is disable.

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-18 15:03:23 +08:00
GuEe-GUI
3b22dbd049 [DM/FEATURE] DM Device IDA management 
Drivers can manage their own IDs without having to concern
themselves with the register/unregister in system

Link: https://github.com/RT-Thread/rt-thread/issues/9534

Signed-off-by: GuEe-GUI <2991707448@qq.com>
 2024-11-18 14:23:25 +08:00
zhuzhuzhu
45aba1bcd7 add head 2024-11-18 13:53:25 +08:00
zhujiale
48fca91817 add ofw api to of net,driver writer can use this api get phy modes or get mac address 2024-11-18 13:53:25 +08:00
zhujiale
6e78474998 pci 2024-11-18 13:53:25 +08:00
Supper Thomas
a7ee7b6617 Revert "[tools] use project's dir basename as default project name" 
This reverts commit ea75800d5b3be3e63c6304afed8b06a3fdeae289.
 2024-11-17 22:01:42 -05:00
zhujiale
44515624e2 [libcpu] fix No memory higher than 1 GB is mapped 2024-11-17 21:13:07 -05:00
zhujiale
96da7abd3e [libcpu] fix No memory higher than 1 GB is mapped 2024-11-17 21:13:07 -05:00
Meco Man
09f47c55a9 [utest] format code and remove duplicate header file 2024-11-18 09:58:55 +08:00
Meco Man
a406c8fce8 [utest][Kconfig] adjust RT_CONSOLEBUF_SIZE when utest is enabled 2024-11-18 09:58:55 +08:00
Meco Man
491f13e289 [utest][stm32f412][gcc] add __rt_utest_tc_tab_start to support utest 2024-11-18 09:57:46 +08:00
rcitachi
d9c16efe8f Modify the position of libc_rent definition 2024-11-17 11:59:37 -05:00
ligr
5e8602c6e0 [components/libc/posix][pthreads]add comments for thread APIs of pthread. 2024-11-16 11:52:57 -05:00
ligr
ac1df96ec9 [net][sal]add comments for BSD socket APIs. 2024-11-15 21:04:27 -05:00
zhujiale
c1db34983d [rpi4b] add new bsp for qemu-rpi4b 2024-11-15 15:35:46 +08:00
heyuanjie87
2b21b095f9 [libcpu]riscv使用call指令解决长跳转问题 2024-11-15 14:34:32 +08:00
flyingcys
0d9185bd5a
[bsp][cvitek]fix milkv-duos-sd cann't startup big-core kernel (#9633) 
fix milkv-duos-sd cann't startup big-core kernel
milkv-duos-sd use cv1813h folder store ld file
Signed-off-by: flyingcys <flyingcys@163.com>
 2024-11-15 12:52:57 +08:00
Chen Wang
83a250f05f
bsp: qemu-virt64-riscv: Improve README (#9651) 
Improved README document
- Unified the usage process of Standard Edition and Smart Edition.
- Deleted the description of running RTT in Machine Mode. Currently,
  both Standard Edition and Smart Edition RTT run in S-mode by default.

At the same time, some unnecessary scripts were cleaned up.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
 2024-11-14 22:09:23 +08:00