5 Commits

Author	SHA1	Message	Date
duhuanpeng	f295149f20	MIPS: fix inline assembly for FPU ... Signed-off-by: duhuanpeng <548708880@qq.com>	2020-04-10 15:07:39 +08:00
bigmagic	c27f13c6c9	[mips]fix a bug	2020-04-07 19:01:54 +08:00
bigmagic	990f731b77	fix mips64 some bug	2020-04-07 14:39:12 +08:00
Jiaxun Yang	7c66501861	[libcpu] Refine MIPS common code ... MIPS common code was highly duplicated, This commit is a attempt to clean-up and refine these code. The context and exception handle flow is mostly identical with Linux, but a notable difference is that when FPU enabled, we save FP registers in stackframe unconditionally. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>	2019-12-11 15:24:04 +08:00
tangyuxin	afc2256d01	[libcpu]Support x1000 CPU	2017-11-10 19:50:14 +08:00