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8 Commits

Author SHA1 Message Date
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
ArdaFu 7a1f8ee1c4 [libcpu][arm][arm926] Using C header file to define stack and heap size. 2018-06-04 13:34:45 +08:00
aozima be76b10be6 Align stack address to 8 byte. 2015-06-04 11:59:18 +08:00
ardafu 49fa5c44d7 [libcpu][arm926] Optimize code 
1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
 2015-04-22 11:19:50 +08:00
ardafu 175e357ace [libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread. 2015-04-16 14:13:43 +08:00
ardafu cf3d639fcb [libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files. 2015-04-16 10:35:12 +08:00
ardafu 6aa242645f 1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable watchdog in rt_lovel_level_init function. 
2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain.
3. [bsp][sam9260] Move link strips in to folder link_scripts.
4. [libcpu][arm926] Add copy right to source file and format code.
 2015-04-15 16:13:30 +08:00
ardafu 39452b67b0 1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP 2015-04-14 21:56:34 +08:00