tangyuxin
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8316646b85
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[libcpu][arm] 修复因提前返回,导致sp指针不对称问题
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2019-09-19 18:27:07 +08:00 |
yangjie
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31ffc4582c
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[libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7
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2019-07-03 18:47:11 +08:00 |
Bernard Xiong
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bde47018b8
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[libcpu] Add SConscript in libcpu.
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2019-01-07 06:09:45 +08:00 |
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Bernard Xiong
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7c425408b4
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[license] Change the license of libarm to Apache.
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2018-10-15 01:35:07 +08:00 |
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Bernard Xiong
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d96027f156
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[libcpu] Fix the FPU definition in M4/M7 for ARM Clang
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2018-09-25 11:08:58 +08:00 |
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Bernard Xiong
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ff08faf605
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[Kernel] Adjust the copyright information
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2018-09-25 11:06:07 +08:00 |
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Bernard Xiong
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b98a0ba804
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[Kernel] Add ARMCC 6.x support.
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2018-09-23 12:08:44 +08:00 |
hichard_ren@yeah.net
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b46e7f3172
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add rt_hw_cpu_reset for cortex-m cpu
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2018-08-01 11:57:56 +08:00 |
aozima
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6c39b2d54d
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[libcpu][comtex-m4] enhancement hard fault exception handler.
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2018-07-25 21:39:44 +08:00 |
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aozima
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dd1041bb7f
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[libcpu]: fixed #1196 FPU FPCA issue.
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2018-01-31 18:54:11 +08:00 |
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aozima
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9bbc4e5e6b
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update cortex-m libcpu: fixed compile error.
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2017-08-23 16:13:51 +08:00 |
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aozima
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9b7303e511
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update libcpu: ensure fault enable.
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2017-08-18 11:12:58 +08:00 |
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aozima
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1fa5711712
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fixed assembly warnings.
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2015-05-22 16:48:01 +08:00 |
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aozima
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73df162d3f
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fixed assembly warnings.
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2015-05-13 11:57:34 +08:00 |
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bernard
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267c61ebce
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[libcpu] Add builtin ffs implementation for Cortex-M4.
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2014-09-11 12:51:33 +08:00 |
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aozima
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2c47f2e683
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Fix some spell error;
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2014-07-31 13:59:25 +08:00 |
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aozima
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5120f54a29
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fix spelling error.
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2013-06-24 22:57:27 +08:00 |
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aozima
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34d59ccb0f
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update libcpu/arm/cortex-m4: support lazy stack optimized.
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2013-06-23 18:10:46 +08:00 |
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aozima
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b045f93b47
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fixed bug: correct cortex-m SCB->VTOR address.
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2013-06-23 18:08:16 +08:00 |
|
aozima
|
f9e673354a
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update libcpu/arm/cortex-m4: restore MSP.
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2013-06-22 18:59:49 +08:00 |
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Bernard Xiong
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72782e9203
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convert end of line
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2013-01-08 05:05:02 -08:00 |
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bernard.xiong@gmail.com
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68fadd9edc
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Add exception hook function.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2551 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2012-12-29 09:36:16 +00:00 |
dzzxzz@gmail.com
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468ade5e98
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fixed the coding style in libcpu/arm
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2518 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2012-12-24 06:59:14 +00:00 |
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wuyangyong
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5be0c53dd8
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stack addr align to 8byte.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2509 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2012-12-23 07:40:31 +00:00 |
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dzzxzz@gmail.com
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2955dbfcda
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add LPC4330 BSP based on NGX xplorer development board
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2487 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2012-12-17 08:21:29 +00:00 |
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wuyangyong
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04a79d24cf
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fix extern list_thread return type by arda.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2104 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2012-04-29 02:11:40 +00:00 |
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wuyangyong
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38ba67a867
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update libcpu cortex-m4.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1967 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2012-02-18 17:46:08 +00:00 |
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wuyangyong
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7906287cfe
|
IAR not support VSTMFD and VLDMFD, use VSTMDB and VLDMIA.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1947 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2012-02-16 03:45:50 +00:00 |
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wuyangyong
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aad32f8546
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support context switch load/store FPU register.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1901 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2011-12-31 20:25:44 +00:00 |
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wuyangyong
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1097104c7f
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fixed stack align issues.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1900 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2011-12-31 20:21:46 +00:00 |
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wuyangyong
|
8e7398e010
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update cortex-M4 libcpu
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1773 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2011-10-27 02:30:47 +00:00 |
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bernard.xiong@gmail.com
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3ac0b7b966
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add STM32F40x porting (uncompleted)
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1770 bbd45198-f89e-11dd-88c7-29a3b14d5316
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2011-10-20 23:55:08 +00:00 |