libs/rt-thread
libs
/
rt-thread
4
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
2,403 Commits 14 Branches 40 Tags 973 MiB
Commit Graph

245 Commits

Author SHA1 Message Date
prife b8aaa6e730 clean code in cpu_port.c, add some comments 2013-01-16 18:49:07 +08:00
prife b8bd5c8309 fix bug in cpu_port.c(can work very well) 2013-01-15 23:59:14 +08:00
prife 395178ebfa rewrite cpu_port.c (but still has bug) 2013-01-15 21:38:54 +08:00
prife 07da6caafd surport finsh 2013-01-14 22:38:54 +08:00
prife 8f70786c30 add finsh, but still cannot work, only can be built with gcc 2013-01-14 16:50:40 +08:00
prife 7b42f926a0 re-write the rt_hw_interrupt_enable/disable 2013-01-14 14:14:40 +08:00
prife 5685a395be add some comments and clean code in cpu_port.c 2013-01-14 01:23:08 +08:00
prife 7b58dd92fa add libcpu/sim/posix/cpu_port.c 2013-01-13 22:58:45 +08:00
Bernard Xiong 72782e9203 convert end of line 2013-01-08 05:05:02 -08:00
Ubuntu ecd66612cf remove lpc122x because there is a common cortex-m0 porting. 2013-01-04 06:03:03 -08:00
bernard.xiong@gmail.com 68fadd9edc Add exception hook function. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2551 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-29 09:36:16 +00:00
bernard.xiong@gmail.com ac9c373d7f Add thread name to Win32Thread. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2541 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-29 03:28:31 +00:00
goprife@gmail.com 8df650d861 clean code in sim/win32/cpu_port.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2536 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-27 08:31:53 +00:00
dzzxzz@gmail.com 468ade5e98 fixed the coding style in libcpu/arm 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2518 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 06:59:14 +00:00
dzzxzz@gmail.com f6629a1e4c rename the file name using low case 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2514 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 03:50:42 +00:00
dzzxzz@gmail.com eab30ebbda fixed the fixed the gcc compiling error in ubuntu host OS 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2512 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-24 03:34:04 +00:00
wuyangyong 5be0c53dd8 stack addr align to 8byte. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2509 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-23 07:40:31 +00:00
dzzxzz@gmail.com 2955dbfcda add LPC4330 BSP based on NGX xplorer development board 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2487 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-12-17 08:21:29 +00:00
bernard.xiong 6ae9a5d95c revert wrongly commit. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2408 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 08:10:23 +00:00
bernard.xiong f78a50883b remove nuc1xx because there is a cortex-m0 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2407 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 07:59:28 +00:00
bernard.xiong ec0cb881d8 remove lpc1100 because there is a cortex-m0 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2406 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-11-13 07:56:40 +00:00
nongli1031@gmail.com 6fe2afed8c for rt-thread 1.1.0 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2372 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-26 03:36:13 +00:00
goprife@gmail.com 20352571e2 add libcpu/sim/win32 to support the win32 bsp (compiled by visual studio) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2359 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-21 04:46:24 +00:00
goprife@gmail.com 806ecbbb2b update libcpu/SConscript to support cl(c compiler of visual studio) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2358 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-21 04:42:49 +00:00
bernard.xiong 0c13711396 Add taihu bsp (PPC405) 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2350 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-14 23:28:37 +00:00
wuyangyong 0057604ad2 update hdisr_gcc.S: push argument for ISR. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2341 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-10-10 16:39:49 +00:00
dzzxzz@gmail.com e0a5c0ae81 save texit address in to thread stack in m16c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2308 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-26 06:43:35 +00:00
dzzxzz@gmail.com c784dd2ed8 update V850 BSP, now supporting scons + IAR 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2306 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-25 04:18:24 +00:00
dzzxzz@gmail.com 6dcb1207b1 initialize register r31(LP) with texit in V850/cpuport.c 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2305 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-09-25 03:19:43 +00:00
wuyangyong 056228cce6 fixed bug: store r8 - r11. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2258 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-08-22 15:53:54 +00:00
iamyhw@gmail.com 4455768b92 fixed s3c2440a context thread bug,patch contributor 
:yuxun2k

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2192 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-06-28 14:04:20 +00:00
wuyangyong a9aa8d503e add libcpu/cortex-m0. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2142 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-31 17:41:58 +00:00
mok.jingxian@gmail.com 5684d15916 add bf533 bsp and cpu files. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2138 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-30 11:29:34 +00:00
dzzxzz@gmail.com 0ce3aa056d update CMSIS RTOS API in MB9BF506R 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2117 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-05-15 06:16:37 +00:00
wuyangyong 04a79d24cf fix extern list_thread return type by arda. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2104 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-29 02:11:40 +00:00
bernard.xiong@gmail.com 090553f768 delete PK40X256VLQ100 branch. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2081 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-16 05:04:30 +00:00
dzzxzz@gmail.com a321f3da64 support GNUC cross compiler(GNUM16CM32Cv1101-ELF) for renesas M16C porting 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2047 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-04-14 07:04:27 +00:00
luohui2320@gmail.com 8d4938ae70 delete libcpu/arm/at91sam926x/rt_list.h 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2008 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-03-23 15:07:21 +00:00
wuyangyong 38ba67a867 update libcpu cortex-m4. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1967 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-18 17:46:08 +00:00
wuyangyong 68bee363ff update IA32 branch for new rt-thread platform. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1948 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-16 04:19:20 +00:00
wuyangyong 7906287cfe IAR not support VSTMFD and VLDMFD, use VSTMDB and VLDMIA. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1947 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-02-16 03:45:50 +00:00
dzzxzz@gmail.com 645260a1c9 fixed a compiling error while not defined RT_USING_FINSH 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1906 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2012-01-03 09:08:47 +00:00
wuyangyong aad32f8546 support context switch load/store FPU register. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1901 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 20:25:44 +00:00
wuyangyong 1097104c7f fixed stack align issues. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1900 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 20:21:46 +00:00
bernard.xiong@gmail.com 3df72cc21f update file header. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1891 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-31 04:08:12 +00:00
wuyangyong 701df33436 remove libcpu/arm/lm3s libcpu/arm/lpc176x , update bsp lm3s lpc176x. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1865 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-23 01:36:10 +00:00
dzzxzz d6892fb441 all FM3 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/fm3 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1861 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-22 00:46:34 +00:00
dzzxzz 8b64d24bd4 all STM32 cortex-m3 branches using /libcpu/arm/cortex-m3 instead of /libcpu/arm/stm32 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1858 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-21 09:44:52 +00:00
dzzxzz 9c8398a10b fixed scons + IAR compiling error for stm32f107 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1855 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-21 07:20:51 +00:00
wuyangyong 2622f51496 add thumb mode porting. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1854 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2011-12-20 16:06:20 +00:00