Bernard Xiong
a472656ee0
Merge pull request #4019 from bj-wanghz/dev
...
fix long call linker error with 'jal', 'j' or conditional branch instruction in .S files for k210
2020-12-03 16:02:00 +08:00
yangjie11
ba83ddc3c4
[SConscript] change libcpu to LIBARCH,and correcte letter case
2020-11-30 15:52:43 +08:00
Wang-Huachen
7258328923
bsp:
...
add support to zynqmp-r5 core and zynqmp-r5-axu4ev board
2020-11-30 13:13:08 +08:00
Bernard Xiong
a83ab9e21d
Merge pull request #4049 from DavidLin1577/patch-13
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Update exception_gcc.S
2020-11-25 16:26:23 +08:00
Bernard Xiong
b7dd3cae09
Merge pull request #4043 from zhangsz0516/zhangsz_1120
...
[libcpu][update]重启与关机函数:rt_hw_cpu_shutdown、rt_hw_cpu_reset,补充WEAK属性
2020-11-23 17:40:34 +08:00
tangweikang
732382c676
[K210] update compile parameters and startup_gcc.S
2020-11-21 13:47:58 +08:00
David Lin
c72c44221d
Update exception_gcc.S
...
thead- > thread
2020-11-20 18:43:10 +08:00
tangweikang
c8deffcf56
[libcpu/risc-v][K210] add FPU support
2020-11-20 13:53:50 +08:00
yangjie11
91261e25b9
[SConscript]rename group name
2020-11-20 13:38:11 +08:00
张世争
355f8dd95c
[libcpu][update]重启与关机函数:rt_hw_cpu_shutdown、rt_hw_cpu_reset,补充WEAK属性
2020-11-20 08:49:51 +08:00
wanghongzhu
111ecae6ad
fix long call linker error with 'jal', 'j' or conditional branch instruction
2020-11-11 09:58:20 +08:00
tangweikang
2f68120e49
[libcpu][risc-v] Fixed bsp k210 failing to compile | 修复 k210 无法编译的问题。
2020-10-29 10:54:53 +08:00
GFWisshit
ad917d9010
修改了license header,修改了sconscipt,修改了board.c指针的强制转换类型,interrupt.c添加了新的函数。
2020-10-21 15:09:33 +08:00
GFWisshit
c1f4d6c691
修改license header,修改driver目录下的SConscript。
2020-10-20 17:32:26 +08:00
GFWisshit
7f330c7b79
Add support for architecture sparc-v8 and soc bm3803.
2020-10-16 11:40:00 +08:00
Bernard Xiong
d92fbba3c1
Merge pull request #3919 from wormsX/T-head_Smart-v1.0.0
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add t-head smart-evb bsp, and risc-v cpu e906
2020-09-22 22:03:26 +08:00
michael
a8928c881e
MIPS:fix the RT_EXCEPTION_MAX value
...
from <see mips run> know that cp0_cause's ExcCode have 5 bit filed and
the max exception is 32.
2020-09-14 11:10:44 +08:00
bigmagic
a97b0a0d39
code format
2020-09-11 11:44:49 +08:00
chenzx
60287b69fd
add t-head smart-evb bsp, and risc-v cpu e906
2020-09-11 10:18:24 +08:00
bigmagic
c66314a8b6
fixed loongson bsp build on windows
2020-09-04 11:57:35 +08:00
bigmagic
1556ba8e7f
add ls2k mmu
2020-09-04 10:16:34 +08:00
bigmagic
bd95f3a94f
fix mips stackframe and exception
2020-09-04 10:16:34 +08:00
Huaqi Fang
eb00fbeda7
libcpu/nuclei: Fix wrong RT_KERNEL_INTERRUPT_LEVEL
...
RT_KERNEL_INTERRUPT_LEVEL set to 0 is the lowest level.
Signed-off-by: Huaqi Fang <578567190@qq.com>
2020-09-03 18:10:08 +08:00
michael
3d0bdf4bb6
MIPS:improvement FPU support
2020-08-25 11:52:07 +08:00
michael
3ce53f9c79
MIPS:remove redundant #ifdef ARCH_MIPS64
...
there exist redundant #ifdef ARCH_MIPS64 in asm.h, remove it
2020-08-24 09:35:10 +08:00
shaojinchun
dae274e1f2
fix gic ack irq problem
2020-06-30 17:32:14 +08:00
bigamgic
1ec681a551
fix ls2k libc and irq
2020-06-21 23:28:11 +08:00
xuzhuoyi
1f2a7b564c
[libcpu][arm][cortex-m23] Change exception return call address to 0xFFFFFFFD
2020-06-18 10:53:34 +08:00
xieyangrun
d2eaa452d6
[libcpu/arm/*/cpuport.c]fixed __rt_ffs bug on account of armclang LTO.
2020-06-18 09:19:10 +08:00
David Lin
62b2038fe6
[libcpu]Fixed the wrong notes in context_iar.S
...
swith -> switch
2020-06-10 10:15:06 +08:00
bigmagic
92ab0fd593
fix startup code address relative jump
2020-06-04 00:03:07 +08:00
aozima
c3d63e49de
set Systick interrupt priority to the lowest
2020-05-30 15:23:25 +08:00
bigmagic
f4c71fc5bf
rename raspi4 to raspi4-64
2020-05-25 17:46:48 +08:00
bigmagic
38f400d50a
add raspi4 32bit mode bsp
2020-05-25 17:30:05 +08:00
Bernard Xiong
4b33ba947b
Merge pull request #3545 from DavidLin1577/patch-7
...
[libcpu/arm]Update start_gcc.S
2020-04-24 09:00:59 +08:00
Huaqi Fang
ee4cabe69f
[BSP][Nuclei] Add Nuclei RISC-V Processor support
...
* Nuclei RISC-V Processor support is added both RV32 and RV64
* Nuclei RVSTAR BSP is added, UART driver is added
* MSH works well in RVSTAR board
---------------------------
Squashed commit of the following:
commit b7368bc2ed725c42f9adc297d0e9cf3ed706a520
Author: Huaqi Fang <578567190@qq.com>
Date: Fri Apr 17 14:38:54 2020 +0800
[BSP][Nuclei] Pretty source code
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 2c42a997f7b5d8aa53bdaf19ccb30596091a112d
Author: Huaqi Fang <578567190@qq.com>
Date: Thu Apr 16 15:51:03 2020 +0800
[libcpu] Remove ARCH_NUCLEI in libcpu kconfig
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 915ad4c076ff3d7cebda896537605e7f7939b7af
Author: Huaqi Fang <578567190@qq.com>
Date: Thu Apr 16 15:50:00 2020 +0800
[BSP][Nuclei] Remove ARCH_NUCLEI in bsp KConfig
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit fe43869c79675a25669447d57ea5d77385e07ca5
Author: Huaqi Fang <578567190@qq.com>
Date: Wed Apr 15 12:43:20 2020 +0800
[BSP][NUCLEI] Simply application main.c
Remove previous complicated application of gd32vf103_rvstar
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 8fd31727bc7ff51c83a3c47840cff1bfb100c0ba
Author: Huaqi Fang <578567190@qq.com>
Date: Wed Apr 15 12:38:04 2020 +0800
[BSP][NUCLEI] Format application and board source code
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit b432308b20cdf24dfcc1398511d1d83bce6a9df2
Author: Huaqi Fang <578567190@qq.com>
Date: Wed Apr 15 11:58:28 2020 +0800
[BSP][Nuclei] Format source code of drivers of gd32vf103
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 7366173d749d8a51ed8d48eca09007d27aee8ad8
Author: Huaqi Fang <578567190@qq.com>
Date: Wed Apr 15 11:54:02 2020 +0800
[LIBCPU][NUCLEI] Optimize nuclei cpu portable code
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 8c2cd4745b7279a6721946d119441bbf7fd1a9c2
Author: Huaqi Fang <578567190@qq.com>
Date: Tue Apr 14 15:45:42 2020 +0800
nuclei: Update README.md
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit fa8a2f24ea5e4dbce714ffda16c1ce558e5b5ddb
Author: Huaqi Fang <578567190@qq.com>
Date: Tue Apr 14 14:06:54 2020 +0800
nuclei: Add gpio driver not tested
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 1be40bc50be43dfcdd105291bd24355498f9fef3
Author: Huaqi Fang <578567190@qq.com>
Date: Thu Apr 9 14:55:22 2020 +0800
Nuclei: Update README.md
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 4c8beb204b7ee3e38c04e1f23a1f7e4ce48aa196
Author: Huaqi Fang <578567190@qq.com>
Date: Thu Apr 9 10:20:25 2020 +0800
Nuclei: Change idle stack size from 256 to 396 bytes
If changed to 396 bytes, then debug optimization level changed
from O2 to O0, and the application can run successfully without
stack overflow issue of tidle0 task
warning: tidle0 stack is close to end of stack address.
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit da2bcf5c56ef32b611405a8e591ecd3f1e598b11
Author: Huaqi Fang <578567190@qq.com>
Date: Thu Apr 9 10:11:40 2020 +0800
nuclei: Remove unused kconfig
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 0b932c677a7934d60e70da141744790aec202ef6
Author: Huaqi Fang <578567190@qq.com>
Date: Thu Apr 9 09:32:22 2020 +0800
nuclei: optimize drivers support
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 0431f6f01f6efab2900de552abede83639415431
Author: Huaqi Fang <578567190@qq.com>
Date: Wed Apr 8 19:28:02 2020 +0800
tools: Update mkdist.py for nuclei bsp
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 0e1f502edfddff93a4a66c041be68560ef4828eb
Author: Huaqi Fang <578567190@qq.com>
Date: Wed Apr 8 18:46:58 2020 +0800
nuclei: optimize rvstar support directory
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 1131f6e6483d8f2fbafe07f4e598fc8f802ee85d
Author: Huaqi Fang <578567190@qq.com>
Date: Wed Apr 8 18:37:24 2020 +0800
nuclei: update kconfig
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit ad81c1d3bf9d80d2b561c94e903e7ce4ca2c68c6
Author: Huaqi Fang <578567190@qq.com>
Date: Wed Apr 8 15:43:00 2020 +0800
nuclei: Rename board name
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit d780138a1abf5da5097cc89e6a428ebeae06f284
Author: Huaqi Fang <578567190@qq.com>
Date: Tue Apr 7 09:36:19 2020 +0800
libcpu: Add Nuclei arch option in KConfig
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 60320d34b1d88315efe1b566fd6bc75c69851f06
Author: Huaqi Fang <578567190@qq.com>
Date: Fri Apr 3 16:51:01 2020 +0800
nuclei: Update nuclei sdk of rt-thread support
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit a042b806efe0ea3bc9dba80ebc7696e5941ba35f
Author: Huaqi Fang <578567190@qq.com>
Date: Fri Apr 3 11:34:09 2020 +0800
nuclei: modify application for not print anything
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 2a9603adcb584b29886a2b93ded2473f4e8bffb1
Author: Huaqi Fang <578567190@qq.com>
Date: Fri Apr 3 11:31:01 2020 +0800
nuclei: Add .gitignore for nuclei bsp
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 34aaf6aebae75c3ee9d38cc17e6bdb826ed9e357
Author: Huaqi Fang <578567190@qq.com>
Date: Fri Apr 3 11:28:06 2020 +0800
nuclei_sdk: update link script of rvstar to contain rt-thread needed sections
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
The above code placed in rodata section
Signed-off-by: Huaqi Fang <578567190@qq.com>
commit 3451466e9d8da3c3c8a631be69f3c7a5e6220c21
Author: Huaqi Fang <578567190@qq.com>
Date: Fri Apr 3 10:04:42 2020 +0800
bsp: Add initial commit of nuclei rvstar board bsp
Signed-off-by: Huaqi Fang <578567190@qq.com>
Signed-off-by: Huaqi Fang <578567190@qq.com>
2020-04-17 21:07:29 +08:00
David Lin
5e507448ee
Update start_gcc.S
2020-04-17 19:18:52 +08:00
David Lin
90f41ef8a2
Update start_gcc.S
2020-04-17 19:12:18 +08:00
bigmagic
709e0d5799
add bsp/raspi4 gicv2
2020-04-16 18:48:27 +08:00
bigmagic
a120c914bb
add bsp/raspi4 readme
2020-04-16 16:44:29 +08:00
bigmagic
fb8c7829a8
add raspi4 bsp
2020-04-16 16:44:14 +08:00
Bernard Xiong
5c399d50a7
Merge pull request #3520 from qzhang1535/br_mini2440
...
更新mini2440 bsp包:
2020-04-13 17:18:42 +08:00
Jonne
b3c7bc964b
更新mini2440 bsp包:
...
1、加入Kconfig以支持图形化菜单配置
2、编译脚本中添加动态模块编译参数
3、开启自动初始化机制支持
4、重构串口驱动以解决开启posix支持后终端无响应问题
5、解决dm9000网卡驱动link up问题
6、添加mnt.c文件用来挂载文件系统
2020-04-10 23:28:36 +08:00
duhuanpeng
f295149f20
MIPS: fix inline assembly for FPU
...
Signed-off-by: duhuanpeng <548708880@qq.com>
2020-04-10 15:07:39 +08:00
duhuanpeng
ee61d78b18
MIPS: inline routine should be static here
...
gcc will remove this "unused" routine and cause a linking error.
symbol not found when linking.
Signed-off-by: duhuanpeng <548708880@qq.com>
2020-04-10 15:07:34 +08:00
Bernard Xiong
baa3145bfe
Merge pull request #3504 from bigmagic123/add_ls2k_bsp
...
Add ls2k bsp
2020-04-07 21:23:05 +08:00
bigmagic
c27f13c6c9
[mips]fix a bug
2020-04-07 19:01:54 +08:00
bigmagic
dff04ffdc6
fix mips stackframe point
2020-04-07 14:49:20 +08:00
bigmagic
3c5329a9b7
mips repair constraint
2020-04-07 14:43:20 +08:00
bigmagic
c024e2e485
add ls2k bsp config
2020-04-07 14:39:20 +08:00
bigmagic
990f731b77
fix mips64 some bug
2020-04-07 14:39:12 +08:00
bigmagic
0f26ffa7a2
add ls2k bsp
2020-04-07 14:38:58 +08:00
bigmagic
efbb5490d7
add soc timer cntpct
2020-04-03 20:18:18 +08:00
bigmagic
e6600dbf10
remove cortex-a53 from libcpu/arm
2020-03-18 14:22:37 +08:00
bigmagic
6416a18554
add cache option api
2020-03-18 14:21:11 +08:00
bigmagic
cc95025f05
fix build err
2020-03-02 20:49:27 +08:00
bigmagic
ff10eaed9c
[bsp/raspi3-64]fix gpio drvier
2020-03-02 20:49:27 +08:00
bigmagic
53211b3c6e
replace space to tab
2020-02-26 15:43:23 +08:00
bigmagic
773f7cdf52
[bsp/raspi3-64]add core timer driver
2020-02-26 15:35:07 +08:00
bigmagic
b6031497b9
fix execption printf err
2020-02-26 15:35:07 +08:00
bigmagic
2d3ae92075
space instead of table keep the code style
2020-02-21 21:29:06 +08:00
bigmagic
0458f0b798
remove comments in Chinese and keep the code style
2020-02-20 23:00:17 +08:00
bigmagic
0471b6d344
[bsp/raspi3] raspi3 mmu
2020-02-20 23:00:17 +08:00
Bernard Xiong
581dbe4ffa
Merge pull request #3370 from nongxiaoming/master
...
[libcpu]context-m33:fix label error in context_gcc.S
2020-02-17 12:25:38 +08:00
Bernard Xiong
0dcbe0e0e1
Merge pull request #3379 from DavidLin1577/patch-7
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Fixed function spelling mistakes in context_iar.S
2020-02-17 12:09:49 +08:00
David Lin
36d2652f0d
Fixed typo 'threah' and 'swithc' in cpuport.c
...
Fixed typo:
threah -> thread
swithc -> switch
2020-02-17 09:13:17 +08:00
David Lin
7ef85206dd
Fixed function spelling mistakes in context_iar.S
...
swtich_to_thread -> switch_to_thread
2020-02-16 20:39:50 +08:00
nongxiaoming
607ed93513
[libcpu]context-m33:fix label error in context_gcc.S.
2020-02-11 21:39:35 +08:00
Watson Zeng
fe24ae7ca4
[bsp][synopsys] add basic new embarc bsp support
...
* the initial support of synopsys designware ARC processor
using embARC_BSP, all synopsys ARC-based boards are
supported:
-ARC Software Development Platform
-ARC EM Starter Kit
-ARC EM Software Development Platform
-ARC HS Development Kit
-ARC IoT Development Kit
* The embARC BSP is a new generation embARC software development
package. It is designed to be the inter-layer between hardware and
operating system. BSP could hide the difference of hardware/boards,
provide a unified interface to upper-layer.
* the initial support of synopsys MWDT toolchain.
The DesignWare® ARC® MetaWare Development Toolkit builds upon
a 25-year legacy of industry-leading compiler and debugger products.
It is a complete solution that contains all the components needed to
support the development, debugging and tuning of embedded applications
for the DesignWare ARC processors.
* for detailed board information, pls go embarc.org.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2020-01-16 16:02:00 +08:00
bigmagic
f922bf2e31
Add comment information
2020-01-15 16:46:19 +08:00
bigmagic
08f55d9fda
add raspi3-32 in bsp
2020-01-15 16:38:22 +08:00
bigmagic
fdde8ab198
add raspi2 and raspi3 BSP
2020-01-10 10:38:21 +08:00
Jiaxun Yang
9ef986929c
[libcpu] mips: Merge loongson_1 into gs232
...
Previously Loongson 1B and Loongson 1C have their own libcpu
implemention, but they're almost identical. So we merge them
into gs232 and adapt to new common code.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:42 +08:00
Jiaxun Yang
7c66501861
[libcpu] Refine MIPS common code
...
MIPS common code was highly duplicated, This commit
is a attempt to clean-up and refine these code.
The context and exception handle flow is mostly identical
with Linux, but a notable difference is that when FPU enabled,
we save FP registers in stackframe unconditionally.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:04 +08:00
Bernard Xiong
a972fcc0b5
[BSP] move libcpu/mips/x1000 to bsp/x1000/cpu
2019-12-11 11:01:40 +08:00
Xiao Lifan
66d1510ac7
convert intentation tabs to spaces
2019-12-09 09:29:12 +08:00
Xiao Lifan
01b27b9e91
[libcpu][c28x]add support for c28x mcu hardware fpu
2019-12-05 21:50:48 +08:00
ZhangTao
80a4912baf
修改了上下文切换退出时的bug,该bug会导致中断被提前打开造成死锁
2019-11-05 10:30:47 +08:00
tangyuxin
a16f27d84e
[libcpu][cm33] support cortex-m33
2019-10-29 09:45:17 +08:00
ZYH
cabdbf5bbf
[libcpu][M7]修复cache编译警告
...
Signed-off-by: ZYH <lymz@foxmail.com>
2019-10-23 15:04:34 +08:00
aozima
525d353403
fixed linker script and stack align issues.
2019-10-22 09:47:41 +08:00
shaojinchun
cb07e5fb24
开放spinlock相关函数
2019-09-27 14:38:33 +08:00
tangyuxin
8316646b85
[libcpu][arm] 修复因提前返回,导致sp指针不对称问题
2019-09-19 18:27:07 +08:00
xiaofan
94551979e0
Fix Cortex-M0 Cannot Execute Reboot
...
Signed-off-by: xiaofan <xfan1024@live.com>
2019-09-07 21:20:46 +08:00
xuzhuoyi
a101327d24
[bsp][tms320f28379d] Fix an issue that interrupts are disabled in the thread
2019-08-24 18:42:54 +08:00
liufeilong
ab818cda30
参照龙芯1c手册更正看门狗寄存器宏定义
2019-08-21 13:44:55 +08:00
tyustli
49e9d19c82
first version
2019-07-24 17:03:26 +08:00
Zhou Yanjie
d45efced1c
libcpu: MIPS: 更新版权信息/Update copyright information.
...
更新版权信息。
Update copyright information.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:05:00 +08:00
Zhou Yanjie
d6b2f56f15
libcpu: MIPS: 清理代码/Clean up code.
...
清理内容重复的头文件。
Clean up duplicate header files.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:00:34 +08:00
Bernard Xiong
ba9dbed372
Merge pull request #2827 from yangjie11/ac6
...
[libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7
2019-07-05 15:23:57 +08:00
明德无敌赵晓薇
d68220d866
[libcpu][c28x]Add __rt_ffs support
...
Use a native instruction "Count Sign Bits" to support fast ffs function, then add __rt_ffs support in C28x.
2019-07-03 19:31:54 +08:00
yangjie
31ffc4582c
[libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7
2019-07-03 18:47:11 +08:00
Bernard Xiong
38d5c2aa72
Merge pull request #2796 from lymzzyh/cache
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修复cortex-a 中cache操作没有 dsb isb
2019-06-19 11:41:05 +08:00
ZYH
fc155f8810
fix cortex-a cahce
2019-06-19 10:40:13 +08:00
明德无敌赵晓薇
21d32cdb3a
[libcpu][C28x] Fix bugs of old c28x interrupt api which can not save and restore int status
...
In C28x DSP, interrupt status are stored in ST1 register. Both INTM and DBGM is used for masking interrupt, while the latter one is used in real-time debug mode. The origin function rudely enable and disable the interrupt without considering the recent interrupt status, which not only may cause problem in some situation but also is not in conformity with rt-thread design specifications. The new api will fix this bug.
2019-06-18 20:59:00 +08:00
Bernard Xiong
0b4e2a984e
Merge pull request #2731 from jesven/a9-fpu
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add cortex-a fpu support
2019-05-29 18:30:44 +08:00
shaojinchun
043611b98a
add cortex-a fpu support
2019-05-29 08:40:41 +08:00
HubretXie
36ffdc058b
对CM3,CM4,CM7 自动开启RT_USING_CPU_FFS
2019-05-28 21:30:45 +08:00
neal
257d21c0bd
[bsp][at91sam9g45]Fix build bugs which caused by the change of libcpu/arm/arm926/start_gcc.S
2019-05-13 18:36:31 -07:00
Bernard Xiong
ec6cb9f260
[BSP][qemu-vexpress-a9] code cleaup for compiling warning.
2019-05-12 15:07:26 +08:00
shaojinchun
bcb7fac0d0
fix signals for k210
2019-05-11 09:37:25 +08:00
shaojinchun
6cdfb2ac92
fix signal code
2019-05-11 09:34:26 +08:00
Bernard Xiong
d729448f5e
[libcpu][arm/cortex-a] Add correct comments.
2019-05-09 08:48:38 +08:00
misonyo
0f33da3f0e
[libcpu/cortex-m7]add cache driver
2019-04-27 17:35:46 +08:00
shaojinchun
1e7bd3d8a1
修改lwp支持中arm cortex-a的swi入口函数处理
2019-04-27 13:54:51 +08:00
qz721
61f2a71511
Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.
...
This filename conflicts with the 'mbedtls' package. They are renamed
in the name of the corresponding chips and included in 'board.h'.
Files that rely on this file should include 'board.h' instead.
2019-04-26 10:50:48 +08:00
Bernard Xiong
41aabf3736
Merge pull request #2573 from xuzhuoyi/tms320f28379d
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[bsp][tms320f28379d] Improve finsh support and update README.md
2019-04-14 15:39:37 +08:00
xuzhuoyi
752152b63e
[bsp][tms320f28379d] Fix FPU config problem
2019-04-14 12:26:25 +08:00
xuzhuoyi
4acd8db61e
[bsp][tms320f28379d] Add finsh init in rt_init_thread
2019-04-10 22:33:25 +08:00
Bernard Xiong
44c3f55996
Merge pull request #2527 from xuzhuoyi/gd32e230
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[bsp] Add GD32E230K-START support
2019-04-07 16:59:27 +08:00
Bernard Xiong
238c93468f
Merge pull request #2530 from qz721/libcpu_cortex_a
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Disable the data alignment check.
2019-04-01 17:43:19 +08:00
qz721
b10039f396
Disable the data alignment check.
2019-04-01 14:21:59 +08:00
xuzhuoyi
fd8eb60a67
[bsp][gd32e230k-start] Update Kconfig
2019-03-31 23:26:35 +08:00
xuzhuoyi
5a460aadcd
[bsp][gd32e230k-start] Update Sconscript
2019-03-31 21:17:55 +08:00
xuzhuoyi
5d166c389d
[bsp][gd32e230k-start] Add GD32E230K-START BSP port
2019-03-31 15:44:24 +08:00
Bernard Xiong
459ddc3b06
Merge pull request #2523 from qz721/libcpu_cortex_a
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Add standard rt-thread cache interfaces for arm/cortex-a.
2019-03-30 05:57:47 +08:00
qz721
fbd40fc5b8
Add standard rt-thread cache interfaces for arm/cortex-a.
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Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-29 20:22:25 +08:00
ZYH
fcb88f7034
[libcpu][k210]fix stack frame print
2019-03-28 17:05:52 +08:00
BernardXiong
bd8f0d0423
[libcpu] Fix the build directory issue
2019-03-26 13:36:01 +00:00
Bernard Xiong
94e7f7316b
Merge pull request #2503 from qz721/libcpu_cortex_a
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Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
2019-03-25 21:58:48 +08:00
qz721
2eb1bef773
Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
2019-03-25 20:03:49 +08:00
tangyuxin
e6d1537327
移除 SConscript.1 临时文件
2019-03-25 15:18:09 +08:00
ZYH
c41bf3120f
[libcpu][k210]add stack info printf
2019-03-21 15:10:55 +08:00
ZYH
3dd72f956b
[libcpu][k210]add description of exception
2019-03-20 12:23:17 +08:00
shaojinchun
29264edde8
修改arm926中machine.c的协议声明
2019-03-14 17:54:21 +08:00
shaojinchun
159def753f
arm926内容整理
2019-03-14 17:24:35 +08:00
Wayne Ren
d8aa99a29c
[bsp][synopsys] add the support of synopsys arc emsk
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* the initial support of synopsys designware arc processor
* the initial support of synospsy ARC EM Starter Kit
* the bsp code is based on embarc which is a common SDK for
all synopsys ARC-based boards
* use "scons --gdb" to debug emsk with em9d configuration
* for detailed board information, pls go embarc.org
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-01-25 10:29:34 +08:00
Bernard Xiong
3a3c6c51f8
[libcpu] remove cache.h from mips/common folder.
2019-01-07 21:16:05 +08:00
Bernard Xiong
4c0aafb57f
[libcpu] Fix the SCoscript issue in cpu/MIPS.
2019-01-07 09:20:30 +08:00
Bernard Xiong
bde47018b8
[libcpu] Add SConscript in libcpu.
2019-01-07 06:09:45 +08:00
shaojinchun
86c76b0e8a
add k210 SMP support
2018-12-28 09:41:18 +08:00
zhuhongbing
fb693418ee
add project support for at91sam9260, add support for at91sam9g45
2018-12-26 12:50:52 +08:00
Bernard Xiong
597d71cc03
[bsp][k210] Add get_free_heap_size function.
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* Add get_free_heap_size function;
* Increase shell stack for KPU module.
2018-12-23 14:11:25 +08:00
Bernard Xiong
5e0f8cb3aa
[libcpu] Add k210 BSP.
2018-12-18 21:01:03 +08:00
Bernard Xiong
c72dc1a7e5
Merge pull request #2072 from yufanyufan77/master
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添加cpu复位函数
2018-12-15 11:53:17 +08:00
Bernard Xiong
885d99ee9b
[libcpu][risc-v] fix rt_thread_switch_interrupt_flag issue.
2018-12-15 11:47:59 +08:00
Bernard Xiong
fd347fdb90
[libcpu][risc-v] fix the rt_thread_switch_interrupt_flag issue
2018-12-15 11:47:10 +08:00
yufanyufan77
b40a8f816b
添加cpu复位函数
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RT_WEAK void rt_hw_cpu_reset(void)
2018-12-14 08:58:40 +08:00
Bernard Xiong
08521ceaa5
[libcpu] Fix the E310 compiling issue.
2018-12-08 17:08:52 +08:00
Bernard Xiong
c9576c3e53
[BSP] Add RV32M1_VEGA BSP.
2018-12-08 10:44:56 +08:00
Bernard Xiong
36b194aeb6
[BSP] Update Hifive1 BSP with unified RV porting.
2018-12-08 10:42:40 +08:00
Bernard Xiong
2a7d814f77
[libcpu] Add unified RISC-V libcpu porting.
2018-12-08 10:41:38 +08:00
liruncong
cea021781e
[libcpu/mips/ppc405]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:42 +08:00
liruncong
c7a1c1c1db
[libcpu/mips/sep6200]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:40 +08:00
liruncong
2502114e34
[libcpu/mips/xburst]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:38 +08:00
liruncong
da9bc3d677
[libcpu/mips/x1000]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:35 +08:00
liruncong
33c6a9c795
[libcpu/mips/longson_1c]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:33 +08:00
liruncong
2ce284c4b3
[libcpu/mips/longson_1b]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:26 +08:00
liruncong
bef3256db5
[libcpu/arm/ia32]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:05 +08:00
liruncong
849421709b
[libcpu/arm/zynq7000]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:02 +08:00
liruncong
3e05f24608
[libcpu/arm/sep4020]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:42:54 +08:00
liruncong
46c5c8267a
[libcpu/arm/s3c24x0]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:48 +08:00
liruncong
96691760dc
[libcpu/arm/realview-a8-vmm]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:34 +08:00
liruncong
7be87217b5
[libcpu/arm/lpc24xx]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:18 +08:00
liruncong
5321f202c4
[libcpu/arm/lpc214x]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:58 +08:00
liruncong
8ce36092c5
[libcpu/arm/cortex-r4]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:43 +08:00
liruncong
cbe07afabe
[libcpu/arm/cortex-a]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:34 +08:00
liruncong
8200137327
[libcpu/arm/AT9ASAM7X]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:17 +08:00
liruncong
2635cc1694
[libcpu/arm/am335x]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:02 +08:00
Bernard Xiong
9f477667ab
Merge pull request #1770 from xuzhuoyi/master
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添加对 TI C2000 DSP 的移植
2018-11-24 20:35:50 +08:00
xuzhuoyi
6c081947b5
[bsp][tms320f28379d] Classify c28x into ti-dsp
2018-11-24 17:41:55 +08:00
Bernard Xiong
46dae3f35f
Merge branch 'master' into dev-4.0.x
2018-11-20 23:13:45 +08:00
xuzhuoyi
17301e463c
[bsp][tms320f28379d] Add support of Kconfig
2018-11-18 12:06:52 +08:00
xuzhuoyi
b7a76b5e52
[bsp][tms320f28379d] Change license to Apache-2.0
2018-11-16 20:30:56 +08:00
xuzhuoyi
37db67d94a
Merge remote-tracking branch 'upstream/master'
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# Conflicts:
# src/thread.c
2018-11-16 20:09:46 +08:00
Bernard Xiong
00a655ac1c
[Kernel] Add ARCH_CPU_STACK_GROWS_UPWARD option
2018-11-11 15:56:02 +08:00
Bernard Xiong
484afe9d2c
[Kernel] Add 64bit CPU support.
2018-10-26 06:35:42 +08:00
Bernard Xiong
bd731fe1f0
[license] Fix the bad license header for lpc24xx.
2018-10-16 09:18:53 +08:00
Bernard Xiong
7c425408b4
[license] Change the license of libarm to Apache.
2018-10-15 01:35:07 +08:00
Bernard Xiong
1253a1b445
Merge pull request #1812 from liruncong/am335x-mmu
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修正am335x中mmu问题
2018-10-10 08:49:18 +08:00
Bernard Xiong
5c91f241bd
Merge pull request #1861 from jg1uaa/master
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avoid to conflicting types for 'uint32_t' error.
2018-10-03 23:08:17 +08:00
SASANO Takayoshi
54f23a4293
avoid to conflicting types for 'uint32_t' error.
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already uint32_t is defined at components/libc/compilers/minilibc/stdint.h.
there is two ways to solve, using <stdint.h>/uint32_t pair or
<rtthread.h>/rt_uint32_t pair.
I choose former because this code belongs to C compiler, not RT-Thread system.
2018-10-03 21:03:00 +09:00
Bernard Xiong
d96027f156
[libcpu] Fix the FPU definition in M4/M7 for ARM Clang
2018-09-25 11:08:58 +08:00
Bernard Xiong
ff08faf605
[Kernel] Adjust the copyright information
2018-09-25 11:06:07 +08:00
Bernard Xiong
b98a0ba804
[Kernel] Add ARMCC 6.x support.
2018-09-23 12:08:44 +08:00
Bernard Xiong
b9e7cf7fa3
[BSP] Enable memory pool for i.MXRT1050-EVK.
2018-09-22 22:22:18 +08:00
liruncong
af1044955a
修正am335x中mmu问题
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1) mmu_disable_dcache/mmu_enable_dcache等, 应使用rt_cpu_xxx相关函数,否则会跑飞. armcc并没有提供rt_cpu_xxx对应汇编代码,先删除
2) mmu_setmtt抽取为函数mmu_setmtts,并增加RT_WEAK.mmu_setmtts此处作为示例函数.实际用户板子可在bsp中重新实现该函数.可在rt_components_board_init函数前调用rt_hw_mmu_init
2018-09-15 11:37:14 +08:00
liruncong
6d16685011
rt_hw_backtrace中多余括号删除. armclang给出警告
2018-09-10 19:58:28 +08:00
xuzhuoyi
9d8e27e626
[bsp][tms320f28379d] Modify to C28x Compiler Register Conventions
2018-09-03 23:02:16 +08:00
xuzhuoyi
5fd1213e73
[bsp][tms320f28379d] __rt_ffs() problem caused by 16-bit int
2018-09-03 21:39:56 +08:00
xuzhuoyi
697a4495a6
[bsp][tms320f28379d] Add support for upward-growing stack
2018-09-03 00:03:06 +08:00
xuzhuoyi
d85981a715
[BSP][tms320f28379d] Add port for tms320f28379d
2018-09-02 18:44:28 +08:00
hichard_ren@yeah.net
b46e7f3172
add rt_hw_cpu_reset for cortex-m cpu
2018-08-01 11:57:56 +08:00
aozima
d431f4b5f9
[libcpu][comtex-m7] enhancement hard fault exception handler.
2018-07-25 21:39:45 +08:00
aozima
6c39b2d54d
[libcpu][comtex-m4] enhancement hard fault exception handler.
2018-07-25 21:39:44 +08:00
aozima
a0fe71f78f
fixed get sp in HardFault_Handler. close #1646
2018-07-25 21:39:43 +08:00
=
944b0f1c94
fix annotation error
2018-06-13 15:04:31 +08:00
liang yongxiang
7785dc5d01
[libcpu] add c-sky ck802 support
2018-06-11 09:43:39 +08:00
ArdaFu
aa08164cb3
[libcpu] Sconscript: fix spell srror.
2018-06-04 14:23:54 +08:00
ArdaFu
099062de78
[tools][building] Add ASFLAGS in DefineGroup.
2018-06-04 14:18:31 +08:00
ArdaFu
7a1f8ee1c4
[libcpu][arm][arm926] Using C header file to define stack and heap size.
2018-06-04 13:34:45 +08:00
liang yongxiang
32c5b2515f
[libcpu] add risc-v e310 porting
2018-05-31 14:53:26 +08:00
Bernard Xiong
fe691c2ab3
Merge pull request #1484 from TanekLiang/riscv-update
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remove hifive1 bsp and risc-v/e310 porting
2018-05-29 16:20:39 +08:00
liang yongxiang
46b9be6038
[libcpu] remove nds32 porting
2018-05-29 12:59:54 +08:00
liang yongxiang
5faae3350c
[libcpu] remove libcpu/risc-v
2018-05-29 12:59:13 +08:00
zhuangwei123
330bdf6989
[bsp/ls1cdev]跟上一提交,漏提两个文件
2018-05-12 19:36:08 +08:00
zhuangwei123
9a7caed323
[bsp/ls1cdev]添加自引导特性,添加配置选项
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1、添加自引导特性,添加配置选项
2、修复cpuport.c的bug
3、修复ls1c_pin.c不能默认复用的bug
2018-05-12 19:33:32 +08:00
aozima
dd1041bb7f
[libcpu]: fixed #1196 FPU FPCA issue.
2018-01-31 18:54:11 +08:00
Bernard Xiong
d78f5eb674
Merge pull request #1124 from SummerGGift/add_arm_8-byte_alignment
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[libcpu]: add 8-byte alignment for arm architecture && optimize code …
2017-12-21 17:07:34 +08:00
SummerGift
fc7a5abc76
[libcpu]: add 8-byte alignment for arm architecture && optimize code format
2017-12-21 16:37:38 +08:00
Bernard Xiong
cc75366fda
Merge pull request #1123 from SummerGGift/8-byte_alignment
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[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 15:36:21 +08:00
SummerGift
336207ad31
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 15:35:48 +08:00
SummerGift
a4a85a28da
[libcpu]:optimize code format
2017-12-21 15:14:23 +08:00
SummerGift
e7b1786759
[libcpu]:optimize code format
2017-12-21 14:55:34 +08:00
SummerGift
15715692d2
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 10:13:47 +08:00
Bernard Xiong
bb46058d8e
[libcpu] Add ARCH_ARM_ARM9/11 type
2017-12-19 17:39:23 +08:00
SummerGift
eb72d19179
[libcpu] add volatile for __asm.
2017-11-22 09:54:36 +08:00
SummerGift
2488624a18
[libcpu] add volatile for asm (" mcr ") or asm (" mrc ") instruct.
2017-11-22 09:54:27 +08:00
tangyuxin
afc2256d01
[libcpu]Support x1000 CPU
2017-11-10 19:50:14 +08:00
Bernard Xiong
f6170a6e5b
[BSP] add i.MX 6UL BSP
2017-11-01 13:30:17 +08:00
bernard
756bfcc5e2
Update Kconfig.
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1. Add IPADDR/GWADDR etc;
2. Add Kconfig for libcpu.
2017-10-31 09:54:23 +08:00
weety
6085f6826d
[bsp][at91sam9260] Fix the problem of the finsh function failure by using component initialization.
2017-10-19 23:46:17 +08:00
bernard
5e3b3b19a6
[BSP] change the type of cmd.
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1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
2017-10-16 13:23:03 +08:00
bernard
f8a1bf6fd8
[libcpu] code cleanup for nds32.
2017-10-09 18:06:58 +08:00
Bernard Xiong
c2f028ed8d
Update cpuport.c
2017-10-06 11:43:50 +08:00
Bernard Xiong
ea18ef60ed
Merge pull request #826 from ArcherChang/master
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[BSP] Add Andes N1068 porting and simple bsp.
2017-10-06 11:03:02 +08:00
Bernard Xiong
0d193254f8
Merge pull request #845 from caogos/master
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[BSP] Add FPU option for loongson1c.
2017-09-14 17:06:11 +08:00
勤为本
574e22bdbd
在配置文件“rtconfig.h”中增加硬浮点FPU的配置项,
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浮点经常会用到,所以默认使用硬浮点。
2017-09-13 15:21:09 +08:00
aozima
cb247e913f
update libcpu: cortex-m0 fault handlers always enable.
2017-09-01 10:22:55 +08:00
Bernard Xiong
2ac493698b
[BSP] cleanup for hifive1 bsp.
2017-08-26 11:02:39 +08:00
ArcherChang
652ea85a39
[1] Andes N1068体系移植
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a. Libc改用官方版本(工具链附带版本);
b. 去除未使用文件;
2017-08-25 14:25:35 +08:00
Bernard Xiong
b9ebd183ae
Merge pull request #827 from caogos/master
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[BSP] Add EMAC driver in loongson1C (ported by chinesebear, https://github.com/chinesebear/rtt-net )
2017-08-25 11:07:34 +08:00
ArcherChang
921fbfbc21
[1] 添加Andes N1068体系;
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[2] 基于AE210P EVB板;
[3] 详细信息参阅bsp/AE210P/readme文件夹;
《Andes工程创建和调试》文档;等。
2017-08-25 10:25:33 +08:00
aozima
9bbc4e5e6b
update cortex-m libcpu: fixed compile error.
2017-08-23 16:13:51 +08:00
勤为本
838c63f365
添加龙芯1C片内网卡的驱动(原创作者是chinesebear, https://github.com/chinesebear/rtt-net)
2017-08-23 15:46:51 +08:00
aozima
9b7303e511
update libcpu: ensure fault enable.
2017-08-18 11:12:58 +08:00
Bernard Xiong
4626b19ead
Merge pull request #784 from zhangjun1996/master
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[BSP] add bsp for sifive(risc-v e310).
2017-08-10 16:51:59 +08:00
勤为本
7129d77bee
增加龙芯1c硬浮点的支持(可以使用硬浮点了)
2017-08-10 15:35:03 +08:00
zhangjun
72cfe9dd68
modify: drivers/cpuusage.c
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modify: ../../libcpu/risc-v/e310/stack.c
rmove unused macro definition
modify: ../../src/idle.c
Return to the original version
2017-07-31 12:05:45 +08:00
zhangjun
0cd49e7c4a
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
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add new bsp for risc-v
2017-07-31 11:27:46 +08:00
zhangjun
e9f1bdf2da
new file: ../../libcpu/risc-v/e310/trap.c
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add file that forget to submit before
auto change timer mtimercmp register on the base of RT_TICK_PER_SECOND in rtconfig.h
no flashing led
new file: ../../src/idle.c
recover old file
2017-07-31 11:12:28 +08:00
zhangjun
a5305c05df
fix bug in context_gcc.s and start_gcc.s:
...
save mie into stack
msh running normaly
2017-07-31 10:59:59 +08:00
zhangjun
b032dff161
fix bug in rt_hw_context_switch_interrupt_do
...
save sp to old thread
clear rt_thread_switch_interrupt_flag
always enable interrupt after rt_hw_context_switch
judeg the type of interrupt in trap_entry, then call handler(Machine timer interrupt of Machine external interrupt)
2017-07-30 19:46:28 +08:00
zhangjun
2d56a27c20
修改: ../../libcpu/risc-v/e310/context_gcc.S
...
enable interrupt after return form rt_hw_context_switch
2017-07-30 15:34:32 +08:00
zhangjun
3c51848d33
fix trap_entry
2017-07-29 15:37:20 +08:00
zhangjun
b80f83f360
modified: ../../libcpu/risc-v/e310/context_gcc.S
...
fix open timer intrrupt
2017-07-26 16:27:54 +08:00
zhangjun
98a6896cfa
remove "csrrc a5, mstatus, MSTATUS_MIE" in rt_hw_interrupt_enable();
...
it will lead to interrupt again in interrupt
2017-07-26 16:07:01 +08:00
勤为本
358612c8a2
支持GPIO中断(外部中断)
2017-07-20 17:35:03 +08:00
勤为本
d1bb7c61f4
将支持的中断个数从32个扩展到160个,至此可以支持所有中断
2017-07-20 17:05:59 +08:00
勤为本
f39164203e
修正龙芯1c的中断号
2017-07-18 17:04:32 +08:00
zhangjun
b334347a24
deleted: rtthread.s /*just for debug*/
...
modified: ../../libcpu/risc-v/e310/context_gcc.S
change ret to mret and switch to new task with mepc
2017-07-17 16:55:33 +08:00
zhangjun
e01455155a
add context_gcc.s
2017-07-17 15:44:00 +08:00
zchong-cht
a74a2a25a8
Add libcpu/arm/am335x/context_iar.S file
2017-02-06 21:57:15 +08:00
kontais
b96f07e477
flush cache after exception code install
2016-06-15 08:09:56 -07:00
Bernard Xiong
4e95fdff4a
[BSP] Update VFP code in armv6.
...
committed by FH.
2016-05-20 14:20:34 +08:00
Bernard Xiong
923594c7ab
[BSP] Enable VFP.
...
committed by FH.
2016-05-20 12:24:51 +08:00
Bernard Xiong
255f8b7c34
[BSP] Add BSP for Ingenic X1000 CPU
2016-04-24 19:34:41 +08:00
chinesebear
86216ceecc
start exception by chinesebear
2016-04-19 22:08:23 +08:00
Bernard Xiong
43f68131ce
[BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd.
...
FH8620 BSP
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
All rights reserved
2016-04-18 13:52:39 +08:00
zchong_cht
3983f39f34
Add iar compiler support for am335x.
2015-11-11 23:44:05 +08:00
Bernard Xiong
3faca6d5df
[BSP] update stm32f7-disco
...
code cleanup.
2015-09-24 16:03:09 +08:00
Bernard Xiong
a0de58a008
[BSP] fix x86 bsp compiling issue
2015-09-15 11:50:29 +00:00
weety
2021f5a276
Add the license.
2015-09-04 21:58:08 +08:00
weety
b71cb4c09d
Add dm365 porting.
2015-09-04 12:30:20 +08:00
nongxiaoming
af8a91457e
[bsp]add the stm32f74x bsp.
2015-08-07 13:30:13 +08:00
chinesebear
4ad1b35537
chinesebear add bsp & libcpu
2015-07-09 07:38:07 +08:00
aozima
9fe3cbf76f
Align thread stack to 8 byte.
2015-06-05 19:14:08 +08:00
aozima
314379cc77
implement __user_initial_stackheap
2015-06-04 12:23:24 +08:00
aozima
be76b10be6
Align stack address to 8 byte.
2015-06-04 11:59:18 +08:00
aozima
1fa5711712
fixed assembly warnings.
2015-05-22 16:48:01 +08:00
aozima
73df162d3f
fixed assembly warnings.
2015-05-13 11:57:34 +08:00
Adrian Huang
4222677933
[libcpu][am335x] Fix the booting failure when enabling MMU
...
Since the 16 domains are configured as the client domains in
mmu_setttbase(), a Permission fault is generated if the XN bit
(Execute-never) is set in the short-descriptor translation table
(for section and supersection). This leads to the booting failure
when enabling MMU for beagleboard bsp. Here is log:
----------------------------------------------------------------
SD/MMC found on device 0
reading uEnv.txt
117 bytes read in 3 ms (38.1 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc ...
Running uenvcmd ...
reading rtthread.bin
162624 bytes read in 24 ms (6.5 MiB/s)
\## Starting application at 0x80200000 ...
----------------------------------------------------------------
This commit removes the XN bit configuration in the section of the
short-descriptor translation table. The OS can be booted successfully
with applying this commit.
2015-05-11 10:36:11 +08:00
ardafu
a13132b302
[libcpu][arm926] Optimize irq trap code.
2015-05-04 16:13:43 +08:00
ardafu
49fa5c44d7
[libcpu][arm926] Optimize code
...
1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
2015-04-22 11:19:50 +08:00
ardafu
175e357ace
[libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread.
2015-04-16 14:13:43 +08:00
ardafu
cf3d639fcb
[libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files.
2015-04-16 10:35:12 +08:00
ardafu
6aa242645f
1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable watchdog in rt_lovel_level_init function.
...
2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain.
3. [bsp][sam9260] Move link strips in to folder link_scripts.
4. [libcpu][arm926] Add copy right to source file and format code.
2015-04-15 16:13:30 +08:00
ardafu
39452b67b0
1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP
2015-04-14 21:56:34 +08:00
Bright Pan
0b5958d700
Fix compile warning:
...
..\..\libcpu\arm\cortex-m3\context_rvds.S(207):
warning: A1581W: Added 2 bytes of padding at address 0xd6
2015-03-09 09:31:23 +08:00
limxuzheng
4fea46c83c
support rx62n
2014-11-12 01:09:43 +08:00
陈豪
62af08370b
Merge pull request #2 from RT-Thread/master
...
sync
2014-09-20 01:19:42 +08:00
bernard
267c61ebce
[libcpu] Add builtin ffs implementation for Cortex-M4.
2014-09-11 12:51:33 +08:00
Grissiom
11fb9060e0
mips/loongson_1b: format code
2014-08-18 15:24:21 +08:00
Grissiom
0ee101ccb0
mips/loongson_1b: install NULL handler is OK
2014-08-18 15:22:16 +08:00
Grissiom
1d928f7daf
mips/loongson_1b: fix rt_interrupt_dispatch
2014-08-18 15:21:09 +08:00
陈豪
fd6ef4b235
[libcpu]am335x edit vector
...
vector_undef and vector_dabt
2014-08-12 18:26:22 +08:00
aozima
2c47f2e683
Fix some spell error;
2014-07-31 13:59:25 +08:00
Bernard Xiong
2604440ceb
[bsp] Remove none-released porting
2014-07-12 11:08:38 +08:00
Grissiom
97fb91dcc6
bsp: add zynq7000
2014-06-27 14:12:36 +08:00
Grissiom
2b7be29cad
[bsp/rva8] enable group{0,1} interrupt forwarding in gic initialization
...
When RT-Thread is running stand alone, it forgot to enable the
distributor of GIC.
2014-04-08 11:54:03 +08:00
Grissiom
c0f0c2322f
[libcpu/arm] remove useless cpsr updating in rt_hw_context_switch_to
...
This piece of code will enable the interrupt early before switching to
the first thread. Although it is harmless, but not prefect.
2014-04-08 11:24:04 +08:00
Grissiom
28f11fdd7b
[vmm] add realview-pb-a8 VMM support
2014-04-03 17:59:14 +08:00
RTsien
9382a7105f
add CM_PER_UARTx_CLKCTRL
2014-01-11 15:14:36 +08:00
Grissiom
0c9b9ced31
cortex-r4: use byte to allocate the stack
...
Unit of "byte" is more intuitive than "long".
2013-11-17 12:49:08 +08:00
Grissiom
a8520ed383
cortex-r4: let svc mode reuse the stack of IRQ on startup
...
As the svc stack is the stack of threads, there is no need to allocate a
separate stack for the startup. Reuse the IRQ stack should be OK.
Tested on rm48 board.
2013-11-17 12:49:07 +08:00
Bright Pan
06987e72e5
Fix hardfault bug for gcc port
...
for 2013-02-20 aozima commmit "port for gcc", but the commit is
not tested,and the kernel is breakdown in context_gcc.S, the file
is a copy from cortex-m3,but not port for cortex-m0, so i complete
this port for aozima, test it in stm32f0discovery board ,
and it works fine.
2013-11-04 16:10:11 +08:00
Grissiom
377c6e6cc9
cortex-r4: dump register on traps
...
We could not handle any traps except IRQ/FIQ.
2013-10-20 23:46:50 +08:00
Grissiom
e1e563e85c
cortex-r4: remove RM48x50.h and add armv7.h
2013-10-20 21:10:26 +08:00
Grissiom
81ab083ae5
rm48: move some asm file to libcpu
2013-10-20 18:51:46 +08:00
Grissiom
9568669109
rm48x50: add GCC support
2013-10-20 18:51:45 +08:00
Bernard Xiong
7bdb082c91
Delete SConscript
2013-09-22 06:59:52 +08:00
bernard
9d09cd9f23
Import beaglebone porting
2013-09-20 21:20:51 +08:00
Grissiom
3ebc766521
sim/posix: move rt_hw_context_switch_interrupt after it's definition
...
This fix a compile error in Clang.
2013-09-04 00:05:03 +08:00
Bernard Xiong
e301d14979
Merge pull request #132 from MrVan/sep6200
...
SEP6200 Support
2013-07-29 22:35:31 -07:00
weety
37ac4855da
Embedded GPLv2 license.
2013-07-21 20:01:24 +08:00
weety
36c4604a36
fix compiling error
2013-07-21 19:39:21 +08:00
weety
42f9840653
commit again
2013-07-21 17:32:55 +08:00
weety
3bdbf640b7
update at91sam9260 project directory structure.
2013-07-21 17:19:30 +08:00
weety
885301bb14
update AT91SAM9260 usart driver, using serial driver component.
2013-07-21 15:01:42 +08:00
Peng Fan
82bc21ff7b
Cleanup and add licencse
2013-07-17 18:42:19 +08:00
Peng Fan
73beced22a
SEP6200 Support
2013-07-17 13:37:31 +08:00
aozima
ce4f0329db
enhancement hard fault exception handler.
2013-07-09 22:02:12 +08:00
aozima
5120f54a29
fix spelling error.
2013-06-24 22:57:27 +08:00
aozima
34d59ccb0f
update libcpu/arm/cortex-m4: support lazy stack optimized.
2013-06-23 18:10:46 +08:00
aozima
b045f93b47
fixed bug: correct cortex-m SCB->VTOR address.
2013-06-23 18:08:16 +08:00
aozima
93b9b28297
format code by Astyle.
2013-06-23 18:07:10 +08:00
aozima
a2ff85c03f
update libcpu/arm/cortex-m0: restore MSP.
2013-06-22 18:59:51 +08:00
aozima
4d421cad73
update libcpu/arm/cortex-m3: restore MSP.
2013-06-22 18:59:50 +08:00
aozima
f9e673354a
update libcpu/arm/cortex-m4: restore MSP.
2013-06-22 18:59:49 +08:00
Bernard Xiong
3071e35c54
Merge pull request #109 from grissiom/rm48x50
...
Rm48x50
2013-06-19 01:29:12 -07:00
visitor83
c986754c49
Signed-off-by: visitor83 <wolflouiswang@gmail.com>
...
format the s3c24x0 serial.c and mini2440 rtconfig.py
2013-06-18 12:51:55 +08:00
visitor83
c56fa7c907
ident format
...
Signed-off-by: visitor83 <root@wolflouis.(none)>
2013-06-16 10:00:34 +08:00
Grissiom
009239ceed
rm48x50: rt_interrupt_nest should be `volatile rt_uint8_t`
2013-06-12 23:56:10 +08:00
Grissiom
9b949c28b7
rm48x50: add cache_{enable, disable}
2013-06-12 21:03:04 +08:00
Grissiom
e8bbbe6788
cortex-r4: wrap asm functions with .asmfunc/.endasmfunc
2013-06-05 23:21:06 +08:00
Grissiom
228a6be077
cortex-r4: add __rt_ffs
2013-06-05 23:20:39 +08:00
Grissiom
e74befca44
move libcpu/arm/rm48x50/ to libcpu/arm/cortex-r4
2013-05-31 21:06:26 +08:00
Grissiom
24fc6e6ebb
rm48x50: VFP lazy stacking
...
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.
Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
2013-05-31 20:58:08 +08:00
Grissiom
8bbfd45ce3
rm48x50: change STMFD/LDMFD to STMDB/LDMIA
...
VFP instructions only have IA(Increment After)/DB(Decrement Before)
mode. To keep consistency, just change STM/LDM to DB/IA accordingly.
2013-05-31 18:38:42 +08:00
Grissiom
ec1203bfab
rm48x50: turn on VFP support
...
This support Common VFPv2 sub-architecture.
2013-05-31 18:32:21 +08:00
Grissiom
83ea4dd628
rm48x50: small cleanup on context_ccs.asm
2013-05-30 17:37:50 +08:00
Grissiom
810311b624
rm48x50: fix bug in rt_hw_interrupt_{mask,unmask}
2013-05-29 23:36:32 +08:00
Grissiom
f08df08897
rm48x50: optimize a BEQ
...
Use condition flag in the ORR. This could eliminate a BEQ.
2013-05-26 23:37:56 +08:00
Grissiom
19fe6251e7
rm48x50: optimize context_switch_interrupt_to by reuse registers
...
When saving thread registers in context_switch_interrupt_to, we don't
change them, just move them. So there is no need to always r0-r3 from
stack to the real r0-r3. So just use the intermediate registers and
eliminate 2 MOV.
2013-05-26 22:37:49 +08:00
Grissiom
3d0647efb3
rm48x50: optimize context_switch_interrupt_do
...
Substitude STMFD, MOV, ADD with STMFD, SUB. It reduce one instruction.
Tested on board and it works like a charm.
2013-05-26 17:22:36 +08:00
Grissiom
b39d038cf0
rm48x50: utilize CPS instruction and remove some useless code
2013-05-26 16:55:39 +08:00
Grissiom
f51bce3fed
add rm48x50 bsp and libcpu
...
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
2013-05-24 22:55:13 +08:00
yiyue.fang
db548a1b37
fixed compiling error related to the RT_USING_INTERRUPT_INFO in mini4020
2013-04-10 00:49:18 +08:00
weety
d9d39a8d21
Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication.
2013-04-08 21:57:24 +08:00
weety
0594734d8d
clean up code
2013-04-02 20:33:56 +08:00
weety
03aa76155e
fixed context thread issue when using armcc compile
2013-04-02 20:27:08 +08:00
weety
fb9ea5eada
enable at91sam9260 mmu, update SDIO and EMAC drivers
2013-04-02 20:24:51 +08:00
weety
92d4c1939b
fixed at91sam9260 context thread issue, avoid idle thread stack overflow
2013-04-02 20:23:11 +08:00
Bernard Xiong
edef109d76
fix interrupt compiling issue in PPC
2013-03-31 22:58:36 -04:00
Bernard Xiong
c1b600644f
Merge pull request #56 from aozima/aozima
...
Modify the interrupt interface implementations.
2013-03-31 04:14:40 -07:00
aozima
2ccb3c7589
update LPC2478: Modify the interrupt interface implementations.
2013-03-31 18:25:51 +08:00
weety
710a0fc4a5
fix issue when print interrupt info
2013-03-31 18:24:51 +08:00
aozima
1549b7db90
update LPC214X: Modify the interrupt interface implementations.
2013-03-31 17:58:26 +08:00
aozima
eab20a9975
update AT91SAM7X: Modify the interrupt interface implementations.
2013-03-31 17:43:09 +08:00
aozima
83ce430902
update loongson 1B dev: Modify the interrupt interface implementations.
2013-03-31 17:32:25 +08:00
aozima
93e04a1366
update loongson dev3210: Modify the interrupt interface implementations.
2013-03-31 17:32:20 +08:00
aozima
6058efbd9b
update Jz47xx: Modify the interrupt interface implementations.
2013-03-31 17:32:16 +08:00
aozima
29a3ae4368
update sep4020: Modify the interrupt interface implementations.
2013-03-31 17:32:04 +08:00
aozima
fbc1b05dd8
update mini2440: Modify the interrupt interface implementations.
2013-03-31 17:30:30 +08:00
Bernard Xiong
608074deaf
update to interrupt description
2013-03-30 08:15:27 +08:00
Bernard Xiong
8e6a534fa3
fix compiling issue in Jz47XX
2013-03-26 09:08:25 +08:00
Bernard Xiong
bb72be94b2
code cleanup for interrupt description
2013-03-26 08:52:33 +08:00
weety
5639c5daed
implement __rt_ffs for armv5
2013-03-24 16:03:23 +08:00
Bernard Xiong
1abaa0492d
implement __rt_ffs in kernel service library
2013-03-23 11:27:29 +08:00
weety
7917cf09e7
remain the old handler to keep forward compatibility
2013-03-19 11:25:46 +08:00
weety
9678ee67e9
Modified the interrupt function comments
2013-03-19 11:25:33 +08:00
weety
b21028474b
Modify the interrupt interface implementations, changes in the part of the parameter definition.
2013-03-19 11:25:12 +08:00
aozima
be59c9287f
fixed cache initial bug.
2013-03-08 11:23:40 +08:00
prife
9ccdf4172e
basic mingw support for simulator: kernel and finsh
2013-02-26 16:03:08 +08:00
aozima
d80888a194
port stm32f0x to gcc.
2013-02-20 22:03:31 +08:00
prife
b8aaa6e730
clean code in cpu_port.c, add some comments
2013-01-16 18:49:07 +08:00
prife
b8bd5c8309
fix bug in cpu_port.c(can work very well)
2013-01-15 23:59:14 +08:00
prife
395178ebfa
rewrite cpu_port.c (but still has bug)
2013-01-15 21:38:54 +08:00
prife
07da6caafd
surport finsh
2013-01-14 22:38:54 +08:00
prife
8f70786c30
add finsh, but still cannot work, only can be built with gcc
2013-01-14 16:50:40 +08:00
prife
7b42f926a0
re-write the rt_hw_interrupt_enable/disable
2013-01-14 14:14:40 +08:00
prife
5685a395be
add some comments and clean code in cpu_port.c
2013-01-14 01:23:08 +08:00
prife
7b58dd92fa
add libcpu/sim/posix/cpu_port.c
2013-01-13 22:58:45 +08:00
Bernard Xiong
72782e9203
convert end of line
2013-01-08 05:05:02 -08:00
Ubuntu
ecd66612cf
remove lpc122x because there is a common cortex-m0 porting.
2013-01-04 06:03:03 -08:00
bernard.xiong@gmail.com
68fadd9edc
Add exception hook function.
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2551 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-29 09:36:16 +00:00
bernard.xiong@gmail.com
ac9c373d7f
Add thread name to Win32Thread.
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2541 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-29 03:28:31 +00:00
goprife@gmail.com
8df650d861
clean code in sim/win32/cpu_port.c
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2536 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-27 08:31:53 +00:00
dzzxzz@gmail.com
468ade5e98
fixed the coding style in libcpu/arm
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2518 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-24 06:59:14 +00:00
dzzxzz@gmail.com
f6629a1e4c
rename the file name using low case
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2514 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-24 03:50:42 +00:00
dzzxzz@gmail.com
eab30ebbda
fixed the fixed the gcc compiling error in ubuntu host OS
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2512 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-24 03:34:04 +00:00
wuyangyong
5be0c53dd8
stack addr align to 8byte.
...
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2509 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-23 07:40:31 +00:00
dzzxzz@gmail.com
2955dbfcda
add LPC4330 BSP based on NGX xplorer development board
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2487 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-12-17 08:21:29 +00:00
bernard.xiong
6ae9a5d95c
revert wrongly commit.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2408 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-11-13 08:10:23 +00:00
bernard.xiong
f78a50883b
remove nuc1xx because there is a cortex-m0 branch.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2407 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-11-13 07:59:28 +00:00
bernard.xiong
ec0cb881d8
remove lpc1100 because there is a cortex-m0 branch.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2406 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-11-13 07:56:40 +00:00
nongli1031@gmail.com
6fe2afed8c
for rt-thread 1.1.0
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2372 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-10-26 03:36:13 +00:00
goprife@gmail.com
20352571e2
add libcpu/sim/win32 to support the win32 bsp (compiled by visual studio)
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2359 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-10-21 04:46:24 +00:00
goprife@gmail.com
806ecbbb2b
update libcpu/SConscript to support cl(c compiler of visual studio)
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2358 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-10-21 04:42:49 +00:00
bernard.xiong
0c13711396
Add taihu bsp (PPC405)
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2350 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-10-14 23:28:37 +00:00
wuyangyong
0057604ad2
update hdisr_gcc.S: push argument for ISR.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2341 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-10-10 16:39:49 +00:00
dzzxzz@gmail.com
e0a5c0ae81
save texit address in to thread stack in m16c
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2308 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-09-26 06:43:35 +00:00
dzzxzz@gmail.com
c784dd2ed8
update V850 BSP, now supporting scons + IAR
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2306 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-09-25 04:18:24 +00:00
dzzxzz@gmail.com
6dcb1207b1
initialize register r31(LP) with texit in V850/cpuport.c
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2305 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-09-25 03:19:43 +00:00
wuyangyong
056228cce6
fixed bug: store r8 - r11.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2258 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-08-22 15:53:54 +00:00
iamyhw@gmail.com
4455768b92
fixed s3c2440a context thread bug,patch contributor
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:yuxun2k
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2192 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-06-28 14:04:20 +00:00
wuyangyong
a9aa8d503e
add libcpu/cortex-m0.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2142 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-05-31 17:41:58 +00:00
mok.jingxian@gmail.com
5684d15916
add bf533 bsp and cpu files.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2138 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-05-30 11:29:34 +00:00
dzzxzz@gmail.com
0ce3aa056d
update CMSIS RTOS API in MB9BF506R
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2117 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-05-15 06:16:37 +00:00
wuyangyong
04a79d24cf
fix extern list_thread return type by arda.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2104 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-04-29 02:11:40 +00:00
bernard.xiong@gmail.com
090553f768
delete PK40X256VLQ100 branch.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2081 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-04-16 05:04:30 +00:00
dzzxzz@gmail.com
a321f3da64
support GNUC cross compiler(GNUM16CM32Cv1101-ELF) for renesas M16C porting
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2047 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-04-14 07:04:27 +00:00
luohui2320@gmail.com
8d4938ae70
delete libcpu/arm/at91sam926x/rt_list.h
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2008 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-03-23 15:07:21 +00:00
wuyangyong
38ba67a867
update libcpu cortex-m4.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1967 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-02-18 17:46:08 +00:00
wuyangyong
68bee363ff
update IA32 branch for new rt-thread platform.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1948 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-02-16 04:19:20 +00:00
wuyangyong
7906287cfe
IAR not support VSTMFD and VLDMFD, use VSTMDB and VLDMIA.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1947 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-02-16 03:45:50 +00:00
dzzxzz@gmail.com
645260a1c9
fixed a compiling error while not defined RT_USING_FINSH
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1906 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-01-03 09:08:47 +00:00
wuyangyong
aad32f8546
support context switch load/store FPU register.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1901 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-12-31 20:25:44 +00:00
wuyangyong
1097104c7f
fixed stack align issues.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1900 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-12-31 20:21:46 +00:00
bernard.xiong@gmail.com
3df72cc21f
update file header.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1891 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-12-31 04:08:12 +00:00