6cdfb2ac92
fix signal code
2019-05-11 09:34:26 +08:00
d729448f5e
[libcpu][arm/cortex-a] Add correct comments.
2019-05-09 08:48:38 +08:00
0f33da3f0e
[libcpu/cortex-m7]add cache driver
2019-04-27 17:35:46 +08:00
1e7bd3d8a1
修改lwp支持中arm cortex-a的swi入口函数处理
2019-04-27 13:54:51 +08:00
61f2a71511
Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.
...
This filename conflicts with the 'mbedtls' package. They are renamed
in the name of the corresponding chips and included in 'board.h'.
Files that rely on this file should include 'board.h' instead.
2019-04-26 10:50:48 +08:00
44c3f55996
Merge pull request #2527 from xuzhuoyi/gd32e230
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[bsp] Add GD32E230K-START support
2019-04-07 16:59:27 +08:00
238c93468f
Merge pull request #2530 from qz721/libcpu_cortex_a
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Disable the data alignment check.
2019-04-01 17:43:19 +08:00
b10039f396
Disable the data alignment check.
2019-04-01 14:21:59 +08:00
fd8eb60a67
[bsp][gd32e230k-start] Update Kconfig
2019-03-31 23:26:35 +08:00
5a460aadcd
[bsp][gd32e230k-start] Update Sconscript
2019-03-31 21:17:55 +08:00
5d166c389d
[bsp][gd32e230k-start] Add GD32E230K-START BSP port
2019-03-31 15:44:24 +08:00
459ddc3b06
Merge pull request #2523 from qz721/libcpu_cortex_a
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Add standard rt-thread cache interfaces for arm/cortex-a.
2019-03-30 05:57:47 +08:00
fbd40fc5b8
Add standard rt-thread cache interfaces for arm/cortex-a.
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Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-29 20:22:25 +08:00
bd8f0d0423
[libcpu] Fix the build directory issue
2019-03-26 13:36:01 +00:00
2eb1bef773
Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
2019-03-25 20:03:49 +08:00
29264edde8
修改arm926中machine.c的协议声明
2019-03-14 17:54:21 +08:00
159def753f
arm926内容整理
2019-03-14 17:24:35 +08:00
bde47018b8
[libcpu] Add SConscript in libcpu.
2019-01-07 06:09:45 +08:00
fb693418ee
add project support for at91sam9260, add support for at91sam9g45
2018-12-26 12:50:52 +08:00
b40a8f816b
添加cpu复位函数
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RT_WEAK void rt_hw_cpu_reset(void)
2018-12-14 08:58:40 +08:00
849421709b
[libcpu/arm/zynq7000]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:02 +08:00
3e05f24608
[libcpu/arm/sep4020]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:42:54 +08:00
46c5c8267a
[libcpu/arm/s3c24x0]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:48 +08:00
96691760dc
[libcpu/arm/realview-a8-vmm]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:34 +08:00
7be87217b5
[libcpu/arm/lpc24xx]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:18 +08:00
5321f202c4
[libcpu/arm/lpc214x]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:58 +08:00
8ce36092c5
[libcpu/arm/cortex-r4]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:43 +08:00
cbe07afabe
[libcpu/arm/cortex-a]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:34 +08:00
8200137327
[libcpu/arm/AT9ASAM7X]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:17 +08:00
2635cc1694
[libcpu/arm/am335x]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:02 +08:00
bd731fe1f0
[license] Fix the bad license header for lpc24xx.
2018-10-16 09:18:53 +08:00
7c425408b4
[license] Change the license of libarm to Apache.
2018-10-15 01:35:07 +08:00
1253a1b445
Merge pull request #1812 from liruncong/am335x-mmu
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修正am335x中mmu问题
2018-10-10 08:49:18 +08:00
d96027f156
[libcpu] Fix the FPU definition in M4/M7 for ARM Clang
2018-09-25 11:08:58 +08:00
ff08faf605
[Kernel] Adjust the copyright information
2018-09-25 11:06:07 +08:00
b98a0ba804
[Kernel] Add ARMCC 6.x support.
2018-09-23 12:08:44 +08:00
af1044955a
修正am335x中mmu问题
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1) mmu_disable_dcache/mmu_enable_dcache等, 应使用rt_cpu_xxx相关函数,否则会跑飞. armcc并没有提供rt_cpu_xxx对应汇编代码,先删除
2) mmu_setmtt抽取为函数mmu_setmtts,并增加RT_WEAK.mmu_setmtts此处作为示例函数.实际用户板子可在bsp中重新实现该函数.可在rt_components_board_init函数前调用rt_hw_mmu_init
2018-09-15 11:37:14 +08:00
6d16685011
rt_hw_backtrace中多余括号删除. armclang给出警告
2018-09-10 19:58:28 +08:00
b46e7f3172
add rt_hw_cpu_reset for cortex-m cpu
2018-08-01 11:57:56 +08:00
d431f4b5f9
[libcpu][comtex-m7] enhancement hard fault exception handler.
2018-07-25 21:39:45 +08:00
6c39b2d54d
[libcpu][comtex-m4] enhancement hard fault exception handler.
2018-07-25 21:39:44 +08:00
a0fe71f78f
fixed get sp in HardFault_Handler. close #1646
2018-07-25 21:39:43 +08:00
944b0f1c94
fix annotation error
2018-06-13 15:04:31 +08:00
7a1f8ee1c4
[libcpu][arm][arm926] Using C header file to define stack and heap size.
2018-06-04 13:34:45 +08:00
dd1041bb7f
[libcpu]: fixed #1196 FPU FPCA issue.
2018-01-31 18:54:11 +08:00
fc7a5abc76
[libcpu]: add 8-byte alignment for arm architecture && optimize code format
2017-12-21 16:37:38 +08:00
336207ad31
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 15:35:48 +08:00
a4a85a28da
[libcpu]:optimize code format
2017-12-21 15:14:23 +08:00
e7b1786759
[libcpu]:optimize code format
2017-12-21 14:55:34 +08:00
15715692d2
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 10:13:47 +08:00
eb72d19179
[libcpu] add volatile for __asm.
2017-11-22 09:54:36 +08:00
2488624a18
[libcpu] add volatile for asm (" mcr ") or asm (" mrc ") instruct.
2017-11-22 09:54:27 +08:00
f6170a6e5b
[BSP] add i.MX 6UL BSP
2017-11-01 13:30:17 +08:00
6085f6826d
[bsp][at91sam9260] Fix the problem of the finsh function failure by using component initialization.
2017-10-19 23:46:17 +08:00
5e3b3b19a6
[BSP] change the type of cmd.
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1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
2017-10-16 13:23:03 +08:00
cb247e913f
update libcpu: cortex-m0 fault handlers always enable.
2017-09-01 10:22:55 +08:00
9bbc4e5e6b
update cortex-m libcpu: fixed compile error.
2017-08-23 16:13:51 +08:00
9b7303e511
update libcpu: ensure fault enable.
2017-08-18 11:12:58 +08:00
a74a2a25a8
Add libcpu/arm/am335x/context_iar.S file
2017-02-06 21:57:15 +08:00
4e95fdff4a
[BSP] Update VFP code in armv6.
...
committed by FH.
2016-05-20 14:20:34 +08:00
923594c7ab
[BSP] Enable VFP.
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committed by FH.
2016-05-20 12:24:51 +08:00
43f68131ce
[BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd.
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FH8620 BSP
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
All rights reserved
2016-04-18 13:52:39 +08:00
3983f39f34
Add iar compiler support for am335x.
2015-11-11 23:44:05 +08:00
3faca6d5df
[BSP] update stm32f7-disco
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code cleanup.
2015-09-24 16:03:09 +08:00
2021f5a276
Add the license.
2015-09-04 21:58:08 +08:00
b71cb4c09d
Add dm365 porting.
2015-09-04 12:30:20 +08:00
af8a91457e
[bsp]add the stm32f74x bsp.
2015-08-07 13:30:13 +08:00
9fe3cbf76f
Align thread stack to 8 byte.
2015-06-05 19:14:08 +08:00
314379cc77
implement __user_initial_stackheap
2015-06-04 12:23:24 +08:00
be76b10be6
Align stack address to 8 byte.
2015-06-04 11:59:18 +08:00
1fa5711712
fixed assembly warnings.
2015-05-22 16:48:01 +08:00
73df162d3f
fixed assembly warnings.
2015-05-13 11:57:34 +08:00
4222677933
[libcpu][am335x] Fix the booting failure when enabling MMU
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Since the 16 domains are configured as the client domains in
mmu_setttbase(), a Permission fault is generated if the XN bit
(Execute-never) is set in the short-descriptor translation table
(for section and supersection). This leads to the booting failure
when enabling MMU for beagleboard bsp. Here is log:
----------------------------------------------------------------
SD/MMC found on device 0
reading uEnv.txt
117 bytes read in 3 ms (38.1 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc ...
Running uenvcmd ...
reading rtthread.bin
162624 bytes read in 24 ms (6.5 MiB/s)
\## Starting application at 0x80200000 ...
----------------------------------------------------------------
This commit removes the XN bit configuration in the section of the
short-descriptor translation table. The OS can be booted successfully
with applying this commit.
2015-05-11 10:36:11 +08:00
a13132b302
[libcpu][arm926] Optimize irq trap code.
2015-05-04 16:13:43 +08:00
49fa5c44d7
[libcpu][arm926] Optimize code
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1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
2015-04-22 11:19:50 +08:00
175e357ace
[libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread.
2015-04-16 14:13:43 +08:00
cf3d639fcb
[libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files.
2015-04-16 10:35:12 +08:00
6aa242645f
1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable watchdog in rt_lovel_level_init function.
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2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain.
3. [bsp][sam9260] Move link strips in to folder link_scripts.
4. [libcpu][arm926] Add copy right to source file and format code.
2015-04-15 16:13:30 +08:00
39452b67b0
1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP
2015-04-14 21:56:34 +08:00
0b5958d700
Fix compile warning:
...
..\..\libcpu\arm\cortex-m3\context_rvds.S(207):
warning: A1581W: Added 2 bytes of padding at address 0xd6
2015-03-09 09:31:23 +08:00
62af08370b
Merge pull request #2 from RT-Thread/master
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sync
2014-09-20 01:19:42 +08:00
267c61ebce
[libcpu] Add builtin ffs implementation for Cortex-M4.
2014-09-11 12:51:33 +08:00
fd6ef4b235
[libcpu]am335x edit vector
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vector_undef and vector_dabt
2014-08-12 18:26:22 +08:00
2c47f2e683
Fix some spell error;
2014-07-31 13:59:25 +08:00
97fb91dcc6
bsp: add zynq7000
2014-06-27 14:12:36 +08:00
2b7be29cad
[bsp/rva8] enable group{0,1} interrupt forwarding in gic initialization
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When RT-Thread is running stand alone, it forgot to enable the
distributor of GIC.
2014-04-08 11:54:03 +08:00
c0f0c2322f
[libcpu/arm] remove useless cpsr updating in rt_hw_context_switch_to
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This piece of code will enable the interrupt early before switching to
the first thread. Although it is harmless, but not prefect.
2014-04-08 11:24:04 +08:00
28f11fdd7b
[vmm] add realview-pb-a8 VMM support
2014-04-03 17:59:14 +08:00
9382a7105f
add CM_PER_UARTx_CLKCTRL
2014-01-11 15:14:36 +08:00
0c9b9ced31
cortex-r4: use byte to allocate the stack
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Unit of "byte" is more intuitive than "long".
2013-11-17 12:49:08 +08:00
a8520ed383
cortex-r4: let svc mode reuse the stack of IRQ on startup
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As the svc stack is the stack of threads, there is no need to allocate a
separate stack for the startup. Reuse the IRQ stack should be OK.
Tested on rm48 board.
2013-11-17 12:49:07 +08:00
06987e72e5
Fix hardfault bug for gcc port
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for 2013-02-20 aozima commmit "port for gcc", but the commit is
not tested,and the kernel is breakdown in context_gcc.S, the file
is a copy from cortex-m3,but not port for cortex-m0, so i complete
this port for aozima, test it in stm32f0discovery board ,
and it works fine.
2013-11-04 16:10:11 +08:00
377c6e6cc9
cortex-r4: dump register on traps
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We could not handle any traps except IRQ/FIQ.
2013-10-20 23:46:50 +08:00
e1e563e85c
cortex-r4: remove RM48x50.h and add armv7.h
2013-10-20 21:10:26 +08:00
81ab083ae5
rm48: move some asm file to libcpu
2013-10-20 18:51:46 +08:00
9568669109
rm48x50: add GCC support
2013-10-20 18:51:45 +08:00
7bdb082c91
Delete SConscript
2013-09-22 06:59:52 +08:00
9d09cd9f23
Import beaglebone porting
2013-09-20 21:20:51 +08:00
37ac4855da
Embedded GPLv2 license.
2013-07-21 20:01:24 +08:00
36c4604a36
fix compiling error
2013-07-21 19:39:21 +08:00
shaojinchun
Bernard Xiong
misonyo
qz721
xuzhuoyi
zhuhongbing
yufanyufan77
liruncong
hichard_ren@yeah.net
aozima
=
ArdaFu
SummerGift
weety
bernard
zchong-cht
nongxiaoming
Adrian Huang
Bright Pan
陈豪
Grissiom
RTsien
Bright Pan