7bdb082c91
Delete SConscript
2013-09-22 06:59:52 +08:00
9d09cd9f23
Import beaglebone porting
2013-09-20 21:20:51 +08:00
3ebc766521
sim/posix: move rt_hw_context_switch_interrupt after it's definition
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This fix a compile error in Clang.
2013-09-04 00:05:03 +08:00
e301d14979
Merge pull request #132 from MrVan/sep6200
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SEP6200 Support
2013-07-29 22:35:31 -07:00
37ac4855da
Embedded GPLv2 license.
2013-07-21 20:01:24 +08:00
36c4604a36
fix compiling error
2013-07-21 19:39:21 +08:00
42f9840653
commit again
2013-07-21 17:32:55 +08:00
3bdbf640b7
update at91sam9260 project directory structure.
2013-07-21 17:19:30 +08:00
885301bb14
update AT91SAM9260 usart driver， using serial driver component.
2013-07-21 15:01:42 +08:00
82bc21ff7b
Cleanup and add licencse
2013-07-17 18:42:19 +08:00
73beced22a
SEP6200 Support
2013-07-17 13:37:31 +08:00
ce4f0329db
enhancement hard fault exception handler.
2013-07-09 22:02:12 +08:00
5120f54a29
fix spelling error.
2013-06-24 22:57:27 +08:00
34d59ccb0f
update libcpu/arm/cortex-m4: support lazy stack optimized.
2013-06-23 18:10:46 +08:00
b045f93b47
fixed bug: correct cortex-m SCB->VTOR address.
2013-06-23 18:08:16 +08:00
93b9b28297
format code by Astyle.
2013-06-23 18:07:10 +08:00
a2ff85c03f
update libcpu/arm/cortex-m0: restore MSP.
2013-06-22 18:59:51 +08:00
4d421cad73
update libcpu/arm/cortex-m3: restore MSP.
2013-06-22 18:59:50 +08:00
f9e673354a
update libcpu/arm/cortex-m4: restore MSP.
2013-06-22 18:59:49 +08:00
3071e35c54
Merge pull request #109 from grissiom/rm48x50
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Rm48x50
2013-06-19 01:29:12 -07:00
c986754c49
Signed-off-by: visitor83 <wolflouiswang@gmail.com>
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format the s3c24x0 serial.c and mini2440 rtconfig.py
2013-06-18 12:51:55 +08:00
c56fa7c907
ident format
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Signed-off-by: visitor83 <root@wolflouis.(none)>
2013-06-16 10:00:34 +08:00
009239ceed
rm48x50: rt_interrupt_nest should be `volatile rt_uint8_t`
2013-06-12 23:56:10 +08:00
9b949c28b7
rm48x50: add cache_{enable, disable}
2013-06-12 21:03:04 +08:00
e8bbbe6788
cortex-r4: wrap asm functions with .asmfunc/.endasmfunc
2013-06-05 23:21:06 +08:00
228a6be077
cortex-r4: add __rt_ffs
2013-06-05 23:20:39 +08:00
e74befca44
move libcpu/arm/rm48x50/ to libcpu/arm/cortex-r4
2013-05-31 21:06:26 +08:00
24fc6e6ebb
rm48x50: VFP lazy stacking
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You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.
Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
2013-05-31 20:58:08 +08:00
8bbfd45ce3
rm48x50: change STMFD/LDMFD to STMDB/LDMIA
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VFP instructions only have IA(Increment After)/DB(Decrement Before)
mode. To keep consistency, just change STM/LDM to DB/IA accordingly.
2013-05-31 18:38:42 +08:00
ec1203bfab
rm48x50: turn on VFP support
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This support Common VFPv2 sub-architecture.
2013-05-31 18:32:21 +08:00
83ea4dd628
rm48x50: small cleanup on context_ccs.asm
2013-05-30 17:37:50 +08:00
810311b624
rm48x50: fix bug in rt_hw_interrupt_{mask,unmask}
2013-05-29 23:36:32 +08:00
f08df08897
rm48x50: optimize a BEQ
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Use condition flag in the ORR. This could eliminate a BEQ.
2013-05-26 23:37:56 +08:00
19fe6251e7
rm48x50: optimize context_switch_interrupt_to by reuse registers
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When saving thread registers in context_switch_interrupt_to, we don't
change them, just move them. So there is no need to always r0-r3 from
stack to the real r0-r3. So just use the intermediate registers and
eliminate 2 MOV.
2013-05-26 22:37:49 +08:00
3d0647efb3
rm48x50: optimize context_switch_interrupt_do
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Substitude STMFD, MOV, ADD with STMFD, SUB. It reduce one instruction.
Tested on board and it works like a charm.
2013-05-26 17:22:36 +08:00
b39d038cf0
rm48x50: utilize CPS instruction and remove some useless code
2013-05-26 16:55:39 +08:00
f51bce3fed
add rm48x50 bsp and libcpu
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We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
2013-05-24 22:55:13 +08:00
db548a1b37
fixed compiling error related to the RT_USING_INTERRUPT_INFO in mini4020
2013-04-10 00:49:18 +08:00
d9d39a8d21
Use SRAM as EMAC transmit buffer, to avoid the underrun error, especially in the large amount of data communication.
2013-04-08 21:57:24 +08:00
0594734d8d
clean up code
2013-04-02 20:33:56 +08:00
03aa76155e
fixed context thread issue when using armcc compile
2013-04-02 20:27:08 +08:00
fb9ea5eada
enable at91sam9260 mmu, update SDIO and EMAC drivers
2013-04-02 20:24:51 +08:00
92d4c1939b
fixed at91sam9260 context thread issue, avoid idle thread stack overflow
2013-04-02 20:23:11 +08:00
edef109d76
fix interrupt compiling issue in PPC
2013-03-31 22:58:36 -04:00
c1b600644f
Merge pull request #56 from aozima/aozima
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Modify the interrupt interface implementations.
2013-03-31 04:14:40 -07:00
2ccb3c7589
update LPC2478: Modify the interrupt interface implementations.
2013-03-31 18:25:51 +08:00
710a0fc4a5
fix issue when print interrupt info
2013-03-31 18:24:51 +08:00
1549b7db90
update LPC214X: Modify the interrupt interface implementations.
2013-03-31 17:58:26 +08:00
eab20a9975
update AT91SAM7X: Modify the interrupt interface implementations.
2013-03-31 17:43:09 +08:00
83ce430902
update loongson 1B dev: Modify the interrupt interface implementations.
2013-03-31 17:32:25 +08:00
Bernard Xiong
Grissiom
weety
Peng Fan
aozima
visitor83
visitor83
yiyue.fang