f295149f20
MIPS: fix inline assembly for FPU
...
Signed-off-by: duhuanpeng <548708880@qq.com>
2020-04-10 15:07:39 +08:00
ee61d78b18
MIPS: inline routine should be static here
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gcc will remove this "unused" routine and cause a linking error.
symbol not found when linking.
Signed-off-by: duhuanpeng <548708880@qq.com>
2020-04-10 15:07:34 +08:00
c27f13c6c9
[mips]fix a bug
2020-04-07 19:01:54 +08:00
dff04ffdc6
fix mips stackframe point
2020-04-07 14:49:20 +08:00
3c5329a9b7
mips repair constraint
2020-04-07 14:43:20 +08:00
c024e2e485
add ls2k bsp config
2020-04-07 14:39:20 +08:00
990f731b77
fix mips64 some bug
2020-04-07 14:39:12 +08:00
0f26ffa7a2
add ls2k bsp
2020-04-07 14:38:58 +08:00
7c66501861
[libcpu] Refine MIPS common code
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MIPS common code was highly duplicated, This commit
is a attempt to clean-up and refine these code.
The context and exception handle flow is mostly identical
with Linux, but a notable difference is that when FPU enabled,
we save FP registers in stackframe unconditionally.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:04 +08:00
d45efced1c
libcpu: MIPS: 更新版权信息/Update copyright information.
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更新版权信息。
Update copyright information.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:05:00 +08:00
3a3c6c51f8
[libcpu] remove cache.h from mips/common folder.
2019-01-07 21:16:05 +08:00
bde47018b8
[libcpu] Add SConscript in libcpu.
2019-01-07 06:09:45 +08:00
afc2256d01
[libcpu]Support x1000 CPU
2017-11-10 19:50:14 +08:00
7129d77bee
增加龙芯1c硬浮点的支持（可以使用硬浮点了）
2017-08-10 15:35:03 +08:00
72782e9203
convert end of line
2013-01-08 05:05:02 -08:00
67eff19969
add init loongson soc3210 porting.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1012 bbd45198-f89e-11dd-88c7-29a3b14d5316
2010-10-15 23:40:44 +00:00
e94adf07ca
add init Jz47xx porting.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@792 bbd45198-f89e-11dd-88c7-29a3b14d5316
2010-07-14 09:51:49 +00:00
duhuanpeng
bigmagic
Jiaxun Yang
Zhou Yanjie
Bernard Xiong
tangyuxin
勤为本