Grissiom
|
0ca281c162
|
lpc43xx: add flash linker script for GCC
|
2015-01-06 13:40:46 +08:00 |
|
Grissiom
|
bcbe180886
|
lpc43xx: fix the default RTT_ROOT in SConstruct
|
2015-01-06 13:39:54 +08:00 |
|
Grissiom
|
fca84daa9d
|
lpc43xx: fix the startup code for GCC
|
2015-01-06 12:42:12 +08:00 |
|
Grissiom
|
833339e1c6
|
lpc43xx: output a newline in the header file
Some compiler is brain-damaged that it will yeild a warning for headers
not ended with a newline. Yes, I mean you, Keil.
|
2015-01-06 11:03:01 +08:00 |
|
Grissiom
|
ff3ab9c0ab
|
lpc43xx: add readme
|
2015-01-06 10:46:32 +08:00 |
|
Grissiom
|
090adcf4c0
|
lpc43xx: don't set the Clock again in M0 core
M0 core is always booted by the M4 core. It means that if we are running
in M0, the clock is always configured.
|
2015-01-06 10:46:32 +08:00 |
|
Grissiom
|
21ef733251
|
lpc43xx: use the RIT timer as SysTick in M0 core
|
2015-01-06 10:46:31 +08:00 |
|
Grissiom
|
773a884a4b
|
lpc43xx: move board.c into M0/M4
|
2015-01-06 10:46:31 +08:00 |
|
Grissiom
|
d2e4050a70
|
lpc43xx: update template.uvproj and add sct files
|
2015-01-06 10:46:31 +08:00 |
|
Grissiom
|
959f6c695f
|
lpc43xx: move the application code into its own space
|
2015-01-06 10:46:31 +08:00 |
|
Grissiom
|
5542af8b7c
|
lpc43xx/driver: fix the VTOR setting
|
2015-01-06 10:25:43 +08:00 |
|
Grissiom
|
f609a63564
|
lpc43xx: add uart3 support
|
2015-01-06 10:25:43 +08:00 |
|
Grissiom
|
a447b5f3cf
|
lpc43xx: refactor uart drivers
|
2015-01-06 10:25:43 +08:00 |
xiaonong
|
d5332e2799
|
bsp:fix the bug of lpc43xx uart interrupt enable in driver initialize.
|
2014-11-03 23:02:36 +08:00 |
bernard
|
c45f5a2490
|
[Drivers] re-write serial framework.
|
2014-07-18 06:45:54 +08:00 |
|
nongxiaoming
|
7b32a2bd31
|
lpc43xx:add the linker script file.
|
2014-07-15 15:42:22 +08:00 |
|
nongxiaoming
|
67e79c3e97
|
lpc43xx:update the startup code.
|
2014-07-15 15:40:05 +08:00 |
|
nongxiaoming
|
e152b68e33
|
add the lpc43xx bsp support.
|
2014-07-13 14:13:39 +08:00 |