Commit Graph

16272 Commits

Author SHA1 Message Date
zhuzhuzhu 4ad194bb47
[fix] fix cromfs read out of mem range (#9197)
Update dfs_cromfs.c
2024-07-17 09:08:10 +08:00
Chen Wang 2d5eb2669f bsp: cvitek: remove warning when building wdt driver
```
./bsp/cvitek/drivers/drv_wdt.c: In function '_wdt_control':
warning: assignment to 'void *' from 'unsigned int' makes pointer
from integer without a cast [-Wint-conversion]
  119 |         wdt_device->parent.user_data = (rt_uint32_t)(*(rt_uint32_t *)arg);
      |                                      ^
warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  122 |         *(rt_uint32_t *)arg = (rt_uint32_t)wdt_device->parent.user_data;
      |                               ^
```

Rootcasue: It's not portable to store integar in a pointer.

Solution: use global _wdt_dev to store the timeout value.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-17 09:05:26 +08:00
flyingcys dda79ad6bc bsp: cvitek: re-wrote i2c driver
Optimize the original i2c driver code.

Signed-off-by: flyingcys <flyingcys@163.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-17 08:19:03 +08:00
Shell 1d78d11567
[smart] feat: add unmap for null mapper (#9186)
Do unmap before shrink so we don't see mapped entry on page table
insertion, which is not acceptable for riscv implementation of
architecture porting.

Changes:
- add un-mapping of pte on `_null_shrink()`

Signed-off-by: Shell <smokewood@qq.com>
2024-07-16 20:38:55 +08:00
Chen Wang d8294de640 bsp:cvitek: add pinmux for adc
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 2c85bcb463 bsp:cvitek: add pinmux for spi
Board level pin available info:

duo & duo256:

NAME    SPI         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP6     SPI2_SCK    PWR_GPIO[23]    SD1_CLK__SPI2_SCK
GP7     SPI2_SDO    PWR_GPIO[22]    SD1_CMD__SPI2_SDO
GP8     SPI2_SDI    PWR_GPIO[21]    SD1_D0__SPI2_SDI
GP9     SPI2_CS_X   PWR_GPIO[18]    SD1_D3__SPI2_CS_X

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 51825a5b5c bsp:cvitek: add pinmux for pwm
Board level pin available info is summarized and list here for memo:

Duo:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP2     PWM10       PWR_GPIO[26]    SD1_GPIO1__PWM_10
GP3     PWM11       PWR_GPIO[25]    SD1_GPIO0__PWM_11

Duo256:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP3     PWM6        XGPIOA[18]      JTAG_CPU_TCK__PWM_6
GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP2     PWM7        XGPIOA[19]      JTAG_CPU_TMS__PWM_7
GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP10    PWM10       XGPIOC[14]      PAD_MIPI_TXM1__PWM_10
GP11    PWM11       XGPIOC[15]      PAD_MIPI_TXP1__PWM_11

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 114e143d56 bsp:cvitek: add pinmux for uart
Board level UART pinmux summary, following capability
should be controlled by pinname whitelist.

Duo:

NAME    UART        CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP13    UART0_RX    XGPIOA[17]      UART0_RX__UART0_RX
GP12    UART0_TX    XGPIOA[16]      UART0_TX__UART0_TX

GP1     UART1_RX    XGPIOA[29]      IIC0_SDA__UART1_RX
GP13    UART1_RX    XGPIOA[17]      UART0_RX__UART1_RX
GP0     UART1_TX    XGPIOA[28]      IIC0_SCL__UART1_TX
GP12    UART1_TX    XGPIOA[16]      UART0_TX__UART1_TX

GP1     UART2_RX    XGPIOA[29]      IIC0_SDA__UART2_RX
GP5     UART2_RX    PWR_GPIO[20]    SD1_D1__UART2_RX
GP0     UART2_TX    XGPIOA[28]      IIC0_SCL__UART2_TX
GP4     UART2_TX    PWR_GPIO[19]    SD1_D2__UART2_TX

GP5     UART3_RX    PWR_GPIO[20]    SD1_D1__UART3_RX
GP4     UART3_TX    PWR_GPIO[19]    SD1_D2__UART3_TX

GP3     UART4_RX    PWR_GPIO[25]    SD1_GPIO0__UART4_RX
GP2     UART4_TX    PWR_GPIO[26]    SD1_GPIO1__UART4_TX

Duo 256m:

NAME    UART        CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP13    UART0_RX    XGPIOA[17]      UART0_RX__UART0_RX
GP12    UART0_TX    XGPIOA[16]      UART0_TX__UART0_TX

GP1     UART1_RX    XGPIOA[29]      IIC0_SDA__UART1_RX
GP3     UART1_RX    XGPIOA[18]      JTAG_CPU_TCK__UART1_RX
GP13    UART1_RX    XGPIOA[17]      UART0_RX__UART1_RX
GP0     UART1_TX    XGPIOA[28]      IIC0_SCL__UART1_TX
GP2     UART1_TX    XGPIOA[19]      JTAG_CPU_TMS__UART1_TX
GP12    UART1_TX    XGPIOA[16]      UART0_TX__UART1_TX

GP1     UART2_RX    XGPIOA[29]      IIC0_SDA__UART2_RX
GP5     UART2_RX    PWR_GPIO[20]    SD1_D1__UART2_RX
GP0     UART2_TX    XGPIOA[28]      IIC0_SCL__UART2_TX
GP4     UART2_TX    PWR_GPIO[19]    SD1_D2__UART2_TX

GP5     UART3_RX    PWR_GPIO[20]    SD1_D1__UART3_RX
GP4     UART3_TX    PWR_GPIO[19]    SD1_D2__UART3_TX

Note: this patch also update the .config and rtconfig.h
because this patch modify some configuration items's name,
for example: RT_USIMG_UART0 -> BSP_USING_UART0.

FIXME: only handle RISC-V related, no ARM.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang e1eb3d3217 bsp:cvitek: add pinmux for i2c
Based on new pinmux framework, add configuration for uart.

Board level pin available info is summarized and should be
controlled by pin whitelist.

Duo

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo256m

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S(Note, we have not supported duo S, just list for memo)

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
zms123456 23fc7bfa4d
[libcpu][setup]fix fdt_ptr error (#9138)
fix fdt_ptr error
2024-07-16 17:04:55 +08:00
Shell 1b581d0755
[dfs] Mark dirty on unmap on shared mapping only (#9195)
[dfs] feat: Mark dirty on unmap for shared mapping

This patch optimizes the pcache varea management by refining the
conditions under which pages are marked dirty, specifically targeting
the unmap operations in the dfs_pcache component. These changes were
necessary to enhance the efficiency of page cache management.

Changes:
- Adjusted include statements in `dfs_pcache.c` for better organization.
- Modified `dfs_aspace_unmap` function:
  - Added a check to ensure `varea` is not privately locked before marking a page as dirty.
- Updated `dfs_aspace_page_unmap` function:
  - Added a similar check for `varea` lock status before marking a page as dirty.

Signed-off-by: Shell <smokewood@qq.com>
2024-07-16 17:03:54 +08:00
Chen Wang d8d0af9143 bsp:cvitek: add calibration for adc
The ADC controller needs to be calibrated during the initialization
phase, otherwise the measured voltage value will be inaccurate.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 11:47:22 +08:00
Chen Wang a63c07fd75 bsp: cvitek: new design for pinmux
In the new design, we require the user to manually enter the
PinName (as a string) in menuconfig instead of being given
menu items to select.

The original method will lead to too many menu item-related
macros being defined in the code, causing ifdef and other
codes scatter everywhere in the driver code, which is
inconvenient to maintain.

The new design adds a pinmux driver module to manage the
multiplexing of pins. This patch provides this driver module.

P.S., the reason why users are allowed to specify pinname
in a string instead of the pin number is mainly because
the technical manual provided by the SOC manufacturer
does not have numbers for some pins, only names.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
2024-07-16 11:37:23 +08:00
Chen Wang 80668e0ba2 bsp:cvitek: revert add i2c pinmux config for c906
The contents of the SOC type part in the Kconfig configuration
are retained, and other parts related to I2C pin multiplexing
selection have been rolled back.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
2024-07-16 11:37:23 +08:00
rcitachi 14fb55933b
[lwp][vdso] Add VDSO functionality under the aarch64 architecture (#9176)
Add VDSO functionality under the aarch64 architecture
2024-07-15 17:58:29 +08:00
Fan Yang 96ba787e25
Bugfix/fix weak handle trap in riscv common crash rv64 trap handling (#9189)
* [bsp][hpmicro] add weak handle_trap implementation

- added weak handle_trap implementation

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>

* [libcpu][risc-v][common] remove weak handle_trap function

- removed weak handle_trap function from trap_common.c

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>

---------

Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
2024-07-15 17:51:32 +08:00
Shell 65ffe4e13e [libcpu/rv64] feat: unify tick.c
The changes unify the tick.c implementations for all risc-v64
architectures, leveraging the CPUTIME feature. This refactoring was
necessary to streamline the codebase, and ensure consistent timer
handling across different platforms.

Changes:
- Updated `Kconfig` in `bsp/cvitek/cv18xx_risc-v` to fix formatting issues.
- Updated .config for BSPs to update `CPUTIME_TIMER_FREQ`
- Updated header of for API `riscv_cputime_init`
- Initialized riscv timer on `rt_hw_tick_init`
- Refactored `tick.c` and `tick.h` in `libcpu/risc-v/t-head/c906` and `libcpu/risc-v/virt64`:
  - Replaced direct use of `rdtime` with `clock_cpu_gettime`.
  - Removed redundant timer frequency definitions.
  - Added static assertions to check the value of `CPUTIME_TIMER_FREQ`.
  - Initialized `tick_cycles` based on `CPUTIME_TIMER_FREQ`.
  - Integrated `ktime` support for tick initialization.

Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9164
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-15 12:06:39 +08:00
wdfk-prog ca4645000a [components][fal]Log warning for block partition exceeding flash length 2024-07-14 22:51:08 +08:00
zms123456 4e8b8290ab
[driver][virtio]fix virtio net rx error (#9170)
fix virtio net rx error
2024-07-13 22:16:03 +08:00
sakumisu 4122f6d8b8 fix(cherryusb): fix typo 2024-07-12 20:31:31 +08:00
wdfk-prog df948ad603 [STM32][SPI]移除内部编写的延时函数使用统一延时接口 2024-07-12 17:48:17 +08:00
wdfk-prog 6e7cf3a608 [components][SPI][spi-bit-ops]修复可能的异常操作
* 移除初始化时未进行引脚初始化就进行引脚设置可能导致的异常
* CS引脚配置判断完善
* xfer返回值优化
2024-07-12 17:48:17 +08:00
childerxxx d7914defdd Correct ".cpu cortex-m4" to ".cpu cortex-m7" 2024-07-11 20:42:50 +08:00
Shell beee77f372
feat: support ARCH_REMAP_KERNEL on libcpu/c906 (#9123)
feat: [libcpu/c906] support ARCH_REMAP_KERNEL

This change was necessary to enable the remapping of the kernel image to
a high virtual address region on the c906 platform.

Changes:
- Introduced new configuration options `ARCH_REMAP_KERNEL`, and
  `ARCH_USING_ASID` under the `ARCH_RISCV64` section.
- Updated MMU initialization and switching functions to incorporate
  remapping handling.
- Modified page table setup for proper memory attribute settings.
- Added support for early memory setup, kernel remapping
- Added conditional compilation for ASID support in the `rt_aspace` struct,
  since this is not enable currently for most architecture.

Signed-off-by: Shell <smokewood@qq.com>
2024-07-11 11:00:04 +08:00
heyuanjie87 6180dabab3
[bsp/cvitek]将eth驱动中地址类型改为指针以适应ioremap (#9137)
ioremap后地址可能超32位
2024-07-11 10:28:02 +08:00
latercomer ba105bc686 解决tools/keil.py中python3不兼容python2的str.decode() 2024-07-10 15:28:23 +08:00
Meco Man 08c96e5e47 [ci] use env install script to install env 2024-07-10 13:41:05 +08:00
LaterComer f5a98c6fc8 [fixed][kconfiglib]test kconfiglib is installed and info how to install 2024-07-10 00:01:36 +08:00
wdfk-prog 15a8ebe0a0
[components][driver][can]Fix possible memory overflow caused by RX
修复RX可能导致的内存溢出情况

#8634
2024-07-09 20:22:37 +08:00
LZerro befa478073 [bsp][stm32_rt_spark]Add README_EN 2024-07-09 20:18:53 +08:00
Shell b73396681a
[bsp/allwinner] feat: porting to RT_USING_DEVICE_OPS (#9142)
* [bsp/allwinner] feat: porting to RT_USING_DEVICE_OPS

This patch ports the codebase to use the RT_USING_DEVICE_OPS structure,
which is required by v5.1.0 Smart kernel, improves modularity and makes
it easier to manage device operations by consolidating them into a
single structure, enhancing maintainability and future scalability.

Changes:
- Added RT_USING_DEVICE_OPS conditionals to partition.c and drv_sdmmc.c.
- Defined rt_device_ops structures for partition and sdmmc drivers.
- Updated device initialization to use the ops structure if defined.
- Replaced direct function calls with rt_dev_control, rt_dev_read, and
  rt_dev_write macros where applicable.
- Removed redundant us_delay function from os.c.

Signed-off-by: Shell <smokewood@qq.com>

* feat: update configuration

* feat: fixup compiler warning

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-07-09 13:35:03 +08:00
Shell 3f6960b7f5
[smart/tty] skip configure of rt_serial on tty open (#9152)
Skip configure on open since all configs are copied from the current
configuration on device. So we don't bother to set it back to device
again.

Changes:

- test and skip configuration on open() of tty device

Signed-off-by: Shell <smokewood@qq.com>
2024-07-09 13:28:24 +08:00
LaterComer 4d0b048c97
[fixed]serial_v2.c兼容DFS_V2接口 (#9153) 2024-07-09 12:10:08 +08:00
Shell 66ff62413e document: add ref to gpio pinout 2024-07-08 22:09:35 +08:00
LZerro 04b77e409e [bsp][NXP]Fix .md picture mistakes 2024-07-08 22:06:53 +08:00
LZerro b47b6df927 [bsp][Infineon]&[NXP] Add README_EN 2024-07-08 22:06:53 +08:00
Rbb666 b171877139 [bsp][qemu]修复qemu-a9使能lcd缺失依赖问题. 2024-07-07 22:24:09 +08:00
Kai d266ed6c43
[tool][cmake] Let cmake generator get more param from `rtconfig.py` (#9139)
let cmake generator get more param from `rtconfig.py`

* support getting c/cpp standard from c/cpp compilation flags
* support getting post action and conv it to cmake variable
* add a custom cmake file for user custom settings
* support setting project name from `--project-name=` option
2024-07-06 16:05:35 +08:00
Evlers 755cde372c fix a bug that read members in non-existent functions 2024-07-05 10:51:17 +08:00
Evlers 7d7993f940 fix an issue where repeated remove of card resulted in assertions 2024-07-05 10:51:17 +08:00
zhao maosheng 95aa97714b fix initrd scan err 2024-07-04 00:34:01 +08:00
heyuanjie87 776764c4d6 [bsp/cvitek/eth]解决编译警告 2024-07-04 00:33:32 +08:00
Rbb666 5f70f974d5 [bsp][stm32]Increase the serial_v1 tx timeout. 2024-07-04 00:33:06 +08:00
heyuanjie87 017c31a062 [bsp/cvitek]解决eth编译报错 2024-07-02 22:54:58 +08:00
Rbb666 8487e774a3 [bsp][stm32]fix stm32h7 spi transmit fail probelm. 2024-07-02 22:54:23 +08:00
LaterComer c09d7e1e49
删除tools/kconfiglib文件夹,采用pip安装kconfiglib
* 删除tools/kconfiglib文件夹,采用pip安装kconfiglib

* workflows/action_utest.yml添加安装kconfiglib
2024-06-30 22:55:41 +08:00
Meco Man dd1906ca24 [tools] remove kconfig-frontends 2024-06-30 22:35:34 +08:00
Shicheng Chu 1e3efd4937
[rtduino][pico] update README.md 2024-06-30 22:30:15 +08:00
Meco Man 20c080b776 [ci] remove env-v1.5.x checking 2024-06-30 22:29:19 +08:00
sakumisu cc853de5f3
Update cherryusb to v1.3.1 (#9122)
* fix(hpmicro): remove duplicate usb variable

* update(cherryusb): update to v1.3.1
2024-06-30 08:01:51 +08:00