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6 Commits

Author SHA1 Message Date
Meco Man ddccef3a64 modify RT_ALIGN_SIZE as 8 by default 2023-01-12 22:47:23 -05:00
emuzit a38b39ac25
ch569w-evt: add usbhs device mode driver (#6330) 
ch569w-evt: add usbhs device mode driver

* usbd driver tested with cdc_vcom, internal loopback
  (can't run both MSH & usbd due to 16KB RAM limitation)
* reduce usrstack & main thread stack size for usbd test
* ch56x_uart.c : iron out UART0_PIN_ALT assignment
 2022-08-24 07:59:37 -04:00
liuxianliang a4eb64b873 update the project for RT-Thread_V4.1.1 2022-08-16 19:38:48 +08:00
emuzit 77067f8729
ch569w-evt : add pwm driver, and spi_xfer bug fix (#6240) 
add PWM driver, output checked with logic analyzer
spi_xfer() bug fix for cs_pin and message looping
uart pin_mode init moved to uart driver
 2022-08-09 12:18:20 -04:00
emuzit a881c05e58
ch569w-evt : add spi master driver, SPI0 tested (#6205) 
* ch569w-evt : add spi master driver, SPI0 tested

* Update bsp/wch/risc-v/ch569w-evt/board/Kconfig

* Update bsp/wch/risc-v/ch569w-evt/board/Kconfig

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
 2022-08-01 22:36:49 -04:00
emuzit c802fcdcf8
WCH CH569W-R0-1v0 evt board bsp port, first version (#6167) 
WCH CH569W-R0-1v0 evt board bsp port, first version

dev/test under Ubuntu 20.04
toolchain from MounRiver_Studio_Community_Linux_x64_V120

tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling)

libcpu/risc-v/SConscript :
group includes rtconfig.CPU only if folder exists

libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() :
make it RT_WEAK for customization
 2022-07-30 02:10:51 -04:00