rt-thread

Commit Graph

Author	SHA1	Message	Date
michael	242530ae70	ls1b: fix the count of GPIO IRQ and improvement the IRQ of UARTS. from 1b manunal we know it have 64 GPIO IRQ and 12 UARTS	2021-01-31 22:33:58 +08:00
Jiaxun Yang	9ef986929c	[libcpu] mips: Merge loongson_1 into gs232 Previously Loongson 1B and Loongson 1C have their own libcpu implemention, but they're almost identical. So we merge them into gs232 and adapt to new common code. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>	2019-12-11 15:24:42 +08:00

Author

SHA1

Message

Date

michael

242530ae70

ls1b: fix the count of GPIO IRQ and improvement the IRQ of UARTS.

from 1b manunal we know it have 64 GPIO IRQ and 12 UARTS

2021-01-31 22:33:58 +08:00

Jiaxun Yang

9ef986929c

[libcpu] mips: Merge loongson_1 into gs232

Previously Loongson 1B and Loongson 1C have their own libcpu
implemention, but they're almost identical. So we merge them
into gs232 and adapt to new common code.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

2019-12-11 15:24:42 +08:00

2 Commits