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Author SHA1 Message Date
Man, Jianting (Meco) 6369e89502
[posix] POSIX standard implementation for PSE51 (#5384) 
* [posix] POSIX standard implementation for PSE51

- add some posix's interfaces that we haven't before.
- these PR have passed the interface definition test across gcc platfrom;
- have tested base on qemu-a9 and stm32h750-art-pi.

* [newlib] only enable POSIX.1-1990

* update projects
 2021-12-17 15:34:17 +08:00
Tangyuxin d724eed9fc
分离内存分配接口与内存分配算法 (#5175) 
* [kernel][mem] Multiple instances of small memory allocation algorithm

* [kernel][mem] Change small memory management algorithm memory header flag

* [kernel][mem] Fix assertion problem

* [kernel][slab] Multiple instances of slab memory management algorithm

* [kernel][memheap] Remove rt_malloc/rt_free/rt_realloc and other related memory interfaces

* [kernel][mem] Clean up memory space of small memory management objects

* [kernel][kservice] Add memory application interface and thread protection interface

* [kernel][kservice] Fix function return value problem

* [kernel][memheap] Optimize memheaptrace print

* [kernel][memheap] Support best mode

* [kernel][memory] Remove semaphore lock

* [kernel][memheap] Add locked flag

* [kernel][memory] Support malloc memory in interrupt

* [kernel][memheap] Add 'memheapcheck' cmd

* [kernel][mem] Fix failure to request full memory

* [kernel][memheap] Fix compilation warning

* [kernel][mem] Fix mem realloc ASSERT

* [examples][testcases] Add small mem testcase

* [examples][mem_tc] Modify test memory size

* [examples][testcases] Add slab memory management algorithm test case

* [examples][testcases] fix small memory management algorithm test case

* [kernel][memory] Adjusting memory allocation algorithm object definition and interface

* [kernel][memory] Fix compilation warning

* [examples][utest] Fix mem test case

* [examples][utest] fix slab test case

* [utest][testcases] Shorten test time

* [kernel][memory] Formatting code

* [examples][utest] Adjust test run time

* [examples][utest] Formatting code

* [bsp] update all rtconfig.h
 2021-12-16 16:23:58 +08:00
Meco Man 879e9d4c54 更新rtconfig.h 2021-12-01 22:02:36 -05:00
guo cda8caeda0
Merge pull request #5180 from liukangcc/bsp 
[update] bsp .config file and rtconfig.h file.
 2021-10-15 13:54:46 +08:00
liukangcc 7dc99c1ff4 [update] bsp .config file and rtconfig.h file. 2021-10-14 14:49:53 +08:00
guo b1baf42d4e
Revert "Fix compiler flags issue" 2021-10-14 14:36:18 +08:00
JCZou 0369db718c Fix compiler flags issue 
CCFLAGS is used by gcc and g++ compiler. So CFLAGS should be used for
gcc to avoid passing gcc flags to g++.
 2021-08-19 08:53:27 +02:00
ArdaFu eebb2561ec [bsp][tm4c129x] Do not free net driver rx pBuf in receive method when device is not ready. Fix#4625 2021-06-26 12:37:59 +08:00
ArdaFu 7841aff0ca [bsp][tm4c129x] Upgrade the Tiva Peripheral Driver Library to version 2.2.0.295. 2021-06-26 12:37:09 +08:00
Meco Man cb1892b4ce [tm4c129x] auto formatted 2021-03-21 22:31:27 +08:00
Conley afbfe8dee1 [FIX] 解决tm4c129 gcc 环境下startup的bug 2020-11-25 15:51:55 +00:00
Conley e74519f5c1 [FIX] 解决tm4c129 gcc 环境下startup的bug 2020-11-24 02:46:50 +00:00
ArdaFu 8e2a699d63 [BSP][TM4C129X] Fix the bug that HEAP is not initalized at system start up. 2020-06-24 13:35:49 +08:00
Ernest 7be06b67bb [add] default environment 2019-10-22 16:48:57 +08:00
chenyong 74793a53fd [bsp] update project configure file for finsh component change 
Signed-off-by: chenyong <1521761801@qq.com>
 2019-09-26 15:40:13 +08:00
yangjie 1ef33e66cd [bsp][Kconfig]在bsp的Kconfig中select组件初始化与user main的选项 2019-09-11 12:06:43 +08:00
LinJieqiang d16d78c53e fix spelling mistake for "RT_IDEL_HOOK_LIST_SIZE" 2019-09-05 08:33:12 +08:00
Simon 066a54fbc1
[bsp][tm4c129x] Update drv_eth.c 
Decide whether to close eth hardware checksum by definition.
 2019-03-29 09:43:32 +08:00
tyustli ea8509717e delete C++ support for gcc in the rtconfig.py file 2019-03-26 15:41:06 +08:00
armink 0d7ba79219 Remove the DBG_COLOR and DBG_ENABLE definition. 2019-03-06 17:54:30 +08:00
misonyo 69cd16e136 [all BSP]fix kconfig file syntax error 2019-01-16 23:23:38 +08:00
Bernard Xiong 61b6fca3dd [bsp] Update tm4c19x and fix the mb_recv warning in lwip-1.4.1 2018-12-27 12:04:48 +08:00
chenchaoqun@rt-thread.com 87b407ff18 【修改】.config 中RT_SERIAL_USING_DMA选项 2018-12-17 09:53:44 +08:00
chenchaoqun@rt-thread.com bb8e89e851 【串口】宏定义对应增加 2018-12-17 09:38:53 +08:00
ArdaFu f5e1949efd [BSP] TM4C129X: Move the IAR compile argument to IAR condition branch. 2018-05-16 09:39:56 +08:00
ArdaFu 45645be9d2 [BSP] TM4C129X: Modify rtconfig.py to support compile from IAR-SCONS 2018-05-13 23:23:25 +08:00
ArdaFu 9f5e87d574 [BSP] TM4C129X: Fix last commit error. Modify .icf IAR Link file, move block RTT_INIT_FUNC to flash region. 2018-05-13 12:12:09 +08:00
ArdaFu f8bdaff905 [bsp][tm4x129x] Remove int/uint_fast8/16/32_t definition in BSP driver library's Sconscript. These definitions move to minilibc/stdint.h. 2018-03-19 15:23:24 +08:00
moebius.ever 8160a4089a fixed #1261, modify "axf" to "elf" in rtconfig.py for GCC Toolchains configuration. 2018-03-07 15:28:51 +08:00
Bernard Xiong 8b36b57a11 [UIEngine] move UI engine as a package 2018-03-03 16:34:01 +08:00
aozima 19433e0cf5 update SConscript: support scons 3. 2018-02-06 20:07:28 +08:00
Bernard Xiong 0f3563fd64 [BSP] Update project files 2017-12-31 21:45:32 +08:00
Bernard Xiong 28e925c931 [BSP] fix the compiling issue 2017-12-31 21:19:52 +08:00
Bernard Xiong 7bc87e4ae8 [Kconfig] Rename all of KConfig files to 'Kconfig' 2017-11-30 20:12:53 +08:00
ArdaFu 9cb1b7a252 [bsp][tm4c129x] Replace SysClock with SystemCoreClock 2017-11-06 14:07:31 +08:00
ArdaFu e97245dc5d [bsp][tm4c129x] Add support to kconifg 
1. add kconfig file and default .config
2. remove unused startup codes.
 2017-11-02 15:36:46 +08:00
bernard 7877836065 [BSP] Update project files. 2017-10-31 11:59:49 +08:00
ArdaFu 064f182a0d [bsp]Fix RT_LWIP_IPADDR RT_LWIP_GWADDR RT_LWIP_MSKADDR define, replace multi-bytes MACRO with single string MACRO. 2017-10-27 10:05:31 +08:00
bernard 296d57e859 [BSP] remove components.h file. 2017-10-16 14:10:18 +08:00
bernard 5e3b3b19a6 [BSP] change the type of cmd. 
1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
 2017-10-16 13:23:03 +08:00
armink 573c294216 [BSP] Fix component initialization functions may be not sequential storage on ROM when used for IAR linker. 2017-07-27 13:58:07 +08:00
ArdaFu 3e185bca9c 1. [bsp] tm4c129x update TivaWare to 2.1.4.178 2017-04-25 18:02:51 +08:00
Bernard Xiong 1368e01470 [BSP] fix RT_DFS_ELM_MAX_LFN to 255. 2017-04-09 19:23:28 +08:00
BernardXiong e38f3aa39c [BSP] Update Keil MDK project files. 2015-05-11 21:10:25 +08:00
ardafu 1daa96a214 1. [BSP] TM4C129x : Fix the bug that enable global INT before OS scheduler start the fist thread. 
2. [BSP] TM4C129x : According to LunchPad, change device id from TM4C1294XCNZAD   to TM4C1294NCPDT
 2015-03-10 12:13:14 +08:00
ArdaFu bc2a890ab0 [BSP] TM4C129X: fix the bug that components_init do not work in IAR project 
1. modify each dirver's INIT_EXPORT micro.
2. modify the lwip parameters' in rtconfig.h
3. insert keep section .rti_fn* in IAR link file
4. change part id from TM4C129XNCZAD to TM4C1294NCPDT
 2014-07-31 14:11:26 +08:00
ArdaFu baf608f156 [BSP] tm4c129x: fix compile bug when turn RT_USING_LWIP 
1. Resize RT_LWIP_SEG_NUM drom 8 to 12
2. modify gcc compile switch, using C99
 2014-07-25 23:25:32 +08:00
ArdaFu 3879133d90 [BSP] tm4c129x add eth driver 
1. Add ETH MAC driver using DMA for Tx and Rx lwip pBuf.
2. Modify the tivaware emac library to fix the bug that PHY read is not stable when sysclk is 120MHz
3. In PHY IRQ handler, insert a dummy reading (REG_BMSR) before read PHY_STS to force update STS register.
 2014-07-25 19:07:25 +08:00
ArdaFu 1e396417d8 Revert "[BSP] tm4c129x:" 
This reverts commit 666d12988a.
 2014-07-25 19:02:37 +08:00
ArdaFu 666d12988a [BSP] tm4c129x: 
1. Add ETH MAC driver using DMA for Tx and Rx lwip pBuf.
2. Modify the tivaware emac library to fix the bug that PHY read is not stable when sysclk is 120MHz
3. In PHY IRQ handler, insert a dummy reading (REG_BMSR) before read PHY_STS to force update STS register.
 2014-07-25 18:58:56 +08:00