Commit Graph

13 Commits

Author SHA1 Message Date
aozima c3d63e49de set Systick interrupt priority to the lowest 2020-05-30 15:23:25 +08:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
aozima 6c39b2d54d [libcpu][comtex-m4] enhancement hard fault exception handler. 2018-07-25 21:39:44 +08:00
aozima dd1041bb7f [libcpu]: fixed #1196 FPU FPCA issue. 2018-01-31 18:54:11 +08:00
aozima 9b7303e511 update libcpu: ensure fault enable. 2017-08-18 11:12:58 +08:00
aozima 2c47f2e683 Fix some spell error; 2014-07-31 13:59:25 +08:00
aozima 34d59ccb0f update libcpu/arm/cortex-m4: support lazy stack optimized. 2013-06-23 18:10:46 +08:00
aozima f9e673354a update libcpu/arm/cortex-m4: restore MSP. 2013-06-22 18:59:49 +08:00
Bernard Xiong 72782e9203 convert end of line 2013-01-08 05:05:02 -08:00
wuyangyong 38ba67a867 update libcpu cortex-m4.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1967 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-02-18 17:46:08 +00:00
wuyangyong 7906287cfe IAR not support VSTMFD and VLDMFD, use VSTMDB and VLDMIA.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1947 bbd45198-f89e-11dd-88c7-29a3b14d5316
2012-02-16 03:45:50 +00:00
wuyangyong aad32f8546 support context switch load/store FPU register.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1901 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-12-31 20:25:44 +00:00
bernard.xiong@gmail.com 3ac0b7b966 add STM32F40x porting (uncompleted)
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1770 bbd45198-f89e-11dd-88c7-29a3b14d5316
2011-10-20 23:55:08 +00:00