Commit Graph

501 Commits

Author SHA1 Message Date
Bernard Xiong ec6cb9f260 [BSP][qemu-vexpress-a9] code cleaup for compiling warning. 2019-05-12 15:07:26 +08:00
shaojinchun bcb7fac0d0 fix signals for k210 2019-05-11 09:37:25 +08:00
shaojinchun 6cdfb2ac92 fix signal code 2019-05-11 09:34:26 +08:00
Bernard Xiong d729448f5e [libcpu][arm/cortex-a] Add correct comments. 2019-05-09 08:48:38 +08:00
misonyo 0f33da3f0e [libcpu/cortex-m7]add cache driver 2019-04-27 17:35:46 +08:00
shaojinchun 1e7bd3d8a1 修改lwp支持中arm cortex-a的swi入口函数处理 2019-04-27 13:54:51 +08:00
qz721 61f2a71511 Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.
This filename conflicts with the 'mbedtls' package. They are renamed
in the name of the corresponding chips and included in 'board.h'.
Files that rely on this file should include 'board.h' instead.
2019-04-26 10:50:48 +08:00
Bernard Xiong 41aabf3736
Merge pull request #2573 from xuzhuoyi/tms320f28379d
[bsp][tms320f28379d] Improve finsh support and update README.md
2019-04-14 15:39:37 +08:00
xuzhuoyi 752152b63e [bsp][tms320f28379d] Fix FPU config problem 2019-04-14 12:26:25 +08:00
xuzhuoyi 4acd8db61e [bsp][tms320f28379d] Add finsh init in rt_init_thread 2019-04-10 22:33:25 +08:00
Bernard Xiong 44c3f55996
Merge pull request #2527 from xuzhuoyi/gd32e230
[bsp] Add GD32E230K-START support
2019-04-07 16:59:27 +08:00
Bernard Xiong 238c93468f
Merge pull request #2530 from qz721/libcpu_cortex_a
Disable the data alignment check.
2019-04-01 17:43:19 +08:00
qz721 b10039f396 Disable the data alignment check. 2019-04-01 14:21:59 +08:00
xuzhuoyi fd8eb60a67 [bsp][gd32e230k-start] Update Kconfig 2019-03-31 23:26:35 +08:00
xuzhuoyi 5a460aadcd [bsp][gd32e230k-start] Update Sconscript 2019-03-31 21:17:55 +08:00
xuzhuoyi 5d166c389d [bsp][gd32e230k-start] Add GD32E230K-START BSP port 2019-03-31 15:44:24 +08:00
Bernard Xiong 459ddc3b06
Merge pull request #2523 from qz721/libcpu_cortex_a
Add standard rt-thread cache interfaces for arm/cortex-a.
2019-03-30 05:57:47 +08:00
qz721 fbd40fc5b8 Add standard rt-thread cache interfaces for arm/cortex-a.
Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-29 20:22:25 +08:00
ZYH fcb88f7034 [libcpu][k210]fix stack frame print 2019-03-28 17:05:52 +08:00
BernardXiong bd8f0d0423 [libcpu] Fix the build directory issue 2019-03-26 13:36:01 +00:00
Bernard Xiong 94e7f7316b
Merge pull request #2503 from qz721/libcpu_cortex_a
Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
2019-03-25 21:58:48 +08:00
qz721 2eb1bef773 Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code. 2019-03-25 20:03:49 +08:00
tangyuxin e6d1537327 移除 SConscript.1 临时文件 2019-03-25 15:18:09 +08:00
ZYH c41bf3120f [libcpu][k210]add stack info printf 2019-03-21 15:10:55 +08:00
ZYH 3dd72f956b [libcpu][k210]add description of exception 2019-03-20 12:23:17 +08:00
shaojinchun 29264edde8 修改arm926中machine.c的协议声明 2019-03-14 17:54:21 +08:00
shaojinchun 159def753f arm926内容整理 2019-03-14 17:24:35 +08:00
Wayne Ren d8aa99a29c [bsp][synopsys] add the support of synopsys arc emsk
* the initial support of synopsys designware arc processor
* the initial support of synospsy ARC EM Starter Kit
* the bsp code is based on embarc which is a common SDK for
all synopsys ARC-based boards
* use "scons --gdb" to debug emsk with em9d configuration
* for detailed board information, pls go embarc.org

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-01-25 10:29:34 +08:00
Bernard Xiong 3a3c6c51f8 [libcpu] remove cache.h from mips/common folder. 2019-01-07 21:16:05 +08:00
Bernard Xiong 4c0aafb57f [libcpu] Fix the SCoscript issue in cpu/MIPS. 2019-01-07 09:20:30 +08:00
Bernard Xiong bde47018b8 [libcpu] Add SConscript in libcpu. 2019-01-07 06:09:45 +08:00
shaojinchun 86c76b0e8a add k210 SMP support 2018-12-28 09:41:18 +08:00
zhuhongbing fb693418ee add project support for at91sam9260, add support for at91sam9g45 2018-12-26 12:50:52 +08:00
Bernard Xiong 597d71cc03 [bsp][k210] Add get_free_heap_size function.
* Add get_free_heap_size function;
* Increase shell stack for KPU module.
2018-12-23 14:11:25 +08:00
Bernard Xiong 5e0f8cb3aa [libcpu] Add k210 BSP. 2018-12-18 21:01:03 +08:00
Bernard Xiong c72dc1a7e5
Merge pull request #2072 from yufanyufan77/master
添加cpu复位函数
2018-12-15 11:53:17 +08:00
Bernard Xiong 885d99ee9b
[libcpu][risc-v] fix rt_thread_switch_interrupt_flag issue. 2018-12-15 11:47:59 +08:00
Bernard Xiong fd347fdb90
[libcpu][risc-v] fix the rt_thread_switch_interrupt_flag issue 2018-12-15 11:47:10 +08:00
yufanyufan77 b40a8f816b 添加cpu复位函数
RT_WEAK void rt_hw_cpu_reset(void)
2018-12-14 08:58:40 +08:00
Bernard Xiong 08521ceaa5 [libcpu] Fix the E310 compiling issue. 2018-12-08 17:08:52 +08:00
Bernard Xiong c9576c3e53 [BSP] Add RV32M1_VEGA BSP. 2018-12-08 10:44:56 +08:00
Bernard Xiong 36b194aeb6 [BSP] Update Hifive1 BSP with unified RV porting. 2018-12-08 10:42:40 +08:00
Bernard Xiong 2a7d814f77 [libcpu] Add unified RISC-V libcpu porting. 2018-12-08 10:41:38 +08:00
liruncong cea021781e [libcpu/mips/ppc405]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:42 +08:00
liruncong c7a1c1c1db [libcpu/mips/sep6200]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:40 +08:00
liruncong 2502114e34 [libcpu/mips/xburst]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:38 +08:00
liruncong da9bc3d677 [libcpu/mips/x1000]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:35 +08:00
liruncong 33c6a9c795 [libcpu/mips/longson_1c]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:33 +08:00
liruncong 2ce284c4b3 [libcpu/mips/longson_1b]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:26 +08:00
liruncong bef3256db5 [libcpu/arm/ia32]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:05 +08:00