9bc68d26a4
format Kconfig and sconscript
2023-01-08 22:52:13 -05:00
055267f049
[compiler] 增加SConscript依赖标志 AddDepend ( #6534 )
...
* [compiler] 增加SConscript依赖标志 AddDepend
* RT_USING_NEWLIB->RT_USING_NEWLIBC RT_USING_ARM_LIBC->RT_USING_ARMLIBC
* 删除过时的板载测试例程
* [gd32] 移除无用的反汇编文件
* [bsp]移除老旧bsp中对RT_USING_NEWLIBC的手动宏定义
2022-10-25 00:01:37 -04:00
c9878aacd2
[scons][iar] 将IAR的PLATFORM字段由iar调整为iccarm
...
将路径更新为IAR最新版本的路径
2022-06-09 07:01:59 +08:00
77900ab420
[update] Updated the Cortex-A of linker scripts for the new version of GCC（4.7）。
2022-04-20 17:32:02 +08:00
918ee6147c
add RT_USING_POSIX_STDIO
2022-01-05 23:11:58 +08:00
b0f6c2fbae
[update] CFLAGS
2021-12-17 14:28:40 +08:00
bd80b7a4a1
对finsh_set_device调用增加宏定义限制
2021-11-24 08:57:12 -05:00
b1baf42d4e
Revert "Fix compiler flags issue"
2021-10-14 14:36:18 +08:00
0369db718c
Fix compiler flags issue
...
CCFLAGS is used by gcc and g++ compiler. So CFLAGS should be used for
gcc to avoid passing gcc flags to g++.
2021-08-19 08:53:27 +02:00
75e4c9dd0a
[bsp]update GPL license to Apache-2.0, and format files
2021-04-09 10:52:34 +08:00
a22decb71b
【优化】在代码中移除 rt_system_object_init/rt_system_tick_init 的调用。
2020-11-23 11:39:38 +08:00
7be06b67bb
[add] default environment
2019-10-22 16:48:57 +08:00
bb8e89e851
【串口】宏定义对应增加
2018-12-17 09:38:53 +08:00
cdf3f7e670
[bsp][rm48x50] update scons config: disable MDK support.
2018-12-03 20:22:06 +08:00
19433e0cf5
update SConscript: support scons 3.
2018-02-06 20:07:28 +08:00
1368e01470
[BSP] fix RT_DFS_ELM_MAX_LFN to 255.
2017-04-09 19:23:28 +08:00
c45f5a2490
[Drivers] re-write serial framework.
2014-07-18 06:45:54 +08:00
d3648dbc9f
rm48x50: cleanup sys_startup.c
2013-10-20 18:51:47 +08:00
81ab083ae5
rm48: move some asm file to libcpu
2013-10-20 18:51:46 +08:00
9568669109
rm48x50: add GCC support
2013-10-20 18:51:45 +08:00
2f4329430d
rm48x50: cleanup HALCoGen code
2013-10-20 04:04:59 +08:00
6bcf1bc48b
rm48x50: fix the prototype of finsh_system_init
2013-10-19 21:10:49 +08:00
2df7fc310f
RM48 does not have cache implemented
2013-06-12 23:48:29 +08:00
228a6be077
cortex-r4: add __rt_ffs
2013-06-05 23:20:39 +08:00
480ac34445
rm48x50: remove useless reg_test code
2013-06-03 22:25:25 +08:00
24fc6e6ebb
rm48x50: VFP lazy stacking
...
You need to turn on RT_VFP_LAZY_STACKING in rtconfig.h. By default, RTT
will turn on VFP for all threads and stack all the VFP registers. When
doing lazy stacking, VFP will only be turned on for the thread who
issued VFP instructions.
Currently, if a thread turned on VFP, it cannot be turned off. RTT will
never know what time the thread doesn't need VFP any more. The thread
might could turn off the VFP for it self in proper time.
2013-05-31 20:58:08 +08:00
ec1203bfab
rm48x50: turn on VFP support
...
This support Common VFPv2 sub-architecture.
2013-05-31 18:32:21 +08:00
939c58c295
rm48x50: remove unused vPortTaskUsesFPU
2013-05-30 17:39:32 +08:00
d8755ddd93
rm48x50: move uart.c to drv_uart.c
2013-05-30 10:02:26 +08:00
4d40978a70
rm48x50: add finsh support
2013-05-29 23:39:09 +08:00
eda09ab002
rm48x50/uart.c: fix bugs
2013-05-29 23:38:10 +08:00
50c8cbe1d5
rm48x50: now it has console
2013-05-29 17:26:34 +08:00
d22496aee8
rm48x50: update HALCoGen file
2013-05-29 16:42:26 +08:00
435f305fa2
rm48x50: temperately disable the VFP register test
2013-05-26 22:15:26 +08:00
56b640ecb6
rm48x50: add vRegTestTask2
2013-05-26 22:14:24 +08:00
2805d315bd
rm48x50: fix bug in reg_test from FreeRTOS
...
It does not satisfy AAPCS.
2013-05-26 21:49:26 +08:00
85ec844de9
rm48x50: add reg_test from FreeRTOS
...
The code is GPLv2 so I think we could use it for free(both free beer and
free speech).
2013-05-26 21:16:14 +08:00
f51bce3fed
add rm48x50 bsp and libcpu
...
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
2013-05-24 22:55:13 +08:00
Meco Man
zhouji
liukangcc
guo
JCZou
yangjie
Ernest
aozima
Bernard Xiong
Grissiom