2d3ae92075
space instead of table keep the code style
2020-02-21 21:29:06 +08:00
0458f0b798
remove comments in Chinese and keep the code style
2020-02-20 23:00:17 +08:00
0471b6d344
[bsp/raspi3] raspi3 mmu
2020-02-20 23:00:17 +08:00
581dbe4ffa
Merge pull request #3370 from nongxiaoming/master
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[libcpu]context-m33:fix label error in context_gcc.S
2020-02-17 12:25:38 +08:00
0dcbe0e0e1
Merge pull request #3379 from DavidLin1577/patch-7
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Fixed function spelling mistakes in context_iar.S
2020-02-17 12:09:49 +08:00
36d2652f0d
Fixed typo 'threah' and 'swithc' in cpuport.c
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Fixed typo:
threah -> thread
swithc -> switch
2020-02-17 09:13:17 +08:00
7ef85206dd
Fixed function spelling mistakes in context_iar.S
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swtich_to_thread -> switch_to_thread
2020-02-16 20:39:50 +08:00
607ed93513
[libcpu]context-m33:fix label error in context_gcc.S.
2020-02-11 21:39:35 +08:00
fe24ae7ca4
[bsp][synopsys] add basic new embarc bsp support
...
* the initial support of synopsys designware ARC processor
using embARC_BSP, all synopsys ARC-based boards are
supported:
-ARC Software Development Platform
-ARC EM Starter Kit
-ARC EM Software Development Platform
-ARC HS Development Kit
-ARC IoT Development Kit
* The embARC BSP is a new generation embARC software development
package. It is designed to be the inter-layer between hardware and
operating system. BSP could hide the difference of hardware/boards,
provide a unified interface to upper-layer.
* the initial support of synopsys MWDT toolchain.
The DesignWare® ARC® MetaWare Development Toolkit builds upon
a 25-year legacy of industry-leading compiler and debugger products.
It is a complete solution that contains all the components needed to
support the development, debugging and tuning of embedded applications
for the DesignWare ARC processors.
* for detailed board information, pls go embarc.org.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2020-01-16 16:02:00 +08:00
f922bf2e31
Add comment information
2020-01-15 16:46:19 +08:00
08f55d9fda
add raspi3-32 in bsp
2020-01-15 16:38:22 +08:00
fdde8ab198
add raspi2 and raspi3 BSP
2020-01-10 10:38:21 +08:00
9ef986929c
[libcpu] mips: Merge loongson_1 into gs232
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Previously Loongson 1B and Loongson 1C have their own libcpu
implemention, but they're almost identical. So we merge them
into gs232 and adapt to new common code.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:42 +08:00
7c66501861
[libcpu] Refine MIPS common code
...
MIPS common code was highly duplicated, This commit
is a attempt to clean-up and refine these code.
The context and exception handle flow is mostly identical
with Linux, but a notable difference is that when FPU enabled,
we save FP registers in stackframe unconditionally.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2019-12-11 15:24:04 +08:00
a972fcc0b5
[BSP] move libcpu/mips/x1000 to bsp/x1000/cpu
2019-12-11 11:01:40 +08:00
66d1510ac7
convert intentation tabs to spaces
2019-12-09 09:29:12 +08:00
01b27b9e91
[libcpu][c28x]add support for c28x mcu hardware fpu
2019-12-05 21:50:48 +08:00
80a4912baf
修改了上下文切换退出时的bug，该bug会导致中断被提前打开造成死锁
2019-11-05 10:30:47 +08:00
a16f27d84e
[libcpu][cm33] support cortex-m33
2019-10-29 09:45:17 +08:00
cabdbf5bbf
[libcpu][M7]修复cache编译警告
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Signed-off-by: ZYH <lymz@foxmail.com>
2019-10-23 15:04:34 +08:00
525d353403
fixed linker script and stack align issues.
2019-10-22 09:47:41 +08:00
cb07e5fb24
开放spinlock相关函数
2019-09-27 14:38:33 +08:00
8316646b85
[libcpu][arm] 修复因提前返回,导致sp指针不对称问题
2019-09-19 18:27:07 +08:00
94551979e0
Fix Cortex-M0 Cannot Execute Reboot
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Signed-off-by: xiaofan <xfan1024@live.com>
2019-09-07 21:20:46 +08:00
a101327d24
[bsp][tms320f28379d] Fix an issue that interrupts are disabled in the thread
2019-08-24 18:42:54 +08:00
ab818cda30
参照龙芯1c手册更正看门狗寄存器宏定义
2019-08-21 13:44:55 +08:00
49e9d19c82
first version
2019-07-24 17:03:26 +08:00
d45efced1c
libcpu: MIPS: 更新版权信息/Update copyright information.
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更新版权信息。
Update copyright information.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:05:00 +08:00
d6b2f56f15
libcpu: MIPS: 清理代码/Clean up code.
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清理内容重复的头文件。
Clean up duplicate header files.
Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
2019-07-19 21:00:34 +08:00
ba9dbed372
Merge pull request #2827 from yangjie11/ac6
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[libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7
2019-07-05 15:23:57 +08:00
d68220d866
[libcpu][c28x]Add __rt_ffs support
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Use a native instruction "Count Sign Bits" to support fast ffs function, then add __rt_ffs support in C28x.
2019-07-03 19:31:54 +08:00
31ffc4582c
[libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7
2019-07-03 18:47:11 +08:00
38d5c2aa72
Merge pull request #2796 from lymzzyh/cache
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修复cortex-a 中cache操作没有 dsb isb
2019-06-19 11:41:05 +08:00
fc155f8810
fix cortex-a cahce
2019-06-19 10:40:13 +08:00
21d32cdb3a
[libcpu][C28x] Fix bugs of old c28x interrupt api which can not save and restore int status
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In C28x DSP, interrupt status are stored in ST1 register. Both INTM and DBGM is used for masking interrupt, while the latter one is used in real-time debug mode. The origin function rudely enable and disable the interrupt without considering the recent interrupt status, which not only may cause problem in some situation but also is not in conformity with rt-thread design specifications. The new api will fix this bug.
2019-06-18 20:59:00 +08:00
0b4e2a984e
Merge pull request #2731 from jesven/a9-fpu
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add cortex-a fpu support
2019-05-29 18:30:44 +08:00
043611b98a
add cortex-a fpu support
2019-05-29 08:40:41 +08:00
36ffdc058b
对CM3,CM4,CM7 自动开启RT_USING_CPU_FFS
2019-05-28 21:30:45 +08:00
257d21c0bd
[bsp][at91sam9g45]Fix build bugs which caused by the change of libcpu/arm/arm926/start_gcc.S
2019-05-13 18:36:31 -07:00
ec6cb9f260
[BSP][qemu-vexpress-a9] code cleaup for compiling warning.
2019-05-12 15:07:26 +08:00
bcb7fac0d0
fix signals for k210
2019-05-11 09:37:25 +08:00
6cdfb2ac92
fix signal code
2019-05-11 09:34:26 +08:00
d729448f5e
[libcpu][arm/cortex-a] Add correct comments.
2019-05-09 08:48:38 +08:00
0f33da3f0e
[libcpu/cortex-m7]add cache driver
2019-04-27 17:35:46 +08:00
1e7bd3d8a1
修改lwp支持中arm cortex-a的swi入口函数处理
2019-04-27 13:54:51 +08:00
61f2a71511
Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.
...
This filename conflicts with the 'mbedtls' package. They are renamed
in the name of the corresponding chips and included in 'board.h'.
Files that rely on this file should include 'board.h' instead.
2019-04-26 10:50:48 +08:00
41aabf3736
Merge pull request #2573 from xuzhuoyi/tms320f28379d
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[bsp][tms320f28379d] Improve finsh support and update README.md
2019-04-14 15:39:37 +08:00
752152b63e
[bsp][tms320f28379d] Fix FPU config problem
2019-04-14 12:26:25 +08:00
4acd8db61e
[bsp][tms320f28379d] Add finsh init in rt_init_thread
2019-04-10 22:33:25 +08:00
44c3f55996
Merge pull request #2527 from xuzhuoyi/gd32e230
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[bsp] Add GD32E230K-START support
2019-04-07 16:59:27 +08:00
238c93468f
Merge pull request #2530 from qz721/libcpu_cortex_a
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Disable the data alignment check.
2019-04-01 17:43:19 +08:00
b10039f396
Disable the data alignment check.
2019-04-01 14:21:59 +08:00
fd8eb60a67
[bsp][gd32e230k-start] Update Kconfig
2019-03-31 23:26:35 +08:00
5a460aadcd
[bsp][gd32e230k-start] Update Sconscript
2019-03-31 21:17:55 +08:00
5d166c389d
[bsp][gd32e230k-start] Add GD32E230K-START BSP port
2019-03-31 15:44:24 +08:00
459ddc3b06
Merge pull request #2523 from qz721/libcpu_cortex_a
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Add standard rt-thread cache interfaces for arm/cortex-a.
2019-03-30 05:57:47 +08:00
fbd40fc5b8
Add standard rt-thread cache interfaces for arm/cortex-a.
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Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-29 20:22:25 +08:00
fcb88f7034
[libcpu][k210]fix stack frame print
2019-03-28 17:05:52 +08:00
bd8f0d0423
[libcpu] Fix the build directory issue
2019-03-26 13:36:01 +00:00
94e7f7316b
Merge pull request #2503 from qz721/libcpu_cortex_a
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Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
2019-03-25 21:58:48 +08:00
2eb1bef773
Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
2019-03-25 20:03:49 +08:00
e6d1537327
移除 SConscript.1 临时文件
2019-03-25 15:18:09 +08:00
c41bf3120f
[libcpu][k210]add stack info printf
2019-03-21 15:10:55 +08:00
3dd72f956b
[libcpu][k210]add description of exception
2019-03-20 12:23:17 +08:00
29264edde8
修改arm926中machine.c的协议声明
2019-03-14 17:54:21 +08:00
159def753f
arm926内容整理
2019-03-14 17:24:35 +08:00
d8aa99a29c
[bsp][synopsys] add the support of synopsys arc emsk
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* the initial support of synopsys designware arc processor
* the initial support of synospsy ARC EM Starter Kit
* the bsp code is based on embarc which is a common SDK for
all synopsys ARC-based boards
* use "scons --gdb" to debug emsk with em9d configuration
* for detailed board information, pls go embarc.org
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-01-25 10:29:34 +08:00
3a3c6c51f8
[libcpu] remove cache.h from mips/common folder.
2019-01-07 21:16:05 +08:00
4c0aafb57f
[libcpu] Fix the SCoscript issue in cpu/MIPS.
2019-01-07 09:20:30 +08:00
bde47018b8
[libcpu] Add SConscript in libcpu.
2019-01-07 06:09:45 +08:00
86c76b0e8a
add k210 SMP support
2018-12-28 09:41:18 +08:00
fb693418ee
add project support for at91sam9260, add support for at91sam9g45
2018-12-26 12:50:52 +08:00
597d71cc03
[bsp][k210] Add get_free_heap_size function.
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* Add get_free_heap_size function;
* Increase shell stack for KPU module.
2018-12-23 14:11:25 +08:00
5e0f8cb3aa
[libcpu] Add k210 BSP.
2018-12-18 21:01:03 +08:00
c72dc1a7e5
Merge pull request #2072 from yufanyufan77/master
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添加cpu复位函数
2018-12-15 11:53:17 +08:00
885d99ee9b
[libcpu][risc-v] fix rt_thread_switch_interrupt_flag issue.
2018-12-15 11:47:59 +08:00
fd347fdb90
[libcpu][risc-v] fix the rt_thread_switch_interrupt_flag issue
2018-12-15 11:47:10 +08:00
b40a8f816b
添加cpu复位函数
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RT_WEAK void rt_hw_cpu_reset(void)
2018-12-14 08:58:40 +08:00
08521ceaa5
[libcpu] Fix the E310 compiling issue.
2018-12-08 17:08:52 +08:00
c9576c3e53
[BSP] Add RV32M1_VEGA BSP.
2018-12-08 10:44:56 +08:00
36b194aeb6
[BSP] Update Hifive1 BSP with unified RV porting.
2018-12-08 10:42:40 +08:00
2a7d814f77
[libcpu] Add unified RISC-V libcpu porting.
2018-12-08 10:41:38 +08:00
cea021781e
[libcpu/mips/ppc405]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:42 +08:00
c7a1c1c1db
[libcpu/mips/sep6200]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:40 +08:00
2502114e34
[libcpu/mips/xburst]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:38 +08:00
da9bc3d677
[libcpu/mips/x1000]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:35 +08:00
33c6a9c795
[libcpu/mips/longson_1c]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:33 +08:00
2ce284c4b3
[libcpu/mips/longson_1b]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:26 +08:00
bef3256db5
[libcpu/arm/ia32]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:05 +08:00
849421709b
[libcpu/arm/zynq7000]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:43:02 +08:00
3e05f24608
[libcpu/arm/sep4020]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:42:54 +08:00
46c5c8267a
[libcpu/arm/s3c24x0]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:48 +08:00
96691760dc
[libcpu/arm/realview-a8-vmm]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:34 +08:00
7be87217b5
[libcpu/arm/lpc24xx]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:36:18 +08:00
5321f202c4
[libcpu/arm/lpc214x]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:58 +08:00
8ce36092c5
[libcpu/arm/cortex-r4]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:43 +08:00
cbe07afabe
[libcpu/arm/cortex-a]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:34 +08:00
8200137327
[libcpu/arm/AT9ASAM7X]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:17 +08:00
2635cc1694
[libcpu/arm/am335x]rt_hw_interrupt_install函数name参数增加const限定
2018-12-05 20:35:02 +08:00
9f477667ab
Merge pull request #1770 from xuzhuoyi/master
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添加对 TI C2000 DSP 的移植
2018-11-24 20:35:50 +08:00
6c081947b5
[bsp][tms320f28379d] Classify c28x into ti-dsp
2018-11-24 17:41:55 +08:00
46dae3f35f
Merge branch 'master' into dev-4.0.x
2018-11-20 23:13:45 +08:00
17301e463c
[bsp][tms320f28379d] Add support of Kconfig
2018-11-18 12:06:52 +08:00
b7a76b5e52
[bsp][tms320f28379d] Change license to Apache-2.0
2018-11-16 20:30:56 +08:00
37db67d94a
Merge remote-tracking branch 'upstream/master'
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# Conflicts:
# src/thread.c
2018-11-16 20:09:46 +08:00
00a655ac1c
[Kernel] Add ARCH_CPU_STACK_GROWS_UPWARD option
2018-11-11 15:56:02 +08:00
484afe9d2c
[Kernel] Add 64bit CPU support.
2018-10-26 06:35:42 +08:00
bd731fe1f0
[license] Fix the bad license header for lpc24xx.
2018-10-16 09:18:53 +08:00
7c425408b4
[license] Change the license of libarm to Apache.
2018-10-15 01:35:07 +08:00
1253a1b445
Merge pull request #1812 from liruncong/am335x-mmu
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修正am335x中mmu问题
2018-10-10 08:49:18 +08:00
5c91f241bd
Merge pull request #1861 from jg1uaa/master
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avoid to conflicting types for 'uint32_t' error.
2018-10-03 23:08:17 +08:00
54f23a4293
avoid to conflicting types for 'uint32_t' error.
...
already uint32_t is defined at components/libc/compilers/minilibc/stdint.h.
there is two ways to solve, using <stdint.h>/uint32_t pair or
<rtthread.h>/rt_uint32_t pair.
I choose former because this code belongs to C compiler, not RT-Thread system.
2018-10-03 21:03:00 +09:00
d96027f156
[libcpu] Fix the FPU definition in M4/M7 for ARM Clang
2018-09-25 11:08:58 +08:00
ff08faf605
[Kernel] Adjust the copyright information
2018-09-25 11:06:07 +08:00
b98a0ba804
[Kernel] Add ARMCC 6.x support.
2018-09-23 12:08:44 +08:00
b9e7cf7fa3
[BSP] Enable memory pool for i.MXRT1050-EVK.
2018-09-22 22:22:18 +08:00
af1044955a
修正am335x中mmu问题
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1) mmu_disable_dcache/mmu_enable_dcache等, 应使用rt_cpu_xxx相关函数,否则会跑飞. armcc并没有提供rt_cpu_xxx对应汇编代码,先删除
2) mmu_setmtt抽取为函数mmu_setmtts,并增加RT_WEAK.mmu_setmtts此处作为示例函数.实际用户板子可在bsp中重新实现该函数.可在rt_components_board_init函数前调用rt_hw_mmu_init
2018-09-15 11:37:14 +08:00
6d16685011
rt_hw_backtrace中多余括号删除. armclang给出警告
2018-09-10 19:58:28 +08:00
9d8e27e626
[bsp][tms320f28379d] Modify to C28x Compiler Register Conventions
2018-09-03 23:02:16 +08:00
5fd1213e73
[bsp][tms320f28379d] __rt_ffs() problem caused by 16-bit int
2018-09-03 21:39:56 +08:00
697a4495a6
[bsp][tms320f28379d] Add support for upward-growing stack
2018-09-03 00:03:06 +08:00
d85981a715
[BSP][tms320f28379d] Add port for tms320f28379d
2018-09-02 18:44:28 +08:00
b46e7f3172
add rt_hw_cpu_reset for cortex-m cpu
2018-08-01 11:57:56 +08:00
d431f4b5f9
[libcpu][comtex-m7] enhancement hard fault exception handler.
2018-07-25 21:39:45 +08:00
6c39b2d54d
[libcpu][comtex-m4] enhancement hard fault exception handler.
2018-07-25 21:39:44 +08:00
a0fe71f78f
fixed get sp in HardFault_Handler. close #1646
2018-07-25 21:39:43 +08:00
944b0f1c94
fix annotation error
2018-06-13 15:04:31 +08:00
7785dc5d01
[libcpu] add c-sky ck802 support
2018-06-11 09:43:39 +08:00
aa08164cb3
[libcpu] Sconscript: fix spell srror.
2018-06-04 14:23:54 +08:00
099062de78
[tools][building] Add ASFLAGS in DefineGroup.
2018-06-04 14:18:31 +08:00
7a1f8ee1c4
[libcpu][arm][arm926] Using C header file to define stack and heap size.
2018-06-04 13:34:45 +08:00
32c5b2515f
[libcpu] add risc-v e310 porting
2018-05-31 14:53:26 +08:00
fe691c2ab3
Merge pull request #1484 from TanekLiang/riscv-update
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remove hifive1 bsp and risc-v/e310 porting
2018-05-29 16:20:39 +08:00
46b9be6038
[libcpu] remove nds32 porting
2018-05-29 12:59:54 +08:00
5faae3350c
[libcpu] remove libcpu/risc-v
2018-05-29 12:59:13 +08:00
330bdf6989
[bsp/ls1cdev]跟上一提交，漏提两个文件
2018-05-12 19:36:08 +08:00
9a7caed323
[bsp/ls1cdev]添加自引导特性，添加配置选项
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1、添加自引导特性，添加配置选项
2、修复cpuport.c的bug
3、修复ls1c_pin.c不能默认复用的bug
2018-05-12 19:33:32 +08:00
dd1041bb7f
[libcpu]: fixed #1196 FPU FPCA issue.
2018-01-31 18:54:11 +08:00
d78f5eb674
Merge pull request #1124 from SummerGGift/add_arm_8-byte_alignment
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[libcpu]: add 8-byte alignment for arm architecture && optimize code …
2017-12-21 17:07:34 +08:00
fc7a5abc76
[libcpu]: add 8-byte alignment for arm architecture && optimize code format
2017-12-21 16:37:38 +08:00
cc75366fda
Merge pull request #1123 from SummerGGift/8-byte_alignment
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[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 15:36:21 +08:00
336207ad31
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 15:35:48 +08:00
a4a85a28da
[libcpu]:optimize code format
2017-12-21 15:14:23 +08:00
e7b1786759
[libcpu]:optimize code format
2017-12-21 14:55:34 +08:00
15715692d2
[libcpu]: add 8-byte alignment for armv6 architecture
2017-12-21 10:13:47 +08:00
bb46058d8e
[libcpu] Add ARCH_ARM_ARM9/11 type
2017-12-19 17:39:23 +08:00
eb72d19179
[libcpu] add volatile for __asm.
2017-11-22 09:54:36 +08:00
2488624a18
[libcpu] add volatile for asm (" mcr ") or asm (" mrc ") instruct.
2017-11-22 09:54:27 +08:00
afc2256d01
[libcpu]Support x1000 CPU
2017-11-10 19:50:14 +08:00
f6170a6e5b
[BSP] add i.MX 6UL BSP
2017-11-01 13:30:17 +08:00
756bfcc5e2
Update Kconfig.
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1. Add IPADDR/GWADDR etc;
2. Add Kconfig for libcpu.
2017-10-31 09:54:23 +08:00
6085f6826d
[bsp][at91sam9260] Fix the problem of the finsh function failure by using component initialization.
2017-10-19 23:46:17 +08:00
5e3b3b19a6
[BSP] change the type of cmd.
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1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
2017-10-16 13:23:03 +08:00
f8a1bf6fd8
[libcpu] code cleanup for nds32.
2017-10-09 18:06:58 +08:00
c2f028ed8d
Update cpuport.c
2017-10-06 11:43:50 +08:00
ea18ef60ed
Merge pull request #826 from ArcherChang/master
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[BSP] Add Andes N1068 porting and simple bsp.
2017-10-06 11:03:02 +08:00
0d193254f8
Merge pull request #845 from caogos/master
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[BSP] Add FPU option for loongson1c.
2017-09-14 17:06:11 +08:00
574e22bdbd
在配置文件“rtconfig.h”中增加硬浮点FPU的配置项，
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浮点经常会用到，所以默认使用硬浮点。
2017-09-13 15:21:09 +08:00
cb247e913f
update libcpu: cortex-m0 fault handlers always enable.
2017-09-01 10:22:55 +08:00
2ac493698b
[BSP] cleanup for hifive1 bsp.
2017-08-26 11:02:39 +08:00
652ea85a39
[1] Andes N1068体系移植
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a. Libc改用官方版本（工具链附带版本）；
b. 去除未使用文件；
2017-08-25 14:25:35 +08:00
b9ebd183ae
Merge pull request #827 from caogos/master
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[BSP] Add EMAC driver in loongson1C (ported by chinesebear, https://github.com/chinesebear/rtt-net )
2017-08-25 11:07:34 +08:00
921fbfbc21
[1] 添加Andes N1068体系；
...
[2] 基于AE210P EVB板；
[3] 详细信息参阅bsp/AE210P/readme文件夹；
《Andes工程创建和调试》文档；等。
2017-08-25 10:25:33 +08:00
9bbc4e5e6b
update cortex-m libcpu: fixed compile error.
2017-08-23 16:13:51 +08:00
838c63f365
添加龙芯1C片内网卡的驱动（原创作者是chinesebear， https://github.com/chinesebear/rtt-net）
2017-08-23 15:46:51 +08:00
9b7303e511
update libcpu: ensure fault enable.
2017-08-18 11:12:58 +08:00
4626b19ead
Merge pull request #784 from zhangjun1996/master
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[BSP] add bsp for sifive(risc-v e310).
2017-08-10 16:51:59 +08:00
7129d77bee
增加龙芯1c硬浮点的支持（可以使用硬浮点了）
2017-08-10 15:35:03 +08:00
72cfe9dd68
modify： drivers/cpuusage.c
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modify： ../../libcpu/risc-v/e310/stack.c
rmove unused macro definition
modify： ../../src/idle.c
Return to the original version
2017-07-31 12:05:45 +08:00
0cd49e7c4a
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
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add new bsp for risc-v
2017-07-31 11:27:46 +08:00
e9f1bdf2da
new file： ../../libcpu/risc-v/e310/trap.c
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add file that forget to submit before
auto change timer mtimercmp register on the base of RT_TICK_PER_SECOND in rtconfig.h
no flashing led
new file： ../../src/idle.c
recover old file
2017-07-31 11:12:28 +08:00
a5305c05df
fix bug in context_gcc.s and start_gcc.s:
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save mie into stack
msh running normaly
2017-07-31 10:59:59 +08:00
b032dff161
fix bug in rt_hw_context_switch_interrupt_do
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save sp to old thread
clear rt_thread_switch_interrupt_flag
always enable interrupt after rt_hw_context_switch
judeg the type of interrupt in trap_entry, then call handler(Machine timer interrupt of Machine external interrupt)
2017-07-30 19:46:28 +08:00
2d56a27c20
修改： ../../libcpu/risc-v/e310/context_gcc.S
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enable interrupt after return form rt_hw_context_switch
2017-07-30 15:34:32 +08:00
3c51848d33
fix trap_entry
2017-07-29 15:37:20 +08:00
b80f83f360
modified: ../../libcpu/risc-v/e310/context_gcc.S
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fix open timer intrrupt
2017-07-26 16:27:54 +08:00
98a6896cfa
remove "csrrc a5, mstatus, MSTATUS_MIE" in rt_hw_interrupt_enable();
...
it will lead to interrupt again in interrupt
2017-07-26 16:07:01 +08:00
358612c8a2
支持GPIO中断（外部中断）
2017-07-20 17:35:03 +08:00
d1bb7c61f4
将支持的中断个数从32个扩展到160个，至此可以支持所有中断
2017-07-20 17:05:59 +08:00
f39164203e
修正龙芯1c的中断号
2017-07-18 17:04:32 +08:00
b334347a24
deleted: rtthread.s /*just for debug*/
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modified: ../../libcpu/risc-v/e310/context_gcc.S
change ret to mret and switch to new task with mepc
2017-07-17 16:55:33 +08:00
e01455155a
add context_gcc.s
2017-07-17 15:44:00 +08:00
a74a2a25a8
Add libcpu/arm/am335x/context_iar.S file
2017-02-06 21:57:15 +08:00
b96f07e477
flush cache after exception code install
2016-06-15 08:09:56 -07:00
4e95fdff4a
[BSP] Update VFP code in armv6.
...
committed by FH.
2016-05-20 14:20:34 +08:00
923594c7ab
[BSP] Enable VFP.
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committed by FH.
2016-05-20 12:24:51 +08:00
255f8b7c34
[BSP] Add BSP for Ingenic X1000 CPU
2016-04-24 19:34:41 +08:00
86216ceecc
start exception by chinesebear
2016-04-19 22:08:23 +08:00
43f68131ce
[BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd.
...
FH8620 BSP
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
All rights reserved
2016-04-18 13:52:39 +08:00
3983f39f34
Add iar compiler support for am335x.
2015-11-11 23:44:05 +08:00
3faca6d5df
[BSP] update stm32f7-disco
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code cleanup.
2015-09-24 16:03:09 +08:00
a0de58a008
[BSP] fix x86 bsp compiling issue
2015-09-15 11:50:29 +00:00
2021f5a276
Add the license.
2015-09-04 21:58:08 +08:00
b71cb4c09d
Add dm365 porting.
2015-09-04 12:30:20 +08:00
af8a91457e
[bsp]add the stm32f74x bsp.
2015-08-07 13:30:13 +08:00
4ad1b35537
chinesebear add bsp & libcpu
2015-07-09 07:38:07 +08:00
9fe3cbf76f
Align thread stack to 8 byte.
2015-06-05 19:14:08 +08:00
314379cc77
implement __user_initial_stackheap
2015-06-04 12:23:24 +08:00
be76b10be6
Align stack address to 8 byte.
2015-06-04 11:59:18 +08:00
1fa5711712
fixed assembly warnings.
2015-05-22 16:48:01 +08:00
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