Supports both big and little cores of RISC-V C906,
but does not support ARM cores. Currently, only UART
drivers are supported on the peripherals.
Signed-off-by: Shicheng Chu <1468559561@qq.com>
This patch replaces SPI flash mount procedure with generic SPI API. This
patch also try to format the external flash on the first mount failure,
in case of empty or invalid flash content is present on the external SPI
flash.
Signed-off-by: Yilin Sun <imi415@imi.moe>
This patch changed SPI initialization API to standard RT-Thread SPI API.
The current code contains a minor bug which does not wait for WiFi
module ready before stack initialization, this is also fixed.
Signed-off-by: Yilin Sun <imi415@imi.moe>
* bsp: nxp/mcx/mcxn: SPI: Added missing bracket and re-format code.
The closing bracket is missing from SPI6 struct.
Introduced since commit fc1cfd6d3627ba8460d514e7913bd307e8b1d567 .
Use standard rt_spi_device->cs_pin instead of user_data pointer.
---------
Signed-off-by: Yilin Sun <imi415@imi.moe>
For bsp/cvitek, all drivers related files are moved to the directory
bsp/cvitek/drivers, so the drivers_path_prefix processing in the
SConstruct of the three bsp projects can be simplified.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Analysis: The IRQ_MAX_NR value of c906_little is wrong.
interrupt.h relies on IRQ_MAX_NR defined in rtconfig.h but
does not explicitly include this header file.
Solution: Change IRQ_MAX_NR to the correct value 61 in
the datasheet. Explicitly include rtconfig.h in interrupt.h.
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Analysis: The IRQ_MAX_NR value of cv18xx_risc-v is wrong.
The wrong IRQ_MAX_NR will cause the install of an interrupt
number larger than its value to fail.
Solution: Change IRQ_MAX_NR to the correct value 101 in
the datasheet.
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Cvitek adc dirver only supports one adc controller now,
but the other adc controller RTCSYS_SARADC is missing.
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Changes:
- board.c: add static assert for KERNEL_VADDR_START to check if it's valid
- board.h: updated deafult KERNEL_VADDR_START for standard version
- config bsp for v5.2.0 smart requirements
- kconfig: update bsp Kconfig for remap kernel
Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9229
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
To support more choice on bootfs. romfs, cromfs are now supported on
risc_v_big platform.
Changes:
- added mount operations under port
- added prototypes for cromfs init APIs
Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9229
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
The aarch64 core of duo on the master cannot enter the
console interface. It can only print the RT flag and hold it.
Analysis: The latest commit that can work is ae6a328 ("Add
psoc62, 61 config"). This phenomenon will occur after adding
754c59a ("[Feature] DFS mount auto by kernel parameters").
The specific reason is that when aarch bsp enables the device
tree, the current u-boot will pass in bootargs, which contains
"root=/dev/mmcblk0p2 rootwait rw", which means that the
kernel is required to wait until the rootfs in /dev/mmcblk0p2
loaded successfully. However, the current aarch64 bsp default
does not implement sdmmc device mounting, causing the
kernel file system mounting module (rootfs_mnt_init() of
components/drivers/core/mnt.c) to enter an infinite loop waiting.
Solution: At present, we do not plan to modify the startup
parameters of u-boot. The temporary solution adopted is to
create a pseudo /dev/mmcblk0p2 device during the board
initialization process, and then cancel the pseudo device
after mnt is completed. This allows the kernel boot to be
completed successfully.
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
* 1.add support hwi2c driver, 2.update all firmware libraries
* update some files and fixed errors
* add support a423 at hwi2c driver
* add .ignore_format.yml
In the original Sconstruct script, `GetDepend('__STACKSIZE__')`
is placed before the call to `PrepareBuilding()`, which causes
the value of `GetDepend('__STACKSIZE__')` to always be False,
and the value of `__STACKSIZE__` in `link_stacksize.lds` will
not be updated.
Solution: move the call if `PrepareBuilding()` ahead.
Also sync and update the .config and rtconfig.h, plus the
link_stacksize.lds.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
When compiling CV18xx_arch64, have a error:
can not find "rt_fdt_commit_memregion_early"
Analysis: b785ef9 ("[libcpu][aarch64]memory setup using memblock ")
no longer support "rt_fdt_commit_memregion_early", become use
"rt_memblock_reserve_memory"
Solution: Refer to the bsp/qemu-virt64-aarch64/drivers/board.c
delete "rt_fdt_commit_memregion_early"
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
When compiling CV18xx_arch64, there are the following errors:
1. missing soc type for aarch64
2. uart device objects defined but not used
Analysis: a63c07f ("bsp: cvitek: new design for pinmux") and
114e143("bsp:cvitek: add pinmux for uart"), CV18xx_arch64 is not
considered.
Solution: Refer to the cv18xx_riscv format to add the corresponding
chip type SOC_Type_SG2002, as well as the corresponding macro
for the serial port pins and interrupts
Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Currently, the documents under bsp/cvitek are a bit
messy. There are currently four readme files:
- bsp/cvitek/README.md (Chinese)
- bsp/cvitek/c906_little/README.md (Chinese/English)
- bsp/cvitek/cv18xx_aarch64/README.md (Chinese)
- bsp/cvitek/cv18xx_risc-v/README.md (Chinese/English)
Regarding the working mode of the big + small cores, it
is meaningless to describe the small core alone, or the
large core alone. This can also be seen in the existing
files. The readme of the small core will also introduce
the programming of the large core, and vice versa.
Considering that the official default mode is
C906B + C906L. ARM large core can be treataed as a
special case. So the document structure is modified as
follows:
- Remove `bsp/cvitek/c906_little/README.md` and
`bsp/cvitek/cv18xx_risc-v/README.md`, merge them all
into `bsp/cvitek/README.md`
- Add a link to `bsp/cvitek/cv18xx_aarch64/README.md`
in `bsp/cvitek/README.md`
FIXME: The modified document does not provide English
version. Is it really necessary?
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Some drivers use INIT_BOARD_EXPORT, it is not necessary,
it is enough to use INIT_DEVICE_EXPORT for genearl drivers.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
See `components/drivers/include/drivers/watchdog.h`
maco definition of
RT_DEVICE_CTRL_WDT_GET_TIMEOUT
RT_DEVICE_CTRL_WDT_SET_TIMEOUT
RT_DEVICE_CTRL_WDT_GET_TIMELEFT
The wdt timeout time unit is defined as seconds in the API, but
the code incorrectly uses ms.
Correct this and comply with the API definition.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
Rewrote the spi driver.
Reuse the driver code from https://github.com/sophgo/cvi_alios_open,
which is Apache 2.0 licenced.
Signed-off-by: flyingcys <flyingcys@163.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
```
./bsp/cvitek/drivers/drv_wdt.c: In function '_wdt_control':
warning: assignment to 'void *' from 'unsigned int' makes pointer
from integer without a cast [-Wint-conversion]
119 | wdt_device->parent.user_data = (rt_uint32_t)(*(rt_uint32_t *)arg);
| ^
warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
122 | *(rt_uint32_t *)arg = (rt_uint32_t)wdt_device->parent.user_data;
| ^
```
Rootcasue: It's not portable to store integar in a pointer.
Solution: use global _wdt_dev to store the timeout value.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
The ADC controller needs to be calibrated during the initialization
phase, otherwise the measured voltage value will be inaccurate.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
In the new design, we require the user to manually enter the
PinName (as a string) in menuconfig instead of being given
menu items to select.
The original method will lead to too many menu item-related
macros being defined in the code, causing ifdef and other
codes scatter everywhere in the driver code, which is
inconvenient to maintain.
The new design adds a pinmux driver module to manage the
multiplexing of pins. This patch provides this driver module.
P.S., the reason why users are allowed to specify pinname
in a string instead of the pin number is mainly because
the technical manual provided by the SOC manufacturer
does not have numbers for some pins, only names.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
The contents of the SOC type part in the Kconfig configuration
are retained, and other parts related to I2C pin multiplexing
selection have been rolled back.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
* [bsp][hpmicro] add weak handle_trap implementation
- added weak handle_trap implementation
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
* [libcpu][risc-v][common] remove weak handle_trap function
- removed weak handle_trap function from trap_common.c
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
---------
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
The changes unify the tick.c implementations for all risc-v64
architectures, leveraging the CPUTIME feature. This refactoring was
necessary to streamline the codebase, and ensure consistent timer
handling across different platforms.
Changes:
- Updated `Kconfig` in `bsp/cvitek/cv18xx_risc-v` to fix formatting issues.
- Updated .config for BSPs to update `CPUTIME_TIMER_FREQ`
- Updated header of for API `riscv_cputime_init`
- Initialized riscv timer on `rt_hw_tick_init`
- Refactored `tick.c` and `tick.h` in `libcpu/risc-v/t-head/c906` and `libcpu/risc-v/virt64`:
- Replaced direct use of `rdtime` with `clock_cpu_gettime`.
- Removed redundant timer frequency definitions.
- Added static assertions to check the value of `CPUTIME_TIMER_FREQ`.
- Initialized `tick_cycles` based on `CPUTIME_TIMER_FREQ`.
- Integrated `ktime` support for tick initialization.
Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9164
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
* [bsp/allwinner] feat: porting to RT_USING_DEVICE_OPS
This patch ports the codebase to use the RT_USING_DEVICE_OPS structure,
which is required by v5.1.0 Smart kernel, improves modularity and makes
it easier to manage device operations by consolidating them into a
single structure, enhancing maintainability and future scalability.
Changes:
- Added RT_USING_DEVICE_OPS conditionals to partition.c and drv_sdmmc.c.
- Defined rt_device_ops structures for partition and sdmmc drivers.
- Updated device initialization to use the ops structure if defined.
- Replaced direct function calls with rt_dev_control, rt_dev_read, and
rt_dev_write macros where applicable.
- Removed redundant us_delay function from os.c.
Signed-off-by: Shell <smokewood@qq.com>
* feat: update configuration
* feat: fixup compiler warning
---------
Signed-off-by: Shell <smokewood@qq.com>
* [libcpu] support for ARCH_REMAP_KERNEL
These changes introduce support for the ARCH_REMAP_KERNEL configuration,
which isolates kernel space in high virtual address regions. This feature
is necessary to enhance memory protection and management by segregating
user and kernel spaces more effectively.
Changes:
- Updated conditional macros to check for ARCH_REMAP_KERNEL instead of
ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new
configuration option.
- Modified qemu-virt64-riscv Kconfig and SConstruct files to include and
utilize ARCH_REMAP_KERNEL.
- Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv.
- Updated rtconfig.py to use a more flexible execution path setup.
- Enhanced user address space definitions in `lwp_arch.h` to support the
new virtual address mappings.
- Adjusted kernel memory initialization and mapping logic in `c906/mmu.c`
and `virt64/mmu.c` to account for high virtual address regions.
- Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures.
- Enhanced memory setup functions to support new mapping scheme, including
updates to early page table setup and address relocation logic.
These modifications ensure that the system can utilize high memory
addresses for the kernel, improving memory isolation and system stability.
Signed-off-by: Shell <smokewood@qq.com>
* fixup: CI run failed
* bsp: default config without using smart
* fixup: static checks
* restore rt_hw_mmu_kernel_map_init for D1
---------
Signed-off-by: Shell <smokewood@qq.com>
- added new boards: hpm5300evk, hpm5301evklite and hpm6800evk
- upgaded hpm_sdk
- driver updates and bugfixes
- add hpmicro BSPs to CI
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
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