feat: arm64: generic implementation of vector irq (#9336)
feat: overall implementation of vector irq This patch generalize the irq handling on up/mp system by adding the `rt_hw_irq_exit()` & `rt_hw_vector_irq_sched()` API. Changes: - Added `rt_hw_irq_exit()` and `rt_hw_vector_irq_sched()` APIs for unified IRQ management. - Refactored assembly code for both UP and MP systems to use the new IRQ handling flow. - Removed redundant code and optimized exception handling paths. Signed-off-by: Shell <smokewood@qq.com>
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@ -23,6 +23,14 @@
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.cfi_endproc; \
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.size name, .-name;
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#define TRACE_SYMBOL(name)
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.macro NEVER_RETURN
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#ifdef RT_USING_DEBUG
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b .
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#endif /* RT_USING_DEBUG */
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.endm
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.macro GET_THREAD_SELF, dst:req
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#ifdef ARCH_USING_HW_THREAD_SELF
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mrs x0, tpidr_el1
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@ -6,6 +6,7 @@
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* Change Logs:
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* Date Author Notes
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* 2024-03-28 Shell Move vector handling codes from context_gcc.S
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* 2024-04-08 Shell Optimizing exception switch between u-space/kernel,
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*/
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#ifndef __ARM64_INC_VECTOR_H__
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@ -45,8 +46,6 @@
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mrs x2, elr_el1
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stp x2, x3, [sp, #-0x10]!
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mov x0, sp /* Move SP into X0 for saving. */
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.endm
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#ifdef RT_USING_SMP
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@ -55,60 +54,29 @@
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#include "../up/context_gcc.h"
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#endif
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.macro RESTORE_IRQ_CONTEXT_WITHOUT_MMU_SWITCH
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/* the SP is already ok */
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ldp x2, x3, [sp], #0x10 /* SPSR and ELR. */
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tst x3, #0x1f
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msr spsr_el1, x3
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msr elr_el1, x2
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ldp x29, x30, [sp], #0x10
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msr sp_el0, x29
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ldp x28, x29, [sp], #0x10
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msr fpcr, x28
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msr fpsr, x29
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ldp x28, x29, [sp], #0x10
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ldp x26, x27, [sp], #0x10
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ldp x24, x25, [sp], #0x10
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ldp x22, x23, [sp], #0x10
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ldp x20, x21, [sp], #0x10
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ldp x18, x19, [sp], #0x10
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ldp x16, x17, [sp], #0x10
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ldp x14, x15, [sp], #0x10
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ldp x12, x13, [sp], #0x10
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ldp x10, x11, [sp], #0x10
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ldp x8, x9, [sp], #0x10
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ldp x6, x7, [sp], #0x10
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ldp x4, x5, [sp], #0x10
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ldp x2, x3, [sp], #0x10
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ldp x0, x1, [sp], #0x10
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RESTORE_FPU sp
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.macro SAVE_USER_CTX, eframex, tmpx
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#ifdef RT_USING_SMART
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beq arch_ret_to_user
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#endif
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eret
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.endm
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.macro SAVE_USER_CTX
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mrs x1, spsr_el1
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and x1, x1, 0xf
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cmp x1, xzr
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bne 1f
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mrs \tmpx, spsr_el1
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and \tmpx, \tmpx, 0xf
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cbz \tmpx, 1f
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b 2f
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1:
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mov x0, \eframex
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bl lwp_uthread_ctx_save
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ldp x0, x1, [sp]
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1:
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2:
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#endif /* RT_USING_SMART */
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.endm
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.macro RESTORE_USER_CTX, ctx
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ldr x1, [\ctx, #CONTEXT_OFFSET_SPSR_EL1]
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and x1, x1, 0x1f
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cmp x1, xzr
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bne 1f
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bl lwp_uthread_ctx_restore
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.macro RESTORE_USER_CTX, eframex, tmpx
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#ifdef RT_USING_SMART
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ldr \tmpx, [\eframex, #CONTEXT_OFFSET_SPSR_EL1]
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and \tmpx, \tmpx, 0x1f
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cbz \tmpx, 1f
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b 2f
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1:
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bl lwp_uthread_ctx_restore
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2:
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#endif /* RT_USING_SMART */
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.endm
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#endif /* __ARM64_INC_VECTOR_H__ */
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@ -129,5 +129,7 @@ rt_hw_context_switch_interrupt:
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b _context_switch_exit
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_context_switch_exit:
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.local _context_switch_exit
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clrex
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RESTORE_CONTEXT_SWITCH
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@ -12,41 +12,23 @@
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#define __ASSEMBLY__
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#endif
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#include "../include/vector_gcc.h"
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#include "vector_gcc.h"
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#include "context_gcc.h"
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.section .text
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.globl vector_fiq
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vector_fiq:
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.globl vector_fiq
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b .
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.globl rt_hw_irq_exit
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START_POINT(vector_irq)
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SAVE_IRQ_CONTEXT
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stp x0, x1, [sp, #-0x10]! /* X0 is thread sp */
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/**
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* void rt_hw_vector_irq_sched(void *eframe)
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* @brief do IRQ scheduling
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*/
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rt_hw_vector_irq_sched:
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.globl rt_hw_vector_irq_sched
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bl rt_interrupt_enter
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ldp x0, x1, [sp]
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#ifdef RT_USING_SMART
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SAVE_USER_CTX
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#endif /* RT_USING_SMART */
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bl rt_hw_trap_irq
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#ifdef RT_USING_SMART
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ldp x0, x1, [sp]
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RESTORE_USER_CTX x0
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#endif /* RT_USING_SMART */
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bl rt_interrupt_leave
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ldp x0, x1, [sp], #0x10
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bl rt_scheduler_do_irq_switch
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rt_hw_irq_exit:
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RESTORE_IRQ_CONTEXT
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START_POINT_END(vector_irq)
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b rt_hw_irq_exit
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@ -45,6 +45,7 @@ rt_hw_context_switch_to:
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clrex
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ldr x0, [x0]
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RESTORE_CONTEXT_SWITCH x0
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NEVER_RETURN
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/*
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* void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
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ldr x0, [x1] // get new task stack pointer
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RESTORE_CONTEXT_SWITCH x0
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NEVER_RETURN
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.globl rt_thread_switch_interrupt_flag
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.globl rt_interrupt_from_thread
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ldr x0, [x4] // get new task's stack pointer
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RESTORE_CONTEXT_SWITCH x0
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NEVER_RETURN
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@ -22,28 +22,24 @@
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.section .text
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vector_fiq:
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.align 8
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.globl vector_fiq
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vector_fiq:
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SAVE_IRQ_CONTEXT
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bl rt_hw_trap_fiq
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RESTORE_IRQ_CONTEXT
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.globl rt_interrupt_enter
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.globl rt_interrupt_leave
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.globl rt_thread_switch_interrupt_flag
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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.globl rt_hw_context_switch_interrupt_do
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/**
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* void rt_hw_vector_irq_sched(void *eframe)
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* @brief do IRQ scheduling
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*/
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rt_hw_vector_irq_sched:
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.globl rt_hw_vector_irq_sched
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.align 8
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.globl vector_irq
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vector_irq:
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SAVE_IRQ_CONTEXT
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bl rt_interrupt_enter
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bl rt_hw_trap_irq
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bl rt_interrupt_leave
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/**
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* if rt_thread_switch_interrupt_flag set, jump to
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ldr x1, =rt_thread_switch_interrupt_flag
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ldr x2, [x1]
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cmp x2, #1
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b.ne vector_irq_exit
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bne 1f
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mov x2, #0 // clear flag
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/* clear flag */
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mov x2, #0
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str x2, [x1]
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bl rt_hw_context_switch_interrupt_do
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vector_irq_exit:
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RESTORE_IRQ_CONTEXT_WITHOUT_MMU_SWITCH
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1:
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b rt_hw_irq_exit
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@ -67,32 +67,60 @@ system_vectors:
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b vector_serror
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#include "include/vector_gcc.h"
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#define EFRAMEX x19
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START_POINT(vector_exception)
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SAVE_IRQ_CONTEXT
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stp x0, x1, [sp, #-0x10]!
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#ifdef RT_USING_SMART
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SAVE_USER_CTX
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#endif
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mov EFRAMEX, sp
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SAVE_USER_CTX EFRAMEX, x0
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mov x0, EFRAMEX
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bl rt_hw_trap_exception
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#ifdef RT_USING_SMART
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ldp x0, x1, [sp]
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RESTORE_USER_CTX x0
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#endif
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RESTORE_USER_CTX EFRAMEX, x0
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ldp x0, x1, [sp], #0x10
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RESTORE_IRQ_CONTEXT_WITHOUT_MMU_SWITCH
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RESTORE_IRQ_CONTEXT
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START_POINT_END(vector_exception)
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START_POINT(vector_serror)
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SAVE_IRQ_CONTEXT
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mov EFRAMEX, sp
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#ifdef RT_USING_SMART
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SAVE_USER_CTX
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#endif
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SAVE_USER_CTX EFRAMEX, x0
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stp x0, x1, [sp, #-0x10]!
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mov x0, EFRAMEX
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bl rt_hw_trap_serror
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b .
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RESTORE_USER_CTX EFRAMEX, x0
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NEVER_RETURN
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START_POINT_END(vector_serror)
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START_POINT(vector_irq)
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SAVE_IRQ_CONTEXT
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mov EFRAMEX, sp
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/* trace IRQ level */
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bl rt_interrupt_enter
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SAVE_USER_CTX EFRAMEX, x0
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/* handline IRQ */
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mov x0, EFRAMEX
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bl rt_hw_trap_irq
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RESTORE_USER_CTX EFRAMEX, x0
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/* restore IRQ level */
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bl rt_interrupt_leave
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mov x0, EFRAMEX
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bl rt_hw_vector_irq_sched
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b rt_hw_irq_exit
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START_POINT_END(vector_irq)
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rt_hw_irq_exit:
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.globl rt_hw_irq_exit
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RESTORE_IRQ_CONTEXT
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