From fc5dfaf5c4b89e1907187468b85b744b2389a516 Mon Sep 17 00:00:00 2001 From: Rbb666 Date: Tue, 5 Jul 2022 16:59:20 +0800 Subject: [PATCH] format code --- bsp/cypress/libraries/HAL_Drivers/SConscript | 4 +- bsp/cypress/libraries/HAL_Drivers/drv_adc.h | 2 +- bsp/cypress/libraries/HAL_Drivers/drv_log.h | 2 +- bsp/cypress/libraries/HAL_Drivers/drv_uart.h | 4 +- .../GeneratedSource/cycfg_capsense.c | 2 +- .../GeneratedSource/cycfg_capsense.h | 2 +- .../GeneratedSource/cycfg_capsense_defines.h | 4 +- .../cycfg_capsense_tuner_regmap.h | 2 +- .../GeneratedSource/cycfg_clocks.c | 2 +- .../GeneratedSource/cycfg_dmas.c | 24 +- .../GeneratedSource/cycfg_peripherals.c | 2 +- .../GeneratedSource/cycfg_pins.c | 64 +- .../GeneratedSource/cycfg_pins.h | 36 +- .../GeneratedSource/cycfg_system.c | 322 ++--- .../TARGET_CY8CKIT-062S2-43012/cybsp_doc.h | 2 +- .../IFX_PSOC6_HAL/capsense/cy_capsense.h | 4 +- .../capsense/cy_capsense_centroid.c | 302 ++--- .../capsense/cy_capsense_common.h | 2 +- .../capsense/cy_capsense_control.h | 16 +- .../capsense/cy_capsense_csx_v2.c | 2 +- .../capsense/cy_capsense_filter.c | 158 +-- .../capsense/cy_capsense_gesture_lib.h | 10 +- .../IFX_PSOC6_HAL/capsense/cy_capsense_lib.h | 62 +- .../capsense/cy_capsense_processing.c | 4 +- .../capsense/cy_capsense_processing.h | 2 +- .../capsense/cy_capsense_selftest.c | 2 +- .../capsense/cy_capsense_tuner.c | 92 +- .../capsense/cy_capsense_tuner.h | 2 +- .../source/triggers/cyhal_triggers_psoc6_01.c | 34 +- .../source/triggers/cyhal_triggers_psoc6_02.c | 38 +- .../source/triggers/cyhal_triggers_psoc6_03.c | 42 +- .../source/triggers/cyhal_triggers_psoc6_04.c | 46 +- .../source/triggers/cyhal_triggers_cyw20829.c | 34 +- .../source/triggers/cyhal_triggers_xmc7100.c | 52 +- .../source/triggers/cyhal_triggers_xmc7200.c | 58 +- .../source/triggers/cyhal_triggers_explorer.c | 18 +- .../mtb-hal-cat1/include/cyhal.h | 2 +- .../mtb-hal-cat1/include/cyhal_adc.h | 2 +- .../mtb-hal-cat1/include/cyhal_quaddec.h | 2 +- .../mtb-hal-cat1/include/cyhal_sdhc.h | 2 +- .../mtb-hal-cat1/include/cyhal_spi.h | 2 +- .../mtb-hal-cat1/include/cyhal_tdm.h | 2 +- .../mtb-hal-cat1/include/cyhal_usb_dev.h | 2 +- .../mtb-hal-cat1/include_pvt/cyhal_adc_impl.h | 2 +- .../include_pvt/cyhal_clock_impl.h | 8 +- .../include_pvt/cyhal_interconnect_impl.h | 2 +- .../mtb-hal-cat1/include_pvt/cyhal_pwm_impl.h | 2 +- .../include_pvt/cyhal_quaddec_impl.h | 2 +- .../include_pvt/cyhal_system_impl.h | 2 +- .../include_pvt/cyhal_timer_impl.h | 2 +- .../include_pvt/cyhal_trng_impl.h | 2 +- .../mtb-hal-cat1/include_pvt/cyhal_wdt_impl.h | 2 +- .../mtb-hal-cat1/source/cyhal_audio_common.c | 6 +- .../mtb-hal-cat1/source/cyhal_clock.c | 124 +- .../mtb-hal-cat1/source/cyhal_dma_dmac.c | 2 +- .../mtb-hal-cat1/source/cyhal_keyscan.c | 2 +- .../mtb-hal-cat1/source/cyhal_lptimer.c | 4 +- .../mtb-hal-cat1/source/cyhal_qspi.c | 2 +- .../mtb-hal-cat1/source/cyhal_quaddec.c | 4 +- .../mtb-hal-cat1/source/cyhal_rtc.c | 2 +- .../mtb-hal-cat1/source/cyhal_sdhc.c | 2 +- .../mtb-hal-cat1/source/cyhal_spi.c | 4 +- .../mtb-hal-cat1/source/cyhal_syspm.c | 4 +- .../cmsis/include/arm_helium_utils.h | 2 +- .../mtb-pdl-cat1/cmsis/include/arm_math.h | 106 +- .../cmsis/include/arm_mve_tables.h | 10 +- .../cmsis/include/cachel1_armv7.h | 14 +- .../mtb-pdl-cat1/cmsis/include/cmsis_armcc.h | 6 +- .../cmsis/include/cmsis_armclang.h | 6 +- .../cmsis/include/cmsis_armclang_ltm.h | 4 +- .../mtb-pdl-cat1/cmsis/include/cmsis_gcc.h | 24 +- .../mtb-pdl-cat1/cmsis/include/cmsis_iccarm.h | 2 +- .../cmsis/include/core_armv81mml.h | 8 +- .../cmsis/include/core_armv8mbl.h | 4 +- .../cmsis/include/core_armv8mml.h | 6 +- .../mtb-pdl-cat1/cmsis/include/core_cm0.h | 2 +- .../mtb-pdl-cat1/cmsis/include/core_cm0plus.h | 2 +- .../mtb-pdl-cat1/cmsis/include/core_cm1.h | 2 +- .../mtb-pdl-cat1/cmsis/include/core_cm23.h | 6 +- .../mtb-pdl-cat1/cmsis/include/core_cm3.h | 2 +- .../mtb-pdl-cat1/cmsis/include/core_cm33.h | 6 +- .../mtb-pdl-cat1/cmsis/include/core_cm35p.h | 8 +- .../mtb-pdl-cat1/cmsis/include/core_cm4.h | 2 +- .../mtb-pdl-cat1/cmsis/include/core_cm55.h | 6 +- .../mtb-pdl-cat1/cmsis/include/core_cm7.h | 2 +- .../mtb-pdl-cat1/cmsis/include/core_sc000.h | 2 +- .../mtb-pdl-cat1/cmsis/include/mpu_armv7.h | 30 +- .../mtb-pdl-cat1/cmsis/include/mpu_armv8.h | 32 +- .../mtb-pdl-cat1/cmsis/include/pmu_armv8.h | 42 +- .../mtb-pdl-cat1/cmsis/include/tz_context.h | 18 +- .../mtb-pdl-cat1/drivers/include/cy_adcmic.h | 16 +- .../mtb-pdl-cat1/drivers/include/cy_csd.h | 162 +-- .../mtb-pdl-cat1/drivers/include/cy_efuse.h | 20 +- .../mtb-pdl-cat1/drivers/include/cy_flash.h | 12 +- .../mtb-pdl-cat1/drivers/include/cy_gpio.h | 2 +- .../mtb-pdl-cat1/drivers/include/cy_ipc_drv.h | 14 +- .../mtb-pdl-cat1/drivers/include/cy_keyscan.h | 46 +- .../mtb-pdl-cat1/drivers/include/cy_lin.h | 26 +- .../mtb-pdl-cat1/drivers/include/cy_lvd.h | 2 +- .../mtb-pdl-cat1/drivers/include/cy_mcwdt.h | 12 +- .../mtb-pdl-cat1/drivers/include/cy_pd_pdcm.h | 2 +- .../mtb-pdl-cat1/drivers/include/cy_pd_ppu.h | 2 +- .../drivers/include/cy_pdm_pcm_v2.h | 84 +- .../mtb-pdl-cat1/drivers/include/cy_sar.h | 8 +- .../drivers/include/cy_scb_ezi2c.h | 2 +- .../mtb-pdl-cat1/drivers/include/cy_scb_i2c.h | 2 +- .../mtb-pdl-cat1/drivers/include/cy_seglcd.h | 38 +- .../mtb-pdl-cat1/drivers/include/cy_smif.h | 134 +- .../drivers/include/cy_smif_memslot.h | 48 +- .../drivers/include/cy_sysanalog.h | 26 +- .../mtb-pdl-cat1/drivers/include/cy_sysclk.h | 2 +- .../mtb-pdl-cat1/drivers/include/cy_syslib.h | 4 +- .../mtb-pdl-cat1/drivers/include/cy_tcpwm.h | 4 +- .../drivers/include/cy_tcpwm_pwm.h | 12 +- .../drivers/include/cy_tcpwm_shiftreg.h | 4 +- .../mtb-pdl-cat1/drivers/include/cy_tdm.h | 88 +- .../mtb-pdl-cat1/drivers/include/cy_wdt.h | 2 +- .../mtb-pdl-cat1/drivers/source/cy_adcmic.c | 26 +- .../mtb-pdl-cat1/drivers/source/cy_canfd.c | 6 +- .../drivers/source/cy_crypto_core_aes_v2.c | 2 +- .../mtb-pdl-cat1/drivers/source/cy_csd.c | 26 +- .../mtb-pdl-cat1/drivers/source/cy_dma.c | 2 +- .../mtb-pdl-cat1/drivers/source/cy_flash.c | 6 +- .../mtb-pdl-cat1/drivers/source/cy_gpio.c | 6 +- .../mtb-pdl-cat1/drivers/source/cy_i2s.c | 2 +- .../mtb-pdl-cat1/drivers/source/cy_ipc_bt.c | 2 +- .../mtb-pdl-cat1/drivers/source/cy_keyscan.c | 46 +- .../mtb-pdl-cat1/drivers/source/cy_lin.c | 12 +- .../mtb-pdl-cat1/drivers/source/cy_pd_pdcm.c | 2 +- .../mtb-pdl-cat1/drivers/source/cy_pd_ppu.c | 10 +- .../drivers/source/cy_pdm_pcm_v2.c | 78 +- .../mtb-pdl-cat1/drivers/source/cy_rtc.c | 26 +- .../mtb-pdl-cat1/drivers/source/cy_sar.c | 2 +- .../drivers/source/cy_scb_common.c | 2 +- .../mtb-pdl-cat1/drivers/source/cy_scb_spi.c | 4 +- .../mtb-pdl-cat1/drivers/source/cy_sd_host.c | 4 +- .../mtb-pdl-cat1/drivers/source/cy_seglcd.c | 28 +- .../mtb-pdl-cat1/drivers/source/cy_smif.c | 158 +-- .../drivers/source/cy_smif_memslot.c | 138 +- .../drivers/source/cy_smif_sfdp.c | 4 +- .../drivers/source/cy_sysclk_v2.c | 10 +- .../drivers/source/cy_sysint_v2.c | 12 +- .../mtb-pdl-cat1/drivers/source/cy_syslib.c | 10 +- .../mtb-pdl-cat1/drivers/source/cy_syspm_v2.c | 2 +- .../drivers/source/cy_systick_v2.c | 4 +- .../drivers/source/cy_tcpwm_pwm.c | 12 +- .../drivers/source/cy_tcpwm_quaddec.c | 2 +- .../drivers/source/cy_tcpwm_shiftreg.c | 2 +- .../mtb-pdl-cat1/drivers/source/cy_tdm.c | 18 +- bsp/cypress/psoc6-cy8cproto-4343w/.config | 5 +- bsp/cypress/psoc6-cy8cproto-4343w/.project | 28 + .../EventRecorderStub.scvd | 9 + .../psoc6-cy8cproto-4343w/applications/main.c | 51 +- .../psoc6-cy8cproto-4343w/board/Kconfig | 4 +- .../psoc6-cy8cproto-4343w/board/board.h | 6 +- .../psoc6-cy8cproto-4343w/project.uvoptx | 1108 ++++++++--------- .../psoc6-cy8cproto-4343w/project.uvprojx | 84 +- bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h | 3 - 158 files changed, 2268 insertions(+), 2470 deletions(-) create mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/.project create mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/EventRecorderStub.scvd diff --git a/bsp/cypress/libraries/HAL_Drivers/SConscript b/bsp/cypress/libraries/HAL_Drivers/SConscript index f5ddc1054f..f27717a19a 100644 --- a/bsp/cypress/libraries/HAL_Drivers/SConscript +++ b/bsp/cypress/libraries/HAL_Drivers/SConscript @@ -19,11 +19,11 @@ if GetDepend(['RT_USING_SERIAL']): src += ['drv_uart.c'] if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']): - if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'): + if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2'): src += ['drv_soft_i2c.c'] if GetDepend(['RT_USING_ADC']): - src += Glob('drv_adc.c') + src += ['drv_adc.c'] path = [cwd] path += [cwd + '/config'] diff --git a/bsp/cypress/libraries/HAL_Drivers/drv_adc.h b/bsp/cypress/libraries/HAL_Drivers/drv_adc.h index 44f9c8e068..4493587826 100644 --- a/bsp/cypress/libraries/HAL_Drivers/drv_adc.h +++ b/bsp/cypress/libraries/HAL_Drivers/drv_adc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2021, RT-Thread Development Team + * Copyright (c) 2006-2022, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/cypress/libraries/HAL_Drivers/drv_log.h b/bsp/cypress/libraries/HAL_Drivers/drv_log.h index 3fe511789b..e1b61708cc 100644 --- a/bsp/cypress/libraries/HAL_Drivers/drv_log.h +++ b/bsp/cypress/libraries/HAL_Drivers/drv_log.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2021, RT-Thread Development Team + * Copyright (c) 2006-2022, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/cypress/libraries/HAL_Drivers/drv_uart.h b/bsp/cypress/libraries/HAL_Drivers/drv_uart.h index 91ae563362..18d569a577 100644 --- a/bsp/cypress/libraries/HAL_Drivers/drv_uart.h +++ b/bsp/cypress/libraries/HAL_Drivers/drv_uart.h @@ -5,9 +5,9 @@ * * Change Logs: * Date Author Notes - * 2022-06-29 Rbb666 first version + * 2022-06-29 Rbb666 first version */ - + #ifndef __DRV_UART_H__ #define __DRV_UART_H__ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.c index 95a20e7b75..0361aa1b4b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.c @@ -7,7 +7,7 @@ * CapSense Configurator 4.0.0.6195 * ******************************************************************************** -* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) +* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) * or an affiliate of Cypress Semiconductor Corporation. * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.h index 90f23f025c..b7d2ae0c5c 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense.h @@ -7,7 +7,7 @@ * CapSense Configurator 4.0.0.6195 * ******************************************************************************** -* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) +* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) * or an affiliate of Cypress Semiconductor Corporation. * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_defines.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_defines.h index d3c9222aaf..4a438d80db 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_defines.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_defines.h @@ -4,14 +4,14 @@ * Description: * CAPSENSE configuration defines. * -* Note: This file is required for the CAPSENSE Middleware Library to build +* Note: This file is required for the CAPSENSE Middleware Library to build * successfully. * * This file should not be modified. It was automatically generated by * CapSense Configurator 4.0.0.6195 * ******************************************************************************** -* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) +* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) * or an affiliate of Cypress Semiconductor Corporation. * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_tuner_regmap.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_tuner_regmap.h index 2a4c7c3ba1..9ed3e5855f 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_tuner_regmap.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_capsense_tuner_regmap.h @@ -7,7 +7,7 @@ * CapSense Configurator 4.0.0.6195 * ******************************************************************************** -* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) +* Copyright 2022, Cypress Semiconductor Corporation (an Infineon company) * or an affiliate of Cypress Semiconductor Corporation. * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c index 7a2f727ebe..a4c5afbdd1 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c @@ -30,7 +30,7 @@ #include "cycfg_clocks.h" #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_CLK_DIV_obj = + const cyhal_resource_inst_t CYBSP_CSD_CLK_DIV_obj = { .type = CYHAL_RSC_CLOCK, .block_num = CYBSP_CSD_CLK_DIV_HW, diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_dmas.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_dmas.c index b15198509c..b40c169795 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_dmas.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_dmas.c @@ -29,7 +29,7 @@ #include "cycfg_dmas.h" -const cy_stc_dma_descriptor_config_t TxDma_Descriptor_0_config = +const cy_stc_dma_descriptor_config_t TxDma_Descriptor_0_config = { .retrigger = CY_DMA_RETRIG_4CYC, .interruptType = CY_DMA_DESCR, @@ -50,7 +50,7 @@ const cy_stc_dma_descriptor_config_t TxDma_Descriptor_0_config = .yCount = 1, .nextDescriptor = NULL, }; -cy_stc_dma_descriptor_t TxDma_Descriptor_0 = +cy_stc_dma_descriptor_t TxDma_Descriptor_0 = { .ctl = 0UL, .src = 0UL, @@ -59,7 +59,7 @@ cy_stc_dma_descriptor_t TxDma_Descriptor_0 = .yCtl = 0UL, .nextPtr = 0UL, }; -const cy_stc_dma_channel_config_t TxDma_channelConfig = +const cy_stc_dma_channel_config_t TxDma_channelConfig = { .descriptor = &TxDma_Descriptor_0, .preemptable = false, @@ -67,7 +67,7 @@ const cy_stc_dma_channel_config_t TxDma_channelConfig = .enable = false, .bufferable = false, }; -const cy_stc_dma_crc_config_t TxDma_crcConfig = +const cy_stc_dma_crc_config_t TxDma_crcConfig = { .dataReverse = false, .dataXor = 0, @@ -76,14 +76,14 @@ const cy_stc_dma_crc_config_t TxDma_crcConfig = .polynomial = 79764919, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t TxDma_obj = + const cyhal_resource_inst_t TxDma_obj = { .type = CYHAL_RSC_DMA, .block_num = 0U, .channel_num = TxDma_CHANNEL, }; #endif //defined (CY_USING_HAL) -const cy_stc_dma_descriptor_config_t RxDma_Descriptor_0_config = +const cy_stc_dma_descriptor_config_t RxDma_Descriptor_0_config = { .retrigger = CY_DMA_RETRIG_4CYC, .interruptType = CY_DMA_1ELEMENT, @@ -104,7 +104,7 @@ const cy_stc_dma_descriptor_config_t RxDma_Descriptor_0_config = .yCount = 1, .nextDescriptor = &RxDma_Descriptor_1, }; -const cy_stc_dma_descriptor_config_t RxDma_Descriptor_1_config = +const cy_stc_dma_descriptor_config_t RxDma_Descriptor_1_config = { .retrigger = CY_DMA_RETRIG_4CYC, .interruptType = CY_DMA_DESCR, @@ -125,7 +125,7 @@ const cy_stc_dma_descriptor_config_t RxDma_Descriptor_1_config = .yCount = 1, .nextDescriptor = &RxDma_Descriptor_0, }; -cy_stc_dma_descriptor_t RxDma_Descriptor_0 = +cy_stc_dma_descriptor_t RxDma_Descriptor_0 = { .ctl = 0UL, .src = 0UL, @@ -134,7 +134,7 @@ cy_stc_dma_descriptor_t RxDma_Descriptor_0 = .yCtl = 0UL, .nextPtr = 0UL, }; -cy_stc_dma_descriptor_t RxDma_Descriptor_1 = +cy_stc_dma_descriptor_t RxDma_Descriptor_1 = { .ctl = 0UL, .src = 0UL, @@ -143,7 +143,7 @@ cy_stc_dma_descriptor_t RxDma_Descriptor_1 = .yCtl = 0UL, .nextPtr = 0UL, }; -const cy_stc_dma_channel_config_t RxDma_channelConfig = +const cy_stc_dma_channel_config_t RxDma_channelConfig = { .descriptor = &RxDma_Descriptor_0, .preemptable = false, @@ -151,7 +151,7 @@ const cy_stc_dma_channel_config_t RxDma_channelConfig = .enable = false, .bufferable = false, }; -const cy_stc_dma_crc_config_t RxDma_crcConfig = +const cy_stc_dma_crc_config_t RxDma_crcConfig = { .dataReverse = false, .dataXor = 0, @@ -160,7 +160,7 @@ const cy_stc_dma_crc_config_t RxDma_crcConfig = .polynomial = 79764919, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t RxDma_obj = + const cyhal_resource_inst_t RxDma_obj = { .type = CYHAL_RSC_DMA, .block_num = 0U, diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c index 027e8bc5bc..aed0aa1765 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c @@ -29,7 +29,7 @@ #include "cycfg_peripherals.h" -cy_stc_csd_context_t cy_csd_0_context = +cy_stc_csd_context_t cy_csd_0_context = { .lockKey = CY_CSD_NONE_KEY, }; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c index 6cbec794cb..4adca0b709 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c @@ -29,7 +29,7 @@ #include "cycfg_pins.h" -const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config = +const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -46,14 +46,14 @@ const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_WCO_IN_obj = + const cyhal_resource_inst_t CYBSP_WCO_IN_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_WCO_IN_PORT_NUM, .channel_num = CYBSP_WCO_IN_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config = +const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -70,14 +70,14 @@ const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_WCO_OUT_obj = + const cyhal_resource_inst_t CYBSP_WCO_OUT_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_WCO_OUT_PORT_NUM, .channel_num = CYBSP_WCO_OUT_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CSD_RX_config = +const cy_stc_gpio_pin_config_t CYBSP_CSD_RX_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -94,14 +94,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_RX_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_RX_obj = + const cyhal_resource_inst_t CYBSP_CSD_RX_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CSD_RX_PORT_NUM, .channel_num = CYBSP_CSD_RX_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_SWO_config = +const cy_stc_gpio_pin_config_t CYBSP_SWO_config = { .outVal = 1, .driveMode = CY_GPIO_DM_STRONG_IN_OFF, @@ -118,14 +118,14 @@ const cy_stc_gpio_pin_config_t CYBSP_SWO_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_SWO_obj = + const cyhal_resource_inst_t CYBSP_SWO_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_SWO_PORT_NUM, .channel_num = CYBSP_SWO_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_SWDIO_config = +const cy_stc_gpio_pin_config_t CYBSP_SWDIO_config = { .outVal = 1, .driveMode = CY_GPIO_DM_PULLUP, @@ -142,14 +142,14 @@ const cy_stc_gpio_pin_config_t CYBSP_SWDIO_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_SWDIO_obj = + const cyhal_resource_inst_t CYBSP_SWDIO_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_SWDIO_PORT_NUM, .channel_num = CYBSP_SWDIO_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_SWDCK_config = +const cy_stc_gpio_pin_config_t CYBSP_SWDCK_config = { .outVal = 1, .driveMode = CY_GPIO_DM_PULLDOWN, @@ -166,14 +166,14 @@ const cy_stc_gpio_pin_config_t CYBSP_SWDCK_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_SWDCK_obj = + const cyhal_resource_inst_t CYBSP_SWDCK_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_SWDCK_PORT_NUM, .channel_num = CYBSP_SWDCK_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CINA_config = +const cy_stc_gpio_pin_config_t CYBSP_CINA_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -190,14 +190,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CINA_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CINA_obj = + const cyhal_resource_inst_t CYBSP_CINA_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CINA_PORT_NUM, .channel_num = CYBSP_CINA_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CINB_config = +const cy_stc_gpio_pin_config_t CYBSP_CINB_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -214,14 +214,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CINB_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CINB_obj = + const cyhal_resource_inst_t CYBSP_CINB_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CINB_PORT_NUM, .channel_num = CYBSP_CINB_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CMOD_config = +const cy_stc_gpio_pin_config_t CYBSP_CMOD_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -238,14 +238,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CMOD_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CMOD_obj = + const cyhal_resource_inst_t CYBSP_CMOD_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CMOD_PORT_NUM, .channel_num = CYBSP_CMOD_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN0_config = +const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN0_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -262,14 +262,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN0_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_BTN0_obj = + const cyhal_resource_inst_t CYBSP_CSD_BTN0_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CSD_BTN0_PORT_NUM, .channel_num = CYBSP_CSD_BTN0_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN1_config = +const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN1_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -286,14 +286,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN1_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_BTN1_obj = + const cyhal_resource_inst_t CYBSP_CSD_BTN1_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CSD_BTN1_PORT_NUM, .channel_num = CYBSP_CSD_BTN1_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD0_config = +const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD0_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -310,14 +310,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD0_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_SLD0_obj = + const cyhal_resource_inst_t CYBSP_CSD_SLD0_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CSD_SLD0_PORT_NUM, .channel_num = CYBSP_CSD_SLD0_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD1_config = +const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD1_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -334,14 +334,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD1_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_SLD1_obj = + const cyhal_resource_inst_t CYBSP_CSD_SLD1_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CSD_SLD1_PORT_NUM, .channel_num = CYBSP_CSD_SLD1_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD2_config = +const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD2_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -358,14 +358,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD2_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_SLD2_obj = + const cyhal_resource_inst_t CYBSP_CSD_SLD2_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CSD_SLD2_PORT_NUM, .channel_num = CYBSP_CSD_SLD2_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD3_config = +const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD3_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -382,14 +382,14 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD3_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_SLD3_obj = + const cyhal_resource_inst_t CYBSP_CSD_SLD3_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CSD_SLD3_PORT_NUM, .channel_num = CYBSP_CSD_SLD3_PIN, }; #endif //defined (CY_USING_HAL) -const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD4_config = +const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD4_config = { .outVal = 1, .driveMode = CY_GPIO_DM_ANALOG, @@ -406,7 +406,7 @@ const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD4_config = .vohSel = 0UL, }; #if defined (CY_USING_HAL) - const cyhal_resource_inst_t CYBSP_CSD_SLD4_obj = + const cyhal_resource_inst_t CYBSP_CSD_SLD4_obj = { .type = CYHAL_RSC_GPIO, .block_num = CYBSP_CSD_SLD4_PORT_NUM, diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h index 1c718e8c18..cf60c8dcb0 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.h @@ -63,7 +63,7 @@ extern "C" { #define CYBSP_WCO_IN_HAL_IRQ CYHAL_GPIO_IRQ_NONE #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_WCO_IN_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_WCO_IN_HAL_DIR CYHAL_GPIO_DIR_INPUT #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_WCO_IN_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG @@ -90,7 +90,7 @@ extern "C" { #define CYBSP_WCO_OUT_HAL_IRQ CYHAL_GPIO_IRQ_NONE #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_WCO_OUT_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_WCO_OUT_HAL_DIR CYHAL_GPIO_DIR_INPUT #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_WCO_OUT_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG @@ -246,7 +246,7 @@ extern "C" { #define CYBSP_CS_TX_RX_HAL_IRQ CYBSP_CSD_RX_HAL_IRQ #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CSD_RX_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CSD_RX_HAL_DIR CYHAL_GPIO_DIR_INPUT #define CYBSP_CS_RX_HAL_DIR CYBSP_CSD_RX_HAL_DIR #define CYBSP_CS_TX_RX_HAL_DIR CYBSP_CSD_RX_HAL_DIR #endif //defined (CY_USING_HAL) @@ -320,8 +320,8 @@ extern "C" { #if defined (CY_USING_HAL) #define CYBSP_DEBUG_UART_TX (P5_1) #define CYBSP_D1 CYBSP_DEBUG_UART_TX - #define CYBSP_DEBUG_UART_TX_PORT GPIO_PRT5 - #define CYBSP_DEBUG_UART_TX_PIN 1U + #define CYBSP_DEBUG_UART_TX_PORT GPIO_PRT5 + #define CYBSP_DEBUG_UART_TX_PIN 1U #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_DEBUG_UART_RTS (P5_2) @@ -373,7 +373,7 @@ extern "C" { #define CYBSP_SWO_HAL_IRQ CYHAL_GPIO_IRQ_NONE #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_SWO_HAL_DIR CYHAL_GPIO_DIR_OUTPUT + #define CYBSP_SWO_HAL_DIR CYHAL_GPIO_DIR_OUTPUT #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_SWO_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_STRONG @@ -400,7 +400,7 @@ extern "C" { #define CYBSP_SWDIO_HAL_IRQ CYHAL_GPIO_IRQ_NONE #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_SWDIO_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL + #define CYBSP_SWDIO_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_SWDIO_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_PULLUP @@ -427,7 +427,7 @@ extern "C" { #define CYBSP_SWDCK_HAL_IRQ CYHAL_GPIO_IRQ_NONE #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_SWDCK_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL + #define CYBSP_SWDCK_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_SWDCK_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_PULLDOWN @@ -454,7 +454,7 @@ extern "C" { #define CYBSP_CINA_HAL_IRQ CYHAL_GPIO_IRQ_NONE #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CINA_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CINA_HAL_DIR CYHAL_GPIO_DIR_INPUT #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_CINA_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG @@ -481,7 +481,7 @@ extern "C" { #define CYBSP_CINB_HAL_IRQ CYHAL_GPIO_IRQ_NONE #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CINB_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CINB_HAL_DIR CYHAL_GPIO_DIR_INPUT #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_CINB_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG @@ -518,7 +518,7 @@ extern "C" { #define CYBSP_CMOD_HAL_IRQ CYHAL_GPIO_IRQ_NONE #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CMOD_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CMOD_HAL_DIR CYHAL_GPIO_DIR_INPUT #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) #define CYBSP_CMOD_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG @@ -557,7 +557,7 @@ extern "C" { #define CYBSP_CS_BTN0_HAL_IRQ CYBSP_CSD_BTN0_HAL_IRQ #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CSD_BTN0_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CSD_BTN0_HAL_DIR CYHAL_GPIO_DIR_INPUT #define CYBSP_CS_BTN0_HAL_DIR CYBSP_CSD_BTN0_HAL_DIR #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) @@ -598,7 +598,7 @@ extern "C" { #define CYBSP_CS_BTN1_HAL_IRQ CYBSP_CSD_BTN1_HAL_IRQ #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CSD_BTN1_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CSD_BTN1_HAL_DIR CYHAL_GPIO_DIR_INPUT #define CYBSP_CS_BTN1_HAL_DIR CYBSP_CSD_BTN1_HAL_DIR #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) @@ -639,7 +639,7 @@ extern "C" { #define CYBSP_CS_SLD0_HAL_IRQ CYBSP_CSD_SLD0_HAL_IRQ #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CSD_SLD0_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CSD_SLD0_HAL_DIR CYHAL_GPIO_DIR_INPUT #define CYBSP_CS_SLD0_HAL_DIR CYBSP_CSD_SLD0_HAL_DIR #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) @@ -680,7 +680,7 @@ extern "C" { #define CYBSP_CS_SLD1_HAL_IRQ CYBSP_CSD_SLD1_HAL_IRQ #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CSD_SLD1_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CSD_SLD1_HAL_DIR CYHAL_GPIO_DIR_INPUT #define CYBSP_CS_SLD1_HAL_DIR CYBSP_CSD_SLD1_HAL_DIR #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) @@ -721,7 +721,7 @@ extern "C" { #define CYBSP_CS_SLD2_HAL_IRQ CYBSP_CSD_SLD2_HAL_IRQ #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CSD_SLD2_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CSD_SLD2_HAL_DIR CYHAL_GPIO_DIR_INPUT #define CYBSP_CS_SLD2_HAL_DIR CYBSP_CSD_SLD2_HAL_DIR #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) @@ -762,7 +762,7 @@ extern "C" { #define CYBSP_CS_SLD3_HAL_IRQ CYBSP_CSD_SLD3_HAL_IRQ #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CSD_SLD3_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CSD_SLD3_HAL_DIR CYHAL_GPIO_DIR_INPUT #define CYBSP_CS_SLD3_HAL_DIR CYBSP_CSD_SLD3_HAL_DIR #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) @@ -803,7 +803,7 @@ extern "C" { #define CYBSP_CS_SLD4_HAL_IRQ CYBSP_CSD_SLD4_HAL_IRQ #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - #define CYBSP_CSD_SLD4_HAL_DIR CYHAL_GPIO_DIR_INPUT + #define CYBSP_CSD_SLD4_HAL_DIR CYHAL_GPIO_DIR_INPUT #define CYBSP_CS_SLD4_HAL_DIR CYBSP_CSD_SLD4_HAL_DIR #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c index 8debcfbb74..e137a92baf 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c @@ -114,7 +114,7 @@ static cy_stc_pra_system_config_t srss_0_clock_0_secureConfig; #endif //defined (CY_DEVICE_SECURE) #if (!defined(CY_DEVICE_SECURE)) - static const cy_stc_fll_manual_config_t srss_0_clock_0_fll_0_fllConfig = + static const cy_stc_fll_manual_config_t srss_0_clock_0_fll_0_fllConfig = { .fllMult = 500U, .refDiv = 20U, @@ -129,7 +129,7 @@ }; #endif //(!defined(CY_DEVICE_SECURE)) #if defined (CY_USING_HAL) - const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj = + const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj = { .type = CYHAL_RSC_CLKPATH, .block_num = 0U, @@ -137,7 +137,7 @@ }; #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj = + const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj = { .type = CYHAL_RSC_CLKPATH, .block_num = 1U, @@ -145,7 +145,7 @@ }; #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj = + const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj = { .type = CYHAL_RSC_CLKPATH, .block_num = 2U, @@ -153,7 +153,7 @@ }; #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - const cyhal_resource_inst_t srss_0_clock_0_pathmux_3_obj = + const cyhal_resource_inst_t srss_0_clock_0_pathmux_3_obj = { .type = CYHAL_RSC_CLKPATH, .block_num = 3U, @@ -161,7 +161,7 @@ }; #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - const cyhal_resource_inst_t srss_0_clock_0_pathmux_4_obj = + const cyhal_resource_inst_t srss_0_clock_0_pathmux_4_obj = { .type = CYHAL_RSC_CLKPATH, .block_num = 4U, @@ -169,7 +169,7 @@ }; #endif //defined (CY_USING_HAL) #if defined (CY_USING_HAL) - const cyhal_resource_inst_t srss_0_clock_0_pathmux_5_obj = + const cyhal_resource_inst_t srss_0_clock_0_pathmux_5_obj = { .type = CYHAL_RSC_CLKPATH, .block_num = 5U, @@ -177,7 +177,7 @@ }; #endif //defined (CY_USING_HAL) #if (!defined(CY_DEVICE_SECURE)) - static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_0_pllConfig = + static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_0_pllConfig = { .feedbackDiv = 30, .referenceDiv = 1, @@ -198,467 +198,467 @@ __WEAK void __NO_RETURN cycfg_ClockStartupError(uint32_t error) #ifdef CY_CFG_PWR_ENABLED secure_config->powerEnable = CY_CFG_PWR_ENABLED; #endif /* CY_CFG_PWR_ENABLED */ - + #ifdef CY_CFG_PWR_USING_LDO secure_config->ldoEnable = CY_CFG_PWR_USING_LDO; #endif /* CY_CFG_PWR_USING_LDO */ - + #ifdef CY_CFG_PWR_USING_PMIC secure_config->pmicEnable = CY_CFG_PWR_USING_PMIC; #endif /* CY_CFG_PWR_USING_PMIC */ - + #ifdef CY_CFG_PWR_VBACKUP_USING_VDDD secure_config->vBackupVDDDEnable = CY_CFG_PWR_VBACKUP_USING_VDDD; #endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */ - + #ifdef CY_CFG_PWR_USING_ULP secure_config->ulpEnable = CY_CFG_PWR_USING_ULP; #endif /* CY_CFG_PWR_USING_ULP */ - + #ifdef CY_CFG_SYSCLK_ECO_ENABLED secure_config->ecoEnable = CY_CFG_SYSCLK_ECO_ENABLED; #endif /* CY_CFG_SYSCLK_ECO_ENABLED */ - + #ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED secure_config->extClkEnable = CY_CFG_SYSCLK_EXTCLK_ENABLED; #endif /* CY_CFG_SYSCLK_EXTCLK_ENABLED */ - + #ifdef CY_CFG_SYSCLK_ILO_ENABLED secure_config->iloEnable = CY_CFG_SYSCLK_ILO_ENABLED; #endif /* CY_CFG_SYSCLK_ILO_ENABLED */ - + #ifdef CY_CFG_SYSCLK_WCO_ENABLED secure_config->wcoEnable = CY_CFG_SYSCLK_WCO_ENABLED; #endif /* CY_CFG_SYSCLK_WCO_ENABLED */ - + #ifdef CY_CFG_SYSCLK_FLL_ENABLED secure_config->fllEnable = CY_CFG_SYSCLK_FLL_ENABLED; #endif /* CY_CFG_SYSCLK_FLL_ENABLED */ - + #ifdef CY_CFG_SYSCLK_PLL0_ENABLED secure_config->pll0Enable = CY_CFG_SYSCLK_PLL0_ENABLED; #endif /* CY_CFG_SYSCLK_PLL0_ENABLED */ - + #ifdef CY_CFG_SYSCLK_PLL1_ENABLED secure_config->pll1Enable = CY_CFG_SYSCLK_PLL1_ENABLED; #endif /* CY_CFG_SYSCLK_PLL1_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED secure_config->path0Enable = CY_CFG_SYSCLK_CLKPATH0_ENABLED; #endif /* CY_CFG_SYSCLK_CLKPATH0_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED secure_config->path1Enable = CY_CFG_SYSCLK_CLKPATH1_ENABLED; #endif /* CY_CFG_SYSCLK_CLKPATH1_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKPATH2_ENABLED secure_config->path2Enable = CY_CFG_SYSCLK_CLKPATH2_ENABLED; #endif /* CY_CFG_SYSCLK_CLKPATH2_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKPATH3_ENABLED secure_config->path3Enable = CY_CFG_SYSCLK_CLKPATH3_ENABLED; #endif /* CY_CFG_SYSCLK_CLKPATH3_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKPATH4_ENABLED secure_config->path4Enable = CY_CFG_SYSCLK_CLKPATH4_ENABLED; #endif /* CY_CFG_SYSCLK_CLKPATH4_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKPATH5_ENABLED secure_config->path5Enable = CY_CFG_SYSCLK_CLKPATH5_ENABLED; #endif /* CY_CFG_SYSCLK_CLKPATH5_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED secure_config->clkFastEnable = CY_CFG_SYSCLK_CLKFAST_ENABLED; #endif /* CY_CFG_SYSCLK_CLKFAST_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED secure_config->clkPeriEnable = CY_CFG_SYSCLK_CLKPERI_ENABLED; #endif /* CY_CFG_SYSCLK_CLKPERI_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED secure_config->clkSlowEnable = CY_CFG_SYSCLK_CLKSLOW_ENABLED; #endif /* CY_CFG_SYSCLK_CLKSLOW_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKHF0_ENABLED secure_config->clkHF0Enable = CY_CFG_SYSCLK_CLKHF0_ENABLED; #endif /* CY_CFG_SYSCLK_CLKHF0_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED secure_config->clkHF1Enable = CY_CFG_SYSCLK_CLKHF1_ENABLED; #endif /* CY_CFG_SYSCLK_CLKHF1_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKHF2_ENABLED secure_config->clkHF2Enable = CY_CFG_SYSCLK_CLKHF2_ENABLED; #endif /* CY_CFG_SYSCLK_CLKHF2_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKHF3_ENABLED secure_config->clkHF3Enable = CY_CFG_SYSCLK_CLKHF3_ENABLED; #endif /* CY_CFG_SYSCLK_CLKHF3_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKHF4_ENABLED secure_config->clkHF4Enable = CY_CFG_SYSCLK_CLKHF4_ENABLED; #endif /* CY_CFG_SYSCLK_CLKHF4_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKHF5_ENABLED secure_config->clkHF5Enable = CY_CFG_SYSCLK_CLKHF5_ENABLED; #endif /* CY_CFG_SYSCLK_CLKHF5_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED secure_config->clkPumpEnable = CY_CFG_SYSCLK_CLKPUMP_ENABLED; #endif /* CY_CFG_SYSCLK_CLKPUMP_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKLF_ENABLED secure_config->clkLFEnable = CY_CFG_SYSCLK_CLKLF_ENABLED; #endif /* CY_CFG_SYSCLK_CLKLF_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED secure_config->clkBakEnable = CY_CFG_SYSCLK_CLKBAK_ENABLED; #endif /* CY_CFG_SYSCLK_CLKBAK_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED secure_config->clkTimerEnable = CY_CFG_SYSCLK_CLKTIMER_ENABLED; #endif /* CY_CFG_SYSCLK_CLKTIMER_ENABLED */ - + #ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED - #error Configuration Error : ALT SYSTICK cannot be enabled for Secure devices. + #error Configuration Error : ALT SYSTICK cannot be enabled for Secure devices. #endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED */ - + #ifdef CY_CFG_SYSCLK_PILO_ENABLED secure_config->piloEnable = CY_CFG_SYSCLK_PILO_ENABLED; #endif /* CY_CFG_SYSCLK_PILO_ENABLED */ - + #ifdef CY_CFG_SYSCLK_ALTHF_ENABLED secure_config->clkAltHfEnable = CY_CFG_SYSCLK_ALTHF_ENABLED; #endif /* CY_CFG_SYSCLK_ALTHF_ENABLED */ - + #ifdef CY_CFG_PWR_LDO_VOLTAGE secure_config->ldoVoltage = CY_CFG_PWR_LDO_VOLTAGE; #endif /* CY_CFG_PWR_LDO_VOLTAGE */ - + #ifdef CY_CFG_PWR_REGULATOR_MODE_MIN secure_config->pwrCurrentModeMin = CY_CFG_PWR_REGULATOR_MODE_MIN; #endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */ - + #ifdef CY_CFG_PWR_BUCK_VOLTAGE secure_config->buckVoltage = CY_CFG_PWR_BUCK_VOLTAGE; #endif /* CY_CFG_PWR_BUCK_VOLTAGE */ - + #ifdef CY_CFG_SYSCLK_ECO_FREQ secure_config->ecoFreqHz = CY_CFG_SYSCLK_ECO_FREQ; #endif /* CY_CFG_SYSCLK_ECO_FREQ */ - + #ifdef CY_CFG_SYSCLK_ECO_CLOAD secure_config->ecoLoad = CY_CFG_SYSCLK_ECO_CLOAD; #endif /* CY_CFG_SYSCLK_ECO_CLOAD */ - + #ifdef CY_CFG_SYSCLK_ECO_ESR secure_config->ecoEsr = CY_CFG_SYSCLK_ECO_ESR; #endif /* CY_CFG_SYSCLK_ECO_ESR */ - + #ifdef CY_CFG_SYSCLK_ECO_DRIVE_LEVEL secure_config->ecoDriveLevel = CY_CFG_SYSCLK_ECO_DRIVE_LEVEL; #endif /* CY_CFG_SYSCLK_ECO_DRIVE_LEVEL */ - + #ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PRT secure_config->ecoInPort = CY_CFG_SYSCLK_ECO_GPIO_IN_PRT; #endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PRT */ - + #ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT secure_config->ecoOutPort = CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT; #endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT */ - + #ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PIN secure_config->ecoInPinNum = CY_CFG_SYSCLK_ECO_GPIO_IN_PIN; #endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PIN */ - + #ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN secure_config->ecoOutPinNum = CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN; #endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN */ - + #ifdef CY_CFG_SYSCLK_EXTCLK_FREQ secure_config->extClkFreqHz = CY_CFG_SYSCLK_EXTCLK_FREQ; #endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */ - + #ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PRT secure_config->extClkPort = CY_CFG_SYSCLK_EXTCLK_GPIO_PRT; #endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PRT */ - + #ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PIN secure_config->extClkPinNum = CY_CFG_SYSCLK_EXTCLK_GPIO_PIN; #endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PIN */ - + #ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM secure_config->extClkHsiom = CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM; #endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM */ - + #ifdef CY_CFG_SYSCLK_ILO_HIBERNATE secure_config->iloHibernateON = CY_CFG_SYSCLK_ILO_HIBERNATE; #endif /* CY_CFG_SYSCLK_ILO_HIBERNATE */ - + #ifdef CY_CFG_SYSCLK_WCO_BYPASS secure_config->bypassEnable = CY_CFG_SYSCLK_WCO_BYPASS; #endif /* CY_CFG_SYSCLK_WCO_BYPASS */ - + #ifdef CY_CFG_SYSCLK_WCO_IN_PRT secure_config->wcoInPort = CY_CFG_SYSCLK_WCO_IN_PRT; #endif /* CY_CFG_SYSCLK_WCO_IN_PRT */ - + #ifdef CY_CFG_SYSCLK_WCO_OUT_PRT secure_config->wcoOutPort = CY_CFG_SYSCLK_WCO_OUT_PRT; #endif /* CY_CFG_SYSCLK_WCO_OUT_PRT */ - + #ifdef CY_CFG_SYSCLK_WCO_IN_PIN secure_config->wcoInPinNum = CY_CFG_SYSCLK_WCO_IN_PIN; #endif /* CY_CFG_SYSCLK_WCO_IN_PIN */ - + #ifdef CY_CFG_SYSCLK_WCO_OUT_PIN secure_config->wcoOutPinNum = CY_CFG_SYSCLK_WCO_OUT_PIN; #endif /* CY_CFG_SYSCLK_WCO_OUT_PIN */ - + #ifdef CY_CFG_SYSCLK_FLL_OUT_FREQ secure_config->fllOutFreqHz = CY_CFG_SYSCLK_FLL_OUT_FREQ; #endif /* CY_CFG_SYSCLK_FLL_OUT_FREQ */ - + #ifdef CY_CFG_SYSCLK_FLL_MULT secure_config->fllMult = CY_CFG_SYSCLK_FLL_MULT; #endif /* CY_CFG_SYSCLK_FLL_MULT */ - + #ifdef CY_CFG_SYSCLK_FLL_REFDIV secure_config->fllRefDiv = CY_CFG_SYSCLK_FLL_REFDIV; #endif /* CY_CFG_SYSCLK_FLL_REFDIV */ - + #ifdef CY_CFG_SYSCLK_FLL_CCO_RANGE secure_config->fllCcoRange = CY_CFG_SYSCLK_FLL_CCO_RANGE; #endif /* CY_CFG_SYSCLK_FLL_CCO_RANGE */ - + #ifdef CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV secure_config->enableOutputDiv = CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV; #endif /* CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV */ - + #ifdef CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE secure_config->lockTolerance = CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE; #endif /* CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE */ - + #ifdef CY_CFG_SYSCLK_FLL_IGAIN secure_config->igain = CY_CFG_SYSCLK_FLL_IGAIN; #endif /* CY_CFG_SYSCLK_FLL_IGAIN */ - + #ifdef CY_CFG_SYSCLK_FLL_PGAIN secure_config->pgain = CY_CFG_SYSCLK_FLL_PGAIN; #endif /* CY_CFG_SYSCLK_FLL_PGAIN */ - + #ifdef CY_CFG_SYSCLK_FLL_SETTLING_COUNT secure_config->settlingCount = CY_CFG_SYSCLK_FLL_SETTLING_COUNT; #endif /* CY_CFG_SYSCLK_FLL_SETTLING_COUNT */ - + #ifdef CY_CFG_SYSCLK_FLL_OUTPUT_MODE secure_config->outputMode = CY_CFG_SYSCLK_FLL_OUTPUT_MODE; #endif /* CY_CFG_SYSCLK_FLL_OUTPUT_MODE */ - + #ifdef CY_CFG_SYSCLK_FLL_CCO_FREQ secure_config->ccoFreq = CY_CFG_SYSCLK_FLL_CCO_FREQ; #endif /* CY_CFG_SYSCLK_FLL_CCO_FREQ */ - + #ifdef CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV secure_config->pll0FeedbackDiv = CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV; #endif /* CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV */ - + #ifdef CY_CFG_SYSCLK_PLL0_REFERENCE_DIV secure_config->pll0ReferenceDiv = CY_CFG_SYSCLK_PLL0_REFERENCE_DIV; #endif /* CY_CFG_SYSCLK_PLL0_REFERENCE_DIV */ - + #ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_DIV secure_config->pll0OutputDiv = CY_CFG_SYSCLK_PLL0_OUTPUT_DIV; #endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_DIV */ - + #ifdef CY_CFG_SYSCLK_PLL0_LF_MODE secure_config->pll0LfMode = CY_CFG_SYSCLK_PLL0_LF_MODE; #endif /* CY_CFG_SYSCLK_PLL0_LF_MODE */ - + #ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_MODE secure_config->pll0OutputMode = CY_CFG_SYSCLK_PLL0_OUTPUT_MODE; #endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_MODE */ - + #ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ secure_config->pll0OutFreqHz = CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ; #endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ */ - + #ifdef CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV secure_config->pll1FeedbackDiv = CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV; #endif /* CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV */ - + #ifdef CY_CFG_SYSCLK_PLL1_REFERENCE_DIV secure_config->pll1ReferenceDiv = CY_CFG_SYSCLK_PLL1_REFERENCE_DIV; #endif /* CY_CFG_SYSCLK_PLL1_REFERENCE_DIV */ - + #ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_DIV secure_config->pll1OutputDiv = CY_CFG_SYSCLK_PLL1_OUTPUT_DIV; #endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_DIV */ - + #ifdef CY_CFG_SYSCLK_PLL1_LF_MODE secure_config->pll1LfMode = CY_CFG_SYSCLK_PLL1_LF_MODE; #endif /* CY_CFG_SYSCLK_PLL1_LF_MODE */ - + #ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_MODE secure_config->pll1OutputMode = CY_CFG_SYSCLK_PLL1_OUTPUT_MODE; #endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_MODE */ - + #ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ secure_config->pll1OutFreqHz = CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ; #endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ */ - + #ifdef CY_CFG_SYSCLK_CLKPATH0_SOURCE secure_config->path0Src = CY_CFG_SYSCLK_CLKPATH0_SOURCE; #endif /* CY_CFG_SYSCLK_CLKPATH0_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKPATH1_SOURCE secure_config->path1Src = CY_CFG_SYSCLK_CLKPATH1_SOURCE; #endif /* CY_CFG_SYSCLK_CLKPATH1_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKPATH2_SOURCE secure_config->path2Src = CY_CFG_SYSCLK_CLKPATH2_SOURCE; #endif /* CY_CFG_SYSCLK_CLKPATH2_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKPATH3_SOURCE secure_config->path3Src = CY_CFG_SYSCLK_CLKPATH3_SOURCE; #endif /* CY_CFG_SYSCLK_CLKPATH3_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKPATH4_SOURCE secure_config->path4Src = CY_CFG_SYSCLK_CLKPATH4_SOURCE; #endif /* CY_CFG_SYSCLK_CLKPATH4_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKPATH5_SOURCE secure_config->path5Src = CY_CFG_SYSCLK_CLKPATH5_SOURCE; #endif /* CY_CFG_SYSCLK_CLKPATH5_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKFAST_DIVIDER secure_config->clkFastDiv = CY_CFG_SYSCLK_CLKFAST_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKFAST_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKPERI_DIVIDER secure_config->clkPeriDiv = CY_CFG_SYSCLK_CLKPERI_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKPERI_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKSLOW_DIVIDER secure_config->clkSlowDiv = CY_CFG_SYSCLK_CLKSLOW_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKSLOW_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKHF0_CLKPATH secure_config->hf0Source = CY_CFG_SYSCLK_CLKHF0_CLKPATH; #endif /* CY_CFG_SYSCLK_CLKHF0_CLKPATH */ - + #ifdef CY_CFG_SYSCLK_CLKHF0_DIVIDER secure_config->hf0Divider = CY_CFG_SYSCLK_CLKHF0_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKHF0_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ secure_config->hf0OutFreqMHz = CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ; #endif /* CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ */ - + #ifdef CY_CFG_SYSCLK_CLKHF1_CLKPATH secure_config->hf1Source = CY_CFG_SYSCLK_CLKHF1_CLKPATH; #endif /* CY_CFG_SYSCLK_CLKHF1_CLKPATH */ - + #ifdef CY_CFG_SYSCLK_CLKHF1_DIVIDER secure_config->hf1Divider = CY_CFG_SYSCLK_CLKHF1_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKHF1_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ secure_config->hf1OutFreqMHz = CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ; #endif /* CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ */ - + #ifdef CY_CFG_SYSCLK_CLKHF2_CLKPATH secure_config->hf2Source = CY_CFG_SYSCLK_CLKHF2_CLKPATH; #endif /* CY_CFG_SYSCLK_CLKHF2_CLKPATH */ - + #ifdef CY_CFG_SYSCLK_CLKHF2_DIVIDER secure_config->hf2Divider = CY_CFG_SYSCLK_CLKHF2_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKHF2_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ secure_config->hf2OutFreqMHz = CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ; #endif /* CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ */ - + #ifdef CY_CFG_SYSCLK_CLKHF3_CLKPATH secure_config->hf3Source = CY_CFG_SYSCLK_CLKHF3_CLKPATH; #endif /* CY_CFG_SYSCLK_CLKHF3_CLKPATH */ - + #ifdef CY_CFG_SYSCLK_CLKHF3_DIVIDER secure_config->hf3Divider = CY_CFG_SYSCLK_CLKHF3_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKHF3_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ secure_config->hf3OutFreqMHz = CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ; #endif /* CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ */ - + #ifdef CY_CFG_SYSCLK_CLKHF4_CLKPATH secure_config->hf4Source = CY_CFG_SYSCLK_CLKHF4_CLKPATH; #endif /* CY_CFG_SYSCLK_CLKHF4_CLKPATH */ - + #ifdef CY_CFG_SYSCLK_CLKHF4_DIVIDER secure_config->hf4Divider = CY_CFG_SYSCLK_CLKHF4_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKHF4_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ secure_config->hf4OutFreqMHz = CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ; #endif /* CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ */ - + #ifdef CY_CFG_SYSCLK_CLKHF5_CLKPATH secure_config->hf5Source = CY_CFG_SYSCLK_CLKHF5_CLKPATH; #endif /* CY_CFG_SYSCLK_CLKHF5_CLKPATH */ - + #ifdef CY_CFG_SYSCLK_CLKHF5_DIVIDER secure_config->hf5Divider = CY_CFG_SYSCLK_CLKHF5_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKHF5_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ secure_config->hf5OutFreqMHz = CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ; #endif /* CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ */ - + #ifdef CY_CFG_SYSCLK_CLKPUMP_SOURCE secure_config->pumpSource = CY_CFG_SYSCLK_CLKPUMP_SOURCE; #endif /* CY_CFG_SYSCLK_CLKPUMP_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKPUMP_DIVIDER secure_config->pumpDivider = CY_CFG_SYSCLK_CLKPUMP_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKPUMP_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKLF_SOURCE secure_config->clkLfSource = CY_CFG_SYSCLK_CLKLF_SOURCE; #endif /* CY_CFG_SYSCLK_CLKLF_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKBAK_SOURCE secure_config->clkBakSource = CY_CFG_SYSCLK_CLKBAK_SOURCE; #endif /* CY_CFG_SYSCLK_CLKBAK_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKTIMER_SOURCE secure_config->clkTimerSource = CY_CFG_SYSCLK_CLKTIMER_SOURCE; #endif /* CY_CFG_SYSCLK_CLKTIMER_SOURCE */ - + #ifdef CY_CFG_SYSCLK_CLKTIMER_DIVIDER secure_config->clkTimerDivider = CY_CFG_SYSCLK_CLKTIMER_DIVIDER; #endif /* CY_CFG_SYSCLK_CLKTIMER_DIVIDER */ - + #ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE secure_config->clkSrcAltSysTick = CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE; #endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE */ - + #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD secure_config->altHFcLoad = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD; #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD */ - + #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME secure_config->altHFxtalStartUpTime = CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME; #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME */ - + #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ secure_config->altHFclkFreq = CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ; #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ */ - + #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV secure_config->altHFsysClkDiv = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV; #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV */ - + #ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR secure_config->altHFvoltageReg = CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR; #endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR */ @@ -872,7 +872,7 @@ void init_cycfg_system(void) #if (((CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM <= 5UL)) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 5UL)) #error Configuration Error : ALTHF, ILO, PILO cannot drive HF0. #endif - + configStatus = CY_PRA_FUNCTION_CALL_RETURN_PARAM(CY_PRA_MSG_TYPE_SYS_CFG_FUNC, CY_PRA_FUNC_INIT_CYCFG_DEVICE, &srss_0_clock_0_secureConfig); @@ -885,7 +885,7 @@ void init_cycfg_system(void) Cy_SysClk_ExtClkSetFrequency(CY_CFG_SYSCLK_EXTCLK_FREQ); #endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */ #else /* defined(CY_DEVICE_SECURE) */ - + /* Set worst case memory wait states (! ultra low power, 150 MHz), will update at the end */ Cy_SysLib_SetWaitStates(false, 150UL); #ifdef CY_CFG_PWR_ENABLED @@ -895,7 +895,7 @@ void init_cycfg_system(void) #warning Power system will not be configured. Update power personality to v1.20 or later. #endif /* CY_CFG_PWR_INIT */ #endif /* CY_CFG_PWR_ENABLED */ - + /* Reset the core clock path to default and disable all the FLLs/PLLs */ Cy_SysClk_ClkHfSetDivider(0U, CY_SYSCLK_CLKHF_NO_DIVIDE); Cy_SysClk_ClkFastSetDivider(0U); @@ -906,61 +906,61 @@ void init_cycfg_system(void) (void)Cy_SysClk_PllDisable(pll); } Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH1, CY_SYSCLK_CLKPATH_IN_IMO); - + if ((CY_SYSCLK_CLKHF_IN_CLKPATH0 == Cy_SysClk_ClkHfGetSource(0UL)) && (CY_SYSCLK_CLKPATH_IN_WCO == Cy_SysClk_ClkPathGetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0))) { Cy_SysClk_ClkHfSetSource(0U, CY_SYSCLK_CLKHF_IN_CLKPATH1); } - + Cy_SysClk_FllDisable(); Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0, CY_SYSCLK_CLKPATH_IN_IMO); Cy_SysClk_ClkHfSetSource(0UL, CY_SYSCLK_CLKHF_IN_CLKPATH0); #ifdef CY_IP_MXBLESS (void)Cy_BLE_EcoReset(); #endif - - + + /* Enable all source clocks */ #ifdef CY_CFG_SYSCLK_PILO_ENABLED Cy_SysClk_PiloInit(); #endif - + #ifdef CY_CFG_SYSCLK_WCO_ENABLED Cy_SysClk_WcoInit(); #endif - + #ifdef CY_CFG_SYSCLK_CLKLF_ENABLED Cy_SysClk_ClkLfInit(); #endif - + #if (defined(CY_IP_M4CPUSS) && CY_CFG_SYSCLK_ALTHF_ENABLED) Cy_SysClk_AltHfInit(); #endif /* (defined(CY_IP_M4CPUSS) && CY_CFG_SYSCLK_ALTHF_ENABLED */ - + #ifdef CY_CFG_SYSCLK_ECO_ENABLED Cy_SysClk_EcoInit(); #endif - + #ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED Cy_SysClk_ExtClkInit(); #endif - + /* Configure CPU clock dividers */ #ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED Cy_SysClk_ClkFastInit(); #endif - + #ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED Cy_SysClk_ClkPeriInit(); #endif - + #ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED Cy_SysClk_ClkSlowInit(); #endif - + #if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM == 0x6UL) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0U)) /* Configure HFCLK0 to temporarily run from IMO to initialize other clocks */ Cy_SysClk_ClkPathSetSource(1UL, CY_SYSCLK_CLKPATH_IN_IMO); @@ -970,7 +970,7 @@ void init_cycfg_system(void) Cy_SysClk_ClkPath1Init(); #endif #endif - + /* Configure Path Clocks */ #ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED Cy_SysClk_ClkPath0Init(); @@ -1017,21 +1017,21 @@ void init_cycfg_system(void) #ifdef CY_CFG_SYSCLK_CLKPATH15_ENABLED Cy_SysClk_ClkPath15Init(); #endif - + /* Configure and enable FLL */ #ifdef CY_CFG_SYSCLK_FLL_ENABLED Cy_SysClk_FllInit(); #endif - + Cy_SysClk_ClkHf0Init(); - + #if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM == 0x6UL) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0U)) #ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED /* Apply the ClkPath1 user setting */ Cy_SysClk_ClkPath1Init(); #endif #endif - + /* Configure and enable PLLs */ #ifdef CY_CFG_SYSCLK_PLL0_ENABLED Cy_SysClk_Pll0Init(); @@ -1078,7 +1078,7 @@ void init_cycfg_system(void) #ifdef CY_CFG_SYSCLK_PLL14_ENABLED Cy_SysClk_Pll14Init(); #endif - + /* Configure HF clocks */ #ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED Cy_SysClk_ClkHf1Init(); @@ -1125,53 +1125,53 @@ void init_cycfg_system(void) #ifdef CY_CFG_SYSCLK_CLKHF15_ENABLED Cy_SysClk_ClkHf15Init(); #endif - + /* Configure miscellaneous clocks */ #ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED Cy_SysClk_ClkTimerInit(); #endif - + #ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED Cy_SysClk_ClkAltSysTickInit(); #endif - + #ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED Cy_SysClk_ClkPumpInit(); #endif - + #ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED Cy_SysClk_ClkBakInit(); #endif - + /* Configure default enabled clocks */ #ifdef CY_CFG_SYSCLK_ILO_ENABLED Cy_SysClk_IloInit(); #endif - + #ifndef CY_CFG_SYSCLK_IMO_ENABLED #error the IMO must be enabled for proper chip operation #endif - + #ifndef CY_CFG_SYSCLK_CLKHF0_ENABLED #error the CLKHF0 must be enabled for proper chip operation #endif - + #endif /* defined(CY_DEVICE_SECURE) */ - + #ifdef CY_CFG_SYSCLK_MFO_ENABLED Cy_SysClk_MfoInit(); #endif - + #ifdef CY_CFG_SYSCLK_CLKMF_ENABLED Cy_SysClk_ClkMfInit(); #endif - + #if (!defined(CY_DEVICE_SECURE)) /* Set accurate flash wait states */ #if (defined (CY_CFG_PWR_ENABLED) && defined (CY_CFG_SYSCLK_CLKHF0_ENABLED)) Cy_SysLib_SetWaitStates(CY_CFG_PWR_USING_ULP != 0, CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ); #endif - + /* Update System Core Clock values for correct Cy_SysLib_Delay functioning */ SystemCoreClockUpdate(); #ifndef CY_CFG_SYSCLK_ILO_ENABLED @@ -1182,9 +1182,9 @@ void init_cycfg_system(void) Cy_SysClk_IloDisable(); Cy_SysClk_IloHibernateOn(false); #endif - + #endif /* (!defined(CY_DEVICE_SECURE)) */ - + #if defined (CY_USING_HAL) cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_0_obj); diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/cybsp_doc.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/cybsp_doc.h index 495a859901..676746fce7 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/cybsp_doc.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/cybsp_doc.h @@ -740,7 +740,7 @@ extern "C" { /** * \addtogroup group_bsp_pins_capsense Capsense * \{ - * Pins connected to CAPSENSE™ sensors on the board. + * Pins connected to CAPSENSEâ„¢ sensors on the board. */ #ifdef CYBSP_CSD_TX diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense.h index 494a7fdf72..2156fe2a17 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense.h @@ -403,8 +403,8 @@ * * * \note -* * To select values for the Scan mode and Sensor connection method parameters (for the fifth-generation of the CAPSENSE™ HW) -* navigate to the Advanced tab in the CAPSENSE™ Configurator tool, and then select the General settings sub-tab. +* * To select values for the Scan mode and Sensor connection method parameters (for the fifth-generation of the CAPSENSE™ HW) +* navigate to the Advanced tab in the CAPSENSE™ Configurator tool, and then select the General settings sub-tab. * * * For the forth-generation of the CAPSENSE™ HW, the IntDrv mode with the AMUX sensor connection type is available only. * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_centroid.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_centroid.c index f19c348b11..0f64fcd9bf 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_centroid.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_centroid.c @@ -110,13 +110,13 @@ * bigger sum of neighboring sensors is taken for further processing. Then the position * is calculated using centroid algorithm with three sensors. * -* At least two neighboring sensors should cross finger threshold. Then the algorithm +* At least two neighboring sensors should cross finger threshold. Then the algorithm * is able to distinguish where real touch is located (direct part of slider or -* diplex part of slider) and corresponding position is reported. Otherwise no +* diplex part of slider) and corresponding position is reported. Otherwise no * touch is reported. * * This function does not detect two or more touches. -* +* * \param newTouch * The pointer to the touch structure where found position is stored. * @@ -135,7 +135,7 @@ void Cy_CapSense_DpCentroidDiplex( const cy_stc_capsense_sensor_context_t * ptrSnsCxt; const uint8_t * ptrDpxTable; uint32_t snsCount = ptrWdConfig->numSns; - + uint32_t maxSum = 0u; uint32_t maxDiff = 0u; uint32_t maxIndex = CY_CAPSENSE_NO_LOCAL_MAX; @@ -144,10 +144,10 @@ void Cy_CapSense_DpCentroidDiplex( int32_t denominator = 0; uint32_t multiplier; uint32_t offset; - + threshold -= ptrWdConfig->ptrWdContext->hysteresis; ptrDpxTable = ptrWdConfig->ptrDiplexTable; - + /* Find maximum signal */ ptrSnsCxt = ptrWdConfig->ptrSnsContext; for (snsIndex = 0u; snsIndex < snsCount; snsIndex++) @@ -183,7 +183,7 @@ void Cy_CapSense_DpCentroidDiplex( } } } - + if ((maxIndex != CY_CAPSENSE_NO_LOCAL_MAX) && (maxSum > 0u)) { multiplier = (uint32_t)ptrWdConfig->xResolution << 8u; @@ -198,10 +198,10 @@ void Cy_CapSense_DpCentroidDiplex( multiplier /= (snsCount << 1u); offset = multiplier >> 1u; } - + denominator = (int32_t)maxSum; denominator = ((numerator * (int32_t)multiplier) / denominator) + (((int32_t)maxIndex * (int32_t)multiplier) + (int32_t)offset); - + /* Round result and shift 8 bits left */ newTouch->numPosition = CY_CAPSENSE_POSITION_ONE; newTouch->ptrPosition[0u].x = (uint16_t)(((uint32_t)denominator + CY_CAPSENSE_CENTROID_ROUND_VALUE) >> 8u); @@ -224,12 +224,12 @@ void Cy_CapSense_DpCentroidDiplex( * Finds touch position of a Linear slider widget. * * In scope of position searching this function finds the local maximum with the -* highest raw count. If such maximums are more than one, then the maximum with +* highest raw count. If such maximums are more than one, then the maximum with * bigger sum of neighboring sensors is taken for further processing. Then the position * is calculated using centroid algorithm with three sensors. * * This function does not detect two or more touches. -* +* * \param newTouch * The pointer to the touch structure where the found position is stored. * @@ -273,7 +273,7 @@ void Cy_CapSense_DpCentroidLinear( } ptrSnsCxt++; } - + /* Find index of sensor with maximum signal */ ptrSnsCxt = ptrWdConfig->ptrSnsContext; for (snsIndex = 0u; snsIndex < snsCount; snsIndex++) @@ -295,9 +295,9 @@ void Cy_CapSense_DpCentroidLinear( } ptrSnsCxt++; } - + if ((maxIndex != CY_CAPSENSE_NO_LOCAL_MAX) && (maxSum > 0u)) - { + { /* Calculate position */ multiplier = (uint32_t)ptrWdConfig->xResolution << 8u; if (0u == (ptrWdConfig->centroidConfig & CY_CAPSENSE_CALC_METHOD_MASK)) @@ -310,9 +310,9 @@ void Cy_CapSense_DpCentroidLinear( multiplier /= snsCount; offset = multiplier >> 1u; } - + denominator = (int32_t)maxSum; - denominator = ((numerator * (int32_t)multiplier) / denominator) + (((int32_t)maxIndex * (int32_t)multiplier) + (int32_t)offset); + denominator = ((numerator * (int32_t)multiplier) / denominator) + (((int32_t)maxIndex * (int32_t)multiplier) + (int32_t)offset); /* Round result and shift 8 bits left */ newTouch->numPosition = CY_CAPSENSE_POSITION_ONE; @@ -340,12 +340,12 @@ void Cy_CapSense_DpCentroidLinear( * Finds touch position of a Radial slider widget. * * In scope of position searching this function finds the local maximum with the -* highest raw count. If such maximums are more than one, then the maximum with +* highest raw count. If such maximums are more than one, then the maximum with * bigger sum of neighboring sensors is taken for further processing. Then the position * is calculated using centroid algorithm with three sensors. * * This function does not detect two or more touches. -* +* * \param newTouch * The pointer to the touch structure where found position is stored. * @@ -359,7 +359,7 @@ void Cy_CapSense_DpCentroidRadial( { uint32_t snsIndex = 0u; uint32_t snsCount = ptrWdConfig->numSns; - + uint32_t diffM; uint32_t diffP; uint32_t sum = 0u; @@ -370,7 +370,7 @@ void Cy_CapSense_DpCentroidRadial( int32_t numerator = 0; int32_t denominator = 0; uint32_t multiplier; - + if (1u == (ptrWdConfig->centroidConfig & CY_CAPSENSE_CENTROID_NUMBER_MASK)) { /* Find maximum signal */ @@ -383,7 +383,7 @@ void Cy_CapSense_DpCentroidRadial( } ptrSnsCxt++; } - + /* Find index of sensor with maximum signal */ ptrSnsCxt = ptrWdConfig->ptrSnsContext; for (snsIndex = 0u; snsIndex < snsCount; snsIndex++) @@ -407,10 +407,10 @@ void Cy_CapSense_DpCentroidRadial( } if ((maxIndex != CY_CAPSENSE_NO_LOCAL_MAX) && (maxSum > 0u)) - { + { /* Calculate position */ multiplier = ((uint32_t)ptrWdConfig->xResolution << 8u) / snsCount; - + denominator = (int32_t)maxSum; denominator = ((numerator * (int32_t)multiplier) / denominator) + ((int32_t)maxIndex * (int32_t)multiplier); @@ -443,12 +443,12 @@ void Cy_CapSense_DpCentroidRadial( * Finds touch position of a CSD Touchpad widget. * * In scope of position searching this function finds the local maximum with the -* highest raw count. If such maximums are more than one, then the maximum with +* highest raw count. If such maximums are more than one, then the maximum with * bigger sum of neighboring sensors is taken for further processing. Then the position * is calculated using centroid algorithm with three sensors. * * This function does not detect two or more touches. -* +* * \param newTouch * The pointer to the touch structure where found position is stored. * @@ -505,7 +505,7 @@ void Cy_CapSense_DpCentroidTouchpad( } ptrSnsCxt++; } - + /* Find index of sensor with maximum signal */ ptrSnsCxt = ptrWdConfig->ptrSnsContext; for (snsIndex = 0u; snsIndex < colCount; snsIndex++) @@ -528,9 +528,9 @@ void Cy_CapSense_DpCentroidTouchpad( } ptrSnsCxt++; } - + if ((maxIndex != CY_CAPSENSE_NO_LOCAL_MAX) && (maxSum > 0u)) - { + { /* Calculate position */ multiplier = (uint32_t)ptrWdConfig->xResolution << 8u; if (0u == (ptrWdConfig->centroidConfig & CY_CAPSENSE_CALC_METHOD_MASK)) @@ -638,11 +638,11 @@ void Cy_CapSense_DpCentroidTouchpad( * Function Name: Cy_CapSense_DpAdvancedCentroidTouchpad ****************************************************************************//** * -* Finds touch position of a CSD touchpad widget using an advanced centroid +* Finds touch position of a CSD touchpad widget using an advanced centroid * algorithm. * * This function is able to detect two touch positions using a centroid algorithm -* with matrix 5*5 of sensors and virtual sensors on the edges. +* with matrix 5*5 of sensors and virtual sensors on the edges. * * \param newTouch * The pointer to the touch structure where the found position is stored. @@ -659,7 +659,7 @@ void Cy_CapSense_DpAdvancedCentroidTouchpad( const cy_stc_capsense_sensor_context_t * ptrSnsIndex = ptrWdConfig->ptrSnsContext; uint16_t * ptrDiffIndex = ptrWdConfig->ptrCsdTouchBuffer; cy_stc_capsense_advanced_centroid_config_t advCfg; - + advCfg.fingerTh = ptrWdConfig->ptrWdContext->fingerTh; advCfg.penultimateTh = ptrWdConfig->advConfig.penultimateTh; advCfg.virtualSnsTh = ptrWdConfig->advConfig.virtualSnsTh; @@ -670,7 +670,7 @@ void Cy_CapSense_DpAdvancedCentroidTouchpad( advCfg.crossCouplingTh = ptrWdConfig->advConfig.crossCouplingTh; advCfg.edgeCorrectionEn = 0u; advCfg.twoFingersEn = 0u; - + if ((ptrWdConfig->centroidConfig & CY_CAPSENSE_CENTROID_NUMBER_MASK) > CY_CAPSENSE_POSITION_ONE) { advCfg.twoFingersEn = 1u; @@ -683,10 +683,10 @@ void Cy_CapSense_DpAdvancedCentroidTouchpad( { ptrDiffIndex[i] = ptrSnsIndex[i].diff; } - + Cy_CapSense_AdvancedCentroidGetTouchCoordinates_Lib( - &advCfg, - ptrWdConfig->ptrCsdTouchBuffer, + &advCfg, + ptrWdConfig->ptrCsdTouchBuffer, newTouch); } #endif /* (CY_CAPSENSE_DISABLE != CY_CAPSENSE_ADVANCED_CENTROID_5X5_EN) */ @@ -699,11 +699,11 @@ void Cy_CapSense_DpAdvancedCentroidTouchpad( * * Finds up to five local maximums for CSX Touchpad. * -* This function takes an array of differences of the specified widget and +* This function takes an array of differences of the specified widget and * finds up to five local maximums. The found maximums are stored in the CSX buffer * ptrCsxTouchBuffer \ref cy_stc_capsense_csx_touch_buffer_t. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * @@ -729,13 +729,13 @@ void Cy_CapSense_DpFindLocalMaxDd( { ptrNewPeak[rx].id = CY_CAPSENSE_CSX_TOUCHPAD_ID_UNDEFINED; } - + ptrNewPeak = &ptrWdConfig->ptrCsxTouchBuffer->newPeak[0u]; /* Go through all Rx electrodes */ for (rx = 0u; rx <= lastRx; rx++) { - /* - * Go through all Tx and RX (changed above) electrodes intersections + /* + * Go through all Tx and RX (changed above) electrodes intersections * and check whether the local maximum requirement is met. */ for (tx = 0u; tx <= lastTx; tx++) @@ -744,9 +744,9 @@ void Cy_CapSense_DpFindLocalMaxDd( currDiff = ptrSnsCxt->diff; if (thresholdOff <= (uint32_t)currDiff) { - /* - * Check local maximum requirement: Comparing raw count - * of a local maximum candidate with raw counts of sensors + /* + * Check local maximum requirement: Comparing raw count + * of a local maximum candidate with raw counts of sensors * from the previous row. */ if (rx > 0u) @@ -776,10 +776,10 @@ void Cy_CapSense_DpFindLocalMaxDd( } } } - /* - * Check local maximum requirement: Comparing raw count - * of a local maximum candidate with raw counts of sensors - * from the next row. + /* + * Check local maximum requirement: Comparing raw count + * of a local maximum candidate with raw counts of sensors + * from the next row. */ if ((0u == proceed) && (rx < lastRx)) { @@ -808,9 +808,9 @@ void Cy_CapSense_DpFindLocalMaxDd( } } } - /* - * Check local maximum requirement: Comparing raw count - * of a local maximum candidate with raw counts of sensors + /* + * Check local maximum requirement: Comparing raw count + * of a local maximum candidate with raw counts of sensors * from the same row and the next column. */ if ((0u == proceed) && (tx < lastTx)) { @@ -867,11 +867,11 @@ void Cy_CapSense_DpFindLocalMaxDd( * * Calculates the position for each local maximum using the 3x3 algorithm. * -* This function calculates position coordinates of found local maximums. -* The found positions are stored in the CSX buffer ptrCsxTouchBuffer +* This function calculates position coordinates of found local maximums. +* The found positions are stored in the CSX buffer ptrCsxTouchBuffer * \ref cy_stc_capsense_csx_touch_buffer_t. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * @@ -906,10 +906,10 @@ void Cy_CapSense_DpCalcTouchPadCentroid( /* Fill each row */ for (i = 0u; i < CY_CAPSENSE_CSX_TOUCHPAD_CENTROID_LENGTH; i++) { - /* + /* * The first condition could be valid only when local max on the first row (0 row) of Touchpad * The second condition could be valid only when local max on the last row of Touchpad - * Then corresponding row (zero or the last) of 3x3 array is initialized to 0u + * Then corresponding row (zero or the last) of 3x3 array is initialized to 0u */ if (((((int32_t)ptrNewPeak->x - 1) + (int32_t)i) < 0) || ((((int32_t)ptrNewPeak->x - 1) + (int32_t)i) > (int32_t)lastRx)) @@ -923,11 +923,11 @@ void Cy_CapSense_DpCalcTouchPadCentroid( /* Fill each column */ for (j = 0u; j < CY_CAPSENSE_CSX_TOUCHPAD_CENTROID_LENGTH; j++) { - /* - * The first condition could be valid only when local max - * on the first column (0 row) of Touchpad. The second - * condition could be valid only when local max on the last - * column of Touchpad. Then corresponding column (zero or + /* + * The first condition could be valid only when local max + * on the first column (0 row) of Touchpad. The second + * condition could be valid only when local max on the last + * column of Touchpad. Then corresponding column (zero or * the last) of 3x3 array is initialized to 0u. */ if (((((int32_t)ptrNewPeak->y - 1) + (int32_t)j) < 0) || @@ -959,7 +959,7 @@ void Cy_CapSense_DpCalcTouchPadCentroid( } /* The X position is calculated. - * The weightedSumX value depends on a finger position shifted regarding + * The weightedSumX value depends on a finger position shifted regarding * the X electrode (ptrNewTouches.x). * The multiplier ptrWdConfig->xCentroidMultiplier is a short from: * CY_CAPSENSE_TOUCHPAD0_X_RESOLUTION * 256u) / (CY_CAPSENSE_TOUCHPAD0_NUM_RX - CONFIG)) @@ -1020,11 +1020,11 @@ void Cy_CapSense_DpCalcTouchPadCentroid( * - applies debounce filters. * - suppresses excessive touches. * -* The final touch data are stored in the CSX buffer ptrCsxTouchBuffer -* \ref cy_stc_capsense_csx_touch_buffer_t. This function should be called +* The final touch data are stored in the CSX buffer ptrCsxTouchBuffer +* \ref cy_stc_capsense_csx_touch_buffer_t. This function should be called * each scan cycle even when touch is not detected. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * @@ -1033,22 +1033,22 @@ void Cy_CapSense_DpTouchTracking( const cy_stc_capsense_widget_config_t * ptrWdConfig) { uint32_t i; - + const cy_stc_capsense_position_t * ptrNewPeak; cy_stc_capsense_position_t * ptrOldPeak; - + uint32_t newTouchNum = ptrWdConfig->ptrCsxTouchBuffer->newPeakNumber; uint32_t oldTouchNum = ptrWdConfig->ptrCsxTouchHistory->oldPeakNumber; int8_t * fingerPosIndex = &ptrWdConfig->ptrCsxTouchBuffer->fingerPosIndexMap[0u]; - + if ((0u != newTouchNum) || (0u != oldTouchNum)) { /* Initialize variables */ ptrWdConfig->ptrCsxTouchBuffer->newActiveIdsMask = 0u; /* Getting active touch IDs from previous scan */ ptrWdConfig->ptrCsxTouchHistory->oldActiveIdsMask = 0u; - + ptrOldPeak = &ptrWdConfig->ptrCsxTouchHistory->oldPeak[0u]; for (i = 0u; i < oldTouchNum; i++) { @@ -1133,7 +1133,7 @@ void Cy_CapSense_DpTouchTracking( Cy_CapSense_TouchDownDebounce(ptrWdConfig); } - + Cy_CapSense_SortByAge(ptrWdConfig); newTouchNum = ptrWdConfig->ptrCsxTouchBuffer->newPeakNumber; @@ -1161,23 +1161,23 @@ void Cy_CapSense_DpTouchTracking( * Transfers a touch from history array into active current array. * * This function transfers touch specified by oldIndex from history touch array -* by copying its ID, increments age and decrements debounce (if debounce > 0) +* by copying its ID, increments age and decrements debounce (if debounce > 0) * parameters into currently active touch structure * -* \param newIndex +* \param newIndex * The touch index of touch array in the active touch structure. * -* \param oldIndex +* \param oldIndex * The touch index of touch array in the history touch structure. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * *******************************************************************************/ static void Cy_CapSense_TransferTouch( - uint32_t newIndex, - uint32_t oldIndex, + uint32_t newIndex, + uint32_t oldIndex, const cy_stc_capsense_widget_config_t * ptrWdConfig) { uint32_t touchId; @@ -1189,7 +1189,7 @@ static void Cy_CapSense_TransferTouch( touchId = (uint32_t)ptrOldPeak->id & CY_CAPSENSE_CSX_TOUCHPAD_ID_MASK; touchAge = ((uint32_t)ptrOldPeak->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK) >> CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT; touchDebounce = ((uint32_t)ptrOldPeak->id & CY_CAPSENSE_CSX_TOUCHPAD_DEBOUNCE_MASK) >> CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT; - + /* Increase AGE by 1 if possible */ if (touchAge < CY_CAPSENSE_CSX_TOUCHPAD_MAX_AGE) { @@ -1200,7 +1200,7 @@ static void Cy_CapSense_TransferTouch( { touchDebounce--; } - + ptrNewPeak->id = (uint16_t)(touchId | (uint16_t)(touchDebounce << CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT)); ptrNewPeak->z &= (uint16_t)~CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK; ptrNewPeak->z |= (uint16_t)(touchAge << CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT); @@ -1223,32 +1223,32 @@ static void Cy_CapSense_TransferTouch( * \param newIndex * The touch index of touch array in the active touch structure. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * *******************************************************************************/ static void Cy_CapSense_NewTouch( - uint32_t newIndex, + uint32_t newIndex, const cy_stc_capsense_widget_config_t * ptrWdConfig) { uint32_t idx; cy_stc_capsense_position_t * ptrNewPeak = &ptrWdConfig->ptrCsxTouchBuffer->newPeak[newIndex]; - + /* Touch is not accepted */ if (0u == (ptrNewPeak->id & CY_CAPSENSE_CSX_TOUCHPAD_ID_ON_FAIL)) { /* Create a bit map of ID's currently used and previously used and search for the new lowest ID */ - idx = Cy_CapSense_GetLowestId(ptrWdConfig->ptrCsxTouchHistory->oldActiveIdsMask | + idx = Cy_CapSense_GetLowestId(ptrWdConfig->ptrCsxTouchHistory->oldActiveIdsMask | ptrWdConfig->ptrCsxTouchBuffer->newActiveIdsMask); - + /* Indicate that ID is now taken */ ptrWdConfig->ptrCsxTouchBuffer->newActiveIdsMask |= (uint8_t)(1u << idx); - + /* Set AGE */ ptrNewPeak->z &= (uint16_t)~CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK; ptrNewPeak->z |= CY_CAPSENSE_CSX_TOUCHPAD_AGE_START; - + /* Set ID and Debounce */ ptrNewPeak->id = (uint16_t)idx | (uint16_t)(((uint16_t)ptrWdConfig->ptrWdContext->onDebounce - 1u) << CY_CAPSENSE_CSX_TOUCHPAD_BYTE_SHIFT); } @@ -1263,10 +1263,10 @@ static void Cy_CapSense_NewTouch( * * Returns the lowest available free touch ID. * -* \param idMask +* \param idMask * The mask of IDs used in active and history touch structures. * -* \return +* \return * Returns the lowest available touch ID. If no ID is available, * CY_CAPSENSE_CSX_TOUCHPAD_ID_ABSENT is returned. * @@ -1308,7 +1308,7 @@ __STATIC_INLINE uint8_t Cy_CapSense_GetLowestId(uint8_t idMask) * the touchdown mask is cleared. Otherwise the age of the new finger is cleared * (it is considered as not active). * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * @@ -1338,37 +1338,37 @@ __STATIC_INLINE void Cy_CapSense_TouchDownDebounce( * Function Name: Cy_CapSense_CalcDistance ****************************************************************************//** * -* Calculates squared distance between history and active touch structures +* Calculates squared distance between history and active touch structures * pointed by the input parameters. * -* \param newIndex +* \param newIndex * The index of touch in the active touch structure. * -* \param oldIndex +* \param oldIndex * The index of touch in the history touch structure. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * -* \return +* \return * Returns the squared distance. * *******************************************************************************/ static uint32_t Cy_CapSense_CalcDistance( - uint32_t newIndex, + uint32_t newIndex, uint32_t oldIndex, const cy_stc_capsense_widget_config_t * ptrWdConfig) { const cy_stc_capsense_position_t * ptrNewPeak = &ptrWdConfig->ptrCsxTouchBuffer->newPeak[newIndex]; const cy_stc_capsense_position_t * ptrOldPeak = &ptrWdConfig->ptrCsxTouchHistory->oldPeak[oldIndex]; - + int32_t xDistance = (int32_t)(ptrOldPeak->x) - (int32_t)(ptrNewPeak->x); int32_t yDistance = (int32_t)(ptrOldPeak->y) - (int32_t)(ptrNewPeak->y); - + xDistance *= xDistance; yDistance *= yDistance; - + return ((uint32_t)xDistance + (uint32_t)yDistance); } #endif /* (CY_CAPSENSE_DISABLE != CY_CAPSENSE_CSX_TOUCHPAD_EN) */ @@ -1379,19 +1379,19 @@ static uint32_t Cy_CapSense_CalcDistance( * Function Name: Cy_CapSense_Hungarian ****************************************************************************//** * -* Executes the Hungarian method on a distance map to track motion of two +* Executes the Hungarian method on a distance map to track motion of two * touch sets (old touches vs new touches). * * This function uses the Hungarian method described in specification 001-63362. * There is no bound checking on the parameters. It is the calling function's * responsibility to ensure parameter validity. -* The function output is a fingerPosIndexMap array stored in the CSX buffer +* The function output is a fingerPosIndexMap array stored in the CSX buffer * where associations between the previous and current touches are returned. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. -* +* *******************************************************************************/ static void Cy_CapSense_Hungarian( const cy_stc_capsense_widget_config_t * ptrWdConfig) @@ -1402,9 +1402,9 @@ static void Cy_CapSense_Hungarian( * be greater than or equal to 1. */ int32_t * col = &ptrBuffer->colMap[0u]; - /* + /* * Number of elements in row of distanceMap matrix. This value must be - * greater than or equal to colCount. + * greater than or equal to colCount. */ int32_t * row = &ptrBuffer->rowMap[0u]; int32_t * mins = &ptrBuffer->minsMap[0u]; @@ -1418,9 +1418,9 @@ static void Cy_CapSense_Hungarian( * corresponds to the 2nd coordinate data set. Each element in * distanceMap is the square of the distance between the * corresponding coordinates in the 1st and 2nd data set. - */ + */ int32_t * distance = &ptrBuffer->distanceMap[0u]; - + int32_t delta = 0; int32_t colValue = 0; int32_t markedI = 0; @@ -1432,7 +1432,7 @@ static void Cy_CapSense_Hungarian( uint32_t rowCount = ptrBuffer->newPeakNumber; uint32_t colCount = ptrWdConfig->ptrCsxTouchHistory->oldPeakNumber; - + /* Fill distance map */ if (rowCount >= colCount) { @@ -1466,7 +1466,7 @@ static void Cy_CapSense_Hungarian( row[i] = 0; markIndices[i] = -1; } - + /* Go through all columns */ for (i = (int32_t)colCount; i-- > 0;) { @@ -1563,11 +1563,11 @@ static void Cy_CapSense_Hungarian( ****************************************************************************//** * * Sorts the new touch array by: -* 1. age (in decrementing order) -* and +* 1. age (in decrementing order) +* and * 2. id (in incrementing order) fields. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * @@ -1592,7 +1592,7 @@ __STATIC_INLINE void Cy_CapSense_SortByAge( { for (j = (newTouchNum - 1u); j > i; j--) { - /* + /* * Check the touch records from the last to the current. * If the touch record is valid, then replace the current touch record. */ @@ -1632,7 +1632,7 @@ __STATIC_INLINE void Cy_CapSense_SortByAge( { ptrNewPeakJ = &ptrWdConfig->ptrCsxTouchBuffer->newPeak[j]; /* If next touches have higher age or lower id with the same age then swap touches */ - if (((ptrNewPeak->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK) < (ptrNewPeakJ->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK)) || + if (((ptrNewPeak->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK) < (ptrNewPeakJ->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK)) || (((ptrNewPeak->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK) == (ptrNewPeakJ->z & CY_CAPSENSE_CSX_TOUCHPAD_AGE_MASK)) && (ptrNewPeak->id > ptrNewPeakJ->id))) { /* Swap touches */ @@ -1654,10 +1654,10 @@ __STATIC_INLINE void Cy_CapSense_SortByAge( * * Copies content from the source touch structure to the destination touch structure. * -* \param destination +* \param destination * The pointer to the destination touch structure \ref cy_stc_capsense_position_t. * -* \param source +* \param source * The pointer to the source touch structure \ref cy_stc_capsense_position_t. * *******************************************************************************/ @@ -1675,14 +1675,14 @@ static void Cy_CapSense_CopyTouchRecord( * Function Name: Cy_CapSense_DpFilterTouchRecord ****************************************************************************//** * -* Filters position data of every valid touch if enabled and copies data into +* Filters position data of every valid touch if enabled and copies data into * public touch array. * -* This function checks every touch in the new touch structure. If the touch is -* valid (valid id and age > 0), then touch is filtered if the filter is enabled. +* This function checks every touch in the new touch structure. If the touch is +* valid (valid id and age > 0), then touch is filtered if the filter is enabled. * At the end, the corresponding fields are updated in the public touch structure. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * @@ -1712,8 +1712,8 @@ void Cy_CapSense_DpFilterTouchRecord( /* Define number of touches that should be reported */ for (i = 0u; i < CY_CAPSENSE_MAX_CENTROIDS; i++) { - /* - * Age must be higher than 0 otherwise the touch does not pass + /* + * Age must be higher than 0 otherwise the touch does not pass * debounce procedure. It exists in the array for correct * touch tracking and debouncing. */ @@ -1723,19 +1723,19 @@ void Cy_CapSense_DpFilterTouchRecord( } ptrNewPeak++; } - + maxTouch = (uint32_t)ptrWdConfig->centroidConfig & CY_CAPSENSE_CENTROID_NUMBER_MASK; if (reportedTouchNum > maxTouch) { reportedTouchNum = maxTouch; } - + #if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_CSX_POSITION_FILTER_EN) if (0u != (ptrWdConfig->posFilterConfig & CY_CAPSENSE_POSITION_FILTERS_MASK)) { filterSize = (ptrWdConfig->posFilterConfig & CY_CAPSENSE_POSITION_FILTERS_SIZE_MASK) >> CY_CAPSENSE_POSITION_FILTERS_SIZE_OFFSET; - + /* Go through all new touches */ ptrNewPeak = ptrWdConfig->ptrCsxTouchBuffer->newPeak; for (i = 0u; i < reportedTouchNum; i++) @@ -1797,7 +1797,7 @@ void Cy_CapSense_DpFilterTouchRecord( for (i = 0u; i < maxTouch; i++) { ptrWdTouch->id = CY_CAPSENSE_CSX_TOUCHPAD_ID_UNDEFINED; - + if (i < reportedTouchNum) { /* Report touch to the data structure */ @@ -1809,7 +1809,7 @@ void Cy_CapSense_DpFilterTouchRecord( ptrNewPeak++; ptrWdTouch++; } - + ptrWdConfig->ptrWdContext->wdTouch.numPosition = (uint8_t)reportedTouchNum; if (0u == reportedTouchNum) { @@ -1838,7 +1838,7 @@ void Cy_CapSense_DpFilterTouchRecord( * position values. * * \param ptrHistory -* The pointer to the position structure that holds previous historical +* The pointer to the position structure that holds previous historical * position values. * *******************************************************************************/ @@ -1848,7 +1848,7 @@ void Cy_CapSense_InitPositionFilters( cy_stc_capsense_position_t * ptrHistory) { cy_stc_capsense_position_t * ptrHistoryIndex = ptrHistory; - + #if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_POS_MEDIAN_FILTER_EN) if (0u != (filterConfig & CY_CAPSENSE_POSITION_MED_MASK)) { @@ -1898,10 +1898,10 @@ void Cy_CapSense_InitPositionFilters( * Function Name: Cy_CapSense_RunPositionFilters ****************************************************************************//** * -* Applies enabled filters to position specified by ptrInput argument and stores +* Applies enabled filters to position specified by ptrInput argument and stores * history into ptrHistory. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * @@ -1910,13 +1910,13 @@ void Cy_CapSense_InitPositionFilters( * position values. * * \param ptrHistory -* The pointer to the position structure that holds previous historical +* The pointer to the position structure that holds previous historical * position values. * *******************************************************************************/ void Cy_CapSense_RunPositionFilters( const cy_stc_capsense_widget_config_t * ptrWdConfig, - cy_stc_capsense_position_t * ptrInput, + cy_stc_capsense_position_t * ptrInput, cy_stc_capsense_position_t * ptrHistory) { #if (CY_CAPSENSE_POS_MEDIAN_FILTER_EN || CY_CAPSENSE_POS_AVERAGE_FILTER_EN) @@ -1996,11 +1996,11 @@ void Cy_CapSense_RunPositionFilters( * Function Name: Cy_CapSense_RunPositionFiltersRadial ****************************************************************************//** * -* Applies enabled filters to position specified by the ptrInput argument and stores -* history into ptrHistory. Filtering considers specific widget type where -* the next value after maximum position is zero and vise versa. +* Applies enabled filters to position specified by the ptrInput argument and stores +* history into ptrHistory. Filtering considers specific widget type where +* the next value after maximum position is zero and vise versa. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * @@ -2009,7 +2009,7 @@ void Cy_CapSense_RunPositionFilters( * position values. * * \param ptrHistory -* The pointer to the position structure that holds previous historical +* The pointer to the position structure that holds previous historical * position values. * *******************************************************************************/ @@ -2019,15 +2019,15 @@ void Cy_CapSense_RunPositionFiltersRadial( cy_stc_capsense_position_t * ptrHistory) { /* - * If new position crosses the zero point in one or another direction, - * the position variable with the smaller value is increased by the - * slider resolution. This is done for the proper filtering. For + * If new position crosses the zero point in one or another direction, + * the position variable with the smaller value is increased by the + * slider resolution. This is done for the proper filtering. For * example, xResolution = 100, currPosition = 95, newPosition = 5. - * If no actions are taken, then the average filter will give a value of - * 50 - which is wrong. But if the position values are adjusted as - * mentioned here, we will get newPosition equal 105 and the average - * will be 100. Later this filtered value will be adjusted further - * to not cross the xResolution and it will end up with 0u - which + * If no actions are taken, then the average filter will give a value of + * 50 - which is wrong. But if the position values are adjusted as + * mentioned here, we will get newPosition equal 105 and the average + * will be 100. Later this filtered value will be adjusted further + * to not cross the xResolution and it will end up with 0u - which * is correct average result for the provided example. */ @@ -2050,7 +2050,7 @@ void Cy_CapSense_RunPositionFiltersRadial( #if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_POS_IIR_FILTER_EN) uint32_t coeffIIR = (uint32_t)(filterCfg & CY_CAPSENSE_POSITION_IIR_COEFF_MASK) >> CY_CAPSENSE_POSITION_IIR_COEFF_OFFSET; #endif - + #if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_POS_MEDIAN_FILTER_EN) if (0u != (filterCfg & CY_CAPSENSE_POSITION_MED_MASK)) { @@ -2060,7 +2060,7 @@ void Cy_CapSense_RunPositionFiltersRadial( /* Preserve the filter history without zero-cross correction */ ptrHistoryIndex[1u].x = ptrHistoryIndex[0u].x; ptrHistoryIndex[0u].x = (uint16_t)xPos; - + /* Perform zero-cross correction */ if (z1 > (halfResolution + xPos)) { @@ -2116,8 +2116,8 @@ void Cy_CapSense_RunPositionFiltersRadial( /* * IIR filter can accumulate a delay up to a full circle and even more. - * This situation is not supported by the middleware. If the difference - * between the new position and IIR filter history is bigger than + * This situation is not supported by the middleware. If the difference + * between the new position and IIR filter history is bigger than * half of resolution, then all enabled position filters are reset. */ if(temp >= halfResolution) @@ -2160,11 +2160,11 @@ void Cy_CapSense_RunPositionFiltersRadial( { temp = xPos - ptrHistoryIndex->x; } - + /* * IIR filter can accumulate delay up to full circle and even more. - * This situation is not supported by the middleware. If the difference - * between the new position and IIR filter history is bigger than + * This situation is not supported by the middleware. If the difference + * between the new position and IIR filter history is bigger than * half of resolution, then all enabled position filters are reset. */ if(temp >= halfResolution) @@ -2248,7 +2248,7 @@ void Cy_CapSense_RunPositionFiltersRadial( * \param newTouch * The pointer to the touch structure. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure * \ref cy_stc_capsense_widget_config_t. * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_common.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_common.h index 1aa29889d4..81a057d0bc 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_common.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_common.h @@ -832,7 +832,7 @@ extern "C" { /** Return status \ref cy_capsense_status_t of CAPSENSE™ operation: Unable to perform calibration */ #define CY_CAPSENSE_STATUS_CALIBRATION_CHECK_FAIL (0x400u) /** Return status \ref cy_capsense_status_t of CAPSENSE™ operation: Sense Clock Divider -* is out of the valid range for the specified Clock source configuration +* is out of the valid range for the specified Clock source configuration */ #define CY_CAPSENSE_STATUS_BAD_CLOCK_CONFIG (0x800u) /** Return status \ref cy_capsense_status_t of CAPSENSE™ operation: Unknown */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_control.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_control.h index 359b4bde68..f9b83e2026 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_control.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_control.h @@ -54,21 +54,21 @@ cy_capsense_status_t Cy_CapSense_Restore(cy_stc_capsense_context_t * context); cy_capsense_status_t Cy_CapSense_ProcessAllWidgets( cy_stc_capsense_context_t * context); cy_capsense_status_t Cy_CapSense_ProcessWidget( - uint32_t widgetId, + uint32_t widgetId, cy_stc_capsense_context_t * context); #if ((CY_CAPSENSE_DISABLE != CY_CAPSENSE_GESTURE_EN) || \ (CY_CAPSENSE_DISABLE != CY_CAPSENSE_BALLISTIC_MULTIPLIER_EN)) void Cy_CapSense_IncrementGestureTimestamp(cy_stc_capsense_context_t * context); void Cy_CapSense_SetGestureTimestamp( - uint32_t value, + uint32_t value, cy_stc_capsense_context_t * context); #endif void Cy_CapSense_Wakeup(const cy_stc_capsense_context_t * context); cy_en_syspm_status_t Cy_CapSense_DeepSleepCallback( - cy_stc_syspm_callback_params_t * callbackParams, + cy_stc_syspm_callback_params_t * callbackParams, cy_en_syspm_callback_mode_t mode); cy_capsense_status_t Cy_CapSense_RegisterCallback( @@ -87,13 +87,13 @@ cy_capsense_status_t Cy_CapSense_UnRegisterCallback( /******************************************************************************/ cy_capsense_status_t Cy_CapSense_ProcessWidgetExt( - uint32_t widgetId, - uint32_t mode, + uint32_t widgetId, + uint32_t mode, cy_stc_capsense_context_t * context); cy_capsense_status_t Cy_CapSense_ProcessSensorExt( - uint32_t widgetId, - uint32_t sensorId, - uint32_t mode, + uint32_t widgetId, + uint32_t sensorId, + uint32_t mode, const cy_stc_capsense_context_t * context); /** \} */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_csx_v2.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_csx_v2.c index bc0a861546..62a64cf132 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_csx_v2.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_csx_v2.c @@ -1372,7 +1372,7 @@ static void Cy_CapSense_CSXSetSnsClkFreq(uint32_t channelIndex, cy_stc_capsense_ { snsClkDivider = 1u; } - + #if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN) /* Change the divider based on the chId */ switch (channelIndex) diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_filter.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_filter.c index 30eab4157d..8df2067ced 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_filter.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_filter.c @@ -57,21 +57,21 @@ static cy_capsense_status_t Cy_CapSense_CheckBaselineInv( * Function Name: Cy_CapSense_UpdateAllBaselines ****************************************************************************//** * -* Updates the baseline for all the sensors in all the widgets. -* -* Baselines must be updated after sensor scan to ignore low frequency -* changes in the sensor data caused by environment changes such as -* temperature from sensor status decision. -* +* Updates the baseline for all the sensors in all the widgets. +* +* Baselines must be updated after sensor scan to ignore low frequency +* changes in the sensor data caused by environment changes such as +* temperature from sensor status decision. +* * This function ignores the widget enable bit in the widget status register. -* Calling this function multiple times without a new sensor scan leads to -* unexpected behavior and should be avoided. -* -* This function is called by Cy_CapSense_ProcessAllWidgets() and -* Cy_CapSense_ProcessWidget(), hence the application program need not use this -* function if any of the above functions is already used. This function can be +* Calling this function multiple times without a new sensor scan leads to +* unexpected behavior and should be avoided. +* +* This function is called by Cy_CapSense_ProcessAllWidgets() and +* Cy_CapSense_ProcessWidget(), hence the application program need not use this +* function if any of the above functions is already used. This function can be * used for custom application implementation. -* +* * \param context * The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t. * @@ -100,20 +100,20 @@ cy_capsense_status_t Cy_CapSense_UpdateAllBaselines( * Function Name: Cy_CapSense_UpdateWidgetBaseline ****************************************************************************//** * -* Updates the baselines for all the sensors in a widget specified by -* the input parameter. -* -* This function performs exactly the same tasks as +* Updates the baselines for all the sensors in a widget specified by +* the input parameter. +* +* This function performs exactly the same tasks as * Cy_CapSense_UpdateAllBaselines() but only for a specified widget. -* -* Calling this function multiple times without a new sensor scan leads to -* unexpected behavior and should be avoided. The application program need -* not use this function if the Cy_CapSense_UpdateAllBaselines(), -* Cy_CapSense_ProcessAllWidgets() or Cy_CapSense_ProcessWidget() functions +* +* Calling this function multiple times without a new sensor scan leads to +* unexpected behavior and should be avoided. The application program need +* not use this function if the Cy_CapSense_UpdateAllBaselines(), +* Cy_CapSense_ProcessAllWidgets() or Cy_CapSense_ProcessWidget() functions * are already used. * * \param widgetId -* Specifies the ID number of the widget. A macro for the widget ID can be found +* Specifies the ID number of the widget. A macro for the widget ID can be found * in the cycfg_capsense.h file defined as CY_CAPSENSE__WDGT_ID. * * \param context @@ -126,7 +126,7 @@ cy_capsense_status_t Cy_CapSense_UpdateAllBaselines( * *******************************************************************************/ cy_capsense_status_t Cy_CapSense_UpdateWidgetBaseline( - uint32_t widgetId, + uint32_t widgetId, const cy_stc_capsense_context_t * context) { uint32_t snsIndex; @@ -145,26 +145,26 @@ cy_capsense_status_t Cy_CapSense_UpdateWidgetBaseline( * Function Name: Cy_CapSense_UpdateSensorBaseline ****************************************************************************//** * -* Updates the baseline for a sensor in a widget specified by the -* input parameters. -* -* This function performs exactly the same tasks as -* Cy_CapSense_UpdateAllBaselines() and Cy_CapSense_UpdateWidgetBaseline() +* Updates the baseline for a sensor in a widget specified by the +* input parameters. +* +* This function performs exactly the same tasks as +* Cy_CapSense_UpdateAllBaselines() and Cy_CapSense_UpdateWidgetBaseline() * but only for a specified sensor. -* -* Calling this function multiple times without a new sensor scan leads to -* unexpected behavior and should be avoided. The application need not use -* this function if the Cy_CapSense_UpdateWidgetBaseline (), -* Cy_CapSense_UpdateAllBaselines (), Cy_CapSense_ProcessAllWidgets(), +* +* Calling this function multiple times without a new sensor scan leads to +* unexpected behavior and should be avoided. The application need not use +* this function if the Cy_CapSense_UpdateWidgetBaseline (), +* Cy_CapSense_UpdateAllBaselines (), Cy_CapSense_ProcessAllWidgets(), * or Cy_CapSense_ProcessWidget() functions are already used. * * \param widgetId -* Specifies the ID number of the widget. A macro for the widget ID can be found +* Specifies the ID number of the widget. A macro for the widget ID can be found * in the cycfg_capsense.h file defined as CY_CAPSENSE__WDGT_ID. * * \param sensorId -* Specifies the ID number of the sensor within the widget. A macro for the -* sensor ID within a specified widget can be found in the cycfg_capsense.h +* Specifies the ID number of the sensor within the widget. A macro for the +* sensor ID within a specified widget can be found in the cycfg_capsense.h * file defined as CY_CAPSENSE__SNS_ID. * * \param context @@ -177,8 +177,8 @@ cy_capsense_status_t Cy_CapSense_UpdateWidgetBaseline( * *******************************************************************************/ cy_capsense_status_t Cy_CapSense_UpdateSensorBaseline( - uint32_t widgetId, - uint32_t sensorId, + uint32_t widgetId, + uint32_t sensorId, const cy_stc_capsense_context_t * context) { uint32_t result; @@ -360,19 +360,19 @@ cy_capsense_status_t Cy_CapSense_FtUpdateBaseline( ****************************************************************************//** * * Initializes the baselines of all the sensors of all the widgets. -* -* This function initializes baselines for all sensors and widgets in the project. -* It can also be used to re-initialize baselines at any time, however, note -* that all sensor data history information and sensor status shall be reset +* +* This function initializes baselines for all sensors and widgets in the project. +* It can also be used to re-initialize baselines at any time, however, note +* that all sensor data history information and sensor status shall be reset * along with re-initialization of baseline. -* -* Following functions to initialize sensor and widgets and filter history -* should be called after initializing baseline for proper operation of +* +* Following functions to initialize sensor and widgets and filter history +* should be called after initializing baseline for proper operation of * the CAPSENSE™ middleware: * * Cy_CapSense_InitializeAllStatuses() * * Cy_CapSense_InitializeAllFilters() -* -* These functions are called by the CapSense_Enable() function, hence it is +* +* These functions are called by the CapSense_Enable() function, hence it is * not required to use this function if above function is used. * * \param context @@ -394,24 +394,24 @@ void Cy_CapSense_InitializeAllBaselines(cy_stc_capsense_context_t * context) * Function Name: Cy_CapSense_InitializeWidgetBaseline ****************************************************************************//** * -* Initializes the baselines of all the sensors in a specific widget. -* -* This function initializes baselines for all sensors in a specific widget -* in the project. It can also be used to re-initialize baselines at any time, -* however, note that all sensor data history information and sensor status +* Initializes the baselines of all the sensors in a specific widget. +* +* This function initializes baselines for all sensors in a specific widget +* in the project. It can also be used to re-initialize baselines at any time, +* however, note that all sensor data history information and sensor status * should be reset along with re-initialization of baseline. -* -* The following functions to initialize sensor and widgets and filter history -* should be called after initializing baselines for proper operation of +* +* The following functions to initialize sensor and widgets and filter history +* should be called after initializing baselines for proper operation of * middleware. * * Cy_CapSense_InitializeWidgetStatus() * * Cy_CapSense_InitializeWidgetFilter() -* -* These functions are called by CapSense_Enable() function, hence it is not +* +* These functions are called by CapSense_Enable() function, hence it is not * required to use this function is above function is used. -* +* * \param widgetId -* Specifies the ID number of the widget. A macro for the widget ID can be found +* Specifies the ID number of the widget. A macro for the widget ID can be found * in the cycfg_capsense.h file defined as CY_CAPSENSE__WDGT_ID. * * \param context @@ -419,7 +419,7 @@ void Cy_CapSense_InitializeAllBaselines(cy_stc_capsense_context_t * context) * *******************************************************************************/ void Cy_CapSense_InitializeWidgetBaseline( - uint32_t widgetId, + uint32_t widgetId, cy_stc_capsense_context_t * context) { uint32_t snsIndex; @@ -439,12 +439,12 @@ void Cy_CapSense_InitializeWidgetBaseline( * by the input parameters. * * \param widgetId -* Specifies the ID number of the widget. A macro for the widget ID can be found +* Specifies the ID number of the widget. A macro for the widget ID can be found * in the cycfg_capsense.h file defined as CY_CAPSENSE__WDGT_ID. * * \param sensorId -* Specifies the ID number of the sensor within the widget. A macro for the -* sensor ID within a specified widget can be found in the cycfg_capsense.h +* Specifies the ID number of the sensor within the widget. A macro for the +* sensor ID within a specified widget can be found in the cycfg_capsense.h * file defined as CY_CAPSENSE__SNS_ID. * * \param context @@ -452,8 +452,8 @@ void Cy_CapSense_InitializeWidgetBaseline( * *******************************************************************************/ void Cy_CapSense_InitializeSensorBaseline( - uint32_t widgetId, - uint32_t sensorId, + uint32_t widgetId, + uint32_t sensorId, cy_stc_capsense_context_t * context) { uint32_t cxtOffset; @@ -484,7 +484,7 @@ void Cy_CapSense_InitializeSensorBaseline( * Initializes the baseline history for a sensor indicated by an input * parameter. * -* \param ptrSnsContext +* \param ptrSnsContext * The pointer to the sensor context structure. * *******************************************************************************/ @@ -500,10 +500,10 @@ void Cy_CapSense_FtInitializeBaseline(cy_stc_capsense_sensor_context_t * ptrSnsC * Function Name: Cy_CapSense_InitializeAllFilters ****************************************************************************//** * -* Initializes (or re-initializes) all the firmware filter history, except +* Initializes (or re-initializes) all the firmware filter history, except * the baseline. * -* Calling this function is accompanied by +* Calling this function is accompanied by * * Cy_CapSense_InitializeAllStatuses() * * Cy_CapSense_InitializeAllBaselines() * @@ -526,15 +526,15 @@ void Cy_CapSense_InitializeAllFilters(const cy_stc_capsense_context_t * context) * Function Name: Cy_CapSense_InitializeWidgetFilter ****************************************************************************//** * -* Initializes (or re-initializes) the raw count filter history of all +* Initializes (or re-initializes) the raw count filter history of all * the sensors in a widget specified by the input parameter. * -* Calling this function is accompanied by +* Calling this function is accompanied by * - Cy_CapSense_InitializeWidgetStatus(). * - Cy_CapSense_InitializeWidgetBaseline(). * * \param widgetId -* Specifies the ID number of the widget. A macro for the widget ID can be found +* Specifies the ID number of the widget. A macro for the widget ID can be found * in the cycfg_capsense.h file defined as CY_CAPSENSE__WDGT_ID. * * \param context @@ -542,7 +542,7 @@ void Cy_CapSense_InitializeAllFilters(const cy_stc_capsense_context_t * context) * *******************************************************************************/ void Cy_CapSense_InitializeWidgetFilter( - uint32_t widgetId, + uint32_t widgetId, const cy_stc_capsense_context_t * context) { uint32_t snsIndex; @@ -628,7 +628,7 @@ void Cy_CapSense_InitializeWidgetFilter( * * Initializes the IIR filter history. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure. * * \param ptrSnsContext @@ -755,8 +755,8 @@ void Cy_CapSense_RunMedianInternal( uint16_t * ptrSnsRawHistory) { uint32_t temp = Cy_CapSense_FtMedian( - (uint32_t)ptrSnsContext->raw, - (uint32_t)ptrSnsRawHistory[0u], + (uint32_t)ptrSnsContext->raw, + (uint32_t)ptrSnsRawHistory[0u], (uint32_t)ptrSnsRawHistory[1u]); (void)ptrWdConfig; @@ -802,7 +802,7 @@ void Cy_CapSense_InitializeAverageInternal( * * Runs the average filter. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure. * * \param ptrSnsContext @@ -841,7 +841,7 @@ void Cy_CapSense_RunAverageInternal( * * Runs all enabled filters. * -* \param ptrWdConfig +* \param ptrWdConfig * The pointer to the widget configuration structure. * * \param ptrSnsContext @@ -870,7 +870,7 @@ void Cy_CapSense_FtRunEnabledFiltersInternal( Cy_CapSense_RunMedianInternal(ptrWdConfig, ptrSnsContext, ptrSnsRawHistoryLocal); ptrSnsRawHistoryLocal += CY_CAPSENSE_RC_MEDIAN_SIZE; } - #endif + #endif #if (CY_CAPSENSE_REGULAR_RC_IIR_FILTER_EN || CY_CAPSENSE_PROX_RC_IIR_FILTER_EN) if(0u != (CY_CAPSENSE_RC_FILTER_IIR_EN_MASK & rawFilterCfg)) diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_gesture_lib.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_gesture_lib.h index dd2a6b750e..49d6e2dac8 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_gesture_lib.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_gesture_lib.h @@ -172,11 +172,11 @@ typedef struct cy_stc_capsense_gesture_position_t positionLast1; /**< Previous position of the first touch */ cy_stc_capsense_gesture_position_t position2; /**< Current position of the second touch */ cy_stc_capsense_gesture_position_t positionLast2; /**< Previous position of the second touch */ - + uint32_t timestamp; /**< Current timestamp */ uint16_t detected; /**< Detected gesture mask */ uint16_t direction; /**< Mask of direction of detected gesture */ - + cy_stc_capsense_ofrt_context_t ofrtContext; /**< One-finger rotate gesture context */ cy_stc_capsense_ofsl_context_t ofslContext; /**< One-finger scroll gesture context */ cy_stc_capsense_tfzm_context_t tfzmContext; /**< Two-finger zoom gesture context */ @@ -211,7 +211,7 @@ typedef struct * Initializes internal variables and states. * * \param context -* The pointer to the gesture context structure +* The pointer to the gesture context structure * \ref cy_stc_capsense_gesture_context_t. * *******************************************************************************/ @@ -235,11 +235,11 @@ void Cy_CapSense_Gesture_ResetState( * The pointer to the array of positions \ref cy_stc_capsense_gesture_position_t. * * \param config -* The pointer to the gesture configuration structure +* The pointer to the gesture configuration structure * \ref cy_stc_capsense_gesture_config_t. * * \param context -* The pointer to the gesture context structure +* The pointer to the gesture context structure * \ref cy_stc_capsense_gesture_context_t. * *******************************************************************************/ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_lib.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_lib.h index 4fbe32e469..19be1d8775 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_lib.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_lib.h @@ -76,9 +76,9 @@ typedef struct } cy_stc_capsense_advanced_centroid_config_t; /** Declares position structure that keep information of a single touch. -* Depending on a widget type each structure field keeps the following +* Depending on a widget type each structure field keeps the following * information: -* +* * * * @@ -128,14 +128,14 @@ typedef struct /** Declares touch structure used to store positions of Touchpad, Matrix buttons and Slider widgets */ typedef struct { - cy_stc_capsense_position_t * ptrPosition; /**< Pointer to the array containing the position information. + cy_stc_capsense_position_t * ptrPosition; /**< Pointer to the array containing the position information. A number of elements is defined by numPosition. */ uint8_t numPosition; /**< Total number of detected touches on a widget: - * * 0 - no touch is detected + * * 0 - no touch is detected * * 1 - a single touch is detected * * 2 - two touches are detected * * 3 - three touches are detected - * * CY_CAPSENSE_POSITION_MULTIPLE - multiple touches are detected + * * CY_CAPSENSE_POSITION_MULTIPLE - multiple touches are detected * and information in position structure should be ignored. */ } cy_stc_capsense_touch_t; @@ -280,7 +280,7 @@ typedef struct * *******************************************************************************/ void Cy_CapSense_AdaptiveFilterInitialize_Lib( - const cy_stc_capsense_adaptive_filter_config_t * config, + const cy_stc_capsense_adaptive_filter_config_t * config, cy_stc_capsense_position_t * context); /******************************************************************************* @@ -311,8 +311,8 @@ void Cy_CapSense_AdaptiveFilterInitialize_Lib( *******************************************************************************/ void Cy_CapSense_AdaptiveFilterRun_Lib( const cy_stc_capsense_adaptive_filter_config_t * config, - cy_stc_capsense_position_t * context, - uint32_t * currentX, + cy_stc_capsense_position_t * context, + uint32_t * currentX, uint32_t * currentY); /******************************************************************************* @@ -359,7 +359,7 @@ void Cy_CapSense_AdvancedCentroidGetTouchCoordinates_Lib( * *******************************************************************************/ void Cy_CapSense_BallisticMultiplier_Lib( - const cy_stc_capsense_ballistic_config_t * config, + const cy_stc_capsense_ballistic_config_t * config, const cy_stc_capsense_touch_t * touch, cy_stc_capsense_ballistic_delta_t * displacement, uint32_t timestamp, @@ -385,9 +385,9 @@ void Cy_CapSense_BallisticMultiplier_Lib( * *******************************************************************************/ void Cy_CapSense_AlpRun_Lib( - cy_stc_capsense_alp_fltr_channel_t * ptrFilterObj, + cy_stc_capsense_alp_fltr_channel_t * ptrFilterObj, const cy_stc_capsense_alp_fltr_config_t * ptrFilterConfig, - uint16_t * rawCount, + uint16_t * rawCount, const uint16_t * baseline); /******************************************************************************* @@ -404,7 +404,7 @@ void Cy_CapSense_AlpRun_Lib( * *******************************************************************************/ void Cy_CapSense_AlpInitialize_Lib( - cy_stc_capsense_alp_fltr_channel_t * ptrFilterObj, + cy_stc_capsense_alp_fltr_channel_t * ptrFilterObj, const uint16_t * rawCount); /******************************************************************************* @@ -443,18 +443,18 @@ uint32_t Cy_CapSense_AlpGetAverage_Lib( * This internal function tunes the Sense Clock divider. * * Found IDAC code in Single IDAC mode is used to calculate the optimal SnsClk. -* The SnsClk divider is set to meet the requirement that the widget +* The SnsClk divider is set to meet the requirement that the widget * clock period should be greater than or equal to: * Period > 2*5*R*Cp, * where: * * Cp is the maximum sensor parasitic capacitance within the widget. -* * R is the user input value in the expression view of the customizer for a +* * R is the user input value in the expression view of the customizer for a * series resistor. * * \param config * The configuration structure. * -* \return +* \return * Cp in fF (10^-15) * *******************************************************************************/ @@ -467,24 +467,24 @@ uint32_t Cy_CapSense_TunePrescalers_Lib( * * Configure scanning resolution to achieve the sufficient sensitivity. * -* The function searches the lowest possible resolution that produces signal +* The function searches the lowest possible resolution that produces signal * greater than 50 counts (Difference Counts) for user defined finger capacitance. -* In addition, function calculates 75%-value of the achieved signal, that becomes +* In addition, function calculates 75%-value of the achieved signal, that becomes * candidate to finger threshold. -* +* * Used equation to calculate signal at resolution 16-bit: * sigPFCmax = (2^16-1) * vRef * snsClk * fingerCap / idacCurrent * -* sigPFCmax contains absolute number of difference counts that user receives as +* sigPFCmax contains absolute number of difference counts that user receives as * result of sensor scanning at corresponding resolution. * -* This function requires non-zero Modulator IDAC code (if IDAC is equal to zero it +* This function requires non-zero Modulator IDAC code (if IDAC is equal to zero it * is considered as non-valid use case). * * \param config * The configuration structure. * -* \return +* \return * Scan resolution * *******************************************************************************/ @@ -557,16 +557,16 @@ uint32_t Cy_CapSense_GetSmartSenseNumSubconversions( * This function comprises an algorithm of thresholds auto-tune. The thresholds * object contains updated thresholds after this API is called. * -* \param ptrNoiseEnvelope +* \param ptrNoiseEnvelope * The pointer to the noise-envelope object in RAM. * -* \param ptrThresholds +* \param ptrThresholds * The pointer to the thresholds object. * -* \param sigPFC +* \param sigPFC * Signal per finger capacitance. * -* \param startFlag +* \param startFlag * The flag indicates a first sensor in a widget. * *******************************************************************************/ @@ -582,13 +582,13 @@ void Cy_CapSense_UpdateThresholds_Lib( * * Initializes the noise-envelope filter. * -* \param rawCount +* \param rawCount * The RawCount value for a given sensor. * -* \param sigPFC +* \param sigPFC * Signal per finger capacitance. * -* \param ptrNoiseEnvelope +* \param ptrNoiseEnvelope * The pointer to the noise-envelope RAM object of the sensor. * *******************************************************************************/ @@ -603,13 +603,13 @@ void Cy_CapSense_InitializeNoiseEnvelope_Lib( * * Runs the noise-envelope filter. * -* \param rawCount +* \param rawCount * The RawCount value for a given sensor. * -* \param sigPFC +* \param sigPFC * Signal per finger capacitance. * -* \param ptrNoiseEnvelope +* \param ptrNoiseEnvelope * The pointer to the noise-envelope RAM object of the sensor. * *******************************************************************************/ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.c index 6b1b99cebb..3a93b8067d 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.c @@ -709,7 +709,7 @@ uint32_t Cy_CapSense_DpProcessCsdWidgetRawCounts( } } } - + #if (CY_CAPSENSE_ENABLE == CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN) ptrSnsCxtSns = ptrWdCfg->ptrSnsContext; for (snsIndex = ptrWdCfg->numSns; snsIndex-- > 0u;) @@ -1563,7 +1563,7 @@ void Cy_CapSense_DpProcessCsxTouchpad( } #endif /* (CY_CAPSENSE_DISABLE != CY_CAPSENSE_CSX_TOUCHPAD_EN) */ -#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN) +#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN) /******************************************************************************* * Function Name: Cy_CapSense_RunMfsFiltering ****************************************************************************//** diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.h index e7960dcc9f..37b0d0af36 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_processing.h @@ -166,7 +166,7 @@ void Cy_CapSense_DpUpdateThresholds( const cy_stc_capsense_smartsense_csd_noise_envelope_t * ptrNoiseEnvelope, uint32_t startFlag); -#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN) +#if (CY_CAPSENSE_DISABLE != CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN) void Cy_CapSense_RunMfsFiltering( cy_stc_capsense_sensor_context_t * ptrSnsContext, const cy_stc_capsense_context_t * context); diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_selftest.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_selftest.c index 426284ddd9..39905d3c7a 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_selftest.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_selftest.c @@ -439,7 +439,7 @@ cy_en_capsense_bist_status_t Cy_CapSense_CheckIntegritySensorRawcount( * function with the CY_CAPSENSE_BIST_SNS_INTEGRITY_MASK mask. * * To detect an electrical short or fault condition with resistance -* higher than 1500 ohm, the Cy_CapSense_MeasureCapacitanceSensor() (4th Generation) +* higher than 1500 ohm, the Cy_CapSense_MeasureCapacitanceSensor() (4th Generation) * or Cy_CapSense_MeasureCapacitanceSensorElectrode() (5th Generation) function can * be used as the fault condition affects the measured sensor capacitance. * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.c index d4033a2b00..fa2cd9b547 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.c @@ -44,73 +44,73 @@ void Cy_CapSense_TuInitialize(cy_stc_capsense_context_t * context) * Function Name: Cy_CapSense_RunTuner ****************************************************************************//** * -* Establishes synchronized operation between the CAPSENSE™ Middleware and +* Establishes synchronized operation between the CAPSENSE™ Middleware and * the CAPSENSE™ Tuner tool. * * This function is called periodically in the application program. It serves -* the CAPSENSE™ Tuner tool requests and commands to synchronize the operation. -* Mostly, the best place to call this function is between processing and next +* the CAPSENSE™ Tuner tool requests and commands to synchronize the operation. +* Mostly, the best place to call this function is between processing and next * scanning. -* If the user changes some parameters in the Tuner tool, the middleware is +* If the user changes some parameters in the Tuner tool, the middleware is * re-started - the Tuner issues a restart command to be executed by this * function. -* +* * The Tuner interface supports two communication protocol: EZI2C and UART. -* -* To use an EZI2C-based tuner interface, only initialization of the EZI2C -* driver and interface is required in the application program. Refer to -* the I2C driver documentation for details of the protocol implementation +* +* To use an EZI2C-based tuner interface, only initialization of the EZI2C +* driver and interface is required in the application program. Refer to +* the I2C driver documentation for details of the protocol implementation * and data package format by the EZI2C interface. -* +* * To use a UART-based tuner interface, the user must: * * Initialize the UART driver and interface -* * Use a callback function to facilitate data transmission and reception +* * Use a callback function to facilitate data transmission and reception * using the UART driver. -* -* The application program must: +* +* The application program must: * * Form a transmission data packet -* * Validate the data package on receiver implementation prior to passing +* * Validate the data package on receiver implementation prior to passing * to the CAPSENSE™ Middleware. -* -* The transmission packet includes a CAPSENSE™ context structure sandwiched -* between a header (0x0D0A) and a tail (0x00FFFF), hence the package size -* is dependent on CAPSENSE™ context information. The receiver packet is -* 16-byte (fixed length) data explained under the -* Cy_CapSense_CheckTunerCmdIntegrity() function. -* The Cy_CapSense_CheckTunerCmdIntegrity() function is used to validate +* +* The transmission packet includes a CAPSENSE™ context structure sandwiched +* between a header (0x0D0A) and a tail (0x00FFFF), hence the package size +* is dependent on CAPSENSE™ context information. The receiver packet is +* 16-byte (fixed length) data explained under the +* Cy_CapSense_CheckTunerCmdIntegrity() function. +* The Cy_CapSense_CheckTunerCmdIntegrity() function is used to validate * the received data package prior to passing it to the CAPSENSE™ middleware. -* +* * Periodical calling the Cy_CapSense_RunTuner() function is: -* * mandatory for operation of a UART-based tuner interface. The middleware -* operation is always synchronous to the Tuner tool. -* * optional to periodically call Cy_CapSense_RunTuner() for EZI2C based +* * mandatory for operation of a UART-based tuner interface. The middleware +* operation is always synchronous to the Tuner tool. +* * optional to periodically call Cy_CapSense_RunTuner() for EZI2C based * interface. -* -* If the Cy_CapSense_RunTuner() function is not periodically called by -* the application program, the middleware operation is asynchronous to +* +* If the Cy_CapSense_RunTuner() function is not periodically called by +* the application program, the middleware operation is asynchronous to * the Tuner tool and the following disadvantages are applicable: -* * The raw counts displayed in the CAPSENSE™ Tuner tool may be filtered +* * The raw counts displayed in the CAPSENSE™ Tuner tool may be filtered * and/or non-filtered. Result - noise and SNR measurements are not accurate. -* * The CAPSENSE™ Tuner tool can read sensor data (such as raw counts) from +* * The CAPSENSE™ Tuner tool can read sensor data (such as raw counts) from * a scan multiply. Result - noise and SNR measurement are not accurate. -* * The CAPSENSE™ Tuner tool and Host controller should not change the +* * The CAPSENSE™ Tuner tool and Host controller should not change the * parameters via the Tuner interface - in async mode this leads to * abnormal behavior. * * Displaying detected gestures may be missed. * -* \warning -* This function executes received commands. Two commands -* CY_CAPSENSE_TU_CMD_ONE_SCAN_E and CY_CAPSENSE_TU_CMD_SUSPEND_E change -* the FW tuner module state to suspend. In this state, the function waits -* until CY_CAPSENSE_TU_CMD_RESUME_E is received. Use a callback mechanism -* of command receiving to avoid FW hanging. Refer to +* \warning +* This function executes received commands. Two commands +* CY_CAPSENSE_TU_CMD_ONE_SCAN_E and CY_CAPSENSE_TU_CMD_SUSPEND_E change +* the FW tuner module state to suspend. In this state, the function waits +* until CY_CAPSENSE_TU_CMD_RESUME_E is received. Use a callback mechanism +* of command receiving to avoid FW hanging. Refer to * the Function Usage section for examples. * * \param context * The pointer to the CAPSENSE™ context structure \ref cy_stc_capsense_context_t. * * \return -* The return parameter indicates whether a middleware re-start was executed +* The return parameter indicates whether a middleware re-start was executed * by this function or not: * - CY_CAPSENSE_STATUS_RESTART_DONE - Based on a received command, the * CAPSENSE™ was re-initialized. @@ -118,22 +118,22 @@ void Cy_CapSense_TuInitialize(cy_stc_capsense_context_t * context) * function. * * \funcusage -* +* * An example of synchronization with the Tuner tool using EzI2C: * \snippet capsense/snippet/main.c snippet_Cy_CapSense_Tuner_EzI2C -* +* * An example of synchronization with the Tuner tool using UART.
* Tuner Send callback implementation: Transmitting data through UART interface: * \snippet capsense/snippet/main.c snippet_TunerSend -* +* * Tuner Receive callback implementation: Receiving data from UART interface: * \snippet capsense/snippet/main.c snippet_TunerReceive -* +* * A part of the main.c FW flow with registering callbacks: * \snippet capsense/snippet/main.c snippet_Cy_CapSense_Tuner_UART -* +* * Refer to the \ref group_capsense_callbacks section for details. -* +* *******************************************************************************/ uint32_t Cy_CapSense_RunTuner(cy_stc_capsense_context_t * context) { @@ -155,7 +155,7 @@ uint32_t Cy_CapSense_RunTuner(cy_stc_capsense_context_t * context) do { - /* + /* * ONE_SCAN command could be interpreted as two commands: * RESUME till next call of this function and then * SUSPEND till next command receiving. @@ -278,7 +278,7 @@ uint32_t Cy_CapSense_RunTuner(cy_stc_capsense_context_t * context) } } while ((uint8_t)CY_CAPSENSE_TU_FSM_SUSPENDED == tunerState); - + return tunerStatus; } diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.h index 92e6704a7a..9f263e0622 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/capsense/cy_capsense_tuner.h @@ -90,7 +90,7 @@ void Cy_CapSense_TuInitialize(cy_stc_capsense_context_t * context); * Function Name: Cy_CapSense_CheckCommandIntegrity ****************************************************************************//** * -* \deprecated This function is obsolete and kept for backward compatibility only. +* \deprecated This function is obsolete and kept for backward compatibility only. * The Cy_CapSense_CheckTunerCmdIntegrity() function should be used instead. * * \param commandPacket diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_01.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_01.c index e86b3e4ef6..819907eeef 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_01.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_01.c @@ -32,12 +32,12 @@ const uint16_t cyhal_sources_per_mux[15] = { - 51, 51, 43, 43, 43, 43, 43, 43, 43, 33, 33, 97, 29, 34, 38, + 51, 51, 43, 43, 43, 43, 43, 43, 43, 33, 33, 97, 29, 34, 38, }; const bool cyhal_is_mux_1to1[15] = { - false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, + false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, }; const _cyhal_trigger_source_psoc6_01_t cyhal_mux0_sources[51] = @@ -769,21 +769,21 @@ const _cyhal_trigger_source_psoc6_01_t cyhal_mux14_sources[38] = const _cyhal_trigger_source_psoc6_01_t* cyhal_mux_to_sources[15] = { - cyhal_mux0_sources, - cyhal_mux1_sources, - cyhal_mux2_sources, - cyhal_mux3_sources, - cyhal_mux4_sources, - cyhal_mux5_sources, - cyhal_mux6_sources, - cyhal_mux7_sources, - cyhal_mux8_sources, - cyhal_mux9_sources, - cyhal_mux10_sources, - cyhal_mux11_sources, - cyhal_mux12_sources, - cyhal_mux13_sources, - cyhal_mux14_sources, + cyhal_mux0_sources, + cyhal_mux1_sources, + cyhal_mux2_sources, + cyhal_mux3_sources, + cyhal_mux4_sources, + cyhal_mux5_sources, + cyhal_mux6_sources, + cyhal_mux7_sources, + cyhal_mux8_sources, + cyhal_mux9_sources, + cyhal_mux10_sources, + cyhal_mux11_sources, + cyhal_mux12_sources, + cyhal_mux13_sources, + cyhal_mux14_sources, }; const uint8_t cyhal_dest_to_mux[479] = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c index 7ea9e3212a..06282b9f13 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c @@ -32,12 +32,12 @@ const uint16_t cyhal_sources_per_mux[17] = { - 87, 86, 135, 135, 223, 251, 27, 3, 127, 127, 12, 14, 1, 2, 5, 8, 8, + 87, 86, 135, 135, 223, 251, 27, 3, 127, 127, 12, 14, 1, 2, 5, 8, 8, }; const bool cyhal_is_mux_1to1[17] = { - false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, + false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, }; const _cyhal_trigger_source_psoc6_02_t cyhal_mux0_sources[87] = @@ -1361,23 +1361,23 @@ const _cyhal_trigger_source_psoc6_02_t cyhal_mux16_sources[8] = const _cyhal_trigger_source_psoc6_02_t* cyhal_mux_to_sources[17] = { - cyhal_mux0_sources, - cyhal_mux1_sources, - cyhal_mux2_sources, - cyhal_mux3_sources, - cyhal_mux4_sources, - cyhal_mux5_sources, - cyhal_mux6_sources, - cyhal_mux7_sources, - cyhal_mux8_sources, - cyhal_mux9_sources, - cyhal_mux10_sources, - cyhal_mux11_sources, - cyhal_mux12_sources, - cyhal_mux13_sources, - cyhal_mux14_sources, - cyhal_mux15_sources, - cyhal_mux16_sources, + cyhal_mux0_sources, + cyhal_mux1_sources, + cyhal_mux2_sources, + cyhal_mux3_sources, + cyhal_mux4_sources, + cyhal_mux5_sources, + cyhal_mux6_sources, + cyhal_mux7_sources, + cyhal_mux8_sources, + cyhal_mux9_sources, + cyhal_mux10_sources, + cyhal_mux11_sources, + cyhal_mux12_sources, + cyhal_mux13_sources, + cyhal_mux14_sources, + cyhal_mux15_sources, + cyhal_mux16_sources, }; const uint8_t cyhal_dest_to_mux[107] = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_03.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_03.c index 089a3a4ae0..c18a3a5e4b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_03.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_03.c @@ -32,12 +32,12 @@ const uint16_t cyhal_sources_per_mux[19] = { - 87, 87, 136, 136, 227, 255, 27, 3, 139, 127, 2, 12, 14, 1, 7, 3, 8, 8, 1, + 87, 87, 136, 136, 227, 255, 27, 3, 139, 127, 2, 12, 14, 1, 7, 3, 8, 8, 1, }; const bool cyhal_is_mux_1to1[19] = { - false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, + false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, }; const _cyhal_trigger_source_psoc6_03_t cyhal_mux0_sources[87] = @@ -1398,25 +1398,25 @@ const _cyhal_trigger_source_psoc6_03_t cyhal_mux18_sources[1] = const _cyhal_trigger_source_psoc6_03_t* cyhal_mux_to_sources[19] = { - cyhal_mux0_sources, - cyhal_mux1_sources, - cyhal_mux2_sources, - cyhal_mux3_sources, - cyhal_mux4_sources, - cyhal_mux5_sources, - cyhal_mux6_sources, - cyhal_mux7_sources, - cyhal_mux8_sources, - cyhal_mux9_sources, - cyhal_mux10_sources, - cyhal_mux11_sources, - cyhal_mux12_sources, - cyhal_mux13_sources, - cyhal_mux14_sources, - cyhal_mux15_sources, - cyhal_mux16_sources, - cyhal_mux17_sources, - cyhal_mux18_sources, + cyhal_mux0_sources, + cyhal_mux1_sources, + cyhal_mux2_sources, + cyhal_mux3_sources, + cyhal_mux4_sources, + cyhal_mux5_sources, + cyhal_mux6_sources, + cyhal_mux7_sources, + cyhal_mux8_sources, + cyhal_mux9_sources, + cyhal_mux10_sources, + cyhal_mux11_sources, + cyhal_mux12_sources, + cyhal_mux13_sources, + cyhal_mux14_sources, + cyhal_mux15_sources, + cyhal_mux16_sources, + cyhal_mux17_sources, + cyhal_mux18_sources, }; const uint8_t cyhal_dest_to_mux[108] = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_04.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_04.c index 12a13a08e9..3f82bae168 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_04.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_04.c @@ -32,12 +32,12 @@ const uint16_t cyhal_sources_per_mux[21] = { - 87, 87, 139, 139, 229, 256, 27, 3, 139, 127, 2, 51, 12, 14, 1, 7, 3, 8, 8, 1, 1, + 87, 87, 139, 139, 229, 256, 27, 3, 139, 127, 2, 51, 12, 14, 1, 7, 3, 8, 8, 1, 1, }; const bool cyhal_is_mux_1to1[21] = { - false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, + false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, }; const _cyhal_trigger_source_psoc6_04_t cyhal_mux0_sources[87] = @@ -1467,27 +1467,27 @@ const _cyhal_trigger_source_psoc6_04_t cyhal_mux20_sources[1] = const _cyhal_trigger_source_psoc6_04_t* cyhal_mux_to_sources[21] = { - cyhal_mux0_sources, - cyhal_mux1_sources, - cyhal_mux2_sources, - cyhal_mux3_sources, - cyhal_mux4_sources, - cyhal_mux5_sources, - cyhal_mux6_sources, - cyhal_mux7_sources, - cyhal_mux8_sources, - cyhal_mux9_sources, - cyhal_mux10_sources, - cyhal_mux11_sources, - cyhal_mux12_sources, - cyhal_mux13_sources, - cyhal_mux14_sources, - cyhal_mux15_sources, - cyhal_mux16_sources, - cyhal_mux17_sources, - cyhal_mux18_sources, - cyhal_mux19_sources, - cyhal_mux20_sources, + cyhal_mux0_sources, + cyhal_mux1_sources, + cyhal_mux2_sources, + cyhal_mux3_sources, + cyhal_mux4_sources, + cyhal_mux5_sources, + cyhal_mux6_sources, + cyhal_mux7_sources, + cyhal_mux8_sources, + cyhal_mux9_sources, + cyhal_mux10_sources, + cyhal_mux11_sources, + cyhal_mux12_sources, + cyhal_mux13_sources, + cyhal_mux14_sources, + cyhal_mux15_sources, + cyhal_mux16_sources, + cyhal_mux17_sources, + cyhal_mux18_sources, + cyhal_mux19_sources, + cyhal_mux20_sources, }; const uint8_t cyhal_dest_to_mux[112] = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1B/source/triggers/cyhal_triggers_cyw20829.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1B/source/triggers/cyhal_triggers_cyw20829.c index a4571a9af2..0243a21d32 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1B/source/triggers/cyhal_triggers_cyw20829.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1B/source/triggers/cyhal_triggers_cyw20829.c @@ -32,12 +32,12 @@ const uint16_t cyhal_sources_per_mux[15] = { - 25, 54, 54, 46, 64, 3, 19, 2, 3, 3, 4, 5, 1, 1, 2, + 25, 54, 54, 46, 64, 3, 19, 2, 3, 3, 4, 5, 1, 1, 2, }; const bool cyhal_is_mux_1to1[15] = { - false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, + false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, }; const _cyhal_trigger_source_cyw20829_t cyhal_mux0_sources[25] = @@ -388,21 +388,21 @@ const _cyhal_trigger_source_cyw20829_t cyhal_mux14_sources[2] = const _cyhal_trigger_source_cyw20829_t* cyhal_mux_to_sources[15] = { - cyhal_mux0_sources, - cyhal_mux1_sources, - cyhal_mux2_sources, - cyhal_mux3_sources, - cyhal_mux4_sources, - cyhal_mux5_sources, - cyhal_mux6_sources, - cyhal_mux7_sources, - cyhal_mux8_sources, - cyhal_mux9_sources, - cyhal_mux10_sources, - cyhal_mux11_sources, - cyhal_mux12_sources, - cyhal_mux13_sources, - cyhal_mux14_sources, + cyhal_mux0_sources, + cyhal_mux1_sources, + cyhal_mux2_sources, + cyhal_mux3_sources, + cyhal_mux4_sources, + cyhal_mux5_sources, + cyhal_mux6_sources, + cyhal_mux7_sources, + cyhal_mux8_sources, + cyhal_mux9_sources, + cyhal_mux10_sources, + cyhal_mux11_sources, + cyhal_mux12_sources, + cyhal_mux13_sources, + cyhal_mux14_sources, }; const uint8_t cyhal_dest_to_mux[59] = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7100.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7100.c index e9b1694064..0ecaf5f73c 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7100.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7100.c @@ -32,12 +32,12 @@ const uint16_t cyhal_sources_per_mux[24] = { - 69, 63, 82, 7, 0, 172, 94, 50, 9, 16, 188, 124, 156, 12, 72, 22, 2, 12, 6, 72, 72, 4, 4, 16, + 69, 63, 82, 7, 0, 172, 94, 50, 9, 16, 188, 124, 156, 12, 72, 22, 2, 12, 6, 72, 72, 4, 4, 16, }; const bool cyhal_is_mux_1to1[24] = { - false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, + false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, }; const _cyhal_trigger_source_xmc7100_t cyhal_mux0_sources[69] = @@ -1458,30 +1458,30 @@ const _cyhal_trigger_source_xmc7100_t cyhal_mux23_sources[16] = const _cyhal_trigger_source_xmc7100_t* cyhal_mux_to_sources[24] = { - cyhal_mux0_sources, - cyhal_mux1_sources, - cyhal_mux2_sources, - cyhal_mux3_sources, - NULL, - cyhal_mux5_sources, - cyhal_mux6_sources, - cyhal_mux7_sources, - cyhal_mux8_sources, - cyhal_mux9_sources, - cyhal_mux10_sources, - cyhal_mux11_sources, - cyhal_mux12_sources, - cyhal_mux13_sources, - cyhal_mux14_sources, - cyhal_mux15_sources, - cyhal_mux16_sources, - cyhal_mux17_sources, - cyhal_mux18_sources, - cyhal_mux19_sources, - cyhal_mux20_sources, - cyhal_mux21_sources, - cyhal_mux22_sources, - cyhal_mux23_sources, + cyhal_mux0_sources, + cyhal_mux1_sources, + cyhal_mux2_sources, + cyhal_mux3_sources, + NULL, + cyhal_mux5_sources, + cyhal_mux6_sources, + cyhal_mux7_sources, + cyhal_mux8_sources, + cyhal_mux9_sources, + cyhal_mux10_sources, + cyhal_mux11_sources, + cyhal_mux12_sources, + cyhal_mux13_sources, + cyhal_mux14_sources, + cyhal_mux15_sources, + cyhal_mux16_sources, + cyhal_mux17_sources, + cyhal_mux18_sources, + cyhal_mux19_sources, + cyhal_mux20_sources, + cyhal_mux21_sources, + cyhal_mux22_sources, + cyhal_mux23_sources, }; const uint8_t cyhal_dest_to_mux[407] = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7200.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7200.c index 93861739a4..a640329e6b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7200.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1C/source/triggers/cyhal_triggers_xmc7200.c @@ -32,12 +32,12 @@ const uint16_t cyhal_sources_per_mux[27] = { - 96, 77, 127, 7, 103, 168, 112, 69, 12, 16, 239, 178, 198, 15, 96, 22, 2, 15, 6, 96, 96, 5, 5, 20, 2, 2, 2, + 96, 77, 127, 7, 103, 168, 112, 69, 12, 16, 239, 178, 198, 15, 96, 22, 2, 15, 6, 96, 96, 5, 5, 20, 2, 2, 2, }; const bool cyhal_is_mux_1to1[27] = { - false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, + false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, }; const _cyhal_trigger_source_xmc7200_t cyhal_mux0_sources[96] = @@ -1936,33 +1936,33 @@ const _cyhal_trigger_source_xmc7200_t cyhal_mux26_sources[2] = const _cyhal_trigger_source_xmc7200_t* cyhal_mux_to_sources[27] = { - cyhal_mux0_sources, - cyhal_mux1_sources, - cyhal_mux2_sources, - cyhal_mux3_sources, - cyhal_mux4_sources, - cyhal_mux5_sources, - cyhal_mux6_sources, - cyhal_mux7_sources, - cyhal_mux8_sources, - cyhal_mux9_sources, - cyhal_mux10_sources, - cyhal_mux11_sources, - cyhal_mux12_sources, - cyhal_mux13_sources, - cyhal_mux14_sources, - cyhal_mux15_sources, - cyhal_mux16_sources, - cyhal_mux17_sources, - cyhal_mux18_sources, - cyhal_mux19_sources, - cyhal_mux20_sources, - cyhal_mux21_sources, - cyhal_mux22_sources, - cyhal_mux23_sources, - cyhal_mux24_sources, - cyhal_mux25_sources, - cyhal_mux26_sources, + cyhal_mux0_sources, + cyhal_mux1_sources, + cyhal_mux2_sources, + cyhal_mux3_sources, + cyhal_mux4_sources, + cyhal_mux5_sources, + cyhal_mux6_sources, + cyhal_mux7_sources, + cyhal_mux8_sources, + cyhal_mux9_sources, + cyhal_mux10_sources, + cyhal_mux11_sources, + cyhal_mux12_sources, + cyhal_mux13_sources, + cyhal_mux14_sources, + cyhal_mux15_sources, + cyhal_mux16_sources, + cyhal_mux17_sources, + cyhal_mux18_sources, + cyhal_mux19_sources, + cyhal_mux20_sources, + cyhal_mux21_sources, + cyhal_mux22_sources, + cyhal_mux23_sources, + cyhal_mux24_sources, + cyhal_mux25_sources, + cyhal_mux26_sources, }; const uint8_t cyhal_dest_to_mux[543] = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1D/source/triggers/cyhal_triggers_explorer.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1D/source/triggers/cyhal_triggers_explorer.c index 14fd4fb058..1a9a1e8213 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1D/source/triggers/cyhal_triggers_explorer.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/COMPONENT_CAT1D/source/triggers/cyhal_triggers_explorer.c @@ -32,12 +32,12 @@ const uint16_t cyhal_sources_per_mux[7] = { - 62, 3, 21, 73, 3, 65, 8, + 62, 3, 21, 73, 3, 65, 8, }; const bool cyhal_is_mux_1to1[7] = { - false, false, false, false, false, false, true, + false, false, false, false, false, false, true, }; const _cyhal_trigger_source_explorer_t cyhal_mux0_sources[62] = @@ -305,13 +305,13 @@ const _cyhal_trigger_source_explorer_t cyhal_mux6_sources[8] = const _cyhal_trigger_source_explorer_t* cyhal_mux_to_sources[7] = { - cyhal_mux0_sources, - cyhal_mux1_sources, - cyhal_mux2_sources, - cyhal_mux3_sources, - cyhal_mux4_sources, - cyhal_mux5_sources, - cyhal_mux6_sources, + cyhal_mux0_sources, + cyhal_mux1_sources, + cyhal_mux2_sources, + cyhal_mux3_sources, + cyhal_mux4_sources, + cyhal_mux5_sources, + cyhal_mux6_sources, }; const uint8_t cyhal_dest_to_mux[69] = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal.h index cb466aebf9..45c01bc033 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal.h @@ -59,7 +59,7 @@ /** * \addtogroup group_hal HAL Drivers -* This section documents the drivers which form the stable API of the ModusToolbox™ HAL. +* This section documents the drivers which form the stable API of the ModusToolboxâ„¢ HAL. * In order to remain portable across platforms and HAL versions, applications should * rely only on functionality documented in this section. */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_adc.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_adc.h index d0621fb7e3..2e03780135 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_adc.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_adc.h @@ -273,7 +273,7 @@ cy_rslt_t cyhal_adc_init(cyhal_adc_t *obj, cyhal_gpio_t pin, const cyhal_clock_t * @param[out] channels Array of pointers to ADC channel objects. This array must contain * a minimum of one (non-null) entry per channel that is enabled by the configurator * @param[in,out] num_channels Length of the `channels` array. If this value is too small for all of the channels - * enabled by the configurator an error will be returned. Will be updated with the + * enabled by the configurator an error will be returned. Will be updated with the * number of channels that were enabled by the configurator. * @param[in] cfg Configuration structure generated by the configurator. * @return The status of the init request diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_quaddec.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_quaddec.h index b098bdf4d7..2edffe12ca 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_quaddec.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_quaddec.h @@ -41,7 +41,7 @@ * signals. The signals are typically provided by a speed/position feedback system mounted on * a motor or trackball. The driver allows the user to invoke a callback function when a * particular event occurs. -* The signals, typically called A and B, are positioned 90° out-of-phase, which results in a Gray +* The signals, typically called A and B, are positioned 90° out-of-phase, which results in a Gray * code output (a sequence where only one bit changes on each count). It also allows detection of * direction and relative position. A third optional signal, named index, is used as a reference * to establish an absolute position once per rotation. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_sdhc.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_sdhc.h index 9b40247c4a..4b06d191f4 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_sdhc.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_sdhc.h @@ -458,7 +458,7 @@ cy_rslt_t cyhal_sdhc_write(cyhal_sdhc_t *obj, uint32_t address, const uint8_t *d * @param[in] start_addr Is the address of the first byte to erase * @param[in] length Number of 512 byte blocks (starting at start_addr) to erase * @param[in] timeout_ms Timeout value in ms for waiting/polling operations. If zero is provided - * for this parameter the default value will be used. See implementation specific + * for this parameter the default value will be used. See implementation specific * documentation for timeout details. * @return The status of the erase request * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_spi.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_spi.h index d6b5d85907..5ecfc830be 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_spi.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_spi.h @@ -83,7 +83,7 @@ * \section subsection_spi_moreinfor More Information * * * mtb-example-psoc6-spi-master: This example project demonstrates -* use of SPI (HAL) resource in PSoC® 6 MCU in Master mode to write data to an SPI slave. +* use of SPI (HAL) resource in PSoC® 6 MCU in Master mode to write data to an SPI slave. * */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_tdm.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_tdm.h index aa518a7b41..4be86dbe77 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_tdm.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_tdm.h @@ -96,7 +96,7 @@ * * Code examples (Github) * * -PSoC™ 6 MCU: Time Division Multiplexing (TDM) +PSoCâ„¢ 6 MCU: Time Division Multiplexing (TDM) */ #pragma once diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_usb_dev.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_usb_dev.h index 82d26288f5..9fe2ef3618 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_usb_dev.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include/cyhal_usb_dev.h @@ -84,7 +84,7 @@ * The following section shows how to add endpoint to the USB device and configure the endpoint using * \ref cyhal_usb_dev_endpoint_add. The interrupts associated with the endpoints are handled by a * callback function registered using \ref cyhal_usb_dev_register_endpoint_callback. -* The endpoint can also be configured using ModusToolbox™ USB Configurator +* The endpoint can also be configured using ModusToolboxâ„¢ USB Configurator * * \snippet hal_usb_dev.c snippet_cyhal_usb_dev_endpoint */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_adc_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_adc_impl.h index beb8681f98..e23a0c6a6d 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_adc_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_adc_impl.h @@ -37,7 +37,7 @@ extern "C" * \ingroup group_hal_impl_adc * \{ * \section group_hal_impl_adc_interconnect Interconnect - * In PSoC™ each ADC has a single input trigger which, when activated, will + * In PSoCâ„¢ each ADC has a single input trigger which, when activated, will * initiate an ADC scan. Each ADC also has an output trigger which will be * activated when a scan is completed. */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_clock_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_clock_impl.h index 432c1bf252..9aa814c839 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_clock_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_clock_impl.h @@ -196,7 +196,7 @@ extern const cyhal_resource_inst_t CYHAL_CLOCK_RSC_FAST[_CYHAL_SRSS_NUM_FAST]; extern const cyhal_clock_t CYHAL_CLOCK_TIMER; /** Timer Clock: This clock is intended as a source for high-frequency timers, such as the Energy Profiler and CPU SysTick clock. This clock is stopped in the hibernate power mode. */ extern const cyhal_resource_inst_t CYHAL_CLOCK_RSC_TIMER; -#endif +#endif #if defined(COMPONENT_CAT1A) || defined(COMPONENT_CAT1C) /** Slow Clock: This clock is used for the CM0+ CPU, Datawire and CRYPTO components and the associated CPUSS slow infrastructure. */ @@ -266,9 +266,9 @@ extern const cyhal_resource_inst_t CYHAL_CLOCK_RSC_HF[SRSS_NUM_HFROOT]; #if defined(PERI_PERI_PCLK_PCLK_GROUP_NR) -#define _CYHAL_CLOCK_PERI_GROUPS PERI_PERI_PCLK_PCLK_GROUP_NR +#define _CYHAL_CLOCK_PERI_GROUPS PERI_PERI_PCLK_PCLK_GROUP_NR #else -#define _CYHAL_CLOCK_PERI_GROUPS 1 +#define _CYHAL_CLOCK_PERI_GROUPS 1 #endif cy_rslt_t _cyhal_clock_allocate_channel(cyhal_clock_t *clock, cyhal_clock_block_t block, const void* funcs); @@ -321,7 +321,7 @@ static inline cy_rslt_t _cyhal_clock_allocate_peri(cyhal_clock_t *clock, cyhal_c return _cyhal_clock_allocate_channel(clock, block, funcs); } -#define cyhal_clock_allocate(clock, block) _cyhal_clock_allocate(clock, block) +#define cyhal_clock_allocate(clock, block) _cyhal_clock_allocate(clock, block) #if defined(__cplusplus) } diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_interconnect_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_interconnect_impl.h index edfbb7d7c5..feda0651a5 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_interconnect_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_interconnect_impl.h @@ -2,7 +2,7 @@ * \file cyhal_interconnect_impl.h * * \brief -* Implementation details for the PSoC™ 4/6 interconnect. +* Implementation details for the PSoCâ„¢ 4/6 interconnect. * ******************************************************************************** * \copyright diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_pwm_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_pwm_impl.h index 8221298f2e..318ea517e4 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_pwm_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_pwm_impl.h @@ -38,7 +38,7 @@ extern "C" { * \ingroup group_hal_impl * \{ * \section group_hal_impl_pwm_interconnect Interconnect - * In PSoC™ PWM channels can configure multiple input and output triggers + * In PSoCâ„¢ PWM channels can configure multiple input and output triggers * simultaneously. 1 or more input triggers can be configured to initiate * different PWM actions (e.g start, stop, reload, etc) with configurable edge * detection on that incoming signal. Output triggers are based on certain diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_quaddec_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_quaddec_impl.h index 440708f764..6841d4bbde 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_quaddec_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_quaddec_impl.h @@ -38,7 +38,7 @@ extern "C" { * \ingroup group_hal_impl * \{ * \section group_hal_impl_quaddec_interconnect Interconnect - * In PSoC™ Quadrature Decoder channels can configure multiple input and output + * In PSoCâ„¢ Quadrature Decoder channels can configure multiple input and output * triggers simultaneously. 1 or more input triggers can be configured to * initiate different PWM actions (e.g start, stop, reload, etc) with * configurable edge detection on that incoming signal. Output triggers are diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_system_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_system_impl.h index 84d5cf9bb0..7eb04a3afa 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_system_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_system_impl.h @@ -2,7 +2,7 @@ * \file cyhal_system_impl.h * * \brief -* Provides a PSoC™ Specific interface for interacting with the Infineon power +* Provides a PSoCâ„¢ Specific interface for interacting with the Infineon power * management and system clock configuration. This interface abstracts out the * chip specific details. If any chip specific functionality is necessary, or * performance is critical the low level functions can be used directly. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_timer_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_timer_impl.h index a66ea5d6e2..833e632305 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_timer_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_timer_impl.h @@ -37,7 +37,7 @@ * range that is supported by \ref cyhal_timer_set_frequency is: 1526 hz - * 100 Mhz * \section group_hal_impl_timer_interconnect Interconnect - * In PSoC™ Timer channels can configure multiple input and output triggers + * In PSoCâ„¢ Timer channels can configure multiple input and output triggers * simultaneously. 1 or more input triggers can be configured to initiate * different Timer actions (e.g start, stop, reload, etc) with configurable * edge detection on that incoming signal. Output triggers are based on certain diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_trng_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_trng_impl.h index 1c94aa3b49..8c91ee19f7 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_trng_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_trng_impl.h @@ -2,7 +2,7 @@ * \file cyhal_trng_impl.h * * \brief -* Provides an implementation of the ModusToolbox™ TRNG HAL API. +* Provides an implementation of the ModusToolboxâ„¢ TRNG HAL API. * ******************************************************************************** * \copyright diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_wdt_impl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_wdt_impl.h index f01c1dfa81..d019aea0fc 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_wdt_impl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/include_pvt/cyhal_wdt_impl.h @@ -30,7 +30,7 @@ * \addtogroup group_hal_impl_wdt WDT (Watchdog Timer) * \ingroup group_hal_impl * \{ -* The CAT1 (PSoC™ 6) WDT is only capable of supporting certain timeout ranges below its maximum timeout. +* The CAT1 (PSoCâ„¢ 6) WDT is only capable of supporting certain timeout ranges below its maximum timeout. * As a result, any unsupported timeouts given to the HAL WDT are rounded up to the nearest supported value. * The following table describes the unsupported ranges and the timeout values they are rounded to. * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_audio_common.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_audio_common.c index 9df0757e98..5119aba156 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_audio_common.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_audio_common.c @@ -206,7 +206,7 @@ static uint8_t _cyhal_audioss_get_block_from_irqn(_cyhal_system_irq_t irqn) } } -#if defined(COMPONENT_CAT2) /* PSoC™ 4 uses a PCLK */ +#if defined(COMPONENT_CAT2) /* PSoCâ„¢ 4 uses a PCLK */ #define _CYHAL_AUDIOSS_USES_PCLK static const en_clk_dst_t _cyhal_audioss_clock[] = { @@ -576,8 +576,8 @@ cy_rslt_t _cyhal_audioss_init(_cyhal_audioss_t *obj, const _cyhal_audioss_pins_t mclk_map_rx = (NULL != rx_pins) ? _CYHAL_UTILS_GET_RESOURCE(rx_pins->mclk, cyhal_pin_map_audioss_clk_i2s_if) : NULL; mclk_map_tx = (NULL != tx_pins) /* If non-null, we know the mclk pins must be the same, so can reuse the rx value */ - ? ((NULL != mclk_map_rx) ? mclk_map_rx : _CYHAL_UTILS_GET_RESOURCE(tx_pins->mclk, cyhal_pin_map_audioss_clk_i2s_if)) - : NULL; + ? ((NULL != mclk_map_rx) ? mclk_map_rx : _CYHAL_UTILS_GET_RESOURCE(tx_pins->mclk, cyhal_pin_map_audioss_clk_i2s_if)) + : NULL; uint8_t mclk_rx_dm = CYHAL_PIN_MAP_DRIVE_MODE_AUDIOSS_CLK_I2S_IF; #if defined(_CYHAL_AUDIOSS_RX_ENABLED) diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_clock.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_clock.c index 558d59cbbf..8d968f8450 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_clock.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_clock.c @@ -298,7 +298,7 @@ const cyhal_resource_inst_t CYHAL_CLOCK_RSC_LPECO_PRESCALER = { CYHAL_RSC_CLOCK, #endif /* COMPONENT_CAT1C uses a hybrid approach from what was done on CAT1A and CAT1B. Facelift CAT1C supports ClkPeri as well -as Peripheral Clock Groups. For CAT1C, ClkPeri is used to source everything in Peripheral Clock Group 0 (HF0) and other +as Peripheral Clock Groups. For CAT1C, ClkPeri is used to source everything in Peripheral Clock Group 0 (HF0) and other Peripheral Clock Groups derive from one of the HFClks and have their own group divider. Thus we declare RSC_PERI Peri array for CAT1C */ const cyhal_resource_inst_t CYHAL_CLOCK_RSC_PERI[CY_PERI_GROUP_NR] = @@ -2236,7 +2236,7 @@ static cy_rslt_t _cyhal_clock_set_divider_pump(cyhal_clock_t *clock, uint32_t di Cy_SysClk_ClkPumpSetDivider(divVal); return CY_RSLT_SUCCESS; } -#define _cyhal_clock_get_sources_pump _cyhal_clock_get_sources_hf +#define _cyhal_clock_get_sources_pump _cyhal_clock_get_sources_hf static cy_rslt_t _cyhal_clock_set_source_pump(cyhal_clock_t *clock, const cyhal_clock_t *source) { CY_UNUSED_PARAMETER(clock); @@ -2984,108 +2984,108 @@ const void* _cyhal_clock_get_funcs_peripheral(void) { return &FUNCS_EMPTY/*FUNCS static const cyhal_clock_funcs_t* _cyhal_clock_get_funcs_all(cyhal_clock_block_t block) { - switch (block) - { - case CYHAL_CLOCK_BLOCK_IMO: - return &FUNCS_IMO; + switch (block) + { + case CYHAL_CLOCK_BLOCK_IMO: + return &FUNCS_IMO; #if SRSS_ECO_PRESENT - case CYHAL_CLOCK_BLOCK_ECO: - return &FUNCS_ECO; + case CYHAL_CLOCK_BLOCK_ECO: + return &FUNCS_ECO; #endif - case CYHAL_CLOCK_BLOCK_EXT: - return &FUNCS_EXT; + case CYHAL_CLOCK_BLOCK_EXT: + return &FUNCS_EXT; #if SRSS_ALTHF_PRESENT - case CYHAL_CLOCK_BLOCK_ALTHF: - return &FUNCS_ALTHF; + case CYHAL_CLOCK_BLOCK_ALTHF: + return &FUNCS_ALTHF; #endif #if SRSS_ALTLF_PRESENT - case CYHAL_CLOCK_BLOCK_ALTLF: - return &FUNCS_ALTLF; + case CYHAL_CLOCK_BLOCK_ALTLF: + return &FUNCS_ALTLF; #endif - case CYHAL_CLOCK_BLOCK_ILO: - return &FUNCS_ILO; + case CYHAL_CLOCK_BLOCK_ILO: + return &FUNCS_ILO; #if _CYHAL_SRSS_PILO_PRESENT - case CYHAL_CLOCK_BLOCK_PILO: - return &FUNCS_PILO; + case CYHAL_CLOCK_BLOCK_PILO: + return &FUNCS_PILO; #endif #if SRSS_BACKUP_PRESENT - case CYHAL_CLOCK_BLOCK_WCO: - return &FUNCS_WCO; + case CYHAL_CLOCK_BLOCK_WCO: + return &FUNCS_WCO; #endif #if defined(COMPONENT_CAT1B) || (SRSS_MFO_PRESENT) - case CYHAL_CLOCK_BLOCK_MFO: - return &FUNCS_MFO; + case CYHAL_CLOCK_BLOCK_MFO: + return &FUNCS_MFO; #endif - case CYHAL_CLOCK_BLOCK_PATHMUX: - return &FUNCS_PATHMUX; + case CYHAL_CLOCK_BLOCK_PATHMUX: + return &FUNCS_PATHMUX; #if defined(COMPONENT_CAT1A) || defined(COMPONENT_CAT1C) || (SRSS_FLL_PRESENT) - case CYHAL_CLOCK_BLOCK_FLL: - return &FUNCS_FLL; + case CYHAL_CLOCK_BLOCK_FLL: + return &FUNCS_FLL; #endif - case CYHAL_CLOCK_BLOCK_LF: - return &FUNCS_LF; + case CYHAL_CLOCK_BLOCK_LF: + return &FUNCS_LF; #if defined(COMPONENT_CAT1B) || (SRSS_MFO_PRESENT) - case CYHAL_CLOCK_BLOCK_MF: - return &FUNCS_MF; + case CYHAL_CLOCK_BLOCK_MF: + return &FUNCS_MF; #endif - case CYHAL_CLOCK_BLOCK_HF: - return &FUNCS_HF; - case CYHAL_CLOCK_BLOCK_PUMP: - return &FUNCS_PUMP; - case CYHAL_CLOCK_BLOCK_BAK: - return &FUNCS_BAK; - case CYHAL_CLOCK_BLOCK_ALT_SYS_TICK: - return &FUNCS_ALT_SYS_TICK; - case CYHAL_CLOCK_BLOCK_PERI: - return &FUNCS_PERI; + case CYHAL_CLOCK_BLOCK_HF: + return &FUNCS_HF; + case CYHAL_CLOCK_BLOCK_PUMP: + return &FUNCS_PUMP; + case CYHAL_CLOCK_BLOCK_BAK: + return &FUNCS_BAK; + case CYHAL_CLOCK_BLOCK_ALT_SYS_TICK: + return &FUNCS_ALT_SYS_TICK; + case CYHAL_CLOCK_BLOCK_PERI: + return &FUNCS_PERI; #if defined(COMPONENT_CAT1A) #if (_CYHAL_SRSS_NUM_PLL > 0) - case CYHAL_CLOCK_BLOCK_PLL: - return &FUNCS_PLL; + case CYHAL_CLOCK_BLOCK_PLL: + return &FUNCS_PLL; #endif #endif #if defined(COMPONENT_CAT1C) case CYHAL_CLOCK_BLOCK_MEM: return &FUNCS_MEM; -#endif +#endif #if defined(COMPONENT_CAT1A) || defined(COMPONENT_CAT1C) #if defined(COMPONENT_CAT1A) - case CYHAL_CLOCK_BLOCK_TIMER: - return &FUNCS_TIMER; + case CYHAL_CLOCK_BLOCK_TIMER: + return &FUNCS_TIMER; #endif - case CYHAL_CLOCK_BLOCK_FAST: - return &FUNCS_FAST; - case CYHAL_CLOCK_BLOCK_SLOW: - return &FUNCS_SLOW; + case CYHAL_CLOCK_BLOCK_FAST: + return &FUNCS_FAST; + case CYHAL_CLOCK_BLOCK_SLOW: + return &FUNCS_SLOW; #endif #if defined(COMPONENT_CAT1B) || defined(COMPONENT_CAT1C) #if (_CYHAL_SRSS_NUM_PLL > 0) - case CYHAL_CLOCK_BLOCK_PLL200: + case CYHAL_CLOCK_BLOCK_PLL200: return &FUNCS_PLL200; - case CYHAL_CLOCK_BLOCK_PLL400: - return &FUNCS_PLL400; + case CYHAL_CLOCK_BLOCK_PLL400: + return &FUNCS_PLL400; +#endif #endif -#endif #if defined(COMPONENT_CAT1B) - case CYHAL_CLOCK_BLOCK_IHO: - return &FUNCS_IHO; + case CYHAL_CLOCK_BLOCK_IHO: + return &FUNCS_IHO; #if SRSS_ECO_PRESENT - case CYHAL_CLOCK_BLOCK_ECO_PRESCALER: - return &FUNCS_ECO_PRESCALER; + case CYHAL_CLOCK_BLOCK_ECO_PRESCALER: + return &FUNCS_ECO_PRESCALER; #endif #if SRSS_BACKUP_S40E_LPECO_PRESENT case CY_SYSCLK_CLKLF_IN_LPECO_PRESCALER: - return &FUNCS_LPECO_PRESCALER; + return &FUNCS_LPECO_PRESCALER; #endif #endif - default: - return &FUNCS_PERIPHERAL; - } + default: + return &FUNCS_PERIPHERAL; + } } -#define _CYHAL_CLOCK_CREATE(x,y) { .block = (CYHAL_CLOCK_BLOCK_##x), .channel = (y), .reserved = false, .funcs = &(FUNCS_##x) } +#define _CYHAL_CLOCK_CREATE(x,y) { .block = (CYHAL_CLOCK_BLOCK_##x), .channel = (y), .reserved = false, .funcs = &(FUNCS_##x) } const cyhal_clock_t CYHAL_CLOCK_IMO = _CYHAL_CLOCK_CREATE(IMO, 0); const cyhal_clock_t CYHAL_CLOCK_EXT = _CYHAL_CLOCK_CREATE(EXT, 0); diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_dma_dmac.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_dma_dmac.c index 50088f6efb..c8e5a19ebc 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_dma_dmac.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_dma_dmac.c @@ -534,7 +534,7 @@ cy_rslt_t _cyhal_dma_dmac_configure(cyhal_dma_t *obj, const cyhal_dma_cfg_t *cfg return CYHAL_DMA_RSLT_ERR_INVALID_TRANSFER_SIZE; #if defined(CY_IP_M0S8CPUSSV3_DMAC) - // PSoC™ 4 devices do not support automatically disabling the channel on completion + // PSoCâ„¢ 4 devices do not support automatically disabling the channel on completion if ((cfg->action == CYHAL_DMA_TRANSFER_BURST_DISABLE) || (cfg->action == CYHAL_DMA_TRANSFER_FULL_DISABLE)) { diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_keyscan.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_keyscan.c index df6590f35a..2772bf10bf 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_keyscan.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_keyscan.c @@ -29,7 +29,7 @@ * \addtogroup group_hal_impl_keyscan KeyScan * \ingroup group_hal_impl * \{ - * On PSoC™ devices, the KeyScan peripheral is clocked from the shared source CLK_MF. + * On PSoCâ„¢ devices, the KeyScan peripheral is clocked from the shared source CLK_MF. * If `NULL` is passed for the `clk` argument to \ref cyhal_keyscan_init, the KeyScan * HAL will automatically reserve and enable CLK_MF. If the KeyScan driver needs to be * used in combination with another driver that also requires CLK_MF, use the Clock diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_lptimer.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_lptimer.c index 71eddad58e..d2ee89ee15 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_lptimer.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_lptimer.c @@ -259,7 +259,7 @@ static uint32_t _cyhal_lptimer_set_delay_common(cyhal_lptimer_t *obj, uint32_t d // If neither is enabled, return Error Disabled. // We do not check to see if Counter0 is enabled as it is not used // for this IP implementation. - if ((Cy_MCWDT_GetEnabledStatus(obj->base, CY_MCWDT_CTR1) == 0UL) + if ((Cy_MCWDT_GetEnabledStatus(obj->base, CY_MCWDT_CTR1) == 0UL) || (Cy_MCWDT_GetEnabledStatus(obj->base, CY_MCWDT_CTR2) == 0UL)) { return CYHAL_LPTIMER_RSLT_ERR_DISABLED; @@ -391,7 +391,7 @@ static uint32_t _cyhal_lptimer_set_delay_common(cyhal_lptimer_t *obj, uint32_t d // Timeout has occurred. There could have been a clock failure while waiting for the count value to update. cyhal_system_critical_section_exit(critical_section); return CYHAL_LPTIMER_RSLT_ERR_DISABLED; - } + } uint16_t c0_match = (uint16_t)(c0_current_ticks + delay); // Changes can take up to 2 clk_lf cycles to propagate. If we set the match within this window of the current value, diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_qspi.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_qspi.c index e0c2721671..197ea844c9 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_qspi.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_qspi.c @@ -967,7 +967,7 @@ cy_rslt_t cyhal_qspi_init( CY_ASSERT(NULL != obj); CY_ASSERT(NULL != pin_set); - /* mode (CPOL and CPHA) are not supported in CAT1 (PSoC™ 6) */ + /* mode (CPOL and CPHA) are not supported in CAT1 (PSoCâ„¢ 6) */ CY_UNUSED_PARAMETER(mode); #if defined(CY_DEVICE_CYW20829) diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_quaddec.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_quaddec.c index 0449bd7a3c..0f75ff2302 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_quaddec.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_quaddec.c @@ -320,7 +320,7 @@ cy_rslt_t cyhal_quaddec_init(cyhal_quaddec_t *obj, cyhal_gpio_t phi_a, cyhal_gpi NULL, NULL, _cyhal_quaddec_get_phy_a_input_dest, &obj->tcpwm.resource); _cyhal_quaddec_get_phy_a_input_dest_trig_idx++; } while (CY_RSLT_SUCCESS != rslt && - _cyhal_quaddec_get_phy_a_input_dest_trig_idx + _cyhal_quaddec_get_phy_a_input_dest_trig_idx < _CYHAL_TCPWM_TRIGGER_INPUTS_PER_BLOCK[obj->tcpwm.resource.block_num]); } } @@ -354,7 +354,7 @@ cy_rslt_t cyhal_quaddec_init(cyhal_quaddec_t *obj, cyhal_gpio_t phi_a, cyhal_gpi if (rslt == CY_RSLT_SUCCESS) { #if defined(COMPONENT_CAT1A) || defined(COMPONENT_CAT1B) || defined(COMPONENT_CAT1C) // already initialized above - obj->tcpwm.inputs[phy_a_idx] = phy_a_src;; + obj->tcpwm.inputs[phy_a_idx] = phy_a_src;; rslt = cyhal_quaddec_connect_digital(obj, obj->tcpwm.inputs[phy_a_idx], CYHAL_QUADDEC_INPUT_PHI_A); #else rslt = _cyhal_quadec_pin_init(obj, phi_a, &(obj->phi_a), CYHAL_SIGNAL_TYPE_LEVEL, CYHAL_QUADDEC_INPUT_PHI_A); diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_rtc.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_rtc.c index 1ce4a3afb8..5da1671ef2 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_rtc.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_rtc.c @@ -39,7 +39,7 @@ * \ingroup group_hal_impl * \{ * -* Internally the CAT1 (PSoC™ 6) RTC only stores the year as a two digit BCD value +* Internally the CAT1 (PSoCâ„¢ 6) RTC only stores the year as a two digit BCD value * (0-99); no century information is stored. On RTC initialization the HAL must, * as a result, assume a default century. If cyhal_rtc_write has been called * with a different century than the default, its value must be stored and that diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_sdhc.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_sdhc.c index 9e5d219a11..ee0bf57eb1 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_sdhc.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_sdhc.c @@ -2879,7 +2879,7 @@ cy_rslt_t cyhal_sdio_init(cyhal_sdio_t *obj, cyhal_gpio_t cmd, cyhal_gpio_t clk, const cyhal_sdio_configurator_t cfg = { .resource = NULL, .host_config = &host_config, - .card_config = &card_config, + .card_config = &card_config, .clock = NULL, .gpios = {clk, cmd, { data0, data1, data2, data3 } } }; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_spi.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_spi.c index fc5c3b92f5..beb9d0e6b3 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_spi.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_spi.c @@ -179,7 +179,7 @@ static cy_rslt_t _cyhal_spi_int_frequency(cyhal_spi_t *obj, uint32_t hz, uint8_t } else { - /* Slave requires such frequency: required_frequency = N / ((0.5 * desired_period) – 20 nsec - tDSI, + /* Slave requires such frequency: required_frequency = N / ((0.5 * desired_period) – 20 nsec - tDSI, * N is 3 when "Enable Input Glitch Filter" is false and 4 when true. * tDSI Is external master delay which is assumed to be 16.66 nsec */ @@ -389,7 +389,7 @@ static cy_rslt_t _cyhal_spi_get_ssel_map_idx(cyhal_gpio_t ssel, const cyhal_reso }; static const size_t ssel_s_pin_maps_sizes_bytes[] = { #if defined(CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT0) - sizeof(cyhal_pin_map_scb_spi_s_select0), + sizeof(cyhal_pin_map_scb_spi_s_select0), #endif #if defined(CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT1) sizeof(cyhal_pin_map_scb_spi_s_select1), diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_syspm.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_syspm.c index 3ce529f939..2be2d0098b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_syspm.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_syspm.c @@ -32,7 +32,7 @@ * \ingroup group_hal_impl * \{ * \section section_hal_impl_syspm_set_system - * + * * The callback mode \ref CYHAL_SYSPM_AFTER_DS_WFI_TRANSITION is only applicable * for CAT1B devices. * @@ -47,7 +47,7 @@ * \ingroup group_hal_impl * \{ * \section section_hal_impl_syspm_set_system - * + * * Setting the system state is unsupported on CAT2 devices. For CAT2 devices, * \ref CYHAL_SYSPM_RSLT_ERR_NOT_SUPPORTED will be returned in the function \ref cyhal_syspm_set_system_state. * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_helium_utils.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_helium_utils.h index 7609d329f0..85688575eb 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_helium_utils.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_helium_utils.h @@ -180,7 +180,7 @@ __STATIC_INLINE arm_status arm_mat_trans_32bit_generic_mve( while (blkCnt > 0U) { vecIn = vldrwq_gather_shifted_offset_u32(pDataC, vecOffs); - vstrwq(pDataDestR, vecIn); + vstrwq(pDataDestR, vecIn); pDataDestR += 4; pDataC = pDataC + srcCols * 4; /* diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_math.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_math.h index 48bee62cd9..2483e6ecfb 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_math.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_math.h @@ -29,7 +29,7 @@ * ------------ * * This user manual describes the CMSIS DSP software library, - * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor + * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor * based devices. * * The library is divided into a number of functions each covering a specific category: @@ -91,8 +91,8 @@ * * The library is now tested on Fast Models building with cmake. * Core M0, M7, A5 are tested. - * - * + * + * * * Building the Library * ------------ @@ -129,12 +129,12 @@ * - ARM_MATH_NEON: * * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions. - * It is not enabled by default when Neon is available because performances are + * It is not enabled by default when Neon is available because performances are * dependent on the compiler and target architecture. * * - ARM_MATH_NEON_EXPERIMENTAL: * - * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of + * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of * of some DSP functions. Experimental Neon versions currently do not have better * performances than the scalar versions. * @@ -309,11 +309,11 @@ * generated from the scikit-learn object. Some examples are given in * DSP/Testing/PatternGeneration/SVM.py * - * If more than 2 classes are needed, the functions in this folder + * If more than 2 classes are needed, the functions in this folder * will have to be used, as building blocks, to do multi-class classification. * * No multi-class classification is provided in this SVM folder. - * + * */ @@ -372,7 +372,7 @@ extern "C" /* Included for instrinsics definitions */ -#if defined (_MSC_VER ) +#if defined (_MSC_VER ) #include #define __STATIC_FORCEINLINE static __forceinline #define __STATIC_INLINE static __inline @@ -715,7 +715,7 @@ extern "C" * @brief 16-bit float 64-bit vector data type. */ typedef __ALIGNED(2) float16x4_t f16x4_t; -#endif +#endif /** * @brief 32-bit floating-point 128-bit vector triplet data type @@ -774,7 +774,7 @@ extern "C" * @brief 16-bit floating-point 64-bit vector quadruplet data type */ typedef float16x4x4_t f16x4x4_t; -#endif +#endif /** * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format @@ -839,7 +839,7 @@ extern "C" float16x4_t f; int16x4_t i; } any16x4_t; -#endif +#endif /** * @brief 32-bit status 64-bit vector data type. @@ -1011,7 +1011,7 @@ __STATIC_FORCEINLINE q31_t read_q7x4_ia ( memcpy (&val, *pQ7, 4); #else val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) | ((*pQ7)[0] & 0x0FF); -#endif +#endif *pQ7 += 4; @@ -1031,7 +1031,7 @@ __STATIC_FORCEINLINE q31_t read_q7x4_da ( memcpy (&val, *pQ7, 4); #else val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) << 8) | ((*pQ7)[0] & 0x0FF); -#endif +#endif *pQ7 -= 4; return (val); @@ -1964,7 +1964,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) { float32_t coeffs[8][4]; /**< Points to the array of modified coefficients. The array is of length 32. There is one per stage */ } arm_biquad_mod_coef_f32; -#endif +#endif /** * @brief Processing function for the Q15 Biquad cascade filter. @@ -2073,11 +2073,11 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) void arm_biquad_cascade_df1_mve_init_f32( arm_biquad_casd_df1_inst_f32 * S, uint8_t numStages, - const float32_t * pCoeffs, - arm_biquad_mod_coef_f32 * pCoeffsMod, + const float32_t * pCoeffs, + arm_biquad_mod_coef_f32 * pCoeffsMod, float32_t * pState); #endif - + void arm_biquad_cascade_df1_init_f32( arm_biquad_casd_df1_inst_f32 * S, uint8_t numStages, @@ -2171,7 +2171,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) /** * @brief Compute the logical bitwise NOT of a fixed-point vector. - * @param[in] pSrc points to input vector + * @param[in] pSrc points to input vector * @param[out] pDst points to output vector * @param[in] blockSize number of samples in each vector * @return none @@ -2183,7 +2183,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) /** * @brief Compute the logical bitwise NOT of a fixed-point vector. - * @param[in] pSrc points to input vector + * @param[in] pSrc points to input vector * @param[out] pDst points to output vector * @param[in] blockSize number of samples in each vector * @return none @@ -2195,7 +2195,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) /** * @brief Compute the logical bitwise NOT of a fixed-point vector. - * @param[in] pSrc points to input vector + * @param[in] pSrc points to input vector * @param[out] pDst points to output vector * @param[in] blockSize number of samples in each vector * @return none @@ -2280,11 +2280,11 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) /** * @brief Instance structure for the sorting algorithms. */ - typedef struct + typedef struct { arm_sort_alg alg; /**< Sorting algorithm selected */ arm_sort_dir dir; /**< Sorting order (direction) */ - } arm_sort_instance_f32; + } arm_sort_instance_f32; /** * @param[in] S points to an instance of the sorting structure. @@ -2293,9 +2293,9 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) * @param[in] blockSize number of samples to process. */ void arm_sort_f32( - const arm_sort_instance_f32 * S, - float32_t * pSrc, - float32_t * pDst, + const arm_sort_instance_f32 * S, + float32_t * pSrc, + float32_t * pDst, uint32_t blockSize); /** @@ -2304,18 +2304,18 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) * @param[in] dir Sorting order. */ void arm_sort_init_f32( - arm_sort_instance_f32 * S, - arm_sort_alg alg, - arm_sort_dir dir); + arm_sort_instance_f32 * S, + arm_sort_alg alg, + arm_sort_dir dir); /** * @brief Instance structure for the sorting algorithms. */ - typedef struct + typedef struct { arm_sort_dir dir; /**< Sorting order (direction) */ float32_t * buffer; /**< Working buffer */ - } arm_merge_sort_instance_f32; + } arm_merge_sort_instance_f32; /** * @param[in] S points to an instance of the sorting structure. @@ -2368,7 +2368,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) * @param[in] blockSize number of samples of output data. */ void arm_spline_f32( - arm_spline_instance_f32 * S, + arm_spline_instance_f32 * S, const float32_t * xq, float32_t * pDst, uint32_t blockSize); @@ -2388,7 +2388,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) arm_spline_type type, const float32_t * x, const float32_t * y, - uint32_t n, + uint32_t n, float32_t * coeffs, float32_t * tempBuffer); @@ -2401,7 +2401,7 @@ __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) uint16_t numCols; /**< number of columns of the matrix. */ float32_t *pData; /**< points to the data of the matrix. */ } arm_matrix_instance_f32; - + /** * @brief Instance structure for the floating-point matrix structure. */ @@ -4765,7 +4765,7 @@ arm_status arm_fir_decimate_init_f32( uint32_t blockSize); -#if defined(ARM_MATH_NEON) +#if defined(ARM_MATH_NEON) void arm_biquad_cascade_df2T_compute_coefs_f32( arm_biquad_cascade_df2T_instance_f32 * S, uint8_t numStages, @@ -7934,7 +7934,7 @@ typedef struct */ -void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, +void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, uint32_t nbOfSupportVectors, uint32_t vectorDimension, float32_t intercept, @@ -7950,9 +7950,9 @@ void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, * @return none. * */ - -void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S, - const float32_t * in, + +void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S, + const float32_t * in, int32_t * pResult); @@ -7973,7 +7973,7 @@ void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S, */ -void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, +void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, uint32_t nbOfSupportVectors, uint32_t vectorDimension, float32_t intercept, @@ -7993,8 +7993,8 @@ void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, * @return none. * */ -void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S, - const float32_t * in, +void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S, + const float32_t * in, int32_t * pResult); @@ -8012,7 +8012,7 @@ void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S, * */ -void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, +void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, uint32_t nbOfSupportVectors, uint32_t vectorDimension, float32_t intercept, @@ -8030,8 +8030,8 @@ void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, * @return none. * */ -void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S, - const float32_t * in, +void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S, + const float32_t * in, int32_t * pResult); /** @@ -8049,7 +8049,7 @@ void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S, * */ -void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, +void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, uint32_t nbOfSupportVectors, uint32_t vectorDimension, float32_t intercept, @@ -8068,8 +8068,8 @@ void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, * @return none. * */ -void arm_svm_sigmoid_predict_f32(const arm_svm_sigmoid_instance_f32 *S, - const float32_t * in, +void arm_svm_sigmoid_predict_f32(const arm_svm_sigmoid_instance_f32 *S, + const float32_t * in, int32_t * pResult); @@ -8098,8 +8098,8 @@ typedef struct */ -uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, - const float32_t * in, +uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, + const float32_t * in, float32_t *pBuffer); /** @@ -8197,8 +8197,8 @@ float32_t arm_kullback_leibler_f32(const float32_t * pSrcA * @return Kullback-Leibler Divergence D(A || B) * */ -float64_t arm_kullback_leibler_f64(const float64_t * pSrcA, - const float64_t * pSrcB, +float64_t arm_kullback_leibler_f64(const float64_t * pSrcA, + const float64_t * pSrcB, uint32_t blockSize); @@ -8925,11 +8925,11 @@ float32_t arm_yule_distance(const uint32_t *pA, const uint32_t *pB, uint32_t num #define LOW_OPTIMIZATION_EXIT #define IAR_ONLY_LOW_OPTIMIZATION_ENTER #define IAR_ONLY_LOW_OPTIMIZATION_EXIT - + #elif defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) #define LOW_OPTIMIZATION_ENTER #define LOW_OPTIMIZATION_EXIT - #define IAR_ONLY_LOW_OPTIMIZATION_ENTER + #define IAR_ONLY_LOW_OPTIMIZATION_ENTER #define IAR_ONLY_LOW_OPTIMIZATION_EXIT #endif diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_mve_tables.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_mve_tables.h index 4d2c135ac6..c07f988f5c 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_mve_tables.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/arm_mve_tables.h @@ -32,10 +32,10 @@ #include "arm_math.h" - - + + #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) @@ -98,7 +98,7 @@ extern float32_t rearranged_twiddle_stride3_4096_f32[2728]; -#if defined(ARM_MATH_MVEI) +#if defined(ARM_MATH_MVEI) #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) @@ -159,7 +159,7 @@ extern q31_t rearranged_twiddle_stride3_4096_q31[2728]; -#if defined(ARM_MATH_MVEI) +#if defined(ARM_MATH_MVEI) #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) @@ -220,7 +220,7 @@ extern q15_t rearranged_twiddle_stride3_4096_q15[2728]; -#if defined(ARM_MATH_MVEI) +#if defined(ARM_MATH_MVEI) #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cachel1_armv7.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cachel1_armv7.h index d2c3e2291f..d171691f46 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cachel1_armv7.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cachel1_armv7.h @@ -48,7 +48,7 @@ #ifndef __SCB_ICACHE_LINE_SIZE #define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */ -#endif +#endif /** \brief Enable I-Cache @@ -328,10 +328,10 @@ __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void) __STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize) { #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { + if ( dsize > 0 ) { int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - + __DSB(); do { @@ -358,10 +358,10 @@ __STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsiz __STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize) { #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { + if ( dsize > 0 ) { int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - + __DSB(); do { @@ -388,10 +388,10 @@ __STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize) { #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U) - if ( dsize > 0 ) { + if ( dsize > 0 ) { int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U)); uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */; - + __DSB(); do { diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armcc.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armcc.h index 237ff6ec3e..92acbd81b6 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armcc.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armcc.h @@ -63,9 +63,9 @@ #ifndef __STATIC_INLINE #define __STATIC_INLINE static __inline #endif -#ifndef __STATIC_FORCEINLINE +#ifndef __STATIC_FORCEINLINE #define __STATIC_FORCEINLINE static __forceinline -#endif +#endif #ifndef __NO_RETURN #define __NO_RETURN __declspec(noreturn) #endif @@ -461,7 +461,7 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr) */ #define __DMB() __dmb(0xF) - + /** \brief Reverse byte order (32 bit) \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang.h index 90de9dbf8f..0959d9b768 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang.h @@ -597,7 +597,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode. - + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). \return PSPLIM Register value */ @@ -645,7 +645,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode. - + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set */ @@ -1228,7 +1228,7 @@ __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) || \ (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1)) ) - + /** \brief Load-Acquire (8 bit) \details Executes a LDAB instruction for 8 bit value. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang_ltm.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang_ltm.h index 0e5c7349d3..8afafd0dcb 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang_ltm.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_armclang_ltm.h @@ -595,7 +595,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode. - + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). \return PSPLIM Register value */ @@ -641,7 +641,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode. - + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_gcc.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_gcc.h index a2778f58e8..0578f28173 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_gcc.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_gcc.h @@ -46,9 +46,9 @@ #ifndef __STATIC_INLINE #define __STATIC_INLINE static inline #endif -#ifndef __STATIC_FORCEINLINE +#ifndef __STATIC_FORCEINLINE #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline -#endif +#endif #ifndef __NO_RETURN #define __NO_RETURN __attribute__((__noreturn__)) #endif @@ -126,23 +126,23 @@ \details This default implementations initialized all data and additional bss sections relying on .copy.table and .zero.table specified properly in the used linker script. - + */ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) { extern void _start(void) __NO_RETURN; - + typedef struct { uint32_t const* src; uint32_t* dest; uint32_t wlen; } __copy_table_t; - + typedef struct { uint32_t* dest; uint32_t wlen; } __zero_table_t; - + extern const __copy_table_t __copy_table_start__; extern const __copy_table_t __copy_table_end__; extern const __zero_table_t __zero_table_start__; @@ -153,16 +153,16 @@ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) pTable->dest[i] = pTable->src[i]; } } - + for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) { for(uint32_t i=0u; iwlen; ++i) { pTable->dest[i] = 0u; } } - + _start(); } - + #define __PROGRAM_START __cmsis_start #endif @@ -652,7 +652,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode. - + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). \return PSPLIM Register value */ @@ -697,7 +697,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode. - + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set */ @@ -834,7 +834,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) { #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) -#if __has_builtin(__builtin_arm_get_fpscr) +#if __has_builtin(__builtin_arm_get_fpscr) // Re-enable using built-in when GCC has been fixed // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_iccarm.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_iccarm.h index 7eeffca5c7..0e46e4825a 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_iccarm.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/cmsis_iccarm.h @@ -8,7 +8,7 @@ //------------------------------------------------------------------------------ // // Copyright (c) 2017-2019 IAR Systems -// Copyright (c) 2017-2019 Arm Limited. All rights reserved. +// Copyright (c) 2017-2019 Arm Limited. All rights reserved. // // SPDX-License-Identifier: Apache-2.0 // diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv81mml.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv81mml.h index 1ad19e215a..fd9ca0a737 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv81mml.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv81mml.h @@ -210,14 +210,14 @@ #define __FPU_PRESENT 0U #warning "__FPU_PRESENT not defined in device header file; using default!" #endif - + #if __FPU_PRESENT != 0U #ifndef __FPU_DP #define __FPU_DP 0U #warning "__FPU_DP not defined in device header file; using default!" #endif #endif - + #ifndef __MPU_PRESENT #define __MPU_PRESENT 0U #warning "__MPU_PRESENT not defined in device header file; using default!" @@ -232,7 +232,7 @@ #define __DCACHE_PRESENT 0U #warning "__DCACHE_PRESENT not defined in device header file; using default!" #endif - + #ifndef __PMU_PRESENT #define __PMU_PRESENT 0U #warning "__PMU_PRESENT not defined in device header file; using default!" @@ -261,7 +261,7 @@ #define __VTOR_PRESENT 1U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 3U #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mbl.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mbl.h index 932d3d188b..e9c9b5bf59 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mbl.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mbl.h @@ -2043,7 +2043,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void) @{ */ - + /** \brief Set Debug Authentication Control Register \details writes to Debug Authentication Control register. @@ -2110,7 +2110,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) @{ */ - + /** \brief Get Debug Authentication Status Register \details Reads Debug Authentication Status register. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mml.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mml.h index 71f000bcad..23bf8ab4ee 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mml.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_armv8mml.h @@ -254,7 +254,7 @@ #define __VTOR_PRESENT 1U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 3U #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" @@ -2939,7 +2939,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void) @{ */ - + /** \brief Set Debug Authentication Control Register \details writes to Debug Authentication Control register. @@ -3006,7 +3006,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) @{ */ - + /** \brief Get Debug Authentication Status Register \details Reads Debug Authentication Status register. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0.h index 6441ff3419..0a0ba223e1 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0.h @@ -61,7 +61,7 @@ */ #include "cmsis_version.h" - + /* CMSIS CM0 definitions */ #define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ #define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0plus.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0plus.h index 4e7179a614..879a384124 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0plus.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm0plus.h @@ -61,7 +61,7 @@ */ #include "cmsis_version.h" - + /* CMSIS CM0+ definitions */ #define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ #define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm1.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm1.h index 76b4569743..83b8fc6a0d 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm1.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm1.h @@ -61,7 +61,7 @@ */ #include "cmsis_version.h" - + /* CMSIS CM1 definitions */ #define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ #define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm23.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm23.h index 55fff99509..f2cf49fb16 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm23.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm23.h @@ -1486,7 +1486,7 @@ typedef struct /* Special LR values for Secure/Non-Secure call handling and exception handling */ -/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ +/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */ #define FNC_RETURN (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */ /* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */ @@ -2118,7 +2118,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void) @{ */ - + /** \brief Set Debug Authentication Control Register \details writes to Debug Authentication Control register. @@ -2185,7 +2185,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) @{ */ - + /** \brief Get Debug Authentication Status Register \details Reads Debug Authentication Status register. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm3.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm3.h index 24453a8863..36502e1b65 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm3.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm3.h @@ -146,7 +146,7 @@ #define __VTOR_PRESENT 1U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 3U #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm33.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm33.h index 13359be3ed..1e0159cdd0 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm33.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm33.h @@ -254,7 +254,7 @@ #define __VTOR_PRESENT 1U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 3U #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" @@ -3007,7 +3007,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void) @{ */ - + /** \brief Set Debug Authentication Control Register \details writes to Debug Authentication Control register. @@ -3074,7 +3074,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) @{ */ - + /** \brief Get Debug Authentication Status Register \details Reads Debug Authentication Status register. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm35p.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm35p.h index 6a5f6ad147..2ab752c927 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm35p.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm35p.h @@ -249,12 +249,12 @@ #define __DSP_PRESENT 0U #warning "__DSP_PRESENT not defined in device header file; using default!" #endif - + #ifndef __VTOR_PRESENT #define __VTOR_PRESENT 1U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 3U #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" @@ -3007,7 +3007,7 @@ __STATIC_INLINE void TZ_SAU_Disable(void) @{ */ - + /** \brief Set Debug Authentication Control Register \details writes to Debug Authentication Control register. @@ -3074,7 +3074,7 @@ __STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void) @{ */ - + /** \brief Get Debug Authentication Status Register \details Reads Debug Authentication Status register. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm4.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm4.h index 4e0e886697..d796173adf 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm4.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm4.h @@ -198,7 +198,7 @@ #define __VTOR_PRESENT 1U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 3U #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm55.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm55.h index 6efaa3f842..af186143db 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm55.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm55.h @@ -210,7 +210,7 @@ #define __FPU_PRESENT 0U #warning "__FPU_PRESENT not defined in device header file; using default!" #endif - + #if __FPU_PRESENT != 0U #ifndef __FPU_DP #define __FPU_DP 0U @@ -232,12 +232,12 @@ #define __DCACHE_PRESENT 0U #warning "__DCACHE_PRESENT not defined in device header file; using default!" #endif - + #ifndef __VTOR_PRESENT #define __VTOR_PRESENT 1U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __PMU_PRESENT #define __PMU_PRESENT 0U #warning "__PMU_PRESENT not defined in device header file; using default!" diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm7.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm7.h index e1c31c275d..ce79737ab8 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm7.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_cm7.h @@ -213,7 +213,7 @@ #define __VTOR_PRESENT 1U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 3U #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_sc000.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_sc000.h index dbc755fff3..e252068ce6 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_sc000.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/core_sc000.h @@ -146,7 +146,7 @@ #define __VTOR_PRESENT 0U #warning "__VTOR_PRESENT not defined in device header file; using default!" #endif - + #ifndef __NVIC_PRIO_BITS #define __NVIC_PRIO_BITS 2U #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv7.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv7.h index 791a8dae65..442fc21a3b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv7.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv7.h @@ -21,13 +21,13 @@ * See the License for the specific language governing permissions and * limitations under the License. */ - + #if defined ( __ICCARM__ ) #pragma system_include /* treat file as system include file for MISRA check */ #elif defined (__clang__) #pragma clang system_header /* treat file as system include file */ #endif - + #ifndef ARM_MPU_ARMV7_H #define ARM_MPU_ARMV7_H @@ -79,12 +79,12 @@ /** * MPU Memory Access Attributes -* +* * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. * \param IsShareable Region is shareable between multiple bus masters. * \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. -*/ +*/ #define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ @@ -93,7 +93,7 @@ /** * MPU Region Attribute and Size Register Value -* +* * \param DisableExec Instruction access disable bit, 1= disable instruction fetches. * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. * \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. @@ -110,7 +110,7 @@ /** * MPU Region Attribute and Size Register Value -* +* * \param DisableExec Instruction access disable bit, 1= disable instruction fetches. * \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. * \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. @@ -119,7 +119,7 @@ * \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. * \param SubRegionDisable Sub-region disable field. * \param Size Region size of the region to be configured, for example 4K, 8K. -*/ +*/ #define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) @@ -129,7 +129,7 @@ * - Shareable * - Non-cacheable * - Non-bufferable -*/ +*/ #define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) /** @@ -140,7 +140,7 @@ * - Bufferable (if shareable) or non-bufferable (if non-shareable) * * \param IsShareable Configures the device memory as shareable or non-shareable. -*/ +*/ #define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) /** @@ -153,7 +153,7 @@ * \param OuterCp Configures the outer cache policy. * \param InnerCp Configures the inner cache policy. * \param IsShareable Configures the memory as shareable or non-shareable. -*/ +*/ #define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U)) /** @@ -184,7 +184,7 @@ typedef struct { uint32_t RBAR; //!< The region base address register value (RBAR) uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR } ARM_MPU_Region_t; - + /** Enable the MPU. * \param MPU_Control Default access permissions for unconfigured regions. */ @@ -224,7 +224,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) /** Configure an MPU region. * \param rbar Value for RBAR register. * \param rsar Value for RSAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) { MPU->RBAR = rbar; @@ -235,7 +235,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rsar Value for RSAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) { MPU->RNR = rnr; @@ -251,7 +251,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t r __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) { uint32_t i; - for (i = 0U; i < len; ++i) + for (i = 0U; i < len; ++i) { dst[i] = src[i]; } @@ -261,7 +261,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) { const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; while (cnt > MPU_TYPE_RALIASES) { diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv8.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv8.h index ef44ad01df..3a197fbb49 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv8.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/mpu_armv8.h @@ -102,7 +102,7 @@ (MPU_RLAR_EN_Msk)) #if defined(MPU_RLAR_PXN_Pos) - + /** \brief Region Limit Address Register with PXN value * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. * \param PXN Privileged execute never. Defines whether code can be executed from this privileged region. @@ -113,7 +113,7 @@ (((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \ (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ (MPU_RLAR_EN_Msk)) - + #endif /** @@ -123,7 +123,7 @@ typedef struct { uint32_t RBAR; /*!< Region Base Address Register value */ uint32_t RLAR; /*!< Region Limit Address Register value */ } ARM_MPU_Region_t; - + /** Enable the MPU. * \param MPU_Control Default access permissions for unconfigured regions. */ @@ -190,11 +190,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at const uint8_t reg = idx / 4U; const uint32_t pos = ((idx % 4U) * 8U); const uint32_t mask = 0xFFU << pos; - + if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { return; // invalid index } - + mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); } @@ -241,7 +241,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) * \param rnr Region number to be cleared. */ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) -{ +{ ARM_MPU_ClrRegionEx(MPU_NS, rnr); } #endif @@ -251,7 +251,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) { mpu->RNR = rnr; @@ -263,7 +263,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar) { ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); @@ -274,10 +274,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) { - ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); + ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); } #endif @@ -289,7 +289,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) { uint32_t i; - for (i = 0U; i < len; ++i) + for (i = 0U; i < len; ++i) { dst[i] = src[i]; } @@ -301,7 +301,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; if (cnt == 1U) { @@ -310,7 +310,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ } else { uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; - + mpu->RNR = rnrBase; while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { uint32_t c = MPU_TYPE_RALIASES - rnrOffset; @@ -321,7 +321,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ rnrBase += MPU_TYPE_RALIASES; mpu->RNR = rnrBase; } - + ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); } } @@ -331,7 +331,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { ARM_MPU_LoadEx(MPU, rnr, table, cnt); } @@ -342,7 +342,7 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt); } diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/pmu_armv8.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/pmu_armv8.h index dbd39d20c7..23b37d95e4 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/pmu_armv8.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/pmu_armv8.h @@ -192,23 +192,23 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask); __STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask); -/** +/** \brief Enable the PMU */ -__STATIC_INLINE void ARM_PMU_Enable(void) +__STATIC_INLINE void ARM_PMU_Enable(void) { PMU->CTRL |= PMU_CTRL_ENABLE_Msk; } -/** +/** \brief Disable the PMU */ -__STATIC_INLINE void ARM_PMU_Disable(void) +__STATIC_INLINE void ARM_PMU_Disable(void) { PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk; } -/** +/** \brief Set event to count for PMU eventer counter \param [in] num Event counter (0-30) to configure \param [in] type Event to count @@ -218,7 +218,7 @@ __STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type) PMU->EVTYPER[num] = type; } -/** +/** \brief Reset cycle counter */ __STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void) @@ -226,7 +226,7 @@ __STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void) PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk; } -/** +/** \brief Reset all event counters */ __STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void) @@ -234,8 +234,8 @@ __STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void) PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk; } -/** - \brief Enable counters +/** + \brief Enable counters \param [in] mask Counters to enable \note Enables one or more of the following: - event counters (0-30) @@ -246,7 +246,7 @@ __STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask) PMU->CNTENSET = mask; } -/** +/** \brief Disable counters \param [in] mask Counters to enable \note Disables one or more of the following: @@ -258,7 +258,7 @@ __STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask) PMU->CNTENCLR = mask; } -/** +/** \brief Read cycle counter \return Cycle count */ @@ -267,7 +267,7 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void) return PMU->CCNTR; } -/** +/** \brief Read event counter \param [in] num Event counter (0-30) to read \return Event count @@ -277,7 +277,7 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num) return PMU->EVCNTR[num]; } -/** +/** \brief Read counter overflow status \return Counter overflow status bits for the following: - event counters (0-30) @@ -285,10 +285,10 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num) */ __STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void) { - return PMU->OVSSET; + return PMU->OVSSET; } -/** +/** \brief Clear counter overflow status \param [in] mask Counter overflow status bits to clear \note Clears overflow status bits for one or more of the following: @@ -300,8 +300,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask) PMU->OVSCLR = mask; } -/** - \brief Enable counter overflow interrupt request +/** + \brief Enable counter overflow interrupt request \param [in] mask Counter overflow interrupt request bits to set \note Sets overflow interrupt request bits for one or more of the following: - event counters (0-30) @@ -312,8 +312,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask) PMU->INTENSET = mask; } -/** - \brief Disable counter overflow interrupt request +/** + \brief Disable counter overflow interrupt request \param [in] mask Counter overflow interrupt request bits to clear \note Clears overflow interrupt request bits for one or more of the following: - event counters (0-30) @@ -324,8 +324,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask) PMU->INTENCLR = mask; } -/** - \brief Software increment event counter +/** + \brief Software increment event counter \param [in] mask Counters to increment \note Software increment bits for one or more event counters (0-30) */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/tz_context.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/tz_context.h index 0d09749f3a..facc2c9a47 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/tz_context.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/cmsis/include/tz_context.h @@ -30,41 +30,41 @@ #ifndef TZ_CONTEXT_H #define TZ_CONTEXT_H - + #include - + #ifndef TZ_MODULEID_T #define TZ_MODULEID_T /// \details Data type that identifies secure software modules called by a process. typedef uint32_t TZ_ModuleId_t; #endif - + /// \details TZ Memory ID identifies an allocated memory slot. typedef uint32_t TZ_MemoryId_t; - + /// Initialize secure context memory system /// \return execution status (1: success, 0: error) uint32_t TZ_InitContextSystem_S (void); - + /// Allocate context memory for calling secure software modules in TrustZone /// \param[in] module identifies software modules called from non-secure mode /// \return value != 0 id TrustZone memory slot identifier /// \return value 0 no memory available or internal error TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module); - + /// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S /// \param[in] id TrustZone memory slot identifier /// \return execution status (1: success, 0: error) uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id); - + /// Load secure context (called on RTOS thread context switch) /// \param[in] id TrustZone memory slot identifier /// \return execution status (1: success, 0: error) uint32_t TZ_LoadContext_S (TZ_MemoryId_t id); - + /// Store secure context (called on RTOS thread context switch) /// \param[in] id TrustZone memory slot identifier /// \return execution status (1: success, 0: error) uint32_t TZ_StoreContext_S (TZ_MemoryId_t id); - + #endif // TZ_CONTEXT_H diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_adcmic.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_adcmic.h index 646b88c02c..143331ca76 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_adcmic.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_adcmic.h @@ -25,10 +25,10 @@ /** * \addtogroup group_adcmic * \{ -* ADCMic driver is used to process analog and digital microphone signal and -* DC signal with the mxs40adcmic IP. This IP interfaces with Delta-Sigma modulator part +* ADCMic driver is used to process analog and digital microphone signal and +* DC signal with the mxs40adcmic IP. This IP interfaces with Delta-Sigma modulator part * of the s40adcmic and implements CIC, decimation (FIR) and biquad filters. -* The ADC result is read by the CPU or the DMA from the FIFO of mxs40adcmic +* The ADC result is read by the CPU or the DMA from the FIFO of mxs40adcmic * (and from CIC register for DC measurement). Instead of taking modulator data * from s40adcmic, mxs40adcmic can also be configured to take PDM input * directly from an external digital microphone. @@ -61,7 +61,7 @@ * \section group_adcmic_initialization Initialization and Enabling * * To configure the ADCMic subsystem call \ref Cy_ADCMic_Init. -* Pass in a pointer to the \ref MXS40ADCMIC_Type structure for the base hardware register address and +* Pass in a pointer to the \ref MXS40ADCMIC_Type structure for the base hardware register address and * pass in the configuration structure \ref cy_stc_adcmic_config_t. * * After initialization, call \ref Cy_ADCMic_Enable to enable the block. @@ -93,10 +93,10 @@ * * \section group_adcmic_clock Clocks * -* The ADCMic requires two input clocks: +* The ADCMic requires two input clocks: * - clk_sys - recommended frequency is 96MHz, usually is routed from one of the \ref group_sysclk_clk_hf * - clk_hf - recommended frequency is 24MHz, usually is routed from one of the \ref group_sysclk_clk_hf -* +* * For more exact information on the ADCMic clock routing, refer to the datasheet for your device. * * The internal dividers are configured by \ref cy_stc_adcmic_config_t::clockDiv for general ADC functional and @@ -116,7 +116,7 @@ * The Timer can be used for two purposes: * - generate periodic events based on ADCMic clk_sys clock. * - count the CIC data update events. -* +* * The timer period and input signal source are configured by the \ref cy_stc_adcmic_timer_trigger_config_t::period and * \ref cy_stc_adcmic_timer_trigger_config_t::input fields correspondingly. * @@ -151,7 +151,7 @@ * * \section group_adcmic_fifo FIFO Usage * -* The ADCMic subsystem in MIC and PDM modes stores the audio data into the FIFO +* The ADCMic subsystem in MIC and PDM modes stores the audio data into the FIFO * It can be configured using \ref cy_stc_adcmic_fifo_config_t, and served either by ISR: * \snippet adcmic/snippet/adcmic_snippet.c SNIPPET_ADCMIC_ISR * Or by DMA: diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_csd.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_csd.h index f6e4ab9772..db9c80ab24 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_csd.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_csd.h @@ -32,25 +32,25 @@ ******************************************************************************** * \{ * -* The CSD HW block enables multiple sensing capabilities on PSoC devices, +* The CSD HW block enables multiple sensing capabilities on PSoC devices, * including self-cap and mutual-cap capacitive touch sensing solutions, * a 10-bit ADC, IDAC, and Comparator. * -* The CapSense solution includes: -* * The CapSense Configurator tool, which is a configuration wizard to create -* and configure CapSense widgets. It can be launched in ModusToolbox -* from the CSD personality as well as in standalone mode. -* It contains separate documentation on how to create and +* The CapSense solution includes: +* * The CapSense Configurator tool, which is a configuration wizard to create +* and configure CapSense widgets. It can be launched in ModusToolbox +* from the CSD personality as well as in standalone mode. +* It contains separate documentation on how to create and * configure widgets, parameters, and algorithm descriptions. -* * An API to control the design from the application program. This documentation +* * An API to control the design from the application program. This documentation * describes the API with code snippets about how to use them. * * The CapSense Tuner tool for real-time tuning, testing, and debugging, -* for easy and smooth design of human interfaces on customer products. -* The Tuner tool communicates with a device through a HW bridge and -* communication drivers (EzI2C, UART, etc.) and allows monitoring of +* for easy and smooth design of human interfaces on customer products. +* The Tuner tool communicates with a device through a HW bridge and +* communication drivers (EzI2C, UART, etc.) and allows monitoring of * widget statuses, sensor signals, detected touch positions, gestures, etc. -* The application program does not need to interact with the CSD driver -* and/or other drivers such as GPIO or SysClk directly. All of that is +* The application program does not need to interact with the CSD driver +* and/or other drivers such as GPIO or SysClk directly. All of that is * configured and managed by middleware. * * \image html capsense_solution.png "CapSense Solution" width=800px @@ -68,7 +68,7 @@ * * The CSD HW block can support only one function at a time. To allow seamless * time-multiplex implementation of functionality and to avoid conflicting access -* to hardware from the upper level, the CSD driver also implements a lock +* to hardware from the upper level, the CSD driver also implements a lock * semaphore mechanism. * * The CSD driver supports re-entrance. If a device contains several @@ -76,7 +76,7 @@ * that, each function of the CSD driver contains a base address to define * the CSD HW block to which the CSD driver communicates. * -* For dual-core devices, the CSD driver functions can be called either by the +* For dual-core devices, the CSD driver functions can be called either by the * CM0+ or CM4 cores. In case both cores need access to the CSD Driver, you * should properly manage the memory access. * @@ -87,27 +87,27 @@ ******************************************************************************** * * The CSD driver is simple wrapper driver specifically designed to be used by higher -* level middleware. Hence, is highly not recommended to use CSD driver -* directly in the application program. To incorporate CSD HW block -* functionality in the application program, an associated middleware +* level middleware. Hence, is highly not recommended to use CSD driver +* directly in the application program. To incorporate CSD HW block +* functionality in the application program, an associated middleware * should be used. * -* The CSD Driver can be used to implement a custom sensing solution. In such a case, +* The CSD Driver can be used to implement a custom sensing solution. In such a case, * the application program must acquire and lock the CSD HW block prior to * accessing it. -* +* * Setting up and using the CSD driver can be summed up in these four stages: * * Define configuration in the config structure. * * Allocate context structure variable for the driver. -* * Capture the CSD HW block. +* * Capture the CSD HW block. * * Execute the action required to perform any kind of conversion. * -* The following code snippet demonstrates how to capture the CSD HW block for +* The following code snippet demonstrates how to capture the CSD HW block for * custom implementation: -* +* * \snippet csd/snippet/main.c snippet_Cy_CSD_Conversion -* -* The entire solution, either CapSense or CSDADC, in addition to +* +* The entire solution, either CapSense or CSDADC, in addition to * the CSD HW block, incorporates the following instances: * * * \ref group_csd_config_clocks @@ -123,10 +123,10 @@ * \subsection group_csd_config_clocks Clocks ******************************************************************************** * -* The CSD HW block requires a peripheral clock (clk_peri) input. It can be +* The CSD HW block requires a peripheral clock (clk_peri) input. It can be * assigned using two methods: * * Using the Device Configurator (Peripheral-Clocks tab ). -* * Using the SysClk (System Clock) driver. Refer to \ref group_sysclk driver +* * Using the SysClk (System Clock) driver. Refer to \ref group_sysclk driver * section for more details. * If middleware is used, the clock is managed by middleware. * @@ -136,18 +136,18 @@ * * Any analog-capable GPIO pin that can be connected to an analog multiplexed bus * (AMUXBUS) can be connected to the CSD HW block as an input. -* +* * GPIO input can be assigned to the CSD HW block using the following methods: * * Using the Device Configurator (Pins tab). * * Using the GPIO (General Purpose Input Output) driver. Refer to \ref group_gpio * driver section. * -* If middleware is used, pin configuration is managed by middleware. When -* using the CSD driver for custom implementation, the application program must +* If middleware is used, pin configuration is managed by middleware. When +* using the CSD driver for custom implementation, the application program must * manage pin connections. * -* Each AMUXBUS can be split into multiple segments. Ensure the CSD HW block -* and a GPIO belong to the same bus segment or join the segments to establish +* Each AMUXBUS can be split into multiple segments. Ensure the CSD HW block +* and a GPIO belong to the same bus segment or join the segments to establish * connection of the GPIO to the CSD HW block. * * For more information about pin configuration, refer to the \ref group_gpio @@ -157,8 +157,8 @@ * \subsection group_csd_config_refgen Reference Voltage Input ******************************************************************************** * -* The CSD HW block requires a reference voltage input to generate programmable -* reference voltage within the CSD HW block. There are two on-chip reference +* The CSD HW block requires a reference voltage input to generate programmable +* reference voltage within the CSD HW block. There are two on-chip reference * sources: * * VREF * * AREF @@ -171,8 +171,8 @@ * \subsection group_csd_config_interrupts Interrupts ******************************************************************************** * -* The CSD HW block has one interrupt that can be assigned to either the -* Cortex M4 or Cortex M0+ core. The CSD HW block can generate interrupts +* The CSD HW block has one interrupt that can be assigned to either the +* Cortex M4 or Cortex M0+ core. The CSD HW block can generate interrupts * on the following events: * * * End of sample: when scanning of a single sensor is complete. @@ -185,59 +185,59 @@ * * If a CapSense or ADC middleware is used, the interrupt service routine is managed * by middleware. When using the CSD driver for custom implementation or other -* middleware, the application program must manage the interrupt service routine. +* middleware, the application program must manage the interrupt service routine. * * Implement an interrupt routine and assign it to the CSD interrupt. Use the -* pre-defined enumeration as the interrupt source of the CSD HW block. -* The CSD interrupt to the NVIC is raised any time the intersection -* (logic AND) of the interrupt flags and the corresponding interrupt -* masks are non-zero. The peripheral interrupt status register should be +* pre-defined enumeration as the interrupt source of the CSD HW block. +* The CSD interrupt to the NVIC is raised any time the intersection +* (logic AND) of the interrupt flags and the corresponding interrupt +* masks are non-zero. The peripheral interrupt status register should be * read in the ISR to detect which condition generated the interrupt. -* The appropriate interrupt registers should be cleared so that +* The appropriate interrupt registers should be cleared so that * subsequent interrupts can be handled. -* +* * The following code snippet demonstrates how to implement a routine to handle * the interrupt. The routine is called when a CSD interrupt is triggered. -* +* * \snippet csd/snippet/main.c snippet_Cy_CSD_IntHandler * * The following code snippet demonstrates how to configure and enable * the CSD interrupt: -* +* * \snippet csd/snippet/main.c snippet_Cy_CSD_IntEnabling * * For more information, refer to the \ref group_sysint driver. * -* Alternatively, instead of handling the interrupts, the -* \ref Cy_CSD_GetConversionStatus() function allows for firmware +* Alternatively, instead of handling the interrupts, the +* \ref Cy_CSD_GetConversionStatus() function allows for firmware * polling of the CSD block status. * ******************************************************************************** * \section group_csd_config_power_modes Power Modes ******************************************************************************** * -* The CSD HW block can operate in Active and Sleep CPU power modes. It is also +* The CSD HW block can operate in Active and Sleep CPU power modes. It is also * possible to switch between Low power and Ultra Low power system modes. * In Deep Sleep and in Hibernate power modes, the CSD HW block is powered off. -* When the device wakes up from Deep Sleep, the CSD HW block resumes operation -* without the need for re-initialization. In the case of wake up from Hibernate power +* When the device wakes up from Deep Sleep, the CSD HW block resumes operation +* without the need for re-initialization. In the case of wake up from Hibernate power * mode, the CSD HW block does not retain configuration and it requires * re-initialization. * * \note * 1. The CSD driver does not provide a callback function to facilitate the -* low-power mode transitions. The responsibility belongs to an upper -* level that uses the CSD HW block to ensure the CSD HW block is not +* low-power mode transitions. The responsibility belongs to an upper +* level that uses the CSD HW block to ensure the CSD HW block is not * busy prior to a power mode transition. * 2. A power mode transition is not recommended while the CSD HW block is busy. -* The CSD HW block status must be checked using the Cy_CSD_GetStatus() +* The CSD HW block status must be checked using the Cy_CSD_GetStatus() * function prior to a power mode transition. Instead, use the same power mode -* for active operation of the CSD HW block. This restriction is not -* applicable to Sleep mode and the device can seamlessly enter and exit +* for active operation of the CSD HW block. This restriction is not +* applicable to Sleep mode and the device can seamlessly enter and exit * Sleep mode while the CSD HW block is busy. * * \warning -* 1. Do not enter Deep Sleep power mode if the CSD HW block conversion is in +* 1. Do not enter Deep Sleep power mode if the CSD HW block conversion is in * progress. Unexpected behavior may occur. * 2. Analog start up time for the CSD HW block is 25 us. Initiate * any kind of conversion only after 25 us from Deep Sleep / Hibernate exit. @@ -301,7 +301,7 @@ * * * -* * @@ -435,14 +435,14 @@ typedef enum } cy_en_csd_status_t; -/** -* Definitions of upper level keys that use the driver. -* -* Each middleware has a unique key assigned. When middleware successfully -* captures the CSD HW block, this key is placed into the CSD driver context -* structure. All attempts to capture the CSD HW block by other middleware +/** +* Definitions of upper level keys that use the driver. +* +* Each middleware has a unique key assigned. When middleware successfully +* captures the CSD HW block, this key is placed into the CSD driver context +* structure. All attempts to capture the CSD HW block by other middleware * are rejected. When the first middleware releases the CSD HW block, -* CY_CSD_NONE_KEY is written to the lockKey variable of the CSD driver context +* CY_CSD_NONE_KEY is written to the lockKey variable of the CSD driver context * structure and any other middleware can capture the CSD HW block. */ typedef enum @@ -450,9 +450,9 @@ typedef enum /** The CSD HW block is unused and not captured by any middleware */ CY_CSD_NONE_KEY = 0U, - /** - * The CSD HW block is captured by the application program - * directly to implement a customer's specific case + /** + * The CSD HW block is captured by the application program + * directly to implement a customer's specific case */ CY_CSD_USER_DEFINED_KEY = 1U, @@ -482,11 +482,11 @@ typedef enum * \{ */ -/** +/** * CSD configuration structure. -* -* This structure contains all register values of the CSD HW block. This -* structure is provided by middleware through the Cy_CSD_Init() and +* +* This structure contains all register values of the CSD HW block. This +* structure is provided by middleware through the Cy_CSD_Init() and * Cy_CSD_Configure() functions to implement the CSD HW block supported * sensing modes like self-cap / mutual-cap scanning, ADC measurement, etc. */ @@ -534,9 +534,9 @@ typedef struct } cy_stc_csd_config_t; -/** +/** * CSD driver context structure. -* This structure is an internal structure of the CSD driver and should not be +* This structure is an internal structure of the CSD driver and should not be * accessed directly by the application program. */ typedef struct @@ -670,8 +670,8 @@ __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type* base, uint32_t offset, uint32_t * \param offset * Register offset relative to base address. * -* \return -* Returns a value of the CSD HW block register, specified by the offset +* \return +* Returns a value of the CSD HW block register, specified by the offset * parameter. * *******************************************************************************/ @@ -694,7 +694,7 @@ __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset) * Register offset relative to base address. * * \param value -* Value to be written to the register. +* Value to be written to the register. * *******************************************************************************/ __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value) @@ -782,8 +782,8 @@ __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type * base, uint32_t offset, uint32_t * Function Name: Cy_CSD_GetLockStatus ****************************************************************************//** * -* Verifies whether the specified CSD HW block is acquired and locked by a -* higher-level firmware. +* Verifies whether the specified CSD HW block is acquired and locked by a +* higher-level firmware. * * \param base * Pointer to a CSD HW block base address. @@ -791,7 +791,7 @@ __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type * base, uint32_t offset, uint32_t * \param context * The pointer to the context structure allocated by a user or middleware. * -* \return +* \return * Returns a key code. See \ref cy_en_csd_key_t. * * \funcusage @@ -810,7 +810,7 @@ __STATIC_INLINE cy_en_csd_key_t Cy_CSD_GetLockStatus(const CSD_Type * base, cons * Function Name: Cy_CSD_GetConversionStatus ****************************************************************************//** * -* Verifies whether the specified CSD HW block is busy +* Verifies whether the specified CSD HW block is busy * (performing scan or conversion). * * \param base @@ -819,7 +819,7 @@ __STATIC_INLINE cy_en_csd_key_t Cy_CSD_GetLockStatus(const CSD_Type * base, cons * \param context * The pointer to the context structure allocated by a user or middleware. * -* \return +* \return * Returns status code. See \ref cy_en_csd_status_t. * * \funcusage @@ -832,7 +832,7 @@ __STATIC_INLINE cy_en_csd_status_t Cy_CSD_GetConversionStatus(const CSD_Type * b cy_en_csd_status_t csdStatus = CY_CSD_BUSY; (void)context; - if (((base->SEQ_START & CSD_SEQ_START_START_Msk) == 0u) && + if (((base->SEQ_START & CSD_SEQ_START_START_Msk) == 0u) && ((base->STAT_SEQ & (CSD_STAT_SEQ_SEQ_STATE_Msk | CSD_STAT_SEQ_ADC_STATE_Msk)) == 0u)) { csdStatus = CY_CSD_SUCCESS; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_efuse.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_efuse.h index 9767cf4881..f9572de170 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_efuse.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_efuse.h @@ -36,8 +36,8 @@ * You can include cy_pdl.h to get access to all functions * and declarations in the PDL. * -* The eFuse driver enables reading the state of any bit. -* - CAT1A devices does not support writing to eFuse memory. Writing an +* The eFuse driver enables reading the state of any bit. +* - CAT1A devices does not support writing to eFuse memory. Writing an * eFuse bit is typically done by a production programmer. * Fuses are programmed via the PSoC Programmer tool that parses the hex file * and extracts the necessary information; the fuse data must be located at the @@ -208,7 +208,7 @@ extern "C" { * * \return * \ref cy_en_efuse_status_t -* +* * \note * Supported in CAT1A and CAT1C devices. * @@ -434,7 +434,7 @@ cy_en_efuse_status_t Cy_EFUSE_WriteByte(EFUSE_Type *base, uint32_t src, uint32_t * \param offset * Offset from the EFUSE base address. Must be 4-byte aligned. * -* \return +* \return * The EFUSE API status \ref cy_en_efuse_status_t. * * \note @@ -469,7 +469,7 @@ cy_en_efuse_status_t Cy_EFUSE_WriteWord(EFUSE_Type *base, uint32_t src, uint32_t * \param num * Number of 32-bit words to be written. * -* \return +* \return * The EFUSE API status \ref cy_en_efuse_status_t. * * \note @@ -528,7 +528,7 @@ cy_en_efuse_status_t Cy_EFUSE_ReadBit(EFUSE_Type *base, uint8_t *dst, uint32_t b * \param offset * Byte offset from the EFUSE base address. * -* \return +* \return * The EFUSE API status \ref cy_en_efuse_status_t. * * \note @@ -556,7 +556,7 @@ cy_en_efuse_status_t Cy_EFUSE_ReadByte(EFUSE_Type *base, uint8_t *dst, uint32_t * \param offset * Offset from the EFUSE base address. Must be 4-byte aligned. * -* \return +* \return * The EFUSE API status \ref cy_en_efuse_status_t. * * \note @@ -587,7 +587,7 @@ cy_en_efuse_status_t Cy_EFUSE_ReadWord(EFUSE_Type *base, uint32_t *dst, uint32_t * \param num * Number of words to read. * -* \return +* \return * The EFUSE API status \ref cy_en_efuse_status_t. * * \note @@ -612,7 +612,7 @@ cy_en_efuse_status_t Cy_EFUSE_ReadWordArray(EFUSE_Type *base, uint32_t *dst, uin * \param bootrow * 32-bit value to be written into bootrow. * -* \return +* \return * The EFUSE API status \ref cy_en_efuse_status_t. * * \note @@ -636,7 +636,7 @@ cy_en_efuse_status_t Cy_EFUSE_WriteBootRow(EFUSE_Type *base, uint32_t bootrow); * \param bootrow * Pointer to the variable where the content of BOOTROW is read to. * -* \return +* \return * The EFUSE API status \ref cy_en_efuse_status_t. * * \note diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_flash.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_flash.h index 1a13274fd3..7646f0339c 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_flash.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_flash.h @@ -876,7 +876,7 @@ void Cy_Flashc_MainECCEnable(void); * Function Name: Cy_Flashc_MainECCDisable ****************************************************************************//** * -* \brief Disables ECC for main flash. +* \brief Disables ECC for main flash. * ECC checking/reporting on FLASH main interface is disabled. * No correctable or non-correctable faults are reported by disabling ECC. * @@ -984,10 +984,10 @@ cy_en_flashdrv_status_t Cy_Flash_Checksum (const cy_stc_flash_checksum_config_t * Function Name: Cy_Flash_EraseSuspend ****************************************************************************//** * -* This function suspends an ongoing erase operation. User should not read from a -* sector which is suspended from an erase operation. Cy_Flash_ProgramRow function +* This function suspends an ongoing erase operation. User should not read from a +* sector which is suspended from an erase operation. Cy_Flash_ProgramRow function * will return error if invoked on suspended sector. -* This function cannot be called on SFLASH. Reports success +* This function cannot be called on SFLASH. Reports success * or a reason for failure. Does not return until the Erase operation is complete. * Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another * process is operating flash. @@ -1004,7 +1004,7 @@ cy_en_flashdrv_status_t Cy_Flash_EraseSuspend(void); * Function Name: Cy_Flash_EraseResume ****************************************************************************//** * -* This function calls to resume a suspended erase operation. +* This function calls to resume a suspended erase operation. * Reports success or a reason for failure. * Returns immediately and reports a CY_FLASH_DRV_IPC_BUSY error in the case when another * process is operating flash. @@ -1070,7 +1070,7 @@ cy_en_flashdrv_status_t Cy_Flash_OperationStatus(void); * Function Name: Cy_Flashc_InjectECC ****************************************************************************//** * -* This function enables ECC injection and sets the address where a parity will be injected +* This function enables ECC injection and sets the address where a parity will be injected * and the parity value. * Reports success or a reason for failure. * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_gpio.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_gpio.h index 0b50ddd70b..93471f9763 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_gpio.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_gpio.h @@ -104,7 +104,7 @@ * * * -* * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_ipc_drv.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_ipc_drv.h index 214ee4141f..f1e966fcea 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_ipc_drv.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_ipc_drv.h @@ -72,7 +72,7 @@ * * These transactions are handled transparently by the DRV-level API. Use the * PIPE, SEMA and BTSS layers of the API to implement communication in your application. -* The data transferred is limited to a single 32-bit value in case of PIPE and SEMA and two +* The data transferred is limited to a single 32-bit value in case of PIPE and SEMA and two * 32-bit value incse of BTIPC. As implemented by * the PIPE API, that value is a pointer to a data structure of arbitrary size * and complexity. @@ -116,7 +116,7 @@ * can modify these files based on the requirements of your design. * If you use PSoC Creator as a development environment, it will not overwrite * your changes when you generate the application or build your code. -* +* * BTSS provides dedicated communication channels for communication between * MCU and the BT SS. APIs provided handle exchange of Host Controller Interface (HCI) * and High Priority Controller (HPC) packets @@ -187,13 +187,13 @@ * * A Bluetooth Sub-system (BTSS) layer is a communication channel between the MCU and the BT * Sub-system. It uses 4 IPC channels and 2 interrupts. 2 UL channels (one for HCI and HPC each) -* and 2 DL channels (one for HCI and HPC each). IPC interrupt 0 is used to interrupt the +* and 2 DL channels (one for HCI and HPC each). IPC interrupt 0 is used to interrupt the * BT SS and IPC interrupt 1 is used to interrupt the MCU. * IPC channels 0 is used for HCI UL, channel 1 is used from HCI DL, * IPC channels 2 is used for HPC UL, and channel 3 is used from HPC DL. * The IPC interrupt gets triggered for both Notify and Release channel. * Bluetooth stack interface layer registers a callback function for notification -* when BT SS sends an HCI packet. It also provides APIs to read the +* when BT SS sends an HCI packet. It also provides APIs to read the * HCI packets from the BT SS. On the UL path, it supports APIs to send HCI packet * from MCU to BT SS. * @@ -201,14 +201,14 @@ * by packing them into the DATA0 and DATA1 IPC channel registers when payload * length is less than or equal to 7 bytes. In case the where the payload length * is greater than 7 bytes, it would use the shared memory to send/receive the packet. -* +* * This layer support control message communication between the MCU and the BT SS * using the HPC channels. The HPC channel is used for power management, * IO configuration, access for TRNG, etc. APIs are provided to send HPC packets to the * BT SS. It also supports APIs to register the callback function to get notification on receiving * the HPC packets from the BT SS. Multiple modules running on the MCU can register * callback functions. Maximum number of HPC callbacks supported is decided by -* the MAX_BT_IPC_HPC_CB macro. All the shared buffer management mechanism +* the MAX_BT_IPC_HPC_CB macro. All the shared buffer management mechanism * is built into this layer. * \note All the HCI APIs are intended to be called by the stack interface layer and * not meant to be called by the application developers. @@ -252,7 +252,7 @@ * Application code calls Cy_BTIPC_Init() with configuration parameters to set up BTSS IPC * functionality. By default, the BT IPC uses IPC channel 0,1,2 and 3. * Do not change the IPC channel. -* +* * To change the number of callbacks supported, modify this line of code in cy_ipc_bt.h. * * \code diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_keyscan.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_keyscan.h index 24816abc08..6acd7ac065 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_keyscan.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_keyscan.h @@ -16,12 +16,12 @@ /** * \addtogroup group_keyscan * \{ -* MXKEYSCAN is a DEEPSLEEP peripheral IP that performs autonomous key-matrix scan and system notification. -* Key processing detects both press and un-press actions, +* MXKEYSCAN is a DEEPSLEEP peripheral IP that performs autonomous key-matrix scan and system notification. +* Key processing detects both press and un-press actions, * includes micro and macro de-bouncing filters and ghost key detection. * -* Configurable key-matrix size supports up to 20x8 keys. -* Up to 20 columns are driven as the output and up to 8 rows are processed as the input. +* Configurable key-matrix size supports up to 20x8 keys. +* Up to 20 columns are driven as the output and up to 8 rows are processed as the input. * Key actions are stored in the FIFO with interrupt notification available based on the FIFO threshold. * * The Scan matrix support up to 8X20 matrix, maximum of 160 keys. @@ -29,11 +29,11 @@ * Before any key is pressed, the Key Matrix Scan Logic is disabled. * Once a key press is detected by the Key Detection Logic, it will enable the gate for clock to drive the key Matrix Scan Logic for GPIO scanning. * GPIO scanning is done one column at a time by driving each column "low" and reading from the row GPIO pins to find out which input is low. -* After the Key Scan Logic had scanned through the matrix for a specific number for debounce times configured by firmware though the configuration register, -* keycode representing the pressed key is pushed into the key FIFO for firmware to read and an interrupt to CPU will be generated. -* There are two types of debounce mechanisms build into this scan matrix block. -* The micro-debounce logic will provide a small debounce period to debounce the break type of mechanical vibration. -* The macro debounce logic will scan through the matrix for a number of times for qualify a key as being pressed. +* After the Key Scan Logic had scanned through the matrix for a specific number for debounce times configured by firmware though the configuration register, +* keycode representing the pressed key is pushed into the key FIFO for firmware to read and an interrupt to CPU will be generated. +* There are two types of debounce mechanisms build into this scan matrix block. +* The micro-debounce logic will provide a small debounce period to debounce the break type of mechanical vibration. +* The macro debounce logic will scan through the matrix for a number of times for qualify a key as being pressed. * * Features: * * Ability to turn off it's clock if no keys pressed. @@ -108,11 +108,11 @@ * \snippet keyscan/snippet/main.c snippet_Cy_Keyscan_ISR * * Handling DeepSleep -* +* * Following are the points users of keyscan have to handle in their code. * * Normal DeepSleep configuration is MFO clock disabled, LF Clock enabled and edge interrupt enabled. * * When edge interrupt occurs, configure MFO to remain enabled in Deepsleep, disable edge interrupt, and go back to Deepsleep. -* * Whenever MFO clock is enabled in the Deepsleep and edge interrupt is disabled, user should start a timer. Every time a key event is detected, user should restart the timer. When timer expires (and/or all keys are considered up), user should go back to Deepsleep with MFO disabled and edge interrupt enabled. +* * Whenever MFO clock is enabled in the Deepsleep and edge interrupt is disabled, user should start a timer. Every time a key event is detected, user should restart the timer. When timer expires (and/or all keys are considered up), user should go back to Deepsleep with MFO disabled and edge interrupt enabled. * * * \section group_keyscan_changelog Changelog @@ -193,7 +193,7 @@ typedef enum { KEYSCAN_KEYCODE_GHOST = 0xf5, /*!< Ghost key keycode */ KEYSCAN_KEYCODE_NONE = 0xfd, /*!< Keycode value if no key is pressed.*/ KEYSCAN_KEYCODE_END_OF_SCAN_CYCLE = 0xfe, /*!< Event returned to indicate the end of a scan cycle.*/ - KEYSCAN_KEYCODE_ROLLOVER = 0xff, /*!< Rollover event generated by the keyscan driver in case of an error (ghost or overflow) + KEYSCAN_KEYCODE_ROLLOVER = 0xff, /*!< Rollover event generated by the keyscan driver in case of an error (ghost or overflow) For every key event its state has to be stored and if there is an error, then rollover event is triggered and driver restores the previous state.*/ }cy_en_ks_keycode_t; @@ -224,7 +224,7 @@ typedef enum { #define MXKEYSCAN_KEYSCAN_CTL_RCTC_ROW_DEFAULT 7U /** keyscan CTL register No of Columns Default value definition. */ #define MXKEYSCAN_KEYSCAN_CTL_RCTC_COLUMN_DEFAULT 19U -/** keyscan CTL register used to pull the columns high after each column scan to alleviate slow rise-time due to a large key matrix capacitance. +/** keyscan CTL register used to pull the columns high after each column scan to alleviate slow rise-time due to a large key matrix capacitance. ** Default value definition. */ #define MXKEYSCAN_KEYSCAN_CTL_PULL_HIGH_DEFAULT 1U /** keyscan CTL register Default Value. */ @@ -295,7 +295,7 @@ typedef enum { * \addtogroup group_keyscan_data_structures * \{ */ -/** keyscan callback function definition. +/** keyscan callback function definition. ** Application has to register for callback for receiving the key press events. */ typedef void (* cy_cb_keyscan_handle_events_t)(void); @@ -304,7 +304,7 @@ typedef void (* cy_cb_keyscan_handle_events_t)(void); ** \brief keyscan configuration ** These settings are per KEYSCAN instance. *****************************************************************************/ -typedef struct cy_stc_ks_config_t +typedef struct cy_stc_ks_config_t { uint8_t macroDownDebCnt; /**< macro down debounce count */ @@ -363,12 +363,12 @@ typedef struct cy_stc_keyscan_context_t uint8_t savedWriteIndexForRollBack; /**< Saved write index for rollback. */ uint8_t savedNumElements; /**< Saved number of elements for rollback. */ - + uint8_t keysPressedCount; /**< Number of key down events that are not yet matched by key up events, which gives the number of keys currently being pressed */ - + bool keyscan_pollingKeyscanHw; /**< Whether HW polling is done from Keyscan */ - + cy_cb_keyscan_handle_events_t cbEvents; /**< callback function */ }cy_stc_keyscan_context_t; @@ -382,10 +382,10 @@ typedef struct cy_stc_keyscan_context_t /*****************************************************************************/ /* Global function prototypes ('extern', definition in C source) */ /*****************************************************************************/ - + /** ***************************************************************************** - ** \brief Registers for callback + ** \brief Registers for callback ** Application has to register for callback for receiving the key press events. ** In the interrupt handler data from HW FIFO is copied to FW FIFO and ** application is notified to get the data using this callback function. @@ -406,7 +406,7 @@ cy_en_ks_status_t Cy_Keyscan_Register_Callback(cy_cb_keyscan_handle_events_t cbE ** \brief Register Context with the driver ** This Function registers for the event callback and FW FIFO buffer. ** - ** \pre The Application must configure corresponding keyscan pins + ** \pre The Application must configure corresponding keyscan pins ** according to requirements and settings of keyscan instance. ** ** \param [in] base Pointer to KeyScan instance register area @@ -490,7 +490,7 @@ cy_en_ks_status_t Cy_Keyscan_EventsPending(MXKEYSCAN_Type* base, bool *eventsPen ** Applications have to call \ref Cy_Keyscan_Interrupt_Handler from keyscan interrupt handler. ** After successfully reading from HW FIFO and writing to FW FIFO applications ** will be notified through the registered callback. - ** Applications to read from the FW FIFO has to call this function in a loop till + ** Applications to read from the FW FIFO has to call this function in a loop till ** the return value is CY_KEYSCAN_EVENT_NONE ** ** \param base [in] Pointer to KeyScan instance register area. @@ -585,7 +585,7 @@ cy_en_ks_status_t Cy_Keyscan_ClearInterrupt(MXKEYSCAN_Type* base, uint32_t mask) ** Applications have to call this function from keyscan interrupt handler. ** After successfully reading from HW FIFO and writing to FW FIFO this function ** will notify application to read from the FW FIFO. - ** Application has to call Cy_Keyscan_getNextEvent() in a loop till + ** Application has to call Cy_Keyscan_getNextEvent() in a loop till ** the return value is CY_KEYSCAN_EVENT_NONE ** ** \param base [in] Pointer to Keyscan instance register area. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lin.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lin.h index 712fb2c621..e0b612b29f 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lin.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lin.h @@ -378,18 +378,18 @@ typedef enum cy_en_lin_timeout_sel_type *****************************************************************************/ typedef struct cy_stc_lin_config { - + bool masterMode; /**< If TRUE, corresponding channel = master mode, If FALSE, slave mode. */ - + bool linTransceiverAutoEnable; /**< If TRUE, corresponding LIN channel transceiver is enabled automatically, If FALSE, firmware has to handle the transceiver enable signal manually */ - + uint8_t breakFieldLength; /**< Break field length. */ - + cy_en_lin_break_delimiter_length_t breakDelimiterLength; /**< Break delimiter length. See #cy_en_lin_break_delimiter_length_t */ - + cy_en_lin_stopbit_t stopBit; /**< Stop bit length. See #cy_en_lin_stopbit_t. */ - + bool filterEnable; /**< If TRUE, lin_rx_in filter operates. Median 3 operates on the last three "lin_rx_in" values. The sequences '000', '001', '010' and '100' result in a filtered value '0'. @@ -400,7 +400,7 @@ typedef struct cy_stc_lin_config /** ***************************************************************************** ** \brief LIN Test configuration - ** This testing functionality simplifies SW development, + ** This testing functionality simplifies SW development, ** but may also be used in the field to verify correct channel functionality. *****************************************************************************/ typedef struct cy_stc_lin_test_config @@ -408,7 +408,7 @@ typedef struct cy_stc_lin_test_config uint8_t chidx; /**< Specifies the channel index of the channel to which the test applies. The test mode allows BOTH of the two connected channels to be tested. */ bool mode; /**< When set FALSE, it is partial disconnect from IOSS. Used to observe messages outside of device. - When Set TRUE, it is full disconnect from IOSS. Used for device test without effecting + When Set TRUE, it is full disconnect from IOSS. Used for device test without effecting operational LIN cluster. */ }cy_stc_lin_test_config_t; @@ -416,7 +416,7 @@ typedef struct cy_stc_lin_test_config ***************************************************************************** ** \brief LIN Error CTL configuration ** Used only for software testing. - ** It enables HW injected channel transmitter errors. + ** It enables HW injected channel transmitter errors. ** The receiver should detect these errors and report these errors through activation of corresponding interrupt causes. *****************************************************************************/ typedef struct cy_stc_lin_test_error_config @@ -833,7 +833,7 @@ cy_en_lin_status_t Cy_LIN_EnOut_Disable(LIN_CH_Type* base); ***************************************************************************** ** \brief Enables LIN Testing mode. ** - ** This testing functionality simplifies SW development, + ** This testing functionality simplifies SW development, ** but may also be used in the field to verify correct channel functionality. ** ** \param base [in] Pointer to LIN instance register area. @@ -851,7 +851,7 @@ cy_en_lin_status_t Cy_LIN_TestMode_Enable(LIN_Type* base, const cy_stc_lin_test_ ***************************************************************************** ** \brief Disables LIN Testing mode. ** - ** This testing functionality simplifies SW development, + ** This testing functionality simplifies SW development, ** but may also be used in the field to verify correct channel functionality. ** ** \param base [in] Pointer to LIN instance register area. @@ -865,7 +865,7 @@ cy_en_lin_status_t Cy_LIN_TestMode_Disable(LIN_Type* base); ***************************************************************************** ** \brief Enables LIN ERROR CTL. ** - ** Enables HW injected channel transmitter errors. + ** Enables HW injected channel transmitter errors. ** The receiver should detect these errors and report these errors through activation of corresponding interrupt causes. ** ** \param base [in] Pointer to LIN instance register area. @@ -880,7 +880,7 @@ cy_en_lin_status_t Cy_LIN_ErrCtl_Enable(LIN_Type* base, cy_stc_lin_test_error_co ***************************************************************************** ** \brief Disables LIN ERROR CTL. ** - ** Disables HW injected channel transmitter errors. + ** Disables HW injected channel transmitter errors. ** ** \param base [in] Pointer to LIN instance register area. ** diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lvd.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lvd.h index db547b17ef..c09c065407 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lvd.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_lvd.h @@ -570,7 +570,7 @@ __STATIC_INLINE void Cy_LVD_SetInterruptConfig(cy_en_lvd_intr_config_t lvdInterr { CY_ASSERT_L3(CY_LVD_CHECK_INTR_CFG(lvdInterruptConfig)); -#if defined (CY_IP_MXS40SRSS) +#if defined (CY_IP_MXS40SRSS) #if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE) CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_CFG, SRSS_SRSS_INTR_CFG_HVLVD1_EDGE_SEL, lvdInterruptConfig); #else diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_mcwdt.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_mcwdt.h index 37df4f71c2..32b71deaf7 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_mcwdt.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_mcwdt.h @@ -224,13 +224,13 @@ typedef struct * \note * This parameter is available for CAT1B devices. **/ - uint16_t c0LowerLimit; /**< Lower limit for sub-counter 0 of this MCWDT. + uint16_t c0LowerLimit; /**< Lower limit for sub-counter 0 of this MCWDT. Range: 0 - 65535. */ /** * \note * This parameter is available for CAT1B devices. **/ - uint16_t c1LowerLimit; /**< Lower limit for sub-counter 0 of this MCWDT. + uint16_t c1LowerLimit; /**< Lower limit for sub-counter 0 of this MCWDT. Range: 0 - 65535. */ /** * \note @@ -1251,14 +1251,14 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetInterruptStatusMasked(MCWDT_STRUCT_Type con * * \param lowerLimit * The value to be written in the lower limit register -* The valid range is [0-65535] for c0 +* The valid range is [0-65535] for c0 * and [1-65535] for c1. * * \note * The lower limit mode is not supported by Counter 2. * * \param waitUs -* The function waits for some delay in microseconds before returning, +* The function waits for some delay in microseconds before returning, * because the lower limit register write affects after two lf_clk cycles pass. * The recommended value is 93 us. * \note @@ -1306,7 +1306,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetLowerLimit(MCWDT_STRUCT_Type const *base, c uint32_t countVal = 0u; CY_ASSERT_L3(CY_MCWDT_IS_LOWER_LIMIT_VALID(counter)); - + switch (counter) { case CY_MCWDT_LOWER_LIMIT0: @@ -1342,7 +1342,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetLowerLimit(MCWDT_STRUCT_Type const *base, c * Set 0 - Do nothing, 1 - Assert WDT_INTx, 2 - Assert WDT Reset * * \note -* This API must not be called while the counters are running. +* This API must not be called while the counters are running. * Prior to calling this API, the counter must be disabled. * This API is available for CAT1B devices. * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pd_pdcm.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pd_pdcm.h index 6123135d67..efef6f8335 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pd_pdcm.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pd_pdcm.h @@ -25,7 +25,7 @@ /** * \addtogroup group_pd_pdcm PDCM (Power Dependency Control Matrix) * \{ -* PDCM driver provides APIs for controlling the Power Dependency Control Matrix +* PDCM driver provides APIs for controlling the Power Dependency Control Matrix * across Power Domains * * The functions and other declarations used in this driver are in cy_pd_pdcm.h. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pd_ppu.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pd_ppu.h index 7fc3136a36..044cb60349 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pd_ppu.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pd_ppu.h @@ -33,7 +33,7 @@ * \note PD PPU API's are used by the Syspm driver and BTSS API's, there is no * need to call them drirectly in Application code. * -* You can use this driver to implement the platform dependent code to +* You can use this driver to implement the platform dependent code to * control power domain using PPU. * * \section group_pd_ppu_more_information More Information diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pdm_pcm_v2.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pdm_pcm_v2.h index d52e9e3db8..d716c60646 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pdm_pcm_v2.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_pdm_pcm_v2.h @@ -32,9 +32,9 @@ * API to manage PDM-PCM conversion. A PDM-PCM converter is used * to convert 1-bit digital audio streaming data to PCM data. * -* The functions and other declarations used in this driver are in cy_pdm_pcm_v2.h. -* You can include cy_pdl.h (ModusToolbox only) to get access to all functions -* and declarations in the PDL. +* The functions and other declarations used in this driver are in cy_pdm_pcm_v2.h. +* You can include cy_pdl.h (ModusToolbox only) to get access to all functions +* and declarations in the PDL. * * Features: * - Supports up to 8 PDM receivers @@ -76,7 +76,7 @@ * to the appropriate decimation rate, wordLen, and wordBitExtension. * No other parameters are necessary for this example. * -* To initialize the PDM-PCM channels, call \ref Cy_PDM_PCM_Channel_Init function, providing the +* To initialize the PDM-PCM channels, call \ref Cy_PDM_PCM_Channel_Init function, providing the * filled \ref cy_stc_pdm_pcm_channel_config_t structure * To initialize the PDM-PCM block, call the \ref Cy_PDM_PCM_Init function, providing the * filled \ref cy_stc_pdm_pcm_config_v2_t structure. @@ -273,53 +273,53 @@ typedef enum /****************************************************************************** * Global type definitions ******************************************************************************/ - + /** PDM-PCM Test Mode configuration */ typedef struct { uint8_t drive_delay_hi; /**< Interface drive delay on the high phase of the PDM interface clock. - This field specifies when a PDM value is driven expressed in clk_if clock cycles. + This field specifies when a PDM value is driven expressed in clk_if clock cycles. DRIVE_DELAY should be set in the range [0, IF_CTL.CLOCK_DIV]: "0": Drive PDM value 1 clk_if cycle after the rising edge of clk_pdm. "1": Drive PDM value 2 clk_if cycles after the rising edge of clk_pdm. ... "255": Drive PDM value 256 clk_if cycles after the rising edge of clk_pdm*/ - uint8_t drive_delay_lo; /**< Interface drive delay on the low phase of the PDM interface clock. - This field specifies when a PDM value is driven expressed in clk_if clock cycles. + uint8_t drive_delay_lo; /**< Interface drive delay on the low phase of the PDM interface clock. + This field specifies when a PDM value is driven expressed in clk_if clock cycles. DRIVE_DELAY should be set in the range [0, IF_CTL.CLOCK_DIV]: "0": Drive PDM value 1 clk_if cycle after the rising edge of clk_pdm. "1": Drive PDM value 2 clk_if cycles after the rising edge of clk_pdm. ... "255": Drive PDM value 256 clk_if cycles after the rising edge of clk_pdm*/ - uint8_t mode_hi; /**< Pattern generator mode on the high phase of the PDM interface clock. + uint8_t mode_hi; /**< Pattern generator mode on the high phase of the PDM interface clock. This field specifies the type of pattern driven by the generator: "0": constant 0's "1": constant 1's "2": alternating 0's and 1's (clock pattern) "3": sine wave */ - uint8_t mode_lo; /**< Pattern generator mode on the low phase of the PDM interface clock. + uint8_t mode_lo; /**< Pattern generator mode on the low phase of the PDM interface clock. This field specifies the type of pattern driven by the generator: "0": constant 0's "1": constant 1's "2": alternating 0's and 1's (clock pattern) "3": sine wave */ uint8_t audio_freq_div; /**< Frequency division factor (legal range [3, 13]) to obtain audio frequency - from the PDM clock frequency. This field determines the frequency of the sine wave + from the PDM clock frequency. This field determines the frequency of the sine wave generated by the pattern generator when MODE=3. The formula is below: Sine wave Frequency = PDM clock frequency / 2p*2^(AUDIO_FREQ_DIV) */ bool enable; /**< enable*/ - - + + }cy_stc_test_config_t; - + /** PDM-PCM fir coeff_data structure */ typedef struct { - + int16_t coeff_data0; /**< filter taps coefficients data 0*/ int16_t coeff_data1; /**< filter taps coefficients data 1*/ }cy_stc_pdm_pcm_fir_coeff_t; - + /** PDM-PCM Channel initialization configuration */ typedef struct { @@ -329,25 +329,25 @@ typedef enum bool signExtension; /**< Word extension type: - 0: extension by zero - 1: extension by sign bits */ - - uint8_t rxFifoTriggerLevel; /**< Fifo interrupt trigger level (in words), + + uint8_t rxFifoTriggerLevel; /**< Fifo interrupt trigger level (in words), range: 0 - 63 */ - + bool fir0_enable; /**< FIR 0 filter coefficient enable (does NOT effect FIR filter scaling and FIR filter decimation): - 0: Disabled - 1: Enabled */ - + cy_en_pdm_pcm_ch_cic_decimcode_t cic_decim_code; /**< CIC filter decimation. The CIC filter PCM frequency is a fraction of the PDM frequency. \ref cy_en_pdm_pcm_ch_cic_decimcode_t */ - + cy_en_pdm_pcm_ch_fir0_decimcode_t fir0_decim_code;/**< FIR filter decimation. The FIR filter PCM frequency is a fraction of the CIC filter PCM frequency. \ref cy_en_pdm_pcm_ch_fir0_decimcode_t */ - + uint8_t fir0_scale; /**< FIR 0 filter PCM scaling. range 0-31 */ cy_en_pdm_pcm_ch_fir1_decimcode_t fir1_decim_code;/**< FIR filter decimation. The FIR filter PCM frequency is a fraction of the FIR0 filter PCM frequency. \ref cy_en_pdm_pcm_ch_fir1_decimcode_t */ - + uint8_t fir1_scale; /**< FIR 1 filter PCM scaling. range 0 to 31 */ - + bool dc_block_disable; /**< Disables DC BLOCK if set to true. This is for debug only. To be used for test modes 0,1 and 2 in test config ie. if the input is constant 0's or constant 1's or alternating 0's and 1's*/ cy_en_pdm_pcm_ch_dcblock_coef_t dc_block_code; /**< DC blocker coefficient. \ref cy_en_pdm_pcm_ch_dcblock_coef_t*/ @@ -363,23 +363,23 @@ typedef struct cy_en_pdm_pcm_clock_sel_t clksel; /**< Interface clock clk_if selection. \ref cy_en_pdm_pcm_clock_sel_t */ cy_en_pdm_pcm_halve_rate_sel_t halverate; /**< Halve rate sampling. \ref cy_en_pdm_pcm_halve_rate_sel_t*/ uint8_t route; /**< Specifies what IOSS data input signal "pdm_data[]" is routed to a specific PDM receiver. - Each PDM receiver j has a dedicated 1-bit control field: PDM receiver j uses DATA_SEL[j]. + Each PDM receiver j has a dedicated 1-bit control field: PDM receiver j uses DATA_SEL[j]. The 1-bit field DATA_SEL[j] specification is as follows: '0': PDM receiver j uses data input signal "pdm_data[j]". '1': PDM receiver j uses data input signal "pdm_data[j ^ 1]" (the lower bit of the index is inverted)*/ - - + + uint8_t fir0_coeff_user_value; /**< FIR 0 filter coefficient enable. User has to configure the coeff values. 0: Disabled. 1: Enabled*/ uint8_t fir1_coeff_user_value; /**< FIR 1 filter coefficient enable. User has to configure the coeff values. 0: Disabled. 1: Enabled*/ cy_stc_pdm_pcm_fir_coeff_t fir0_coeff[8]; /**< The (symmetric) 30-taps finite impulse response (FIR) filter with 14-bit signed coefficients (in the range [-8192, 8191]) are specified by FIR0_COEFF0, ..., FIR0_COEFF7. - The FIR filter coefficients have no default values: + The FIR filter coefficients have no default values: the coefficients MUST be programmed BEFORE the filter is enabled. By Default FIR0 is disabled and is only used for 8Khz and 16 Khz sample frequencies*/ - cy_stc_pdm_pcm_fir_coeff_t fir1_coeff[14]; /**< The (symmetric) 55-taps finite impulse response (FIR) filter + cy_stc_pdm_pcm_fir_coeff_t fir1_coeff[14]; /**< The (symmetric) 55-taps finite impulse response (FIR) filter with 14-bit signed coefficients (in the range [-8192, 8191]) are specified by FIR1_COEFF0, ..., FIR1_COEFF13. The (default) FIR filter has built in droop correction. @@ -450,7 +450,7 @@ typedef cy_stc_pdm_pcm_config_v2_t cy_stc_pdm_pcm_config_t; _VAL2FLD(PDM_TEST_CTL_MODE_LO, PDM_TEST_CTL_MODE_LO_DEFAULT) | \ _VAL2FLD(PDM_TEST_CTL_AUDIO_FREQ_DIV, PDM_TEST_CTL_AUDIO_FREQ_DIV_DEFAULT) | \ _VAL2FLD(PDM_TEST_CTL_CH_ENABLED, PDM_TEST_CTL_CH_ENABLED_DEFAULT)) - + #define CY_PDM_PCM_CLK_CTL_DEFAULT (_VAL2FLD(PDM_CLOCK_CTL_CLOCK_DIV, PDM_CLOCK_CTL_CLOCK_DIV_DEFAULT) | \ _VAL2FLD(PDM_CLOCK_CTL_CLOCK_SEL, PDM_CLOCK_CTL_CLOCK_SEL_DEFAULT) | \ _VAL2FLD(PDM_CLOCK_CTL_HALVE, PDM_CLOCK_CTL_HALVE_DEFAULT)) @@ -458,11 +458,11 @@ typedef cy_stc_pdm_pcm_config_v2_t cy_stc_pdm_pcm_config_t; #define CY_PDM_PCM_CH_CTL_DEFAULT (_VAL2FLD(PDM_CH_CTL_WORD_SIZE, CY_PDM_PCM_CH_CTL_WORDSIZE_DEFAULT) | \ _VAL2FLD(PDM_CH_CTL_WORD_SIGN_EXTEND, CY_PDM_PCM_CH_CTL_WORDSIGN_EXT_DEFAULT) | \ _VAL2FLD(PDM_CH_CTL_ENABLED, CY_PDM_PCM_CH_CTL_CH_ENABLE_DEFAULT)) - + #define CY_PDM_PCM_CH_FIR1_DEFAULT (_VAL2FLD(PDM_CH_FIR1_CTL_DECIM2, CY_PDM_PCM_CH_FIR1_DECIM_CODE_DEFAULT) | \ _VAL2FLD(PDM_CH_FIR1_CTL_SCALE, CY_PDM_PCM_CH_FIR1_SCALE_DEFAULT) | \ _VAL2FLD(PDM_CH_FIR1_CTL_ENABLED, CY_PDM_PCM_CH_FIR1_ENABLE_DEFAULT)) - + #define CY_PDM_PCM_CH_DCBLOCK_DEFAULT (_VAL2FLD(PDM_CH_DC_BLOCK_CTL_CODE, CY_PDM_PCM_CH_DCBLOCK_CODE_DEFAULT) | \ _VAL2FLD(PDM_CH_DC_BLOCK_CTL_ENABLED, CY_PDM_PCM_CH_DCBLOCK_ENABLE_DEFAULT)) @@ -476,10 +476,10 @@ typedef cy_stc_pdm_pcm_config_v2_t cy_stc_pdm_pcm_config_t; ((clksel) == CY_PDM_PCM_SEL_PDM_DATA0) || \ ((clksel) == CY_PDM_PCM_SEL_PDM_DATA1) || \ ((clksel) == CY_PDM_PCM_SEL_OFF)) - + #define CY_PDM_PCM_IS_HALVE_RATE_SET_VALID(halverate) (((halverate) == CY_PDM_PCM_RATE_FULL) || \ ((halverate) == CY_PDM_PCM_RATE_HALVE)) - + #define CY_PDM_PCM_IS_ROUTE_VALID(route) ((route) <= 126) #define CY_PDM_PCM_IS_CH_SET_VALID(chanselect) (((chanselect) >= 1U) && ((chanselect) <= 255)) @@ -495,7 +495,7 @@ typedef cy_stc_pdm_pcm_config_v2_t cy_stc_pdm_pcm_config_t; ((wordSize) == CY_PDM_PCM_WSIZE_20_BIT) || \ ((wordSize) == CY_PDM_PCM_WSIZE_24_BIT) || \ ((wordSize) == CY_PDM_PCM_WSIZE_32_BIT)) - + #define CY_PDM_PCM_IS_SCALE_VALID(scale) ((scale) <= 31) #define CY_PDM_PCM_IS_ENABLE_VALID(enable) ((enable == 0)||(enable == 1)) @@ -563,7 +563,7 @@ __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_ReadFifoSilent(PDM_Type const * base __STATIC_INLINE void Cy_PDM_PCM_Channel_Enable(PDM_Type * base, uint8_t channel_num) { PDM_PCM_CH_CTL(base,channel_num) |= PDM_CH_CTL_ENABLED_Msk; - + } /****************************************************************************** @@ -579,7 +579,7 @@ __STATIC_INLINE void Cy_PDM_PCM_Channel_Enable(PDM_Type * base, uint8_t channel_ __STATIC_INLINE void Cy_PDM_PCM_Channel_Disable(PDM_Type * base, uint8_t channel_num) { PDM_PCM_CH_CTL(base,channel_num) &= (uint32_t) ~PDM_CH_CTL_ENABLED_Msk; - + } /****************************************************************************** @@ -669,8 +669,8 @@ __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_Cic_DecimCode(PDM_Type * base, uint ***************************************************************************//** * * Sets PDM-PCM FIR0 Filter Decim code and Scale. -* The FIR filter coefficients have no default values: -* the coefficients MUST be programmed BEFORE the filter is enabled. +* The FIR filter coefficients have no default values: +* the coefficients MUST be programmed BEFORE the filter is enabled. * By Default FIR0 is disabled and is only used for 8Khz and 16 Khz sample frequencies. * For other frequencies it is a pass through. * @@ -735,8 +735,8 @@ __STATIC_INLINE void Cy_PDM_PCM_Channel_Set_DCblock(PDM_Type * base, uint8_t ch * Sets one or more PDM-PCM interrupt factor bits (sets the INTR_MASK register). * * \param base The pointer to the PDM-PCM instance address -* \param channel_num Channel number -* \param interrupt Interrupt bit mask +* \param channel_num Channel number +* \param interrupt Interrupt bit mask * \ref group_pdm_pcm_macros_interrupt_masks_v2. * ******************************************************************************/ @@ -807,7 +807,7 @@ __STATIC_INLINE uint32_t Cy_PDM_PCM_Channel_GetInterruptStatus(PDM_Type const * * * \param base The pointer to the PDM-PCM instance address * \param channel_num Channel number -* \param interrupt +* \param interrupt * The interrupt bit mask \ref group_pdm_pcm_macros_interrupt_masks_v2. * ******************************************************************************/ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sar.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sar.h index 8b65822441..0a041b8b4e 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sar.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sar.h @@ -25,7 +25,7 @@ /** * \addtogroup group_sar * \{ -* This driver configures and controls the SAR ADC subsystem block, which is a +* This driver configures and controls the SAR ADC subsystem block, which is a * part of \ref group_pass_structure "PASS" hardware block. * * The functions and other declarations used in this driver are in cy_sar.h. @@ -259,7 +259,7 @@ * is used for converting counts to volts in the \ref Cy_SAR_CountsTo_Volts, \ref Cy_SAR_CountsTo_mVolts, and * \ref Cy_SAR_CountsTo_uVolts functions. * -* The rest of the \ref cy_stc_sar_config_t fields starting from \ref cy_stc_sar_config_t::clock affects +* The rest of the \ref cy_stc_sar_config_t fields starting from \ref cy_stc_sar_config_t::clock affects * SAR ADC configuration only for PASS_ver2. Refer to \ref cy_stc_sar_config_t for details. * * \section group_sar_trigger_conversions Triggering Conversions @@ -357,7 +357,7 @@ * \section group_sar_fifo_usage FIFO Usage * * The PASS_ver2 SAR can operate in the system Deep Sleep power mode. -* To do so the SAR should be clocked by the \ref group_sysanalog_dpslp, +* To do so the SAR should be clocked by the \ref group_sysanalog_dpslp, * triggered by the \ref group_sysanalog_timer, and use the FIFO: * \snippet sar/snippet/main.c SNIPPET_FIFO_ISR * \snippet sar/snippet/main.c SNIPPET_FIFO_OPERATE @@ -370,7 +370,7 @@ * a maximum frequency of 18 MHz. * * For PASS_ver2 the maximum clock frequency is 36 MHz. -* Also, the SAR clock could be switched to the \ref group_sysanalog_dpslp to operate in +* Also, the SAR clock could be switched to the \ref group_sysanalog_dpslp to operate in * the system Deep Sleed power mode using \ref cy_stc_sar_config_t::clock. * * \snippet sar/snippet/main.c SAR_SNIPPET_CONFIGURE_CLOCK diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_scb_ezi2c.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_scb_ezi2c.h index e5c7db4c4c..ea6730f92b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_scb_ezi2c.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_scb_ezi2c.h @@ -39,7 +39,7 @@ * master and your code. I2C devices based on the SCB hardware are compatible * with the I2C Standard mode, Fast mode, and Fast mode Plus specifications, as * defined in the I2C bus specification. -* +* * EZI2C slave is a special implementation of the I2C that handles all communication * between the master and slave through ISR (interrupt service routine) and requires * no interaction with the main program flow from the slave side. The EZI2C should be diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_scb_i2c.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_scb_i2c.h index 454dd5eabb..71b5881271 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_scb_i2c.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_scb_i2c.h @@ -45,7 +45,7 @@ * * Supports standard data rates of 100/400/1000 kbps * * Hardware Address Match, multiple addresses * * Wake from Deep Sleep on Address Match -* +* * \note * I2C supports clock stretching. This occurs when a slave device is not capable * of processing data, it holds the SCL line by driving a '0'. The master device monitors diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_seglcd.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_seglcd.h index 4213b79960..5af8febde6 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_seglcd.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_seglcd.h @@ -47,13 +47,13 @@ * (e.g. one 7-segment display and one bar-graph display). * * TN - A twisted nematic LCD glass. * * STN - A super-twisted nematic LCD glass. -* * Display - A block of the same type of symbols on an LCD glass to indicate a multi-digital +* * Display - A block of the same type of symbols on an LCD glass to indicate a multi-digital * number or character string. There may be one or more displays on a single LCD glass. * * Symbol - A block of pixels on an LCD glass to indicate a single digit or character. * * Pixel - A basic displaying item. This can be a segment of a 7-segment symbol (thus called a "segment"), * a pixel of a dot-matrix display, or a stand-alone arbitrarily-shaped display element. * Each pixel has a unique set of common and segment lines within one LCD glass. -* The API offers pixel identifiers - the 32-bit items of the display pixel map +* The API offers pixel identifiers - the 32-bit items of the display pixel map * (to use in the display structure definition, see \ref cy_stc_seglcd_disp_t), * created by the \ref CY_SEGLCD_PIXEL macro. * * Common line (Com/COM for short) - A common wire/signal from the PSoC chip to the LCD glass. @@ -67,16 +67,16 @@ * \section group_seglcd_solution SegLCD Solution * The Segment LCD Driver can be used either as a standalone library * to manage the MXLCD hardware or as a part of the more complex software solution -* delivered within ModusToolbox: +* delivered within ModusToolbox: * the Device Configurator SegLCD personality and the SegLCD Configurator tools. * * The SegLCD solution provides an easy method to configure * an MXLCD block to drive your standard or custom LCD glass: * \image html seglcd_solution.png * The SegLCD solution includes: -* * The SegLCD Configurator tool, which is a display configuration wizard to create and +* * The SegLCD Configurator tool, which is a display configuration wizard to create and * configure displays and generate commons array and display structures \ref cy_stc_seglcd_disp_t. -* * The ModusToolbox Device Configurator contains a SegLCD personality, which is an MXLCD block +* * The ModusToolbox Device Configurator contains a SegLCD personality, which is an MXLCD block * configuration wizard. It helps to easily tune all the timing settings, operation modes, * provides a flexible GPIO pin assignment capability and generates the \ref cy_stc_seglcd_config_t * structure and the rest of accompanying definitions. @@ -94,9 +94,9 @@ * * Contrast vs. Frame Rate (\ref cy_stc_seglcd_config_t.contrast vs. \ref cy_stc_seglcd_config_t.frRate)\n * Some combinations of a frame rate and input frequency can restrict the valid contrast range -* because of the limited dividers size (for Low Speed mode - 8 bit, and for High Speed mode - 16 bit). -* For small values of contrast at small frame rates, the required divider values -* may be beyond permissible limits of the dividers size. +* because of the limited dividers size (for Low Speed mode - 8 bit, and for High Speed mode - 16 bit). +* For small values of contrast at small frame rates, the required divider values +* may be beyond permissible limits of the dividers size. * For large High Speed clock frequencies, certain ratios between the contrast and frame * rate cannot be achieved due to the limited divider size. The \ref Cy_SegLCD_Init function * automatically restricts such incorrect combinations (returns \ref CY_SEGLCD_BAD_PARAM). @@ -106,15 +106,15 @@ * Speed Mode Switching (\ref cy_stc_seglcd_config_t.speed)\n * The High Speed and Low Speed generators mostly duplicate each other, * except that for MXLCD_ver1, the High Speed version has larger frequency dividers to generate -* the frame and sub-frame periods. This is because the clock of the High Speed block -* typically has a frequency 30-100 times bigger than the 32 KHz clock fed to the Low Speed block. +* the frame and sub-frame periods. This is because the clock of the High Speed block +* typically has a frequency 30-100 times bigger than the 32 KHz clock fed to the Low Speed block. * For MXLCD_ver2, both High Speed and Low Speed generators have similar 16-bit dividers, * because a possibility exists to source a Low Speed generator with a Medium Frequency clock * (see \ref group_sysclk_mf_funcs) that may be much higher than 32 KHz ILO: * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_MF_Clock * Switching between High Speed and Low Speed modes via the \ref Cy_SegLCD_Init function * causes the dividers to reconfigure. -* Under possible restrictions related to certain ratios between contrast and frame rates +* Under possible restrictions related to certain ratios between contrast and frame rates * (see Contrast vs. Frame Rate section above), switching between High Speed and the Low Speed modes * via the \ref Cy_SegLCD_Init function may set new dividers values that don't give the same contrast value. * @@ -125,7 +125,7 @@ * More precise preferences depend on a certain set of an LCD glass, power modes, the number of terminals, desired contrast/frame rate settings, etc. * * Conventional Waveforms (\ref cy_stc_seglcd_config_t.wave)\n -* Conventional LCD drivers apply waveforms to COM and SEG electrodes generated by switching +* Conventional LCD drivers apply waveforms to COM and SEG electrodes generated by switching * between multiple different voltages. The following terms are used to define these waveforms: * * Duty: A driver operates in the 1/M-th duty when it drives M COM electrodes. Each COM electrode is effectively driven for the 1/M of the frame time. * * Bias: A driver uses the 1/B-th bias when its waveforms use the voltage steps of (1/B)*VDRV. @@ -196,7 +196,7 @@ * * When the block is configured, for further work with display, a display structure is needed: * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_Display -* \note Using the SegLCD Configurator, display structures and the commons array are generated automatically into the +* \note Using the SegLCD Configurator, display structures and the commons array are generated automatically into the * GeneratedSource/cycfg_seglcd.h/.c files. All you need is just to include cycfg_seglcd.h into your application code. * * And now you can write multi-digit decimal and hexadecimal numbers and strings onto the initiated 7-segment display: @@ -242,7 +242,7 @@ * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_Custom3x5_WriteNumber * \image html seglcd_3x5.png * -* There are LCD-GPIO terminal mapping definitions for different device families +* There are LCD-GPIO terminal mapping definitions for different device families * used in the mentioned above commons and display pixel arrays: * \snippet seglcd/snippet/SegLCD_Snpt.h snippet_Cy_SegLCD_connectionRemapping * @@ -361,7 +361,7 @@ extern "C" { */ /** SegLCD driver error codes */ -typedef enum +typedef enum { CY_SEGLCD_SUCCESS = 0x0UL, /**< Returned successful */ CY_SEGLCD_BAD_PARAM = CY_SEGLCD_ID | CY_PDL_STATUS_ERROR | 0x01UL, /**< A bad parameter was passed (display/font pointer is NULL, @@ -382,7 +382,7 @@ typedef enum } cy_en_seglcd_status_t; /** SegLCD block speed mode */ -typedef enum +typedef enum { CY_SEGLCD_SPEED_LOW = 0x0UL, /**< Low Speed mode, works in Active, Sleep and DeepSleep power modes */ CY_SEGLCD_SPEED_HIGH = 0x1UL /**< High Speed mode, works in Active and Sleep power modes */ @@ -396,7 +396,7 @@ typedef enum } cy_en_seglcd_lsclk_t; /** SegLCD driving waveform type */ -typedef enum +typedef enum { CY_SEGLCD_TYPE_A = 0x0UL, /**< Type A - Each frame addresses each COM pin only once with a balanced (DC=0) waveform. */ CY_SEGLCD_TYPE_B = 0x1UL /**< Type B - Each frame addresses each COM pin twice in a sequence with a positive @@ -405,14 +405,14 @@ typedef enum } cy_en_seglcd_wave_t; /** SegLCD driving mode configuration */ -typedef enum +typedef enum { CY_SEGLCD_PWM = 0x0UL, /**< PWM mode. */ CY_SEGLCD_CORRELATION = 0x1UL /**< Digital Correlation mode. */ } cy_en_seglcd_drive_t; /** SegLCD PWM bias selection */ -typedef enum +typedef enum { CY_SEGLCD_BIAS_HALF = 0x0UL, /**< 1/2 Bias. */ CY_SEGLCD_BIAS_THIRD = 0x1UL, /**< 1/3 Bias. */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_smif.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_smif.h index f29f8c2853..0d8578e77b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_smif.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_smif.h @@ -25,17 +25,17 @@ /** * \addtogroup group_smif * \{ -* The SPI-based communication interface to the external quad SPI (QSPI) +* The SPI-based communication interface to the external quad SPI (QSPI) * high-speed memory devices. * -* The functions and other declarations used in this driver are in cy_smif.h and -* cy_smif_memslot.h (if used). If you are using the ModusToolbox QSPI Configurator, -* also include cycfg_qspi_memslot.h. +* The functions and other declarations used in this driver are in cy_smif.h and +* cy_smif_memslot.h (if used). If you are using the ModusToolbox QSPI Configurator, +* also include cycfg_qspi_memslot.h. * * **SMIF: Serial Memory Interface**: This IP block implements an SPI-based * communication interface for interfacing external memory devices to PSoC. * The SMIF supports SPI, dual SPI (DSPI), quad SPI (QSPI), dual QSPI and octal SPI. -* +* * Features * - Standard SPI Master interface * - Supports single/dual/quad/octal SPI memory devices @@ -44,7 +44,7 @@ * memory devices * - eXecute-In-Place (XIP) operation mode for both read and write accesses * with 4KB XIP read cache and on-the-fly encryption and decryption -* - Supports external serial memory initialization via +* - Supports external serial memory initialization via * * Serial Flash Discoverable Parameters (SFDP) standard * @@ -58,12 +58,12 @@ * - SMIF configuration structures * * The SMIF API is divided into the low-level functions and memory-slot functions. Use -* the low level API for the SMIF block initialization and for implementing a generic +* the low level API for the SMIF block initialization and for implementing a generic * SPI communication interface using the SMIF block. * -* The memory slot API has functions to implement the basic memory operations such as -* program, read, erase etc. These functions are implemented using the memory -* parameters in the memory device configuration data structure. The +* The memory slot API has functions to implement the basic memory operations such as +* program, read, erase etc. These functions are implemented using the memory +* parameters in the memory device configuration data structure. The * Cy_SMIF_MemInit() API initializes all the memory slots based on the settings * in the array. * @@ -77,25 +77,25 @@ * \note * Above image is applicable only for SMIF v1 IP. * -* SMIF Configuration Tool is a stand-alone application, which is a part of PDL +* SMIF Configuration Tool is a stand-alone application, which is a part of PDL * (Creator) and could be found in \/tools/\/SMIFConfigurationTool -* (e.g. for PDL 3.0.0 and Windows OS PDL/3.0.0/tools/win/SMIFConfigurationTool). -* -* In ModusToolbox this tool is called QSPI Configurator. QSPI Configurator is a part of +* (e.g. for PDL 3.0.0 and Windows OS PDL/3.0.0/tools/win/SMIFConfigurationTool). +* +* In ModusToolbox this tool is called QSPI Configurator. QSPI Configurator is a part of * PSoC 6 Software Library and can be found in \/tools/qspi-configurator-1.1 -* +* * Tool generates *.c and *.h file with configuration structures. These configuration * structures are input parameters for cy_smif_memslot API level * * \warning The driver is not responsible for external memory persistence. You cannot edit -* a buffer during the Read/Write operations. If there is a memory error, the SMIF ip block -* can require a reset. To determine if this has happened, check the SMIF -* busy status using Cy_SMIF_BusyCheck() and implement a timeout. Reset the SMIF +* a buffer during the Read/Write operations. If there is a memory error, the SMIF ip block +* can require a reset. To determine if this has happened, check the SMIF +* busy status using Cy_SMIF_BusyCheck() and implement a timeout. Reset the SMIF * block by toggling CTL.ENABLED. Then reconfigure the SMIF block. * -* For the Write operation, check that the SMIF driver has completed -* transferring by calling Cy_SMIF_BusyCheck(). Also, check that the memory is -* available with Cy_SMIF_MemIsBusy() before proceeding. +* For the Write operation, check that the SMIF driver has completed +* transferring by calling Cy_SMIF_BusyCheck(). Also, check that the memory is +* available with Cy_SMIF_MemIsBusy() before proceeding. * * Simple example of external flash memory programming using low level SMIF API. * All steps mentioned in example below are incorporated in @@ -120,7 +120,7 @@ * * \snippet smif/snippet/main.c SMIF_API: Read example * -* The user should invalidate the cache by calling Cy_SMIF_CacheInvalidate() when +* The user should invalidate the cache by calling Cy_SMIF_CacheInvalidate() when * switching from the MMIO mode to XIP mode. * * \section group_smif_configuration Configuration Considerations @@ -129,7 +129,7 @@ * \ref page_getting_started_pdl_design "PDL Design" section. * * See the documentation for Cy_SMIF_Init() and Cy_SMIF_MemInit() for details -* on the required configuration structures and other initialization topics. +* on the required configuration structures and other initialization topics. * * The normal (MMIO) mode is used for implementing a generic SPI/DSPI/QSPI/dual * QSPI/octal SPI communication interface using the SMIF block. This @@ -163,11 +163,11 @@ * memslot level API usage. * * \subsection group_smif_xip_init SMIF XIP Initialization -* The eXecute In Place (XIP) is a mode of operation where read or write commands -* to the memory device are directed through the SMIF without any use of API -* function calls. In this mode the SMIF block maps the AHB bus-accesses to -* external memory device addresses to make it behave similar to internal memory. -* This allows the CPU to execute code directly from external memory. This mode +* The eXecute In Place (XIP) is a mode of operation where read or write commands +* to the memory device are directed through the SMIF without any use of API +* function calls. In this mode the SMIF block maps the AHB bus-accesses to +* external memory device addresses to make it behave similar to internal memory. +* This allows the CPU to execute code directly from external memory. This mode * is not limited to code and is suitable also for data read and write accesses. * The memory regions available for XIP addresses allocation are defined * in a linker script file (.ld). @@ -179,10 +179,10 @@ * and then switch back to XIP. * * \snippet smif/snippet/main.c SMIF_INIT: XIP -* \note Example of input parameters initialization is in \ref group_smif_init +* \note Example of input parameters initialization is in \ref group_smif_init * section. -* \warning Functions that called from external memory should be declared with -* long call attribute. +* \warning Functions that called from external memory should be declared with +* long call attribute. * * \subsection group_smif_xip_crypto SMIF XIP On-the-fly encryption * In XIP mode, a cryptography component supports on-the-fly encryption for write data and @@ -204,18 +204,18 @@ * \image html smif_xip_mode_functionality.png * * \subsection group_smif_usage_rules Rules for PSoC6 QSPI/SMIF Block Usage -* 1. All operations must use one or more dummy cycles between the PSoC 6 Command -* and Address phase (when the PSoC 6 MCU drives the data pins) and the device's -* Response phase (when the device drives the same data pins). Bus contention may +* 1. All operations must use one or more dummy cycles between the PSoC 6 Command +* and Address phase (when the PSoC 6 MCU drives the data pins) and the device's +* Response phase (when the device drives the same data pins). Bus contention may * occur if no (zero) dummy cycles are used. -* 2. Any transfer that does not allow dummy cycles (such as Register Status -* Reads) must use the single-bit transfer mode. In single-bit mode, the PSoC 6 -* drives the Command on the Data0 line and the device responds on the Data1 +* 2. Any transfer that does not allow dummy cycles (such as Register Status +* Reads) must use the single-bit transfer mode. In single-bit mode, the PSoC 6 +* drives the Command on the Data0 line and the device responds on the Data1 * line, so bus contention cannot occur. * * \section group_smif_more_information More Information * -* More information regarding the Serial Memory Interface can be found in the component +* More information regarding the Serial Memory Interface can be found in the component * datasheet and the Technical Reference Manual (TRM). * More information regarding the SMIF Configuration Tool are in SMIF * Configuration Tool User Guide located in \/tools/\/SMIFConfigurationTool/ @@ -350,7 +350,7 @@ * CY_SMIF_WR_DISABLE_CMD into CY_SMIF_WRITE_DISABLE_CMD;\n * CY_SMIF_RD_STS_REG1_CMD into CY_SMIF_READ_STATUS_REG1_CMD;\n * CY_SMIF_WR_ENABLE_CMD into CY_SMIF_WRITE_ENABLE_CMD;\n -* CY_SMIF_RD_STS_REG2_T1_CMD into CY_SMIF_READ_STATUS_REG2_T1_CMD;\n +* CY_SMIF_RD_STS_REG2_T1_CMD into CY_SMIF_READ_STATUS_REG2_T1_CMD;\n * CY_SMIF_WR_STS_REG2_CMD into CY_SMIF_WRITE_STATUS_REG2_CMD;\n * CY_SMIF_RD_STS_REG2_T2_CMD into CY_SMIF_READ_STATUS_REG2_T2_CMD;\n * CY_SMIF_QE_BIT_STS_REG2_T1 into CY_SMIF_QE_BIT_STATUS_REG2_T1;\n @@ -370,14 +370,14 @@ * * * -* * * * -* * * * -* * @@ -437,15 +437,15 @@ * * -* * * * * -* * * @@ -459,7 +459,7 @@ * * * -* * * @@ -496,12 +496,12 @@ * \image html smif_1_0_p03_rw_cmd.png * * The sequence of the PDL functions required in a read or write transaction is: -* \ref Cy_SMIF_TransmitCommand() -> -* \ref Cy_SMIF_SendDummyCycles() -> -* \ref Cy_SMIF_ReceiveData() / \ref Cy_SMIF_TransmitData() -> +* \ref Cy_SMIF_TransmitCommand() -> +* \ref Cy_SMIF_SendDummyCycles() -> +* \ref Cy_SMIF_ReceiveData() / \ref Cy_SMIF_TransmitData() -> * \ref Cy_SMIF_BusyCheck(). -* The address is sent as part of the Cy_SMIF_TransmitCommand() function. -* No separate function call is required. +* The address is sent as part of the Cy_SMIF_TransmitCommand() function. +* No separate function call is required. * * \} * \defgroup group_smif_mem_slot_functions Memory Slot Functions @@ -677,7 +677,7 @@ extern "C" { (CY_SMIF_SEL_FEEDBACK_CLK == (cy_en_smif_clk_select_t)(clkSel)) || \ (CY_SMIF_SEL_INVERTED_FEEDBACK_CLK == (cy_en_smif_clk_select_t)(clkSel))) #endif /* CY_IP_MXSMIF_VERSION */ - + #define CY_SMIF_DESELECT_DELAY_VALID(delay) ((delay) <= CY_SMIF_MAX_DESELECT_DELAY) #define CY_SMIF_SLAVE_SEL_VALID(ss) ((CY_SMIF_SLAVE_SELECT_0 == (ss)) || \ (CY_SMIF_SLAVE_SELECT_1 == (ss)) || \ @@ -702,8 +702,8 @@ extern "C" { (CY_SMIF_DDR == (rate))) #define CY_SMIF_DATA_DATA_RATE_VALID(rate) ((CY_SMIF_SDR == (rate)) || \ (CY_SMIF_DDR == (rate))) - -#define CY_SMIF_BUFFER_SIZE_MAX (65536UL) + +#define CY_SMIF_BUFFER_SIZE_MAX (65536UL) #define CY_SMIF_BUF_SIZE_VALID(size) (((CY_SMIF_BUFFER_SIZE_MAX) >= (size)) && ((0UL) < (size))) /*************************************** @@ -764,7 +764,7 @@ extern "C" { #define CY_SMIF_CMD_FIFO_WR_SS_Pos (8UL) /* [11:8] Slave select */ #define CY_SMIF_CMD_FIFO_WR_SS_Msk (0x00000F00UL) /* DATA[11:8] Slave select */ - + #define CY_SMIF_CMD_FIFO_WR_TXDATA_Pos (0UL) /* [0] Transmitted byte */ #define CY_SMIF_CMD_FIFO_WR_TXDATA_Msk (0x000000FFUL) /* DATA[7:0] Transmitted byte */ #define CY_SMIF_CMD_FIFO_WR_DUMMY_Pos (0UL) /* [0] Dummy count */ @@ -799,8 +799,8 @@ typedef enum { /**< Generates a bus error. */ CY_SMIF_BUS_ERROR = 0UL, - /** Stalls the bus with the wait states. This option will increase the - * interrupt latency. + /** Stalls the bus with the wait states. This option will increase the + * interrupt latency. */ CY_SMIF_WAIT_STATES = 1UL } cy_en_smif_error_event_t; @@ -893,7 +893,7 @@ typedef enum } cy_en_smif_status_t; /** The SMIF slave select definitions for the driver API. Each slave select is - * represented by an enumeration that has the bit corresponding to the slave + * represented by an enumeration that has the bit corresponding to the slave * select number set. */ typedef enum { @@ -1186,10 +1186,10 @@ typedef struct * - "5": 6 clock cycles. * - "6": 7 clock cycles. * - "7": 8 clock cycles. */ - uint32_t rxClockSel; /**< Specifies the clock source for the receiver + uint32_t rxClockSel; /**< Specifies the clock source for the receiver * clock \ref cy_en_smif_clk_select_t. */ - uint32_t blockEvent; /**< Specifies what happens when there is a Read - * from an empty RX FIFO or a Write to a full + uint32_t blockEvent; /**< Specifies what happens when there is a Read + * from an empty RX FIFO or a Write to a full * TX FIFO. \ref cy_en_smif_error_event_t. */ } cy_stc_smif_config_t; @@ -1822,7 +1822,7 @@ __STATIC_INLINE void Cy_SMIF_PushTxFifo(SMIF_Type *baseaddr, cy_stc_smif_context #if (CY_IP_MXSMIF_VERSION>=2) if((context->preCmdDataRate == CY_SMIF_DDR) &&(context->preCmdWidth == CY_SMIF_WIDTH_OCTAL)) { - SMIF_TX_DATA_MMIO_FIFO_WR1ODD(baseaddr) = buff[0U]; + SMIF_TX_DATA_MMIO_FIFO_WR1ODD(baseaddr) = buff[0U]; } else { @@ -1927,7 +1927,7 @@ __STATIC_INLINE void Cy_SMIF_PopRxFifo(SMIF_Type *baseaddr, cy_stc_smif_context_ { if (readBytes == CY_SMIF_EIGHT_BYTES) { - Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[0U], true); + Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[0U], true); Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD4(baseaddr), &buff[4U], true); } else if(readBytes == CY_SMIF_ONE_BYTE) @@ -1936,7 +1936,7 @@ __STATIC_INLINE void Cy_SMIF_PopRxFifo(SMIF_Type *baseaddr, cy_stc_smif_context_ } else if(readBytes == CY_SMIF_TWO_BYTES) { - Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD2(baseaddr), &buff[0U], false); + Cy_SMIF_UnPackByteArray(SMIF_RX_DATA_FIFO_RD2(baseaddr), &buff[0U], false); } else if(readBytes == CY_SMIF_THREE_BYTES) { @@ -2121,7 +2121,7 @@ __STATIC_INLINE SMIF_DEVICE_Type volatile * Cy_SMIF_GetDeviceBySlot(SMIF_Type *b switch (slaveSelect) { case CY_SMIF_SLAVE_SELECT_0: - device = &(SMIF_DEVICE_IDX(base, 0)); + device = &(SMIF_DEVICE_IDX(base, 0)); break; case CY_SMIF_SLAVE_SELECT_1: device = &(SMIF_DEVICE_IDX(base, 1)); diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_smif_memslot.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_smif_memslot.h index 1438352d96..13cd357937 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_smif_memslot.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_smif_memslot.h @@ -157,7 +157,7 @@ extern "C" { #define CY_SMIF_QE_BIT_STATUS_REG2_T1 (0x02U) /**< The QE bit is in status register 2 type 1. * It should be written as the second byte. */ -#define CY_SMIF_FAST_READ_4_BYTES_CMD_1S_1S_1S (0x0CU) /**< The command for a 1S-1S-1S SMIF fast read with 4-byte addressing */ +#define CY_SMIF_FAST_READ_4_BYTES_CMD_1S_1S_1S (0x0CU) /**< The command for a 1S-1S-1S SMIF fast read with 4-byte addressing */ #define CY_SMIF_FAST_READ_4_BYTES_CMD_1S_1S_2S (0x3CU) /**< The command for a 1S-1S-2S SMIF fast read with 4-byte addressing */ #define CY_SMIF_FAST_READ_4_BYTES_CMD_1S_2S_2S (0xBCU) /**< The command for a 1S-2S-2S SMIF fast read with 4-byte addressing */ #define CY_SMIF_FAST_READ_4_BYTES_CMD_1S_1S_4S (0x6CU) /**< The command for a 1S-1S-4S SMIF fast read with 4-byte addressing */ @@ -186,18 +186,18 @@ extern "C" { #define CY_SMIF_SFDP_ERASE_TIME_16MS (16U) /**< Units of Erase Typical Time in ms */ #define CY_SMIF_SFDP_ERASE_TIME_128MS (128U) /**< Units of Erase Typical Time in ms */ #define CY_SMIF_SFDP_ERASE_TIME_1S (1000U) /**< Units of Erase Typical Time in ms */ - + #define CY_SMIF_SFDP_CHIP_ERASE_TIME_16MS (16U) /**< Units of Chip Erase Typical Time in ms */ #define CY_SMIF_SFDP_CHIP_ERASE_TIME_256MS (256U) /**< Units of Chip Erase Typical Time in ms */ #define CY_SMIF_SFDP_CHIP_ERASE_TIME_4S (4000U) /**< Units of Chip Erase Typical Time in ms */ #define CY_SMIF_SFDP_CHIP_ERASE_TIME_64S (64000U) /**< Units of Chip Erase Typical Time in ms */ - + #define CY_SMIF_SFDP_PROG_TIME_8US (8U) /**< Units of Page Program Typical Time in us */ #define CY_SMIF_SFDP_PROG_TIME_64US (64U) /**< Units of Page Program Typical Time in us */ #define CY_SMIF_SFDP_PROG_TIME_DEFAULT (100000U) /**< Default Page Program Time in us - 100 ms */ #define CY_SMIF_SFDP_PAGE_SIZE_DEFAULT (256U) /**< Default Page size used for SFDP 1.0 devices */ - + #define CY_SMIF_SFDP_UNIT_0 (0U) /**< Units of Basic Flash Parameter Table Time Parameters */ #define CY_SMIF_SFDP_UNIT_1 (1U) /**< Units of Basic Flash Parameter Table Time Parameters */ #define CY_SMIF_SFDP_UNIT_2 (2U) /**< Units of Basic Flash Parameter Table Time Parameters */ @@ -390,7 +390,7 @@ extern "C" { /** \cond INTERNAL */ /******************************************************************************* -* These are legacy constants and API. They are left here just +* These are legacy constants and API. They are left here just * for backward compatibility. * Do not use them in new designs. *******************************************************************************/ @@ -405,7 +405,7 @@ extern "C" { #define CY_SMIF_WR_DISABLE_CMD CY_SMIF_WRITE_DISABLE_CMD #define CY_SMIF_RD_STS_REG1_CMD CY_SMIF_READ_STATUS_REG1_CMD #define CY_SMIF_WR_ENABLE_CMD CY_SMIF_WRITE_ENABLE_CMD -#define CY_SMIF_RD_STS_REG2_T1_CMD CY_SMIF_READ_STATUS_REG2_T1_CMD +#define CY_SMIF_RD_STS_REG2_T1_CMD CY_SMIF_READ_STATUS_REG2_T1_CMD #define CY_SMIF_WR_STS_REG2_CMD CY_SMIF_WRITE_STATUS_REG2_CMD #define CY_SMIF_RD_STS_REG2_T2_CMD CY_SMIF_READ_STATUS_REG2_T2_CMD #define CY_SMIF_QE_BIT_STS_REG2_T1 CY_SMIF_QE_BIT_STATUS_REG2_T1 @@ -414,16 +414,16 @@ extern "C" { #define Cy_SMIF_Memslot_Init Cy_SMIF_MemInit #define Cy_SMIF_Memslot_DeInit Cy_SMIF_MemDeInit #define Cy_SMIF_Memslot_CmdWriteEnable Cy_SMIF_MemCmdWriteEnable -#define Cy_SMIF_Memslot_CmdWriteDisable Cy_SMIF_MemCmdWriteDisable -#define Cy_SMIF_Memslot_IsBusy Cy_SMIF_MemIsBusy -#define Cy_SMIF_Memslot_QuadEnable Cy_SMIF_MemQuadEnable -#define Cy_SMIF_Memslot_CmdReadSts Cy_SMIF_MemCmdReadStatus +#define Cy_SMIF_Memslot_CmdWriteDisable Cy_SMIF_MemCmdWriteDisable +#define Cy_SMIF_Memslot_IsBusy Cy_SMIF_MemIsBusy +#define Cy_SMIF_Memslot_QuadEnable Cy_SMIF_MemQuadEnable +#define Cy_SMIF_Memslot_CmdReadSts Cy_SMIF_MemCmdReadStatus #define Cy_SMIF_Memslot_CmdWriteSts Cy_SMIF_MemCmdWriteStatus #define Cy_SMIF_Memslot_CmdChipErase Cy_SMIF_MemCmdChipErase #define Cy_SMIF_Memslot_CmdSectorErase Cy_SMIF_MemCmdSectorErase #define Cy_SMIF_Memslot_SfdpDetect Cy_SMIF_MemSfdpDetect #define Cy_SMIF_Memslot_CmdProgram Cy_SMIF_MemCmdProgram -#define Cy_SMIF_Memslot_CmdRead Cy_SMIF_MemCmdRead +#define Cy_SMIF_Memslot_CmdRead Cy_SMIF_MemCmdRead #define PARAM_ID_MSB_OFFSET (0x08U) /* The offset of Parameter ID MSB */ #define PARAM_ID_LSB_MASK (0xFFUL) /* The mask of Parameter ID LSB */ @@ -532,12 +532,12 @@ typedef struct */ typedef struct { - uint32_t numOfAddrBytes; /**< This specifies the number of address bytes used by the + uint32_t numOfAddrBytes; /**< This specifies the number of address bytes used by the * memory slave device, valid values 1-4 */ uint32_t memSize; /**< The memory size: For densities of 2 gigabits or less - the size in bytes; * For densities 4 gigabits and above - bit-31 is set to 1b to define that - * this memory is 4 gigabits and above; and other 30:0 bits define N where - * the density is computed as 2^N bytes. + * this memory is 4 gigabits and above; and other 30:0 bits define N where + * the density is computed as 2^N bytes. * For example, 0x80000021 corresponds to 2^30 = 1 gigabyte. */ cy_stc_smif_mem_cmd_t* readCmd; /**< This specifies the Read command */ @@ -573,7 +573,7 @@ typedef struct #endif } cy_stc_smif_mem_device_cfg_t; - + /** * * This SMIF memory configuration structure is used to store the memory configuration for the memory mode of operation. @@ -705,18 +705,18 @@ cy_en_smif_status_t Cy_SMIF_MemInitSfdpMode(SMIF_Type *base, cy_en_smif_status_t Cy_SMIF_MemIsReady(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, uint32_t timeoutUs, cy_stc_smif_context_t const *context); -cy_en_smif_status_t Cy_SMIF_MemIsQuadEnabled(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, +cy_en_smif_status_t Cy_SMIF_MemIsQuadEnabled(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, bool *isQuadEnabled, cy_stc_smif_context_t const *context); -cy_en_smif_status_t Cy_SMIF_MemEnableQuadMode(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, +cy_en_smif_status_t Cy_SMIF_MemEnableQuadMode(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, uint32_t timeoutUs, cy_stc_smif_context_t const *context); -cy_en_smif_status_t Cy_SMIF_MemRead(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, - uint32_t address, uint8_t rxBuffer[], +cy_en_smif_status_t Cy_SMIF_MemRead(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, + uint32_t address, uint8_t rxBuffer[], uint32_t length, cy_stc_smif_context_t const *context); -cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, - uint32_t address, uint8_t const txBuffer[], - uint32_t length, cy_stc_smif_context_t const *context); -cy_en_smif_status_t Cy_SMIF_MemEraseSector(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, - uint32_t address, uint32_t length, +cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, + uint32_t address, uint8_t const txBuffer[], + uint32_t length, cy_stc_smif_context_t const *context); +cy_en_smif_status_t Cy_SMIF_MemEraseSector(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, + uint32_t address, uint32_t length, cy_stc_smif_context_t const *context); cy_en_smif_status_t Cy_SMIF_MemEraseChip(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, cy_stc_smif_context_t const *context); diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sysanalog.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sysanalog.h index 1ab6dce5d1..72aa7778c6 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sysanalog.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sysanalog.h @@ -39,12 +39,12 @@ * \image html passv2_diagram.png * \image latex passv2_diagram.png * -* The Programmable Analog SubSystem (PASS) hardware block contains a set of analog +* The Programmable Analog SubSystem (PASS) hardware block contains a set of analog * subblocks such as AREF, CTB, SAR, analog routing switches and others. -* In order to provide a firmware interface to PASS, subblocks are united into groups, -* which have their own drivers: SysAnalog, \ref group_ctb "CTB" and +* In order to provide a firmware interface to PASS, subblocks are united into groups, +* which have their own drivers: SysAnalog, \ref group_ctb "CTB" and * \ref group_sar "SAR". -* +* * \section group_sysanalog_features SysAnalog Features Description * * SysAnalog driver includes the following features: @@ -158,8 +158,8 @@ * - Can work in Deep Sleep power mode. * - Can be used as a clock source for the Deep Sleep Clock. * -* Low Power Oscillator clocking mode is configured by -* cy_stc_sysanalog_deep_sleep_config_t::lpOscDsMode configuration structure item, which +* Low Power Oscillator clocking mode is configured by +* cy_stc_sysanalog_deep_sleep_config_t::lpOscDsMode configuration structure item, which * should be passed as a parameter to \ref Cy_SysAnalog_DeepSleepInit function. * See \ref group_sysanalog_functions_lposc for other Low Power Oscillator control functions. * @@ -176,9 +176,9 @@ * Features: * - Internal PASS_ver2 16-bit down counting timer * - Can be used to trigger one or few SAR ADCs -* - Can be clocked from +* - Can be clocked from * - Peripheral Clock (CLK_PERI), -* - Low Frequency Clock (CLK_LF) +* - Low Frequency Clock (CLK_LF) * - Deep Sleep Clock * - If clocked from Deep Sleep Clock, timer can be used to trigger SAR ADC scans * in Deep Sleep power mode. @@ -187,10 +187,10 @@ * and cy_stc_sysanalog_deep_sleep_config_t::timerPeriod configuration structure items, * which should be passed as a parameter to \ref Cy_SysAnalog_DeepSleepInit function. * Also see \ref group_sysanalog_functions_timer for other Timer configuration and control functions. -* +* * \section group_sysanalog_deepsleepinit Low Power Oscillator, Deep Sleep Clock and Timer Configuration -* To configure Low Power Oscillator, Deep Sleep Clock and Timer blocks, -* call \ref Cy_SysAnalog_DeepSleepInit function and provide pointer to PASS block and pointer +* To configure Low Power Oscillator, Deep Sleep Clock and Timer blocks, +* call \ref Cy_SysAnalog_DeepSleepInit function and provide pointer to PASS block and pointer * to the \ref cy_stc_sysanalog_deep_sleep_config_t configuration structure. In order to start * Low Power Oscillator and Timer, call corresponding enable functions: * @@ -795,7 +795,7 @@ __STATIC_INLINE void Cy_SysAnalog_IztatSelect(cy_en_sysanalog_iztat_source_t izt * Function Name: Cy_SysAnalog_LpOscEnable ****************************************************************************//** * -* Enables Low Power Oscillator in configured by \ref Cy_SysAnalog_DeepSleepInit +* Enables Low Power Oscillator in configured by \ref Cy_SysAnalog_DeepSleepInit * mode. * * \param base Pointer to the PASS register structure. @@ -851,7 +851,7 @@ __STATIC_INLINE void Cy_SysAnalog_LpOscDisable(PASS_Type * base) * Function Name: Cy_SysAnalog_TimerEnable ****************************************************************************//** * -* Enable the analog subsystem timer in configured by +* Enable the analog subsystem timer in configured by * \ref Cy_SysAnalog_DeepSleepInit mode. * * \param base Pointer to the PASS register structure. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sysclk.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sysclk.h index d7258af586..1fbaac9eb9 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sysclk.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_sysclk.h @@ -5459,7 +5459,7 @@ uint32_t Cy_SysClk_PeriphGetFrequency(cy_en_divider_types_t dividerType, uint32_ * Function Name: Cy_SysClk_ClkSlowSetDivider ****************************************************************************//** * -* Sets the clock divider for the slow clock. +* Sets the clock divider for the slow clock. * * \param divider Divider value between 0 and 255. * Causes integer division of (divider value + 1), or division by 1 to 256. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_syslib.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_syslib.h index c3be00405e..33132218e9 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_syslib.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_syslib.h @@ -1218,12 +1218,12 @@ cy_en_syslib_status_t Cy_SysLib_ResetBackupDomain(void); * * The function returns the cause for the latest reset(s) that occurred in * the system. The reset causes include system faults and -* device reset on a wakeup from Hibernate mode. For M33SYSCPUSS IP, +* device reset on a wakeup from Hibernate mode. For M33SYSCPUSS IP, * the reset causes also include an HFCLK error. * The return results are consolidated reset causes from reading RES_CAUSE, * RES_CAUSE2 and PWR_HIBERNATE token registers. * -* \return The cause of a system reset. +* \return The cause of a system reset. * Return values to be checked as per the CPUSS IP of the device. * * | Name in M4CPUSS IP | Name in M33SYSCPUSS IP | Name in M7CPUSS IP | Value diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm.h index 763da70568..63057faca4 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm.h @@ -1214,7 +1214,7 @@ __STATIC_INLINE void Cy_TCPWM_TriggerCapture0(TCPWM_Type *base, uint32_t cntNum) * Function Name: Cy_TCPWM_TriggerCapture1 ****************************************************************************//** * -* Triggers a Capture 1 in Timer Counter and QuadDec Mode. In PWM mode this acts +* Triggers a Capture 1 in Timer Counter and QuadDec Mode. In PWM mode this acts * as a second kill input. * * \param base @@ -1429,7 +1429,7 @@ __STATIC_INLINE cy_en_tcpwm_status_t Cy_TCPWM_SetDebugFreeze (TCPWM_Type *base, /** \} group_tcpwm_common */ /******************************************************************************* -* Backward compatibility macro. The following code is DEPRECATED and must +* Backward compatibility macro. The following code is DEPRECATED and must * not be used in new projects *******************************************************************************/ #define CY_TCPWM_INT_ON_CC CY_TCPWM_INT_ON_CC0 diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm_pwm.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm_pwm.h index 1e755cdde2..4367542c1f 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm_pwm.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm_pwm.h @@ -365,7 +365,7 @@ typedef struct cy_stc_tcpwm_pwm_config _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_OVERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_SET) | \ _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_UNDERFLOW_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR) | \ _VAL2FLD(TCPWM_GRP_CNT_V2_TR_PWM_CTRL_CC1_MATCH_MODE, CY_TCPWM_PWM_TR_CTRL2_CLEAR)) - + #define CY_TCPWM_PWM_MODE_CNTR_ASYMM_CC0_CC1_MATCH ((TCPWM_GRP_CNT_V2_CTRL_CC0_MATCH_UP_EN_Msk) | \ (TCPWM_GRP_CNT_V2_CTRL_CC1_MATCH_DOWN_EN_Msk)) #endif @@ -1026,7 +1026,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_PWM_LineOutStatus (TCPWM_Type const *base, uin /* Not a Valid Line output */ CY_ASSERT_L3(false); break; - } + } return status; } @@ -1036,7 +1036,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_PWM_LineOutStatus (TCPWM_Type const *base, uin * Function Name: Cy_TCPWM_PWM_PWMDeadTime ****************************************************************************//** * -* Writes the dead time value for PWM. This is the number of clock cycles between +* Writes the dead time value for PWM. This is the number of clock cycles between * PWM_n (line_compl) going LOW and PWM (line) going HIGH. * * \param base @@ -1068,7 +1068,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_PWMDeadTime (TCPWM_Type const *base, uint32_t result = TCPWM_GRP_CNT_DT(base, grp, cntNum); result &= ~(TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_L_Msk | TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_H_Msk); - TCPWM_GRP_CNT_DT(base, grp, cntNum) = result | + TCPWM_GRP_CNT_DT(base, grp, cntNum) = result | _VAL2FLD(TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_L, (uint8_t)(deadTime)) | _VAL2FLD(TCPWM_GRP_CNT_V2_DT_DT_LINE_OUT_H, (uint8_t)(deadTime >> 8U)); #endif @@ -1080,7 +1080,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_PWMDeadTime (TCPWM_Type const *base, uint32_t * Function Name: Cy_TCPWM_PWM_PWMDeadTimeN ****************************************************************************//** * -* Writes the dead time value for PWM_n. This is the number of clock cycles between +* Writes the dead time value for PWM_n. This is the number of clock cycles between * PWM (line) going LOW and PWM_n (line_compl) going HIGH. * * \param base @@ -1104,7 +1104,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_PWMDeadTimeN (TCPWM_Type const *base, uint32_t result = TCPWM_GRP_CNT_DT(base, grp, cntNum); result &= ~(TCPWM_GRP_CNT_V2_DT_DT_LINE_COMPL_OUT_Msk); - TCPWM_GRP_CNT_DT(base, grp, cntNum) = result | + TCPWM_GRP_CNT_DT(base, grp, cntNum) = result | _VAL2FLD(TCPWM_GRP_CNT_V2_DT_DT_LINE_COMPL_OUT, (uint16_t)(deadTime)); } diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm_shiftreg.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm_shiftreg.h index 236e26ea3b..0b924632a3 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm_shiftreg.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tcpwm_shiftreg.h @@ -502,7 +502,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_ShiftReg_GetCompare1BufVal(TCPWM_Type const *b * Function Name: Cy_TCPWM_ShiftReg_EnableCompare0Swap ****************************************************************************//** * -* Enables the comparison swap of compare 0 and compareBuf 0 on +* Enables the comparison swap of compare 0 and compareBuf 0 on * corresponding command or external trigger. * * \param base @@ -527,7 +527,7 @@ __STATIC_INLINE void Cy_TCPWM_ShiftReg_EnableCompare0Swap(TCPWM_Type *base, uint * Function Name: Cy_TCPWM_ShiftReg_EnableCompare1Swap ****************************************************************************//** * -* Enables the comparison swap of compare 1 and compareBuf 1 on +* Enables the comparison swap of compare 1 and compareBuf 1 on * corresponding command or external trigger. * * \param base diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tdm.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tdm.h index 0d0fc04365..73d1a7e317 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tdm.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_tdm.h @@ -30,8 +30,8 @@ * \note Device Categories: CAT1B. Please refer Device Catalog. * Configures audio TDM/I2S. * -* The functions and other declarations used in this driver are in cy_tdm.h. -* You can include cy_pdl.h (ModusToolbox only) to get access to all functions +* The functions and other declarations used in this driver are in cy_tdm.h. +* You can include cy_pdl.h (ModusToolbox only) to get access to all functions * and declarations in the PDL. * * @@ -52,14 +52,14 @@ * \section group_tdm_configuration Configuration Considerations * * To set up a TDM driver, initialize the TDM Transmitter module in accordance with a configuration structure. -* -* * Each TDM/I2S (TX, RX) pair consists of a TDM/I2S transmitter and a TDM/I2S receiver. -* * The transmitter and receiver can function simultaneously and have dedicated clock control. -* * The transmitter and receiver have dedicated MMIO registers and a dedicated FIFO. -* * The transmitter and receiver have a dedicated FIFO interrupt and FIFO trigger. -* * The transmitter trigger is activated when a programmable number of PCM data slots is available in the TX FIFO. +* +* * Each TDM/I2S (TX, RX) pair consists of a TDM/I2S transmitter and a TDM/I2S receiver. +* * The transmitter and receiver can function simultaneously and have dedicated clock control. +* * The transmitter and receiver have dedicated MMIO registers and a dedicated FIFO. +* * The transmitter and receiver have a dedicated FIFO interrupt and FIFO trigger. +* * The transmitter trigger is activated when a programmable number of PCM data slots is available in the TX FIFO. * * The receiver trigger is activated when a programmable number of PCM data words is received into the RX FIFO. -* +* * * To set up TDM, provide the configuration parameters in the * \ref cy_stc_tdm_config_t structure. @@ -273,21 +273,21 @@ typedef enum } cy_en_tdm_clock_sel_t; /** cy_en_tdm_sckpolarity_t */ -typedef enum +typedef enum { CY_TDM_CLK = 0U, /**< TDM Clock is used as is. */ CY_TDM_CLK_INVERTED = 1U /**< TDM Clock is inverted. */ } cy_en_tdm_sckpolarity_t; /** cy_en_tdm_fsyncpolarity_t*/ -typedef enum +typedef enum { CY_TDM_SIGN = 0U, /**< TDM Sign is used as is. */ CY_TDM_SIGN_INVERTED = 1U /**< TDM Sign is inverted. */ } cy_en_tdm_fsyncpolarity_t; /** cy_en_tdm_fsyncformat_t */ -typedef enum +typedef enum { CY_TDM_BIT_PERIOD = 0U, /**< TDM Channel Synchronization is duration of a bit period. */ CY_TDM_CH_PERIOD = 1U /**< TDM Channel Synchronization is duration of a channel period. */ @@ -296,14 +296,14 @@ typedef enum /** * TDM status definitions. */ -typedef enum +typedef enum { CY_TDM_SUCCESS = 0x00UL, /**< Successful. */ CY_TDM_BAD_PARAM = CY_TDM_ID | CY_PDL_STATUS_ERROR | 0x01UL /**< One or more invalid parameters. */ } cy_en_tdm_status_t; /** cy_en_tdm_source_status_t */ -typedef enum +typedef enum { CY_TDM_OK = 0x00UL, /**< Successful. */ CY_TDM_BAD = 0x01UL /**< Not Good */ @@ -392,8 +392,8 @@ typedef struct CY_TDM_INTR_TX_FIFO_OVERFLOW |\ CY_TDM_INTR_TX_FIFO_UNDERFLOW |\ CY_TDM_INTR_TX_IF_UNDERFLOW) - - + + #define CY_TDM_INTR_RX_MASK (CY_TDM_INTR_RX_FIFO_TRIGGER |\ CY_TDM_INTR_RX_FIFO_OVERFLOW |\ CY_TDM_INTR_RX_FIFO_UNDERFLOW |\ @@ -513,7 +513,7 @@ __STATIC_INLINE void Cy_AudioTDM_ClearRxTriggerInterruptMask( TDM_RX_STRU /** \cond INTERNAL */ /******************************************************************************* -* These are legacy API for I2S. +* These are legacy API for I2S. * for backward compatibility. * Do not use them in new designs. *******************************************************************************/ @@ -532,7 +532,7 @@ __STATIC_INLINE void Cy_AudioTDM_ClearRxTriggerInterruptMask( TDM_RX_STRU #define Cy_AudioI2S_MuteTxFifo Cy_AudioTDM_MuteTxFifo #define Cy_AudioI2S_ActivateTx Cy_AudioTDM_ActivateTx #define Cy_AudioI2S_DeActivateTx Cy_AudioTDM_DeActivateTx -#define Cy_AudioI2S_ReplayTxFifo Cy_AudioTDM_ReplayTxFifo +#define Cy_AudioI2S_ReplayTxFifo Cy_AudioTDM_ReplayTxFifo #define Cy_AudioI2S_GetNumInTxFifo Cy_AudioTDM_GetNumInTxFifo #define Cy_AudioI2S_GetTxReadPointer Cy_AudioTDM_GetTxReadPointer #define Cy_AudioI2S_GetTxWritePointer Cy_AudioTDM_GetTxWritePointer @@ -541,7 +541,7 @@ __STATIC_INLINE void Cy_AudioTDM_ClearRxTriggerInterruptMask( TDM_RX_STRU #define Cy_AudioI2S_ReadRxData Cy_AudioTDM_ReadRxData #define Cy_AudioI2S_FreezeRxFifo Cy_AudioTDM_FreezeRxFifo -#define Cy_AudioI2S_UnfreezeRxFifo Cy_AudioTDM_UnfreezeRxFifo +#define Cy_AudioI2S_UnfreezeRxFifo Cy_AudioTDM_UnfreezeRxFifo #define Cy_AudioI2S_ActivateRx Cy_AudioTDM_ActivateRx #define Cy_AudioI2S_DeActivateRx Cy_AudioTDM_DeActivateRx #define Cy_AudioI2S_ReadSilentRXFifo Cy_AudioTDM_ReadSilentRXFifo @@ -551,7 +551,7 @@ __STATIC_INLINE void Cy_AudioTDM_ClearRxTriggerInterruptMask( TDM_RX_STRU #define Cy_AudioI2S_EnableRxTestMode Cy_AudioTDM_EnableRxTestMode #define Cy_AudioI2S_DisableRxTestMode Cy_AudioTDM_DisableRxTestMode -#define Cy_AudioI2S_ClearTxInterrupt Cy_AudioTDM_ClearTxInterrupt +#define Cy_AudioI2S_ClearTxInterrupt Cy_AudioTDM_ClearTxInterrupt #define Cy_AudioI2S_SetTxInterrupt Cy_AudioTDM_SetTxInterrupt #define Cy_AudioI2S_GetTxInterruptMask Cy_AudioTDM_GetTxInterruptMask #define Cy_AudioI2S_SetTxInterruptMask Cy_AudioTDM_SetTxInterruptMask @@ -560,7 +560,7 @@ __STATIC_INLINE void Cy_AudioTDM_ClearRxTriggerInterruptMask( TDM_RX_STRU #define Cy_AudioI2S_ClearTxTriggerInterruptMask Cy_AudioTDM_ClearTxTriggerInterruptMask #define Cy_AudioI2S_ClearRxInterrupt Cy_AudioTDM_ClearRxInterrupt -#define Cy_AudioI2S_SetRxInterrupt Cy_AudioTDM_SetRxInterrupt +#define Cy_AudioI2S_SetRxInterrupt Cy_AudioTDM_SetRxInterrupt #define Cy_AudioI2S_GetRxInterruptMask Cy_AudioTDM_GetRxInterruptMask #define Cy_AudioI2S_SetRxInterruptMask Cy_AudioTDM_SetRxInterruptMask #define Cy_AudioI2S_GetRxInterruptStatusMasked Cy_AudioTDM_GetRxInterruptStatusMasked @@ -580,7 +580,7 @@ __STATIC_INLINE void Cy_AudioTDM_ClearRxTriggerInterruptMask( TDM_RX_STRU * Function Name: Cy_AudioTDM_EnableTx ****************************************************************************//** * -* Starts an I2S/TDM transmission. Interrupt enabling (by the +* Starts an I2S/TDM transmission. Interrupt enabling (by the * \ref Cy_AudioTDM_SetTxInterrupt) is required after this function call, in case * if any I2S/TDM interrupts are used in the application. * @@ -601,7 +601,7 @@ __STATIC_INLINE void Cy_AudioTDM_EnableTx( TDM_TX_STRUCT_Type * base) * Function Name: Cy_AudioTDM_DisableTx ****************************************************************************//** * -* Stops an I2S/TDM transmission. +* Stops an I2S/TDM transmission. * * \pre TX interrupt disabling (by the \ref Cy_AudioTDM_SetTxInterrupt) is required * prior to this function call, in case any TX I2S/TDM interrupts are used. @@ -620,7 +620,7 @@ __STATIC_INLINE void Cy_AudioTDM_DisableTx( TDM_TX_STRUCT_Type * base) * Function Name: Cy_AudioTDM_EnableRx ****************************************************************************//** * -* Starts an I2S/TDM transmission. Interrupt enabling (by the +* Starts an I2S/TDM transmission. Interrupt enabling (by the * \ref Cy_AudioTDM_SetRxInterrupt) is required after this function call, in case * if any I2S/TDM interrupts are used in the application. * @@ -640,7 +640,7 @@ __STATIC_INLINE void Cy_AudioTDM_EnableRx( TDM_RX_STRUCT_Type * base) * Function Name: Cy_AudioTDM_DisableRx ****************************************************************************//** * -* Stops an I2S/TDM transmission. +* Stops an I2S/TDM transmission. * * \pre TX interrupt disabling (by the \ref Cy_AudioTDM_SetRxInterrupt) is required * prior to this function call, in case any TX I2S/TDM interrupts are used. @@ -713,12 +713,12 @@ __STATIC_INLINE void Cy_AudioTDM_UnfreezeTxFifo( TDM_TX_STRUCT_Type * base) TDM_STRUCT_TX_FIFO_CTL(base) &= ~TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_FIFO_CTL_FREEZE_Msk; TDM_STRUCT_TX_FIFO_CTL(base) |= _BOOL2FLD(TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_FIFO_CTL_FREEZE, 0U); } - + /***************************************************************************/ /* Function Name: Cy_AudioTDM_MuteTxFifo */ /***************************************************************************//** * -* Mutes the TX FIFO. +* Mutes the TX FIFO. * HW uses a constant PCM data value of "0". Mute does advance the FIFO read pointer. * * \param base The pointer to the I2S/TDM instance address. @@ -736,7 +736,7 @@ __STATIC_INLINE void Cy_AudioTDM_MuteTxFifo( TDM_TX_STRUCT_Type * base) /* Function Name: Cy_AudioTDM_ActivateTx */ /***************************************************************************//** * -* Activate/start the TX FIFO. +* Activate/start the TX FIFO. * This will set the transmitter state to on. * * \param base The pointer to the I2S/TDM instance address. @@ -804,7 +804,7 @@ __STATIC_INLINE uint8_t Cy_AudioTDM_GetNumInTxFifo( TDM_TX_STRUCT_Type * base) { return ((uint8_t)(TDM_STRUCT_TX_FIFO_STATUS(base) & TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_FIFO_STATUS_USED_Msk)); } - + /***************************************************************************/ /* Function Name: Cy_AudioTDM_GetTxReadPointer */ /***************************************************************************//** @@ -854,7 +854,7 @@ __STATIC_INLINE uint8_t Cy_AudioTDM_GetTxWritePointer( TDM_TX_STRUCT_Type * base * \param base The pointer to the I2S/TDM instance address. * *******************************************************************************/ -__STATIC_INLINE void Cy_AudioTDM_EnableTxTestMode( TDM_TX_STRUCT_Type * base) +__STATIC_INLINE void Cy_AudioTDM_EnableTxTestMode( TDM_TX_STRUCT_Type * base) { TDM_STRUCT_TX_TEST_CTL(base) |= TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_TEST_CTL_ENABLED_Msk; } @@ -863,12 +863,12 @@ __STATIC_INLINE void Cy_AudioTDM_EnableTxTestMode( TDM_TX_STRUCT_Type * base) /* Function Name: Cy_AudioTDM_DisableTxTestMode */ /***************************************************************************//** * -* Disables Test mode. +* Disables Test mode. * * \param base The pointer to the I2S/TDM instance address. * *******************************************************************************/ -__STATIC_INLINE void Cy_AudioTDM_DisableTxTestMode( TDM_TX_STRUCT_Type * base) +__STATIC_INLINE void Cy_AudioTDM_DisableTxTestMode( TDM_TX_STRUCT_Type * base) { TDM_STRUCT_TX_TEST_CTL(base) &= (uint32_t) ~TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_TEST_CTL_ENABLED_Msk; } @@ -877,7 +877,7 @@ __STATIC_INLINE void Cy_AudioTDM_DisableTxTestMode( TDM_TX_STRUCT_Type * base) /* Function Name: Cy_AudioTDM_ReadRxData */ /***************************************************************************//** * -* Read Rx data from the Rx FIFO. +* Read Rx data from the Rx FIFO. * Data (PCM sample) read from the RX FIFO. Reading removes the data from the RX FIFO. * Reading from an empty RX FIFO activates FIFO_UNDERFLOW interrupt. * @@ -895,7 +895,7 @@ __STATIC_INLINE uint32_t Cy_AudioTDM_ReadRxData( TDM_RX_STRUCT_Type * base) /* Function Name: Cy_AudioTDM_FreezeRxFifo */ /***************************************************************************//** * -* Freeze RX FIFO. +* Freeze RX FIFO. * HW writes from the RX FIFO have no effect: freeze will not advance the FIFO write pointer. * This functionality is intended for debugging purposes. * @@ -1104,9 +1104,9 @@ __STATIC_INLINE void Cy_AudioTDM_ClearTxInterrupt( TDM_TX_STRUCT_Type * base, ui __STATIC_INLINE void Cy_AudioTDM_SetTxInterrupt( TDM_TX_STRUCT_Type * base, uint32_t interrupt) { CY_ASSERT_L2(CY_I2S_TDM_INTR_TX_MASK_VALID(interrupt)); - + TDM_STRUCT_TX_INTR_TX_SET(base) = interrupt; -} +} /***************************************************************************/ /* Function Name: Cy_AudioTDM_GetTxInterruptMask */ @@ -1139,7 +1139,7 @@ __STATIC_INLINE uint32_t Cy_AudioTDM_GetTxInterruptMask( TDM_TX_STRUCT_Type * ba __STATIC_INLINE void Cy_AudioTDM_SetTxInterruptMask( TDM_TX_STRUCT_Type * base, uint32_t interrupt) { CY_ASSERT_L2(CY_I2S_TDM_INTR_TX_MASK_VALID(interrupt)); - + TDM_STRUCT_TX_INTR_TX_MASK(base) = interrupt; } @@ -1184,12 +1184,12 @@ __STATIC_INLINE void Cy_AudioTDM_ClearTxTriggerInterruptMask( TDM_TX_STRUCT_Type { TDM_STRUCT_TX_INTR_TX_MASK(base) &= ~TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_MASK_FIFO_TRIGGER_Msk; TDM_STRUCT_TX_INTR_TX_MASK(base) |= _BOOL2FLD(TDM_TDM_STRUCT_TDM_TX_STRUCT_INTR_TX_MASK_FIFO_TRIGGER, 0U); -} +} /***************************************************************************/ /* Function Name: Cy_AudioTDM_ClearRxInterrupt */ /***************************************************************************//** * -* Clears RX interrupt +* Clears RX interrupt * * \param base The pointer to the I2S/TDM instance address. * \param interrupt interrupt @@ -1205,12 +1205,12 @@ __STATIC_INLINE void Cy_AudioTDM_ClearRxInterrupt( TDM_RX_STRUCT_Type * base, ui (void) TDM_STRUCT_RX_INTR_RX(base); } - + /***************************************************************************/ /* Function Name: Cy_AudioTDM_SetRxInterrupt */ /***************************************************************************//** * -* Sets RX interrupt +* Sets RX interrupt * * \param base The pointer to the I2S/TDM instance address. * \param interrupt interrupt @@ -1221,7 +1221,7 @@ __STATIC_INLINE void Cy_AudioTDM_ClearRxInterrupt( TDM_RX_STRUCT_Type * base, ui __STATIC_INLINE void Cy_AudioTDM_SetRxInterrupt( TDM_RX_STRUCT_Type * base, uint32_t interrupt) { CY_ASSERT_L2(CY_I2S_TDM_INTR_RX_MASK_VALID(interrupt)); - + TDM_STRUCT_RX_INTR_RX_SET(base) = interrupt; } @@ -1255,10 +1255,10 @@ __STATIC_INLINE uint32_t Cy_AudioTDM_GetRxInterruptMask( TDM_RX_STRUCT_Type * ba __STATIC_INLINE void Cy_AudioTDM_SetRxInterruptMask( TDM_RX_STRUCT_Type * base, uint32_t interrupt) { CY_ASSERT_L2(CY_I2S_TDM_INTR_RX_MASK_VALID(interrupt)); - + TDM_STRUCT_RX_INTR_RX_MASK(base) = interrupt; } - + /***************************************************************************/ /* Function Name: Cy_AudioTDM_GetRxInterruptStatusMasked */ /***************************************************************************//** diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_wdt.h b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_wdt.h index 66b0eac846..3162d81565 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_wdt.h +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/include/cy_wdt.h @@ -191,7 +191,7 @@ * * * * * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_adcmic.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_adcmic.c index 57897598c0..aef75619ca 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_adcmic.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_adcmic.c @@ -233,30 +233,30 @@ cy_en_adcmic_status_t Cy_ADCMic_Init(MXS40ADCMIC_Type * base, cy_stc_adcmic_conf void Cy_ADCMic_InitBiquad(MXS40ADCMIC_Type * base, cy_stc_adcmic_biquad_config_t const * biQuadConfig) { - base->AUXADC_BIQUAD0_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD0_COEFF_0_BQ0_NUM1_COEFF, biQuadConfig->bq0_num1_coeff) | + base->AUXADC_BIQUAD0_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD0_COEFF_0_BQ0_NUM1_COEFF, biQuadConfig->bq0_num1_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD0_COEFF_0_BQ0_NUM2_COEFF, biQuadConfig->bq0_num2_coeff); base->AUXADC_BIQUAD0_COEFF_1 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD0_COEFF_1_BQ0_NUM3_COEFF, biQuadConfig->bq0_num3_coeff); - base->AUXADC_BIQUAD0_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD0_COEFF_2_BQ0_DEN2_COEFF, biQuadConfig->bq0_den2_coeff) | + base->AUXADC_BIQUAD0_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD0_COEFF_2_BQ0_DEN2_COEFF, biQuadConfig->bq0_den2_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD0_COEFF_2_BQ0_DEN3_COEFF, biQuadConfig->bq0_den3_coeff); - base->AUXADC_BIQUAD1_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD1_COEFF_0_BQ1_NUM1_COEFF, biQuadConfig->bq1_num1_coeff) | + base->AUXADC_BIQUAD1_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD1_COEFF_0_BQ1_NUM1_COEFF, biQuadConfig->bq1_num1_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD1_COEFF_0_BQ1_NUM2_COEFF, biQuadConfig->bq1_num2_coeff); base->AUXADC_BIQUAD1_COEFF_1 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD1_COEFF_1_BQ1_NUM3_COEFF, biQuadConfig->bq1_num3_coeff); - base->AUXADC_BIQUAD1_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD1_COEFF_2_BQ1_DEN2_COEFF, biQuadConfig->bq1_den2_coeff) | + base->AUXADC_BIQUAD1_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD1_COEFF_2_BQ1_DEN2_COEFF, biQuadConfig->bq1_den2_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD1_COEFF_2_BQ1_DEN3_COEFF, biQuadConfig->bq1_den3_coeff); - base->AUXADC_BIQUAD2_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD2_COEFF_0_BQ2_NUM1_COEFF, biQuadConfig->bq2_num1_coeff) | + base->AUXADC_BIQUAD2_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD2_COEFF_0_BQ2_NUM1_COEFF, biQuadConfig->bq2_num1_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD2_COEFF_0_BQ2_NUM2_COEFF, biQuadConfig->bq2_num2_coeff); base->AUXADC_BIQUAD2_COEFF_1 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD2_COEFF_1_BQ2_NUM3_COEFF, biQuadConfig->bq2_num3_coeff); - base->AUXADC_BIQUAD2_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD2_COEFF_2_BQ2_DEN2_COEFF, biQuadConfig->bq2_den2_coeff) | + base->AUXADC_BIQUAD2_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD2_COEFF_2_BQ2_DEN2_COEFF, biQuadConfig->bq2_den2_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD2_COEFF_2_BQ2_DEN3_COEFF, biQuadConfig->bq2_den3_coeff); - base->AUXADC_BIQUAD3_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD3_COEFF_0_BQ3_NUM1_COEFF, biQuadConfig->bq3_num1_coeff) | + base->AUXADC_BIQUAD3_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD3_COEFF_0_BQ3_NUM1_COEFF, biQuadConfig->bq3_num1_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD3_COEFF_0_BQ3_NUM2_COEFF, biQuadConfig->bq3_num2_coeff); base->AUXADC_BIQUAD3_COEFF_1 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD3_COEFF_1_BQ3_NUM3_COEFF, biQuadConfig->bq3_num3_coeff); - base->AUXADC_BIQUAD3_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD3_COEFF_2_BQ3_DEN2_COEFF, biQuadConfig->bq3_den2_coeff) | + base->AUXADC_BIQUAD3_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD3_COEFF_2_BQ3_DEN2_COEFF, biQuadConfig->bq3_den2_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD3_COEFF_2_BQ3_DEN3_COEFF, biQuadConfig->bq3_den3_coeff); - base->AUXADC_BIQUAD4_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD4_COEFF_0_BQ4_NUM1_COEFF, biQuadConfig->bq4_num1_coeff) | + base->AUXADC_BIQUAD4_COEFF_0 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD4_COEFF_0_BQ4_NUM1_COEFF, biQuadConfig->bq4_num1_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD4_COEFF_0_BQ4_NUM2_COEFF, biQuadConfig->bq4_num2_coeff); base->AUXADC_BIQUAD4_COEFF_1 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD4_COEFF_1_BQ4_NUM3_COEFF, biQuadConfig->bq4_num3_coeff); - base->AUXADC_BIQUAD4_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD4_COEFF_2_BQ4_DEN2_COEFF, biQuadConfig->bq4_den2_coeff) | + base->AUXADC_BIQUAD4_COEFF_2 = _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD4_COEFF_2_BQ4_DEN2_COEFF, biQuadConfig->bq4_den2_coeff) | _VAL2FLD(MXS40ADCMIC_AUXADC_BIQUAD4_COEFF_2_BQ4_DEN3_COEFF, biQuadConfig->bq4_den3_coeff); base->AUXADC_CTRL &= ~MXS40ADCMIC_AUXADC_CTRL_BIQUAD_BYPASS_Msk; } @@ -319,13 +319,13 @@ void Cy_ADCMic_DisableInterrupt(MXS40ADCMIC_Type * base, uint32_t intrMask) cy_en_adcmic_status_t Cy_ADCMic_SetPgaGain(MXS40ADCMIC_Type * base, cy_en_adcmic_pga_gain_t gain) { cy_en_adcmic_status_t retVal = CY_ADCMIC_BAD_PARAM; - + if ((uint32_t)CY_ADCMIC_PGA_GAIN_42 >= (uint32_t)gain) { CY_REG32_CLR_SET(base->ADC_MIC_BIAS_PGA_CTRL, MXS40ADCMIC_ADC_MIC_BIAS_PGA_CTRL_MIC_PGA_GAIN_CTRL, gain); retVal = CY_ADCMIC_SUCCESS; } - + return (retVal); } @@ -352,7 +352,7 @@ cy_en_adcmic_status_t Cy_ADCMic_SelectSource(MXS40ADCMIC_Type * base, cy_en_adcm base->ADC_PD_CTRL = 0UL; base->ADC_CLK_CTRL = 0UL; break; - + default: /* CY_ADCMIC_DC */ base->ADCMIC_PAD_CTRL = 0UL; base->ADC_PD_CTRL &= ~CY_ADCMIC_PD_MIC; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_canfd.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_canfd.c index 96d136b6e3..6f6e512ab8 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_canfd.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_canfd.c @@ -1109,7 +1109,7 @@ cy_en_canfd_status_t Cy_CANFD_GetRxBuffer(CANFD_Type const *base, uint32_t chan, rxBuffer->r0_f->rtr = (cy_en_canfd_rtr_t)((uint32_t)_FLD2VAL(CY_CANFD_RX_BUFFER_R0_RTR, *address)); rxBuffer->r0_f->xtd = (cy_en_canfd_xtd_t)((uint32_t)_FLD2VAL(CY_CANFD_RX_BUFFER_R0_XTD, *address)); rxBuffer->r0_f->esi = (cy_en_canfd_esi_t)((uint32_t)_FLD2VAL(CY_CANFD_RX_BUFFER_R0_ESI, *address)); - + address++; rxBuffer->r1_f->rxts = _FLD2VAL(CY_CANFD_RX_BUFFER_R1_RXTS, *address); rxBuffer->r1_f->dlc = _FLD2VAL(CY_CANFD_RX_BUFFER_R1_DLC, *address); @@ -1204,7 +1204,7 @@ cy_en_canfd_status_t Cy_CANFD_GetFIFOTop(CANFD_Type const *base, uint32_t chan, rxBuffer->r0_f->rtr = (cy_en_canfd_rtr_t)((uint32_t)_FLD2VAL(CY_CANFD_RX_BUFFER_R0_RTR, tmpregister)); rxBuffer->r0_f->xtd = (cy_en_canfd_xtd_t)((uint32_t)_FLD2VAL(CY_CANFD_RX_BUFFER_R0_XTD, tmpregister)); rxBuffer->r0_f->esi = (cy_en_canfd_esi_t)((uint32_t)_FLD2VAL(CY_CANFD_RX_BUFFER_R0_ESI, tmpregister)); - + tmpregister = *address; /* The FIFO Read pointer is post-incremented by the HW */ rxBuffer->r1_f->rxts = _FLD2VAL(CY_CANFD_RX_BUFFER_R1_RXTS, tmpregister); rxBuffer->r1_f->dlc = _FLD2VAL(CY_CANFD_RX_BUFFER_R1_DLC, tmpregister); @@ -1212,7 +1212,7 @@ cy_en_canfd_status_t Cy_CANFD_GetFIFOTop(CANFD_Type const *base, uint32_t chan, rxBuffer->r1_f->fdf = (cy_en_canfd_fdf_t)((uint32_t)_FLD2VAL(CY_CANFD_RX_BUFFER_R1_FDF, tmpregister)); rxBuffer->r1_f->fidx = _FLD2VAL(CY_CANFD_RX_BUFFER_R1_FIDX, tmpregister); rxBuffer->r1_f->anmf = (cy_en_canfd_anmf_t)((uint32_t)_FLD2VAL(CY_CANFD_RX_BUFFER_R1_ANMF, tmpregister)); - + /* ID : Shifts a standard RxID to its position */ if (rxBuffer->r0_f->xtd == CY_CANFD_XTD_STANDARD_ID) { diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_crypto_core_aes_v2.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_crypto_core_aes_v2.c index 9b75e9cce4..4fbded814b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_crypto_core_aes_v2.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_crypto_core_aes_v2.c @@ -550,7 +550,7 @@ cy_en_crypto_status_t Cy_Crypto_Core_V2_Aes_Ctr(CRYPTO_Type *base, return (CY_CRYPTO_SUCCESS); } - + CY_MISRA_BLOCK_END('MISRA C-2012 Rule 11.3'); #endif /* #if (CPUSS_CRYPTO_AES == 1) */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_csd.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_csd.c index 47095a6d30..83f266d401 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_csd.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_csd.c @@ -41,14 +41,14 @@ * * Acquires, locks, and configures the CSD HW block. * -* If the CSD HW block is already in use by other middleware or by +* If the CSD HW block is already in use by other middleware or by * the application program, the function * returns the CY_CSD_LOCKED status and does not configure the CSD HW block. -* +* * If the acquisition is successful, this function writes configuration data -* into all CSD HW block registers (except read-only registers and SEQ_START -* register) at once. Because the SEQ_START register is excluded from write, -* use the Cy_CSD_WriteReg() function to trigger the state machine +* into all CSD HW block registers (except read-only registers and SEQ_START +* register) at once. Because the SEQ_START register is excluded from write, +* use the Cy_CSD_WriteReg() function to trigger the state machine * for scan or conversion. * * To capture the CSD block without its reconfiguration, use the @@ -58,7 +58,7 @@ * The pointer to a CSD HW block base address. * * \param config -* The pointer to a configuration structure that contains the initial +* The pointer to a configuration structure that contains the initial * configuration. * * \param key @@ -101,7 +101,7 @@ cy_en_csd_status_t Cy_CSD_Init(CSD_Type * base, cy_stc_csd_config_t const * conf * Releases the CSD HW block previously captured and locked by the caller. * * If the CSD HW block is acquired by another caller or the block is in the -* busy state (performing scan or conversion), the de-initialization request +* busy state (performing scan or conversion), the de-initialization request * is ignored and the corresponding status is returned. * * \param base @@ -197,10 +197,10 @@ cy_en_csd_status_t Cy_CSD_Capture(CSD_Type * base, cy_en_csd_key_t key, cy_stc_c ****************************************************************************//** * * Sets configuration of all CSD HW block registers at once. -* -* This function writes configuration data into all CSD block registers -* (except read-only registers and the SEQ_START register) at once. Because the -* SEQ_START register is excluded from write, use the Cy_CSD_WriteReg() +* +* This function writes configuration data into all CSD block registers +* (except read-only registers and the SEQ_START register) at once. Because the +* SEQ_START register is excluded from write, use the Cy_CSD_WriteReg() * function to perform triggering state machine for scan or conversion. * * \param base @@ -278,9 +278,9 @@ cy_en_csd_status_t Cy_CSD_Configure(CSD_Type * base, const cy_stc_csd_config_t * * Function Name: Cy_CSD_GetVrefTrim ****************************************************************************//** * -* Adjusts the provided reference voltage based on factory trimmed +* Adjusts the provided reference voltage based on factory trimmed * SFALSH Vref trim registers. -* +* * This function is mainly used by CSDADC middleware only to get the most * accurate reference voltage possible. * diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_dma.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_dma.c index e6814d59fd..84f0851e02 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_dma.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_dma.c @@ -325,7 +325,7 @@ void Cy_DMA_Channel_DeInit(DW_Type * base, uint32_t channel) * *******************************************************************************/ void Cy_DMA_Descriptor_SetNextDescriptor(cy_stc_dma_descriptor_t * descriptor, cy_stc_dma_descriptor_t const * nextDescriptor) -{ +{ CY_ASSERT_L1(descriptor); switch((cy_en_dma_descriptor_type_t) _FLD2VAL(CY_DMA_CTL_TYPE, descriptor->ctl)) { diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_flash.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_flash.c index 5dd0cdfee5..ac40e08453 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_flash.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_flash.c @@ -522,7 +522,7 @@ CY_SECTION_RAMFUNC_END { /* Wait until the IPC structure is released by another process */ } - + SRSS_TST_DDFT_FAST_CTL_REG = SRSS_TST_DDFT_FAST_CTL_MASK; SRSS_TST_DDFT_SLOW_CTL_REG = SRSS_TST_DDFT_SLOW_CTL_MASK; @@ -537,7 +537,7 @@ CY_SECTION_RAMFUNC_END /* Release the IPC */ REG_IPC_STRUCT_RELEASE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = 0U; - + while (0UL == _FLD2VAL(SRSS_CLK_CAL_CNT1_CAL_COUNTER_DONE, SRSS_CLK_CAL_CNT1)) { /* Wait until the counter stops counting */ @@ -577,7 +577,7 @@ CY_SECTION_RAMFUNC_END uint32_t bookmark; #if ((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) - bookmark = CY_PRA_REG32_GET(CY_PRA_INDX_FLASHC_FM_CTL_BOOKMARK) & 0xffffUL; + bookmark = CY_PRA_REG32_GET(CY_PRA_INDX_FLASHC_FM_CTL_BOOKMARK) & 0xffffUL; #else bookmark = FLASHC_FM_CTL_BOOKMARK & 0xffffUL; #endif /* ((CY_CPU_CORTEX_M4) && (defined (CY_DEVICE_SECURE))) */ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_gpio.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_gpio.c index ce89c644f4..f1099c87e3 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_gpio.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_gpio.c @@ -1613,7 +1613,7 @@ uint32_t Cy_GPIO_GetVtrip(GPIO_PRT_Type* base, uint32_t pinNum) * Position of the pin bit-field within the port register * * \param value -* Pin voltage threshold mode. Options are detailed in +* Pin voltage threshold mode. Options are detailed in * \ref group_gpio_vtrip_auto macros * * \note @@ -1651,7 +1651,7 @@ void Cy_GPIO_SetVtripAuto(GPIO_PRT_Type* base, uint32_t pinNum, uint32_t value) * Position of the pin bit-field within the port register * * \return -* Pin voltage for automotive or not. Options are detailed in +* Pin voltage for automotive or not. Options are detailed in * \ref group_gpio_vtrip_auto macros * * \note @@ -3424,7 +3424,7 @@ uint32_t Cy_GPIO_GetFilter(GPIO_PRT_Type* base) * Position of the pin bit-field within the port register * * \param value -* I3C Pull-up mode for a pin. Options are detailed in +* I3C Pull-up mode for a pin. Options are detailed in * \ref group_gpio_i3cPullUpMode macros * * \note diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_i2s.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_i2s.c index 72dff22d09..618e491e4a 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_i2s.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_i2s.c @@ -67,7 +67,7 @@ cy_en_i2s_status_t Cy_I2S_Init(I2S_Type * base, cy_stc_i2s_config_t const * conf REG_I2S_CTL(base) = 0UL; /* Disable TX/RX sub-blocks before clock changing */ /* The clock setting */ - + #if (CY_IP_MXAUDIOSS_VERSION>=2) REG_I2S_CLOCK_CTL(base) = _VAL2FLD(I2S_CLOCK_CTL_CLOCK_DIV, clockDiv) | _BOOL2FLD(I2S_CLOCK_CTL_CLOCK_SEL, config->extClk) | diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_ipc_bt.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_ipc_bt.c index 5c1e97b69a..29221f6a6e 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_ipc_bt.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_ipc_bt.c @@ -278,7 +278,7 @@ cy_en_btipcdrv_status_t Cy_BTIPC_HPC_RelChannel(cy_stc_ipc_bt_context_t *btIpcCo uint32_t rel_mask; cy_stc_ipc_bt_context_t *contextPtr = btIpcContext; (void)buf; - // Fix if this is causing issue + // Fix if this is causing issue #if 1 if ((NULL == contextPtr) || (NULL == buf)) { diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_keyscan.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_keyscan.c index d1ab26c894..9ee3d8c107 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_keyscan.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_keyscan.c @@ -69,7 +69,7 @@ static cy_en_ks_status_t Cy_Keyscan_Init_Context( cy_stc_keyscan_context_t* cont ** ** [in] context Pointer to the context. ** - ** + ** ** *****************************************************************************/ static cy_en_ks_status_t Cy_Keyscan_Fq_Flush(cy_stc_keyscan_context_t* context) @@ -96,7 +96,7 @@ static cy_en_ks_status_t Cy_Keyscan_Fq_Flush(cy_stc_keyscan_context_t* context) ** ** [out] numElements Pointer to the number of elements. ** - ** + ** ** *****************************************************************************/ static cy_en_ks_status_t Cy_Keyscan_Fq_GetCurNumElements(cy_stc_keyscan_context_t* context, uint8_t *numElements) @@ -128,7 +128,7 @@ static cy_en_ks_status_t Cy_Keyscan_Fq_GetCurNumElements(cy_stc_keyscan_context_ ** internal storage of the FIFO. This must be <= the maximum element size ** specified when the FIFO was constructed, otherwise the results are undefined. ** - ** + ** ** *****************************************************************************/ static cy_en_ks_status_t Cy_Keyscan_Fq_PutIncludeOverflowSlot(cy_stc_keyscan_context_t* context, cy_stc_key_event *element) @@ -165,7 +165,7 @@ static cy_en_ks_status_t Cy_Keyscan_Fq_PutIncludeOverflowSlot(cy_stc_keyscan_con ** [out] element pointer to the next element in the FIFO if the FIFO is not empty ** NULL if the FIFO is empty. ** - ** + ** ** *****************************************************************************/ static cy_en_ks_status_t Cy_Keyscan_Fq_GetCurElmPtr(cy_stc_keyscan_context_t* context, cy_stc_key_event **current_element) @@ -190,7 +190,7 @@ static cy_en_ks_status_t Cy_Keyscan_Fq_GetCurElmPtr(cy_stc_keyscan_context_t* co current_element = NULL; status = CY_KEYSCAN_EVENT_NONE; } - + } return status; } @@ -200,7 +200,7 @@ static cy_en_ks_status_t Cy_Keyscan_Fq_GetCurElmPtr(cy_stc_keyscan_context_t* co ** ** [in] context Pointer to the context. ** - ** + ** ** *****************************************************************************/ static cy_en_ks_status_t Cy_Keyscan_Fq_RemoveCurElement(cy_stc_keyscan_context_t* context) @@ -296,7 +296,7 @@ static cy_en_ks_status_t Cy_Keyscan_Fq_MarkCurrentEventForRollBack (cy_stc_keysc /// back what we added in case we encounter a ghost/overflow condition context->savedWriteIndexForRollBack = context->writeIndex; context->savedNumElements = context->curNumElements; - + } return status; } @@ -307,7 +307,7 @@ static cy_en_ks_status_t Cy_Keyscan_Fq_MarkCurrentEventForRollBack (cy_stc_keysc ** ** [in] context Pointer to the context. ** - ** + ** ** *****************************************************************************/ static cy_en_ks_status_t Cy_Keyscan_Fq_RollbackUptoMarkedEvents(cy_stc_keyscan_context_t* context) @@ -403,9 +403,9 @@ static cy_en_ks_status_t Cy_Keyscan_GetEvent(cy_stc_keyscan_context_t* context, (void)Cy_Keyscan_Fq_RemoveCurElement(context); /* Suppress a compiler warning about unused return value */ } - + } - + } } return status; @@ -414,7 +414,7 @@ static cy_en_ks_status_t Cy_Keyscan_GetEvent(cy_stc_keyscan_context_t* context, /** ***************************************************************************** ** Freeze the MIA clock. Wait until the HW accepts the command, then - ** generate an event indicating that the MIA clock is unfrozen for anyone + ** generate an event indicating that the MIA clock is unfrozen for anyone ** who desires to catch it. ** ** [in] context Pointer to the context. @@ -442,7 +442,7 @@ static cy_en_ks_status_t Cy_Keyscan_Mia_FreezeClk(MXKEYSCAN_Type* base, cy_stc_ // Notify application that clock is frozen. This allows workarounds for clock freeze related MIA // bugs, specifically key event loss when clock is frozen/unfrozen without reading the key event FIFO - // Poll the event FIFO only if the freeze didn't come from us + // Poll the event FIFO only if the freeze didn't come from us if (!context->keyscan_pollingKeyscanHw) { // Retrieve any pending events from the HW FIFO @@ -454,7 +454,7 @@ static cy_en_ks_status_t Cy_Keyscan_Mia_FreezeClk(MXKEYSCAN_Type* base, cy_stc_ /** ***************************************************************************** ** Unfreeze the MIA clock. Wait until the HW accepts the command, then - ** generate an event indicating that the MIA clock is unfrozen for anyone + ** generate an event indicating that the MIA clock is unfrozen for anyone ** who desires to catch it. ** ** [in] context Pointer to the context. @@ -519,7 +519,7 @@ static cy_en_ks_status_t Cy_Keyscan_HwResetOnce(MXKEYSCAN_Type* base, cy_stc_key // SOme more information on why 2550 delay to be gathered. Cy_SysLib_DelayUs(2550U); } - + } return status; } @@ -545,7 +545,7 @@ cy_en_ks_status_t Cy_Keyscan_FlushEvents(MXKEYSCAN_Type *base, cy_stc_keyscan_co { // Freeze the MIA clock status = Cy_Keyscan_Mia_FreezeClk(base, context); - + if(status == CY_KEYSCAN_SUCCESS) { // Unfreeze the MIA clock. @@ -556,7 +556,7 @@ cy_en_ks_status_t Cy_Keyscan_FlushEvents(MXKEYSCAN_Type *base, cy_stc_keyscan_co // no keys currently pressed context->keysPressedCount = 0U; } - + } return status; } @@ -588,7 +588,7 @@ static cy_en_ks_status_t Cy_Keyscan_Init_Context( cy_stc_keyscan_context_t* cont /** ***************************************************************************** - ** Registers for callback + ** Registers for callback ** ** [in] cbEvents Pointer to the callback function. ** @@ -616,7 +616,7 @@ cy_en_ks_status_t Cy_Keyscan_Register_Callback(cy_cb_keyscan_handle_events_t cbE ** Register Context with the driver ** This Function registers for the event callback and FW FIFO buffer. ** - ** The Application must configure corresponding keyscan pins + ** The Application must configure corresponding keyscan pins ** according to requirements and settings of keyscan instance. ** ** [in] base Pointer to KeyScan instance register area @@ -636,7 +636,7 @@ cy_en_ks_status_t Cy_Keyscan_Init(MXKEYSCAN_Type* base, const cy_stc_ks_config_ (void)Cy_Keyscan_Init_Context(context); // Reset the keyscan HW to ensure we start from a known state status = Cy_Keyscan_DeInit(base, context); - + if(status == CY_KEYSCAN_SUCCESS) { CY_ASSERT_L3(CY_KEYSCAN_IS_ROW_COUNT_VALID(config->noofRows)); @@ -647,7 +647,7 @@ cy_en_ks_status_t Cy_Keyscan_Init(MXKEYSCAN_Type* base, const cy_stc_ks_config_ context->keyscan_pollingKeyscanHw = false; context->keysPressedCount = 0U; - + KEYSCAN_DEBOUNCE(base) = (_VAL2FLD(MXKEYSCAN_DEBOUNCE_MD_DEBOUNCE, config->macroDownDebCnt) | \ _VAL2FLD(MXKEYSCAN_DEBOUNCE_MU_DEBOUNCE, config->macroUpDebCnt) | \ _VAL2FLD(MXKEYSCAN_DEBOUNCE_U_DEBOUNCE, config->microDebCnt)); @@ -662,11 +662,11 @@ cy_en_ks_status_t Cy_Keyscan_Init(MXKEYSCAN_Type* base, const cy_stc_ks_config_ _VAL2FLD(MXKEYSCAN_KEYSCAN_CTL_PULL_HIGH, MXKEYSCAN_KEYSCAN_CTL_PULL_HIGH_DEFAULT) | \ _VAL2FLD(MXKEYSCAN_KEYSCAN_CTL_KSI_DRV_HIGH, MXKEYSCAN_KEYSCAN_CTL_KSI_DRV_HIGH_DEFAULT)| \ _VAL2FLD(MXKEYSCAN_KEYSCAN_CTL_KYSCLK_STAYON,config->clkStayOn)); - + // Configure the control register and enable the KS HW KEYSCAN_CTL(base) |= _VAL2FLD(MXKEYSCAN_KEYSCAN_CTL_KS_EN, MXKEYSCAN_KEYSCAN_CTL_KS_EN_Msk); } - + } return status; } @@ -983,7 +983,7 @@ cy_en_ks_status_t Cy_Keyscan_Interrupt_Handler(MXKEYSCAN_Type *base, cy_stc_keys } return status; } - + /** ***************************************************************************** ** Reads from Hardware FIFO. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_lin.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_lin.c index 9671fffd33..90a3a9db61 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_lin.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_lin.c @@ -407,7 +407,7 @@ cy_en_lin_status_t Cy_LIN_SetHeader(LIN_CH_Type* base, uint8_t id) } else { - /* Calculate the Parity bits P0 & P1 + /* Calculate the Parity bits P0 & P1 Parity is calculated as per the formula given - P[1] = ! (ID[5] ^ ID[4] ^ ID[3] ^ ID[1]) - P[0] = (ID[4] ^ ID[2] ^ ID[1] ^ ID[0]) @@ -481,7 +481,7 @@ cy_en_lin_status_t Cy_LIN_GetInterruptMask(LIN_CH_Type* base, uint32_t *mask) { cy_en_lin_status_t ret = CY_LIN_SUCCESS; - if ((NULL == base) || + if ((NULL == base) || (NULL == mask)) { ret = CY_LIN_BAD_PARAM; @@ -503,7 +503,7 @@ cy_en_lin_status_t Cy_LIN_GetInterruptMaskedStatus(LIN_CH_Type* base, uint32_t * { cy_en_lin_status_t ret = CY_LIN_SUCCESS; - if ((NULL == base) || + if ((NULL == base) || (NULL == status)) { ret = CY_LIN_BAD_PARAM; @@ -526,7 +526,7 @@ cy_en_lin_status_t Cy_LIN_GetInterruptStatus(LIN_CH_Type* base, uint32_t *status cy_en_lin_status_t ret = CY_LIN_SUCCESS; - if ((NULL == base) || + if ((NULL == base) || (NULL == status)) { ret = CY_LIN_BAD_PARAM; @@ -569,7 +569,7 @@ cy_en_lin_status_t Cy_LIN_GetStatus(LIN_CH_Type* base, uint32_t *status) { cy_en_lin_status_t ret = CY_LIN_SUCCESS; - if ((NULL == base) || + if ((NULL == base) || (NULL == status)) { ret = CY_LIN_BAD_PARAM; @@ -671,7 +671,7 @@ cy_en_lin_status_t Cy_LIN_ErrCtl_Enable(LIN_Type* base, cy_stc_lin_test_error_co { return CY_LIN_BAD_PARAM; } - + /* LIN est Error CTL setting */ CY_ASSERT_L3(CY_LIN_IS_TEST_CTL_CH_IDX_VALID(test_error_config->chidx)); diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pd_pdcm.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pd_pdcm.c index 61916a4043..2e8eb07039 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pd_pdcm.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pd_pdcm.c @@ -59,7 +59,7 @@ cy_pd_pdcm_dep_t cy_pd_pdcm_get_dependency(cy_pd_pdcm_id_t host_pd,cy_pd_pdcm_id CY_ASSERT(CY_SYSPM_IS_PDCM_ID_VALID(host_pd)); CY_ASSERT(CY_SYSPM_IS_PDCM_ID_VALID(dest_pd)); - dep = (((_FLD2VAL(PWRMODE_PD_PD_SPT_PD_FORCE_ON, CY_PDCM_PD_SPT(host_pd)) >> ((uint32_t)dest_pd)) & CY_PD_PDCM_DEPENDENCY_MASK) | + dep = (((_FLD2VAL(PWRMODE_PD_PD_SPT_PD_FORCE_ON, CY_PDCM_PD_SPT(host_pd)) >> ((uint32_t)dest_pd)) & CY_PD_PDCM_DEPENDENCY_MASK) | (((_FLD2VAL(PWRMODE_PD_PD_SPT_PD_CONFIG_ON, CY_PDCM_PD_SPT(host_pd)) >> ((uint32_t)dest_pd)) & CY_PD_PDCM_DEPENDENCY_MASK ) << CY_PD_PDCM_DEPENDENCY_MASK)); if((dep == CY_PD_PDCM_DEPENDENCY_CONFIG1) || (dep == CY_PD_PDCM_DEPENDENCY_CONFIG2)) diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pd_ppu.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pd_ppu.c index 627913e050..faf5538b51 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pd_ppu.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pd_ppu.c @@ -45,7 +45,7 @@ * Initializes the PD PPU Driver. * * \param ppu -* This parameter contains PPU base pointer for which the initialization has +* This parameter contains PPU base pointer for which the initialization has * to be done, it will point to one of the below PPUs: * MAIN_PPU * CPUSS_PPU @@ -70,7 +70,7 @@ cy_en_syspm_status_t cy_pd_ppu_init(struct ppu_v1_reg *ppu) * Gets the programmed power mode of the particular PPU. * * \param ppu -* This parameter contains PPU base pointer for which the initialization has +* This parameter contains PPU base pointer for which the initialization has * to be done, it will point to one of the below PPUs. * MAIN_PPU * CPUSS_PPU @@ -94,7 +94,7 @@ enum ppu_v1_mode cy_pd_ppu_get_programmed_power_mode(struct ppu_v1_reg *ppu) * Gets the current power mode of the particular PPU. * * \param ppu -* This parameter contains PPU base pointer for which the initialization has +* This parameter contains PPU base pointer for which the initialization has * to be done, it will point to one of the below PPUs: * MAIN_PPU * CPUSS_PPU @@ -117,7 +117,7 @@ enum ppu_v1_mode cy_pd_ppu_get_power_mode(struct ppu_v1_reg *ppu) * Sets the required power mode of the particular PPU. * * \param ppu -* This parameter contains PPU base pointer for which the initialization has +* This parameter contains PPU base pointer for which the initialization has * to be done, it will point to one of the below PPUs: * MAIN_PPU * CPUSS_PPU @@ -148,7 +148,7 @@ cy_en_syspm_status_t cy_pd_ppu_set_power_mode(struct ppu_v1_reg *ppu, uint32_t m * Resets the PD using PPU. * * \param ppu -* This parameter contains PPU base pointer for which the initialization has +* This parameter contains PPU base pointer for which the initialization has * to be done, it will point to one of the below PPUs: * MAIN_PPU * CPUSS_PPU diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pdm_pcm_v2.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pdm_pcm_v2.c index b84fd7bf84..4564d42e74 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pdm_pcm_v2.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_pdm_pcm_v2.c @@ -46,7 +46,7 @@ CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 10.1', 1, \ * Initialize the PDM-PCM Channel * * \pre Make sure PDM-PCM is intialized before calling this function. \ref Cy_PDM_PCM_Init -* +* * \param base The pointer to the PDM-PCM instance address * \param channel_config The pointer to a configuration structure. * \param channel_num The channel number to be initialized. @@ -64,27 +64,27 @@ cy_en_pdm_pcm_status_t Cy_PDM_PCM_Channel_Init(PDM_Type * base, cy_stc_pdm_pcm_c CY_ASSERT_L2(CY_PDM_PCM_IS_TRIG_LEVEL(channel_config->rxFifoTriggerLevel)); CY_ASSERT_L2(CY_PDM_PCM_IS_SCALE_VALID(channel_config->fir0_scale)); CY_ASSERT_L2(CY_PDM_PCM_IS_SCALE_VALID(channel_config->fir1_scale)); - - + + ret = CY_PDM_PCM_SUCCESS; PDM_PCM_RX_FIFO_CTL(base, channel_num) = _VAL2FLD(PDM_CH_RX_FIFO_CTL_TRIGGER_LEVEL, channel_config->rxFifoTriggerLevel); - + PDM_PCM_CH_CTL(base, channel_num) = _VAL2FLD(PDM_CH_CTL_WORD_SIZE, channel_config->wordSize) | _BOOL2FLD(PDM_CH_CTL_WORD_SIGN_EXTEND, channel_config->signExtension) | _BOOL2FLD(PDM_CH_CTL_ENABLED, CY_PDM_PCM_ENABLE); - + PDM_PCM_CH_IF_CTL(base, channel_num) = _VAL2FLD(PDM_CH_IF_CTL_SAMPLE_DELAY, channel_config->sampledelay); - + PDM_PCM_CH_CIC_CTL(base, channel_num) = ((uint32_t)channel_config->cic_decim_code); - + PDM_PCM_CH_FIR0_CTL(base, channel_num) = _VAL2FLD(PDM_CH_FIR0_CTL_DECIM3, channel_config->fir0_decim_code) | _VAL2FLD(PDM_CH_FIR0_CTL_SCALE, channel_config->fir0_scale) | _VAL2FLD(PDM_CH_FIR0_CTL_ENABLED, channel_config->fir0_enable); - + PDM_PCM_CH_FIR1_CTL(base, channel_num) = _VAL2FLD(PDM_CH_FIR1_CTL_DECIM2, channel_config->fir1_decim_code) | _VAL2FLD(PDM_CH_FIR1_CTL_SCALE, channel_config->fir1_scale) | _VAL2FLD(PDM_CH_FIR1_CTL_ENABLED, CY_PDM_PCM_ENABLE); @@ -97,7 +97,7 @@ cy_en_pdm_pcm_status_t Cy_PDM_PCM_Channel_Init(PDM_Type * base, cy_stc_pdm_pcm_c { PDM_PCM_CH_DC_BLOCK_CTL(base, channel_num) = _VAL2FLD(PDM_CH_DC_BLOCK_CTL_ENABLED, CY_PDM_PCM_DISABLE); } - + } return ret; } @@ -122,9 +122,9 @@ cy_en_pdm_pcm_status_t Cy_PDM_PCM_Init(PDM_Type * base, cy_stc_pdm_pcm_config_v2 CY_ASSERT_L2(CY_PDM_PCM_IS_CLK_SEL_VALID(config->clksel)); CY_ASSERT_L2(CY_PDM_PCM_IS_HALVE_RATE_SET_VALID(config->halverate)); CY_ASSERT_L2(CY_PDM_PCM_IS_ROUTE_VALID(config->route)); - + ret = CY_PDM_PCM_SUCCESS; - + /* The clock setting */ PDM_PCM_CLOCK_CTL(base) = _VAL2FLD(PDM_CLOCK_CTL_CLOCK_DIV, config->clkDiv) | _VAL2FLD(PDM_CLOCK_CTL_CLOCK_SEL, config->clksel) | @@ -132,78 +132,78 @@ cy_en_pdm_pcm_status_t Cy_PDM_PCM_Init(PDM_Type * base, cy_stc_pdm_pcm_config_v2 /* PDM-PCM ROUTE setting */ PDM_PCM_ROUTE_CTL(base) = _VAL2FLD(PDM_ROUTE_CTL_DATA_SEL, config->route); - + if(config->fir0_coeff_user_value != 0U) { PDM_PCM_FIR0_COEFF0(base) = _VAL2FLD(PDM_FIR0_COEFF0_DATA0, config->fir0_coeff[0].coeff_data0) | _VAL2FLD(PDM_FIR0_COEFF0_DATA1, config->fir0_coeff[0].coeff_data1); - + PDM_PCM_FIR0_COEFF1(base) = _VAL2FLD(PDM_FIR0_COEFF1_DATA0, config->fir0_coeff[1].coeff_data0) | _VAL2FLD(PDM_FIR0_COEFF1_DATA1, config->fir0_coeff[1].coeff_data1); - + PDM_PCM_FIR0_COEFF2(base) = _VAL2FLD(PDM_FIR0_COEFF2_DATA0, config->fir0_coeff[2].coeff_data0) | _VAL2FLD(PDM_FIR0_COEFF2_DATA1, config->fir0_coeff[2].coeff_data1); - + PDM_PCM_FIR0_COEFF3(base) = _VAL2FLD(PDM_FIR0_COEFF3_DATA0, config->fir0_coeff[3].coeff_data0) | _VAL2FLD(PDM_FIR0_COEFF3_DATA1, config->fir0_coeff[3].coeff_data1); - + PDM_PCM_FIR0_COEFF4(base) = _VAL2FLD(PDM_FIR0_COEFF4_DATA0, config->fir0_coeff[4].coeff_data0) | _VAL2FLD(PDM_FIR0_COEFF4_DATA1, config->fir0_coeff[4].coeff_data1); - + PDM_PCM_FIR0_COEFF5(base) = _VAL2FLD(PDM_FIR0_COEFF5_DATA0, config->fir0_coeff[5].coeff_data0) | _VAL2FLD(PDM_FIR0_COEFF5_DATA1, config->fir0_coeff[5].coeff_data1); - + PDM_PCM_FIR0_COEFF6(base) = _VAL2FLD(PDM_FIR0_COEFF6_DATA0, config->fir0_coeff[6].coeff_data0) | _VAL2FLD(PDM_FIR0_COEFF6_DATA1, config->fir0_coeff[6].coeff_data1); - + PDM_PCM_FIR0_COEFF7(base) = _VAL2FLD(PDM_FIR0_COEFF7_DATA0, config->fir0_coeff[7].coeff_data0) | _VAL2FLD(PDM_FIR0_COEFF7_DATA1, config->fir0_coeff[7].coeff_data1); } - + if(config->fir1_coeff_user_value != 0U) { PDM_PCM_FIR1_COEFF0(base) = _VAL2FLD(PDM_FIR1_COEFF0_DATA0, config->fir1_coeff[0].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF0_DATA1, config->fir1_coeff[0].coeff_data1); - + PDM_PCM_FIR1_COEFF1(base) = _VAL2FLD(PDM_FIR1_COEFF1_DATA0, config->fir1_coeff[1].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF1_DATA1, config->fir1_coeff[1].coeff_data1); - + PDM_PCM_FIR1_COEFF2(base) = _VAL2FLD(PDM_FIR1_COEFF2_DATA0, config->fir1_coeff[2].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF2_DATA1, config->fir1_coeff[2].coeff_data1); - + PDM_PCM_FIR1_COEFF3(base) = _VAL2FLD(PDM_FIR1_COEFF3_DATA0, config->fir1_coeff[3].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF3_DATA1, config->fir1_coeff[3].coeff_data1); - + PDM_PCM_FIR1_COEFF4(base) = _VAL2FLD(PDM_FIR1_COEFF4_DATA0, config->fir1_coeff[4].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF4_DATA1, config->fir1_coeff[4].coeff_data1); - + PDM_PCM_FIR1_COEFF5(base) = _VAL2FLD(PDM_FIR1_COEFF5_DATA0, config->fir1_coeff[5].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF5_DATA1, config->fir1_coeff[5].coeff_data1); - + PDM_PCM_FIR1_COEFF6(base) = _VAL2FLD(PDM_FIR1_COEFF6_DATA0, config->fir1_coeff[6].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF6_DATA1, config->fir1_coeff[6].coeff_data1); - + PDM_PCM_FIR1_COEFF7(base) = _VAL2FLD(PDM_FIR1_COEFF7_DATA0, config->fir1_coeff[7].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF7_DATA1, config->fir1_coeff[7].coeff_data1); - + PDM_PCM_FIR1_COEFF8(base) = _VAL2FLD(PDM_FIR1_COEFF8_DATA0, config->fir1_coeff[8].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF8_DATA1, config->fir1_coeff[8].coeff_data1); - + PDM_PCM_FIR1_COEFF9(base) = _VAL2FLD(PDM_FIR1_COEFF9_DATA0, config->fir1_coeff[9].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF9_DATA1, config->fir1_coeff[9].coeff_data1); - + PDM_PCM_FIR1_COEFF10(base) = _VAL2FLD(PDM_FIR1_COEFF10_DATA0, config->fir1_coeff[10].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF10_DATA1, config->fir1_coeff[10].coeff_data1); - + PDM_PCM_FIR1_COEFF11(base) = _VAL2FLD(PDM_FIR1_COEFF11_DATA0, config->fir1_coeff[11].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF11_DATA1, config->fir1_coeff[11].coeff_data1); - + PDM_PCM_FIR1_COEFF12(base) = _VAL2FLD(PDM_FIR1_COEFF12_DATA0, config->fir1_coeff[12].coeff_data0) | _VAL2FLD(PDM_FIR1_COEFF12_DATA1, config->fir1_coeff[12].coeff_data1); - + PDM_PCM_FIR1_COEFF13(base) = _VAL2FLD(PDM_FIR1_COEFF13_DATA0, config->fir1_coeff[13].coeff_data0) | - _VAL2FLD(PDM_FIR1_COEFF13_DATA1, config->fir1_coeff[13].coeff_data1); - + _VAL2FLD(PDM_FIR1_COEFF13_DATA1, config->fir1_coeff[13].coeff_data1); + } } @@ -236,16 +236,16 @@ cy_en_pdm_pcm_status_t Cy_PDM_PCM_test_Init(PDM_Type * base, cy_stc_pdm_pcm_conf CY_ASSERT_L2(CY_PDM_PCM_IS_CLK_SEL_VALID(config->clksel)); CY_ASSERT_L2(CY_PDM_PCM_IS_HALVE_RATE_SET_VALID(config->halverate)); CY_ASSERT_L2(CY_PDM_PCM_IS_ROUTE_VALID(config->route)); - + ret = CY_PDM_PCM_SUCCESS; - + PDM_PCM_TEST_CTL(base) = _VAL2FLD(PDM_TEST_CTL_DRIVE_DELAY_HI, test_config->drive_delay_hi) | _VAL2FLD(PDM_TEST_CTL_DRIVE_DELAY_LO, test_config->drive_delay_lo); PDM_PCM_TEST_CTL(base) |= _VAL2FLD(PDM_TEST_CTL_MODE_HI, test_config->mode_hi) | _VAL2FLD(PDM_TEST_CTL_MODE_LO, test_config->mode_lo); PDM_PCM_TEST_CTL(base) |= _VAL2FLD(PDM_TEST_CTL_AUDIO_FREQ_DIV, test_config->audio_freq_div) | _BOOL2FLD(PDM_TEST_CTL_CH_ENABLED, test_config->enable); - + } return (ret); @@ -273,7 +273,7 @@ void Cy_PDM_PCM_Channel_DeInit(PDM_Type * base, uint8_t channel_num) PDM_PCM_INTR_RX_MASK(base, channel_num) = 0UL; /* Disable interrupts */ PDM_PCM_RX_FIFO_CTL(base, channel_num) = 0UL; PDM_PCM_CTL_CLR(base) = (1UL << channel_num); - + } diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_rtc.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_rtc.c index d278c21f52..93db1de784 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_rtc.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_rtc.c @@ -189,7 +189,7 @@ void Cy_RTC_GetDateAndTime(cy_stc_rtc_config_t* dateTime) */ if (dateTime->hrFormat != CY_RTC_24_HOURS) { - dateTime->hour = + dateTime->hour = CONVERT_BCD_TO_DEC((tmpTime & CY_RTC_BACKUP_RTC_TIME_RTC_12HOUR) >> BACKUP_RTC_TIME_RTC_HOUR_Pos); dateTime->amPm = ((0U != (tmpTime & CY_RTC_BACKUP_RTC_TIME_RTC_PM)) ? CY_RTC_PM : CY_RTC_AM); } @@ -199,7 +199,7 @@ void Cy_RTC_GetDateAndTime(cy_stc_rtc_config_t* dateTime) dateTime->amPm = CY_RTC_AM; } dateTime->dayOfWeek = CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_RTC_TIME_RTC_DAY, tmpTime)); - + dateTime->date = CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_RTC_DATE_RTC_DATE, tmpDate)); dateTime->month = CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_RTC_DATE_RTC_MON, tmpDate)); dateTime->year = CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_RTC_DATE_RTC_YEAR, tmpDate)); @@ -262,7 +262,7 @@ cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTime(cy_stc_rtc_alarm_t const *alarmDat /* Read the current RTC year to validate alarmDateTime->date */ Cy_RTC_SyncFromRtc(); - tmpYear = + tmpYear = CY_RTC_TWO_THOUSAND_YEARS + CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_RTC_DATE_RTC_YEAR, BACKUP_RTC_DATE)); tmpDaysInMonth = Cy_RTC_DaysInMonth(alarmDateTime->month, tmpYear); @@ -354,8 +354,8 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a */ if (curHoursFormat != CY_RTC_24_HOURS) { - alarmDateTime->hour = - CONVERT_BCD_TO_DEC((tmpAlarmTime & CY_RTC_BACKUP_RTC_TIME_RTC_12HOUR) + alarmDateTime->hour = + CONVERT_BCD_TO_DEC((tmpAlarmTime & CY_RTC_BACKUP_RTC_TIME_RTC_12HOUR) >> BACKUP_ALM1_TIME_ALM_HOUR_Pos); /* In the structure, the hour value should be presented in the 24-hour mode. In @@ -391,7 +391,7 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a alarmDateTime->dateEn = ((_FLD2BOOL(BACKUP_ALM1_DATE_ALM_DATE_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); - alarmDateTime->month = CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_ALM1_DATE_ALM_MON, tmpAlarmDate)); + alarmDateTime->month = CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_ALM1_DATE_ALM_MON, tmpAlarmDate)); alarmDateTime->monthEn = ((_FLD2BOOL(BACKUP_ALM1_DATE_ALM_MON_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); @@ -456,7 +456,7 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a alarmDateTime->dateEn = ((_FLD2BOOL(BACKUP_ALM2_DATE_ALM_DATE_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); - alarmDateTime->month = CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_ALM2_DATE_ALM_MON, tmpAlarmDate)); + alarmDateTime->month = CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_ALM2_DATE_ALM_MON, tmpAlarmDate)); alarmDateTime->monthEn = ((_FLD2BOOL(BACKUP_ALM2_DATE_ALM_MON_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); @@ -743,7 +743,7 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) * to 12:00 AM */ curTime = - (_CLR_SET_FLD32U(curTime, BACKUP_RTC_TIME_RTC_HOUR, + (_CLR_SET_FLD32U(curTime, BACKUP_RTC_TIME_RTC_HOUR, CONVERT_DEC_TO_BCD(CY_RTC_HOURS_PER_HALF_DAY))); /* Set the AM bit */ curTime &= ((uint32_t) ~CY_RTC_BACKUP_RTC_TIME_RTC_PM); @@ -762,7 +762,7 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) { /* Mask the AM/PM bit as the hour value is in [20:16] bits */ hourValue = - CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_RTC_TIME_RTC_HOUR, + CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_RTC_TIME_RTC_HOUR, (curTime & (uint32_t) ~CY_RTC_BACKUP_RTC_TIME_RTC_PM))); /* Add 12 hours in condition that current time is in PM period */ if ((hourValue < CY_RTC_HOURS_PER_HALF_DAY) && (0U != (curTime & CY_RTC_BACKUP_RTC_TIME_RTC_PM))) @@ -1620,8 +1620,8 @@ static void ConstructTimeDate(cy_stc_rtc_config_t const *timeDate, uint32_t *tim tmpTime &= ((uint32_t) ~CY_RTC_BACKUP_RTC_TIME_RTC_PM); } tmpTime |= BACKUP_RTC_TIME_CTRL_12HR_Msk; - tmpTime |= - (_VAL2FLD(BACKUP_RTC_TIME_RTC_HOUR, + tmpTime |= + (_VAL2FLD(BACKUP_RTC_TIME_RTC_HOUR, (CONVERT_DEC_TO_BCD(timeDate->hour) & ((uint32_t) ~CY_RTC_12HRS_PM_BIT)))); } else @@ -1715,7 +1715,7 @@ static void ConstructAlarmTimeDate(cy_stc_rtc_alarm_t const *alarmDateTime, uint */ hourValue = (uint32_t) alarmDateTime->hour - CY_RTC_HOURS_PER_HALF_DAY; hourValue = ((0U != hourValue) ? hourValue : CY_RTC_HOURS_PER_HALF_DAY); - tmpAlarmTime |= + tmpAlarmTime |= CY_RTC_BACKUP_RTC_TIME_RTC_PM | (_VAL2FLD(BACKUP_ALM1_TIME_ALM_HOUR, CONVERT_DEC_TO_BCD(hourValue))); } else if (alarmDateTime->hour < 1U) @@ -1778,7 +1778,7 @@ static uint32_t RelativeToFixed(cy_stc_rtc_dst_format_t const *convertDst) /* Read the current year */ Cy_RTC_SyncFromRtc(); - currentYear = + currentYear = CY_RTC_TWO_THOUSAND_YEARS + CONVERT_BCD_TO_DEC(_FLD2VAL(BACKUP_RTC_DATE_RTC_YEAR, BACKUP_RTC_DATE)); currentDay = CY_RTC_FIRST_DAY_OF_MONTH; currentWeek = CY_RTC_FIRST_WEEK_OF_MONTH; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sar.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sar.c index 7676321895..699b575c9b 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sar.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sar.c @@ -736,7 +736,7 @@ void Cy_SAR_SetConvertMode(SAR_Type *base, cy_en_sar_sample_ctrl_trigger_mode_t * This function reads the end of conversion status and clears it after. * * \note -* \ref CY_SAR_WAIT_FOR_RESULT and \ref CY_SAR_WAIT_FOR_RESULT_INJ return modes are not recommended +* \ref CY_SAR_WAIT_FOR_RESULT and \ref CY_SAR_WAIT_FOR_RESULT_INJ return modes are not recommended * for use in RTOS environment. * * \funcusage diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_scb_common.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_scb_common.c index ab83529b0f..fd286ed9e6 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_scb_common.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_scb_common.c @@ -282,7 +282,7 @@ void Cy_SCB_WriteArrayNoCheck(CySCB_Type *base, void *buffer, uint32_t size) } #elif(CY_IP_MXSCB_VERSION>=2) uint32_t datawidth = Cy_SCB_Get_TxDataWidth(base); - + if (datawidth == CY_SCB_BYTE_WIDTH) { uint8_t *buf = (uint8_t *) buffer; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_scb_spi.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_scb_spi.c index a3bb8c9ca0..67e09e9517 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_scb_spi.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_scb_spi.c @@ -61,7 +61,7 @@ static void DiscardArrayNoCheck(CySCB_Type const *base, uint32_t size); * \ref cy_en_scb_spi_status_t * * \note -* If SCB is already enabled, ensure that the SCB block is disabled +* If SCB is already enabled, ensure that the SCB block is disabled * \ref Cy_SCB_SPI_Disable before calling this function. * *******************************************************************************/ @@ -211,7 +211,7 @@ cy_en_scb_spi_status_t Cy_SCB_SPI_Init(CySCB_Type *base, cy_stc_scb_spi_config_t * The pointer to the SPI SCB instance. * * \note -* Ensure that the SCB block is disabled \ref Cy_SCB_SPI_Disable +* Ensure that the SCB block is disabled \ref Cy_SCB_SPI_Disable * before calling this function. * *******************************************************************************/ diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sd_host.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sd_host.c index 9c4e45534b..392d156cc2 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sd_host.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sd_host.c @@ -3081,7 +3081,7 @@ cy_en_sd_host_status_t Cy_SD_Host_AbortTransfer(SDHC_Type *base, { return ret; } - + Cy_SysLib_DelayUs(CY_SD_HOST_NCC_MIN_US); /* Get R1 */ @@ -3129,7 +3129,7 @@ cy_en_sd_host_status_t Cy_SD_Host_AbortTransfer(SDHC_Type *base, (void)Cy_SD_Host_GetResponse(base, (uint32_t *)&response, false); /* Check if the card is in the transition state. */ - if ((CY_SD_HOST_CARD_TRAN << CY_SD_HOST_CMD13_CURRENT_STATE) != + if ((CY_SD_HOST_CARD_TRAN << CY_SD_HOST_CMD13_CURRENT_STATE) != (response & CY_SD_HOST_CMD13_CURRENT_STATE_MSK)) { ret = CY_SD_HOST_ERROR; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_seglcd.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_seglcd.c index ddeae4c8f0..fc223c2e51 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_seglcd.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_seglcd.c @@ -370,7 +370,7 @@ static char_t NumToChar(uint32_t value) * * Side Effects: The block is disabled to change the settings. * -* \funcusage +* \funcusage * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_Config * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_Init * @@ -378,7 +378,7 @@ static char_t NumToChar(uint32_t value) cy_en_seglcd_status_t Cy_SegLCD_Init(LCD_Type * base, cy_stc_seglcd_config_t const * config) { cy_en_seglcd_status_t retVal = CY_SEGLCD_BAD_PARAM; - + if (NULL != base) { CY_ASSERT_L3(CY_SEGLCD_IS_SPEED_VALID(config->speed)); @@ -394,13 +394,13 @@ cy_en_seglcd_status_t Cy_SegLCD_Init(LCD_Type * base, cy_stc_seglcd_config_t con uint32_t locCheck = ((CY_SEGLCD_SPEED_LOW == config->speed) && (CY_SEGLCD_REV_1(base))) ? (CY_SEGLCD_DIV_MAX_LS_VER1) : (CY_SEGLCD_DIV_MAX); uint32_t locSubfr = CY_SYSLIB_DIV_ROUND((CY_SYSLIB_DIV_ROUND(config->clkFreq, config->frRate * 4UL * config->comNum) - 1UL) * config->contrast, 100UL); uint32_t locDead = CY_SYSLIB_DIV_ROUND(CY_SYSLIB_DIV_ROUND(config->clkFreq * ((uint32_t)(100UL - (uint32_t)config->contrast)), (uint32_t)config->frRate), 100UL); - + if ((locSubfr <= locCheck) && (locDead <= locCheck)) { uint32_t locLsClk = (uint32_t)((CY_SEGLCD_REV_1(base)) ? CY_SEGLCD_LSCLK_LF : config->lsClk); Cy_SegLCD_Disable(base); - + /* Calculate the sub-frame and dead-time dividers */ LCD_DIVIDER(base) = _VAL2FLD(LCD_DIVIDER_SUBFR_DIV, locSubfr) | _VAL2FLD(LCD_DIVIDER_DEAD_DIV, locDead); @@ -417,7 +417,7 @@ cy_en_seglcd_status_t Cy_SegLCD_Init(LCD_Type * base, cy_stc_seglcd_config_t con retVal = CY_SEGLCD_SUCCESS; } } - + return (retVal); } @@ -480,7 +480,7 @@ void Cy_SegLCD_Deinit(LCD_Type * base) LCD_CONTROL(base) = 0UL; LCD_DIVIDER(base) = 0UL; - + InvClrData(base, false); /* Clear the entire frame buffer to all zeroes */ } @@ -493,7 +493,7 @@ void Cy_SegLCD_Deinit(LCD_Type * base) * * \param base The base pointer to the LCD instance registers. * -* \funcusage +* \funcusage * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_Config * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_Init * @@ -569,7 +569,7 @@ void Cy_SegLCD_Disable(LCD_Type * base) ****************************************************************************//** * * Clears the frame buffer and initiates the common lines. -* In general case it is recommended to be called after \ref Cy_SegLCD_Init +* In general case it is recommended to be called after \ref Cy_SegLCD_Init * and before \ref Cy_SegLCD_Enable. * * \param base The base pointer to the LCD instance registers. @@ -580,7 +580,7 @@ void Cy_SegLCD_Disable(LCD_Type * base) * * \return \ref cy_en_seglcd_status_t. * -* \funcusage +* \funcusage * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_Config * \snippet seglcd/snippet/SegLCD_Snpt.c snippet_Cy_SegLCD_Init * @@ -629,7 +629,7 @@ cy_en_seglcd_status_t Cy_SegLCD_ClrFrame(LCD_Type * base, uint32_t const * commo cy_en_seglcd_status_t Cy_SegLCD_InvFrame(LCD_Type * base, uint32_t const * commons) { uint32_t retVal = (uint32_t)CY_SEGLCD_BAD_PARAM; - + if (NULL != commons) { uint32_t i; @@ -654,7 +654,7 @@ cy_en_seglcd_status_t Cy_SegLCD_InvFrame(LCD_Type * base, uint32_t const * commo retVal |= (uint32_t)Cy_SegLCD_WritePixel(base, commons[i], true); } } - + return((cy_en_seglcd_status_t)retVal); } @@ -679,7 +679,7 @@ cy_en_seglcd_status_t Cy_SegLCD_InvFrame(LCD_Type * base, uint32_t const * commo cy_en_seglcd_status_t Cy_SegLCD_WritePixel(LCD_Type * base, uint32_t pixel, bool value) { cy_en_seglcd_status_t retVal = CY_SEGLCD_BAD_PIXEL; - + if (CY_SEGLCD_IS_PIX_VALID(pixel)) { /* Extract the pixel location. */ @@ -717,7 +717,7 @@ cy_en_seglcd_status_t Cy_SegLCD_WritePixel(LCD_Type * base, uint32_t pixel, bool bool Cy_SegLCD_ReadPixel(LCD_Type * base, uint32_t pixel) { bool retVal = false; - + if (CY_SEGLCD_IS_PIX_VALID(pixel)) { /* Get the pixel value from the frame buffer */ @@ -743,7 +743,7 @@ bool Cy_SegLCD_ReadPixel(LCD_Type * base, uint32_t pixel) * \param character The code of the character to display. * Should be within the font symbol codes range specified by * \ref cy_stc_seglcd_font_t.first and \ref cy_stc_seglcd_font_t.last -* \param position The position of the character/digit on display. +* \param position The position of the character/digit on display. * Zero is the most left character/digit of the specified * display \ref cy_stc_seglcd_disp_t. * \param display The pointer to the display structure \ref cy_stc_seglcd_disp_t. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif.c index a5446cb60c..832523b045 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif.c @@ -68,7 +68,7 @@ extern "C" { * - \ref CY_SMIF_SUCCESS * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_Init(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_Init(SMIF_Type *base, cy_stc_smif_config_t const *config, uint32_t timeout, cy_stc_smif_context_t *context) @@ -79,8 +79,8 @@ cy_en_smif_status_t Cy_SMIF_Init(SMIF_Type *base, { uint32_t smif_ctl_vlaue = SMIF_CTL(base); - /* Copy the base address of the SMIF and the SMIF Device block - * registers to the context. + /* Copy the base address of the SMIF and the SMIF Device block + * registers to the context. */ context->timeout = timeout; @@ -139,8 +139,8 @@ void Cy_SMIF_DeInit(SMIF_Type *base) { uint32_t idx; - /* Configure the SMIF interface to default values. - * The default value is 0. + /* Configure the SMIF interface to default values. + * The default value is 0. */ SMIF_CTL(base) = CY_SMIF_CTL_REG_DEFAULT; SMIF_TX_DATA_FIFO_CTL(base) = 0U; @@ -175,7 +175,7 @@ void Cy_SMIF_DeInit(SMIF_Type *base) void Cy_SMIF_SetMode(SMIF_Type *base, cy_en_smif_mode_t mode) { CY_ASSERT_L3(CY_SMIF_MODE_VALID(mode)); - + /* Set the register SMIF.CTL.XIP_MODE = TRUE */ if (CY_SMIF_NORMAL == mode) { @@ -266,16 +266,16 @@ void Cy_SMIF_SetDataSelect(SMIF_Type *base, cy_en_smif_slave_select_t slaveSelec cy_en_smif_data_select_t dataSelect) { SMIF_DEVICE_Type volatile *device; - + CY_ASSERT_L3(CY_SMIF_SLAVE_SEL_VALID(slaveSelect)); CY_ASSERT_L3(CY_SMIF_DATA_SEL_VALID(dataSelect)); - + /* Connect the slave to its data lines */ device = Cy_SMIF_GetDeviceBySlot(base, slaveSelect); if(NULL != device) { - SMIF_DEVICE_CTL(device) = _CLR_SET_FLD32U(SMIF_DEVICE_CTL(device), + SMIF_DEVICE_CTL(device) = _CLR_SET_FLD32U(SMIF_DEVICE_CTL(device), SMIF_DEVICE_CTL_DATA_SEL, (uint32_t)dataSelect); } @@ -293,7 +293,7 @@ void Cy_SMIF_SetDataSelect(SMIF_Type *base, cy_en_smif_slave_select_t slaveSelec * transmission. This function sets up the slave lines for the rest of the * command structure. The \ref Cy_SMIF_TransmitCommand is called before \ref * Cy_SMIF_TransmitData or \ref Cy_SMIF_ReceiveData is called. When enabled, the -* completeTxfr parameter in the function will de-assert the slave select line at +* completeTxfr parameter in the function will de-assert the slave select line at * the end of the function execution. * * \note This function blocks until all the command and associated parameters @@ -338,7 +338,7 @@ void Cy_SMIF_SetDataSelect(SMIF_Type *base, cy_en_smif_slave_select_t slaveSelec * - \ref CY_SMIF_SUCCESS * - \ref CY_SMIF_EXCEED_TIMEOUT * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * *******************************************************************************/ cy_en_smif_status_t Cy_SMIF_TransmitCommand(SMIF_Type *base, @@ -367,7 +367,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitCommand(SMIF_Type *base, #else /* The return variable */ cy_en_smif_status_t result = CY_SMIF_SUCCESS; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(cmdTxfrWidth)); CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(paramTxfrWidth)); @@ -398,10 +398,10 @@ cy_en_smif_status_t Cy_SMIF_TransmitCommand(SMIF_Type *base, SMIF_TX_CMD_FIFO_WR(base) = constCmdPart| _VAL2FLD(CY_SMIF_CMD_FIFO_WR_TXDATA, (uint32_t) cmdParam[bufIndex]) | - _VAL2FLD(CY_SMIF_CMD_FIFO_WR_WIDTH, + _VAL2FLD(CY_SMIF_CMD_FIFO_WR_WIDTH, (uint32_t) paramTxfrWidth) | _VAL2FLD(CY_SMIF_CMD_FIFO_WR_LAST_BYTE, - ((((uint32_t)bufIndex + 1UL) < paramSize) ? + ((((uint32_t)bufIndex + 1UL) < paramSize) ? 0UL : completeTxfr)); bufIndex++; @@ -438,14 +438,14 @@ cy_en_smif_status_t Cy_SMIF_TransmitCommand(SMIF_Type *base, * * \param txBuffer * The pointer to the data to be transferred. If this pointer is a NULL, then the -* function does not enable the interrupt. This use case is typically used when -* the FIFO is handled outside the interrupt and is managed in either a +* function does not enable the interrupt. This use case is typically used when +* the FIFO is handled outside the interrupt and is managed in either a * polling-based code or a DMA. The user would handle the FIFO management in a * DMA or a polling-based code. -* +* * \note If the user provides a NULL pointer in this function and does not handle * the FIFO transaction, this could either stall or timeout the operation. -* The transfer statuses returned by \ref Cy_SMIF_GetTransferStatus are no longer +* The transfer statuses returned by \ref Cy_SMIF_GetTransferStatus are no longer * valid. * * \param size @@ -486,7 +486,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitData(SMIF_Type *base, #else /* The return variable */ cy_en_smif_status_t result = CY_SMIF_CMD_FIFO_FULL; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); CY_ASSERT_L2(CY_SMIF_BUF_SIZE_VALID(size)); @@ -511,7 +511,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitData(SMIF_Type *base, /* Enable the TR_TX_REQ interrupt */ Cy_SMIF_SetInterruptMask(base, - Cy_SMIF_GetInterruptMask(base) | + Cy_SMIF_GetInterruptMask(base) | SMIF_INTR_TR_TX_REQ_Msk); } result = CY_SMIF_SUCCESS; @@ -581,7 +581,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking(SMIF_Type *base, #else /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); @@ -631,8 +631,8 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking(SMIF_Type *base, * * This function implements the receive data phase in the memory command. The * data is received into the RX Data FIFO using the RX_COUNT command. This -* function sets up the interrupt to trigger on the RX Data FIFO level, and the -* data is fetched from the RX Data FIFO to the rxBuffer as it gets filled. This +* function sets up the interrupt to trigger on the RX Data FIFO level, and the +* data is fetched from the RX Data FIFO to the rxBuffer as it gets filled. This * function does not block until completion. The completion will trigger the call * back function. * @@ -651,14 +651,14 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking(SMIF_Type *base, * * \param rxBuffer * The pointer to the variable where the receive data is stored. If this pointer -* is a NULL, then the function does not enable the interrupt. This use case is -* typically used when the FIFO is handled outside the interrupt and is managed -* in either a polling-based code or a DMA. The user would handle the FIFO +* is a NULL, then the function does not enable the interrupt. This use case is +* typically used when the FIFO is handled outside the interrupt and is managed +* in either a polling-based code or a DMA. The user would handle the FIFO * management in a DMA or a polling-based code. * * \note If the user provides a NULL pointer in this function and does not handle * the FIFO transaction, this could either stall or timeout the operation. -* The transfer statuses returned by \ref Cy_SMIF_GetTransferStatus are no longer +* The transfer statuses returned by \ref Cy_SMIF_GetTransferStatus are no longer * valid. * * \param size @@ -680,7 +680,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking(SMIF_Type *base, * - \ref CY_SMIF_CMD_FIFO_FULL * - \ref CY_SMIF_BAD_PARAM * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * *******************************************************************************/ cy_en_smif_status_t Cy_SMIF_ReceiveData(SMIF_Type *base, @@ -701,7 +701,7 @@ cy_en_smif_status_t Cy_SMIF_ReceiveData(SMIF_Type *base, #else /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); @@ -784,7 +784,7 @@ cy_en_smif_status_t Cy_SMIF_ReceiveData(SMIF_Type *base, * - \ref CY_SMIF_EXCEED_TIMEOUT * - \ref CY_SMIF_BAD_PARAM * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * *******************************************************************************/ cy_en_smif_status_t Cy_SMIF_ReceiveDataBlocking(SMIF_Type *base, @@ -803,7 +803,7 @@ cy_en_smif_status_t Cy_SMIF_ReceiveDataBlocking(SMIF_Type *base, #else /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); @@ -877,7 +877,7 @@ cy_en_smif_status_t Cy_SMIF_SendDummyCycles(SMIF_Type *base, #else /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + if (cycles > 0U) { result = CY_SMIF_CMD_FIFO_FULL; @@ -909,7 +909,7 @@ cy_en_smif_status_t Cy_SMIF_SendDummyCycles(SMIF_Type *base, * is only valid if the functions passed a non-NULL buffer to transmit or * receive respectively. If the pointer passed to \ref Cy_SMIF_ReceiveData() * or \ref Cy_SMIF_TransmitData() is a NULL, then the code/DMA outside this -* driver will take care of the transfer and the Cy_GetTxfrStatus() will return +* driver will take care of the transfer and the Cy_GetTxfrStatus() will return * an erroneous result. * * \param base @@ -973,7 +973,7 @@ void Cy_SMIF_Enable(SMIF_Type *base, cy_stc_smif_context_t *context) * transmission. This function sets up the slave lines for the rest of the * command structure. The \ref Cy_SMIF_TransmitCommand_Ext is called before \ref * Cy_SMIF_TransmitData_Ext or \ref Cy_SMIF_ReceiveData_Ext is called. When enabled, the -* completeTxfr parameter in the function will de-assert the slave select line at +* completeTxfr parameter in the function will de-assert the slave select line at * the end of the function execution. * * \note This function blocks until all the command and associated parameters @@ -1104,7 +1104,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitCommand_Ext(SMIF_Type *base, _VAL2FLD(CY_SMIF_CMD_MMIO_FIFO_WR_TXDATA_BYTE_1, (uint8_t)(cmd & 0x00FFU)) | _VAL2FLD(CY_SMIF_CMD_MMIO_FIFO_WR_TXDATA_BYTE_2, 0U) | _VAL2FLD(CY_SMIF_CMD_MMIO_FIFO_WR_LAST_BYTE, - ((0UL == paramSize) ? completeTxfr : 0UL)) ; + ((0UL == paramSize) ? completeTxfr : 0UL)) ; } } else @@ -1201,14 +1201,14 @@ cy_en_smif_status_t Cy_SMIF_TransmitCommand_Ext(SMIF_Type *base, * * \param txBuffer * The pointer to the data to be transferred. If this pointer is a NULL, then the -* function does not enable the interrupt. This use case is typically used when -* the FIFO is handled outside the interrupt and is managed in either a +* function does not enable the interrupt. This use case is typically used when +* the FIFO is handled outside the interrupt and is managed in either a * polling-based code or a DMA. The user would handle the FIFO management in a * DMA or a polling-based code. -* +* * \note If the user provides a NULL pointer in this function and does not handle * the FIFO transaction, this could either stall or timeout the operation. -* The transfer statuses returned by \ref Cy_SMIF_GetTransferStatus are no longer +* The transfer statuses returned by \ref Cy_SMIF_GetTransferStatus are no longer * valid. * * \param size @@ -1250,7 +1250,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitData_Ext(SMIF_Type *base, #if ((CY_IP_MXSMIF_VERSION==2) || (CY_IP_MXSMIF_VERSION==3)) uint32_t temp = 0; #endif - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); CY_ASSERT_L2(CY_SMIF_BUF_SIZE_VALID(size)); @@ -1300,7 +1300,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitData_Ext(SMIF_Type *base, /* Enable the TR_TX_REQ interrupt */ Cy_SMIF_SetInterruptMask(base, - Cy_SMIF_GetInterruptMask(base) | + Cy_SMIF_GetInterruptMask(base) | SMIF_INTR_TR_TX_REQ_Msk); } result = CY_SMIF_SUCCESS; @@ -1378,7 +1378,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking_Ext(SMIF_Type *base, #if ((CY_IP_MXSMIF_VERSION==2) || (CY_IP_MXSMIF_VERSION==3)) uint32_t temp = 0; #endif - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); @@ -1457,8 +1457,8 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking_Ext(SMIF_Type *base, * * This function implements the receive data phase in the memory command. The * data is received into the RX Data FIFO using the RX_COUNT command. This -* function sets up the interrupt to trigger on the RX Data FIFO level, and the -* data is fetched from the RX Data FIFO to the rxBuffer as it gets filled. This +* function sets up the interrupt to trigger on the RX Data FIFO level, and the +* data is fetched from the RX Data FIFO to the rxBuffer as it gets filled. This * function does not block until completion. The completion will trigger the call * back function. * @@ -1477,14 +1477,14 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking_Ext(SMIF_Type *base, * * \param rxBuffer * The pointer to the variable where the receive data is stored. If this pointer -* is a NULL, then the function does not enable the interrupt. This use case is -* typically used when the FIFO is handled outside the interrupt and is managed -* in either a polling-based code or a DMA. The user would handle the FIFO +* is a NULL, then the function does not enable the interrupt. This use case is +* typically used when the FIFO is handled outside the interrupt and is managed +* in either a polling-based code or a DMA. The user would handle the FIFO * management in a DMA or a polling-based code. * * \note If the user provides a NULL pointer in this function and does not handle * the FIFO transaction, this could either stall or timeout the operation. -* The transfer statuses returned by \ref Cy_SMIF_GetTransferStatus are no longer +* The transfer statuses returned by \ref Cy_SMIF_GetTransferStatus are no longer * valid. * * \param size @@ -1509,7 +1509,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking_Ext(SMIF_Type *base, * - \ref CY_SMIF_CMD_FIFO_FULL * - \ref CY_SMIF_BAD_PARAM * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * * \note * This API is available for CAT1B, CAT1C and CAT1D devices. @@ -1635,7 +1635,7 @@ cy_en_smif_status_t Cy_SMIF_ReceiveData_Ext(SMIF_Type *base, * - \ref CY_SMIF_EXCEED_TIMEOUT * - \ref CY_SMIF_BAD_PARAM * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * * \note * This API is available for CAT1B, CAT1C and CAT1D devices. @@ -1691,7 +1691,7 @@ cy_en_smif_status_t Cy_SMIF_ReceiveDataBlocking_Ext(SMIF_Type *base, _VAL2FLD(CY_SMIF_CMD_MMIO_FIFO_WR_RX_COUNT, (rxUnitNum - 1UL)) | _VAL2FLD(CY_SMIF_CMD_MMIO_FIFO_WR_DATA_RATE, (uint32_t) dataRate) | _VAL2FLD(CY_SMIF_CMD_MMIO_FIFO_WR_LAST_BYTE, 1U); - + result = CY_SMIF_SUCCESS; if (NULL != rxBuffer) @@ -2007,7 +2007,7 @@ cy_en_smif_status_t Cy_SMIF_SetCryptoDisable(SMIF_Type *base, cy_en_smif_slave_s * - \ref CY_SMIF_EXCEED_TIMEOUT * - \ref CY_SMIF_BAD_PARAM * -* \funcusage +* \funcusage * \snippet smif/snippet/main.c snippet_Cy_SMIF_Encrypt * *******************************************************************************/ @@ -2020,7 +2020,7 @@ cy_en_smif_status_t Cy_SMIF_Encrypt(SMIF_Type *base, uint32_t bufIndex; cy_en_smif_status_t status = CY_SMIF_BAD_PARAM; uint32_t timeoutUnits = context->timeout; - + CY_ASSERT_L2(size > 0U); if((NULL != data) && ((address & (~CY_SMIF_CRYPTO_ADDR_MASK)) == 0UL) ) @@ -2039,15 +2039,15 @@ cy_en_smif_status_t Cy_SMIF_Encrypt(SMIF_Type *base, /* Start the encryption */ SMIF_CRYPTO_CMD(base) &= ~SMIF_CRYPTO_CMD_START_Msk; - SMIF_CRYPTO_CMD(base) = (uint32_t)(_VAL2FLD(SMIF_CRYPTO_CMD_START, + SMIF_CRYPTO_CMD(base) = (uint32_t)(_VAL2FLD(SMIF_CRYPTO_CMD_START, CY_SMIF_CRYPTO_START)); - while((CY_SMIF_CRYPTO_COMPLETED != _FLD2VAL(SMIF_CRYPTO_CMD_START, + while((CY_SMIF_CRYPTO_COMPLETED != _FLD2VAL(SMIF_CRYPTO_CMD_START, SMIF_CRYPTO_CMD(base))) && (CY_SMIF_EXCEED_TIMEOUT != status)) { - /* Wait until the encryption is completed and check the - * timeout + /* Wait until the encryption is completed and check the + * timeout */ status = Cy_SMIF_TimeoutRun(&timeoutUnits); } @@ -2057,13 +2057,13 @@ cy_en_smif_status_t Cy_SMIF_Encrypt(SMIF_Type *base, break; } - Cy_SMIF_UnPackByteArray(SMIF_CRYPTO_OUTPUT0(base), + Cy_SMIF_UnPackByteArray(SMIF_CRYPTO_OUTPUT0(base), &cryptoOut[CY_SMIF_CRYPTO_FIRST_WORD] , true); - Cy_SMIF_UnPackByteArray(SMIF_CRYPTO_OUTPUT1(base), + Cy_SMIF_UnPackByteArray(SMIF_CRYPTO_OUTPUT1(base), &cryptoOut[CY_SMIF_CRYPTO_SECOND_WORD], true); - Cy_SMIF_UnPackByteArray(SMIF_CRYPTO_OUTPUT2(base), + Cy_SMIF_UnPackByteArray(SMIF_CRYPTO_OUTPUT2(base), &cryptoOut[CY_SMIF_CRYPTO_THIRD_WORD] , true); - Cy_SMIF_UnPackByteArray(SMIF_CRYPTO_OUTPUT3(base), + Cy_SMIF_UnPackByteArray(SMIF_CRYPTO_OUTPUT3(base), &cryptoOut[CY_SMIF_CRYPTO_FOURTH_WORD], true); for(outIndex = 0U; outIndex < CY_SMIF_AES128_BYTES; outIndex++) @@ -2093,7 +2093,7 @@ cy_en_smif_status_t Cy_SMIF_Encrypt(SMIF_Type *base, * - \ref CY_SMIF_BAD_PARAM * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_CacheEnable(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_CacheEnable(SMIF_Type *base, cy_en_smif_cache_t cacheType) { cy_en_smif_status_t status = CY_SMIF_SUCCESS; @@ -2113,7 +2113,7 @@ cy_en_smif_status_t Cy_SMIF_CacheEnable(SMIF_Type *base, /* A user error */ status = CY_SMIF_BAD_PARAM; break; - } + } return (status); } @@ -2135,7 +2135,7 @@ cy_en_smif_status_t Cy_SMIF_CacheEnable(SMIF_Type *base, * - \ref CY_SMIF_BAD_PARAM * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_CacheDisable(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_CacheDisable(SMIF_Type *base, cy_en_smif_cache_t cacheType) { cy_en_smif_status_t status = CY_SMIF_SUCCESS; @@ -2221,7 +2221,7 @@ cy_en_smif_status_t Cy_SMIF_CachePrefetchingEnable(SMIF_Type *base, * - \ref CY_SMIF_BAD_PARAM * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_CachePrefetchingDisable(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_CachePrefetchingDisable(SMIF_Type *base, cy_en_smif_cache_t cacheType) { cy_en_smif_status_t status = CY_SMIF_SUCCESS; @@ -2264,7 +2264,7 @@ cy_en_smif_status_t Cy_SMIF_CachePrefetchingDisable(SMIF_Type *base, * - \ref CY_SMIF_BAD_PARAM * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_CacheInvalidate(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_CacheInvalidate(SMIF_Type *base, cy_en_smif_cache_t cacheType) { cy_en_smif_status_t status = CY_SMIF_SUCCESS; @@ -2413,7 +2413,7 @@ cy_en_smif_status_t Cy_SMIF_Bridge_SetSimpleRemapRegion(SMIF_Base_Type *base, co { result = CY_SMIF_BAD_PARAM; } - + /* Parameter Checking */ if ((result == CY_SMIF_SUCCESS) || (region_info->regionIdx >= CY_SMIF_BRIDGE_REMAP_REGION_COUNT) || @@ -2423,7 +2423,7 @@ cy_en_smif_status_t Cy_SMIF_Bridge_SetSimpleRemapRegion(SMIF_Base_Type *base, co result = CY_SMIF_BAD_PARAM; } - /* Check the input address */ + /* Check the input address */ if ((region_info->xipAddr & SMIF_SMIF0_XIP_MASK) == SMIF_SMIF0_XIP_ADDR) { xipSpace = CY_EN_BRIDGE_SMIF0_XIP_SPACE; @@ -2436,7 +2436,7 @@ cy_en_smif_status_t Cy_SMIF_Bridge_SetSimpleRemapRegion(SMIF_Base_Type *base, co { result = CY_SMIF_BAD_PARAM; } - + /* Check the remap address */ if ((region_info->phyAddr & SMIF_SMIF0_XIP_MASK) == SMIF_SMIF0_XIP_ADDR) { @@ -2457,7 +2457,7 @@ cy_en_smif_status_t Cy_SMIF_Bridge_SetSimpleRemapRegion(SMIF_Base_Type *base, co _VAL2FLD(SMIF_SMIF_BRIDGE_SMIF_REMAP_REGION_CTL_SMIF_SPACE, (uint32_t)xipSpace)); SMIF_REMAPREGION_ADDR(base, region_info->regionIdx) = _VAL2FLD(SMIF_SMIF_BRIDGE_SMIF_REMAP_REGION_CTL_USE_SMIF, (uint32_t)region_info->xipAddr); SMIF_REMAPREGION_MASK(base, region_info->regionIdx) = _VAL2FLD(SMIF_SMIF_BRIDGE_SMIF_REMAP_REGION_CTL_USE_SMIF, (uint32_t)region_info->regionSize); - + if (remapDest == CY_EN_BRIDGE_REMAP_TYPE_TO_SMIF0) { SMIF_REMAPREGION_SMIF0_REMAP(base, region_info->regionIdx) = region_info->phyAddr; @@ -2496,13 +2496,13 @@ cy_en_smif_status_t Cy_SMIF_Bridge_SetInterleavingRemapRegion(SMIF_Base_Type *ba cy_en_smif_bridge_xip_space_t phy0Space = CY_EN_BRIDGE_SMIF0_XIP_SPACE; cy_en_smif_bridge_xip_space_t phy1Space = CY_EN_BRIDGE_SMIF0_XIP_SPACE; cy_en_smif_status_t result = CY_SMIF_SUCCESS; - + /* Status Checking */ if(Cy_SMIF_IsBridgeOn(base) == true) { result = CY_SMIF_BAD_PARAM; } - + /* Parameter Checking */ if ((result == CY_SMIF_SUCCESS) || (region_info->regionIdx >= CY_SMIF_BRIDGE_REMAP_REGION_COUNT) || @@ -2512,8 +2512,8 @@ cy_en_smif_status_t Cy_SMIF_Bridge_SetInterleavingRemapRegion(SMIF_Base_Type *ba { result = CY_SMIF_BAD_PARAM; } - - /* Check the input address */ + + /* Check the input address */ if ((region_info->xipAddr & SMIF_SMIF0_XIP_MASK) == SMIF_SMIF0_XIP_ADDR) { xipSpace = CY_EN_BRIDGE_SMIF0_XIP_SPACE; @@ -2526,7 +2526,7 @@ cy_en_smif_status_t Cy_SMIF_Bridge_SetInterleavingRemapRegion(SMIF_Base_Type *ba { result = CY_SMIF_BAD_PARAM; } - + /* Check the remap address */ if ((region_info->phyAddr0 & SMIF_SMIF0_XIP_MASK) == SMIF_SMIF0_XIP_ADDR) { @@ -2563,7 +2563,7 @@ cy_en_smif_status_t Cy_SMIF_Bridge_SetInterleavingRemapRegion(SMIF_Base_Type *ba SMIF_REMAPREGION_SMIF0_REMAP(base, region_info->regionIdx) = _VAL2FLD(SMIF_SMIF_BRIDGE_SMIF_REMAP_REGION_SMIF0_REMAP_SMIF0_REMAP, (uint32_t)region_info->phyAddr0); SMIF_REMAPREGION_SMIF1_REMAP(base, region_info->regionIdx) = _VAL2FLD(SMIF_SMIF_BRIDGE_SMIF_REMAP_REGION_SMIF0_REMAP_SMIF0_REMAP, (uint32_t)region_info->phyAddr1); } - + return result; } @@ -2640,7 +2640,7 @@ cy_en_smif_status_t Cy_SMIF_Bridge_DeactivateRemapRegion(SMIF_Base_Type *base, u cy_en_syspm_status_t Cy_SMIF_DeepSleepCallback(cy_stc_syspm_callback_params_t *callbackParams, cy_en_syspm_callback_mode_t mode) { cy_en_syspm_status_t retStatus = CY_SYSPM_SUCCESS; - + CY_ASSERT_L1(NULL != callbackParams); SMIF_Type *locBase = (SMIF_Type *) callbackParams->base; @@ -2749,7 +2749,7 @@ cy_en_syspm_status_t Cy_SMIF_HibernateCallback(cy_stc_syspm_callback_params_t *c cy_en_syspm_status_t retStatus = CY_SYSPM_SUCCESS; CY_ASSERT_L1(NULL != callbackParams); - + SMIF_Type *locBase = (SMIF_Type *) callbackParams->base; cy_stc_smif_context_t *locContext = (cy_stc_smif_context_t *) callbackParams->context; @@ -2757,7 +2757,7 @@ cy_en_syspm_status_t Cy_SMIF_HibernateCallback(cy_stc_syspm_callback_params_t *c { case CY_SYSPM_CHECK_READY: { - /* Check if API is not busy executing transfer operation + /* Check if API is not busy executing transfer operation * If SPI bus is not busy, all data elements are transferred on * the bus from the TX FIFO and shifter and the RX FIFIOs is * empty - the SPI is ready enter Deep Sleep. diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif_memslot.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif_memslot.c index ca074f8964..09a548ece9 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif_memslot.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif_memslot.c @@ -65,17 +65,17 @@ static cy_en_smif_status_t cy_smif_octalddrenable(SMIF_Type *base, * Note that this function performs SFDP on all the external memories whereas * \ref Cy_SMIF_MemSfdpDetect peforms it only on one memory that is specified * through the arguments. This function configures the SMIF device slot registers -* with the configuration from \ref cy_stc_smif_mem_config_t structure which is +* with the configuration from \ref cy_stc_smif_mem_config_t structure which is * a member of the \ref cy_stc_smif_block_config_t structure. If SFDP discovery * is enabled in the configuration strucutre through autoDetectSfdp field, * this function calls \ref Cy_SMIF_MemSfdpDetect function for each memory, * fills the structures with the discovered parameters, and configures the -* SMIF device slot registers accordingly. \ref Cy_SMIF_Init must have been +* SMIF device slot registers accordingly. \ref Cy_SMIF_Init must have been * called prior to calling this funciton. * The \ref cy_stc_smif_context_t context structure returned from \ref Cy_SMIF_Init * is passed as a parameter to this function. * -* \note 4-byte addressing mode is set when the memory device supports +* \note 4-byte addressing mode is set when the memory device supports * 3- or 4-byte addressing mode. * * \param base @@ -110,7 +110,7 @@ cy_en_smif_status_t Cy_SMIF_MemInit(SMIF_Type *base, uint32_t sfdpRes =(uint32_t)CY_SMIF_SUCCESS; uint32_t idx; - if ((NULL != base) && (NULL != blockConfig) && (NULL != blockConfig->memConfig) + if ((NULL != base) && (NULL != blockConfig) && (NULL != blockConfig->memConfig) && (NULL != context) && (0U != blockConfig->memCount)) { uint32_t size = blockConfig->memCount; @@ -126,7 +126,7 @@ cy_en_smif_status_t Cy_SMIF_MemInit(SMIF_Type *base, CY_ASSERT_L3(CY_SMIF_SLAVE_SEL_VALID(memCfg->slaveSelect)); CY_ASSERT_L3(CY_SMIF_DATA_SEL_VALID(memCfg->dataSelect)); CY_ASSERT_L1(NULL != memCfg->deviceCfg); - + device = Cy_SMIF_GetDeviceBySlot(base, memCfg->slaveSelect); if (NULL != device) { @@ -159,9 +159,9 @@ cy_en_smif_status_t Cy_SMIF_MemInit(SMIF_Type *base, /* Check valid parameters for XIP */ CY_ASSERT_L3(MEM_ADDR_VALID( memCfg->baseAddress, memCfg->memMappedSize)); CY_ASSERT_L3(MEM_MAPPED_SIZE_VALID( memCfg->memMappedSize)); - + XipRegInit(device, memCfg); - + #if(CY_IP_MXSMIF_VERSION>=2) context->preXIPDataRate = memCfg->deviceCfg->readCmd->dataRate; #endif /* CY_IP_MXSMIF_VERSION */ @@ -262,9 +262,9 @@ cy_en_smif_status_t Cy_SMIF_MemCmdWriteEnable(SMIF_Type *base, { /* The memory Write Enable */ cy_stc_smif_mem_cmd_t* writeEn = memDevice->deviceCfg->writeEnCmd; - + cy_en_smif_status_t result = CY_SMIF_CMD_NOT_FOUND; - + if(NULL != writeEn) { #if (CY_IP_MXSMIF_VERSION>=2) @@ -331,7 +331,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdWriteDisable(SMIF_Type *base, cy_stc_smif_mem_cmd_t* writeDis = memDevice->deviceCfg->writeDisCmd; cy_en_smif_status_t result = CY_SMIF_CMD_NOT_FOUND; - + if(NULL != writeDis) { #if (CY_IP_MXSMIF_VERSION>=2) @@ -359,7 +359,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdWriteDisable(SMIF_Type *base, context); #endif } - + return result; } @@ -391,7 +391,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdWriteDisable(SMIF_Type *base, * - True - The device is busy or a timeout occurs. * - False - The device is not busy. * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * *******************************************************************************/ bool Cy_SMIF_MemIsBusy(SMIF_Type *base, cy_stc_smif_mem_config_t const *memDevice, @@ -487,7 +487,7 @@ bool Cy_SMIF_MemIsBusy(SMIF_Type *base, cy_stc_smif_mem_config_t const *memDevic * - \ref CY_SMIF_BAD_PARAM * - \ref CY_SMIF_CMD_NOT_FOUND * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * *******************************************************************************/ cy_en_smif_status_t Cy_SMIF_MemQuadEnable(SMIF_Type *base, @@ -495,7 +495,7 @@ cy_en_smif_status_t Cy_SMIF_MemQuadEnable(SMIF_Type *base, cy_stc_smif_context_t const *context) { cy_en_smif_status_t result= CY_SMIF_CMD_NOT_FOUND; - uint8_t statusReg[CY_SMIF_QE_BIT_STATUS_REG2_T1] = {0U}; + uint8_t statusReg[CY_SMIF_QE_BIT_STATUS_REG2_T1] = {0U}; cy_stc_smif_mem_device_cfg_t* device = memDevice->deviceCfg; /* Check that command exists */ @@ -781,7 +781,7 @@ static cy_en_smif_status_t cy_smif_octalddrenable(SMIF_Type *base, * - \ref CY_SMIF_EXCEED_TIMEOUT * - \ref CY_SMIF_CMD_NOT_FOUND * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * *******************************************************************************/ cy_en_smif_status_t Cy_SMIF_MemCmdReadStatus(SMIF_Type *base, @@ -795,7 +795,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdReadStatus(SMIF_Type *base, /* Read the memory status register */ result = Cy_SMIF_TransmitCommand( base, command, CY_SMIF_WIDTH_SINGLE, NULL, CY_SMIF_CMD_WITHOUT_PARAM, - CY_SMIF_WIDTH_NA, memDevice->slaveSelect, + CY_SMIF_WIDTH_NA, memDevice->slaveSelect, CY_SMIF_TX_NOT_LAST_BYTE, context); if (CY_SMIF_SUCCESS == result) @@ -1005,7 +1005,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdSectorErase(SMIF_Type *base, * Function Name: Cy_SMIF_MemCmdProgram ****************************************************************************//** * -* This function performs the Program operation. +* This function performs the Program operation. * * \note This function uses the Cy_SMIF_TransmitCommand() API. * The Cy_SMIF_TransmitCommand() API works in the blocking mode. In the dual quad mode, @@ -1023,11 +1023,11 @@ cy_en_smif_status_t Cy_SMIF_MemCmdSectorErase(SMIF_Type *base, * \param writeBuff * The pointer to the data to program. If this pointer is a NULL, then the * function does not enable the interrupt. This use case is typically used when -* the FIFO is handled outside the interrupt and is managed in either a -* polling-based code or a DMA. The user would handle the FIFO management -* in a DMA or a polling-based code. -* If the user provides a NULL pointer in this function and does not handle -* the FIFO transaction, this could either stall or timeout the operation +* the FIFO is handled outside the interrupt and is managed in either a +* polling-based code or a DMA. The user would handle the FIFO management +* in a DMA or a polling-based code. +* If the user provides a NULL pointer in this function and does not handle +* the FIFO transaction, this could either stall or timeout the operation * \ref Cy_SMIF_TransmitData(). * * \param size @@ -1065,7 +1065,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdProgram(SMIF_Type *base, cy_stc_smif_mem_device_cfg_t *device = memDevice->deviceCfg; cy_stc_smif_mem_cmd_t *cmdProg = device->programCmd; - + if(NULL == cmdProg) { result = CY_SMIF_CMD_NOT_FOUND; @@ -1168,13 +1168,13 @@ cy_en_smif_status_t Cy_SMIF_MemCmdProgram(SMIF_Type *base, * The address to read. * * \param readBuff -* The pointer to the variable where the read data is stored. If this pointer is -* a NULL, then the function does not enable the interrupt. This use case is +* The pointer to the variable where the read data is stored. If this pointer is +* a NULL, then the function does not enable the interrupt. This use case is * typically used when the FIFO is handled outside the interrupt and is managed * in either a polling-based code or a DMA. The user would handle the FIFO -* management in a DMA or a polling-based code. -* If the user provides a NULL pointer in this function and does not handle -* the FIFO transaction, this could either stall or timeout the operation +* management in a DMA or a polling-based code. +* If the user provides a NULL pointer in this function and does not handle +* the FIFO transaction, this could either stall or timeout the operation * \ref Cy_SMIF_TransmitData(). * * \param size @@ -1197,7 +1197,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdProgram(SMIF_Type *base, * - \ref CY_SMIF_EXCEED_TIMEOUT * - \ref CY_SMIF_CMD_NOT_FOUND * -* \note Check \ref group_smif_usage_rules for any usage restriction +* \note Check \ref group_smif_usage_rules for any usage restriction * *******************************************************************************/ cy_en_smif_status_t Cy_SMIF_MemCmdRead(SMIF_Type *base, @@ -1225,7 +1225,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdRead(SMIF_Type *base, { slaveSelected = (0U == memDevice->dualQuadSlots)? memDevice->slaveSelect : (cy_en_smif_slave_select_t)memDevice->dualQuadSlots; - + result = Cy_SMIF_TransmitCommand( base, (uint8_t)cmdRead->command, cmdRead->cmdWidth, addr, device->numOfAddrBytes, cmdRead->addrWidth, slaveSelected, CY_SMIF_TX_NOT_LAST_BYTE, @@ -1268,7 +1268,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdRead(SMIF_Type *base, * The memory device configuration. * * \param regionInfo -* Places a hybrid region configuration structure that contains the region +* Places a hybrid region configuration structure that contains the region * specific parameters. See \ref cy_stc_smif_hybrid_region_info_t for * reference. * @@ -1280,7 +1280,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdRead(SMIF_Type *base, * - \ref CY_SMIF_NOT_HYBRID_MEM * - \ref CY_SMIF_BAD_PARAM * -* \funcusage +* \funcusage * \snippet smif/snippet/main.c snippet_Cy_SMIF_MemLocateHybridRegion * *******************************************************************************/ @@ -1352,7 +1352,7 @@ void Cy_SMIF_SetReadyPollingDelay(uint16_t pollTimeoutUs, ****************************************************************************//** * * Polls the memory device to check whether it is ready to accept new commands or -* not until either it is ready or the retries have exceeded the limit. +* not until either it is ready or the retries have exceeded the limit. * This is a blocking function, it will block the execution flow until * the command transmission is completed. * @@ -1363,7 +1363,7 @@ void Cy_SMIF_SetReadyPollingDelay(uint16_t pollTimeoutUs, * The memory device configuration. * * \param timeoutUs -* The timeout value in microseconds to apply while polling the memory. +* The timeout value in microseconds to apply while polling the memory. * * \param context * This is the pointer to the context structure \ref cy_stc_smif_context_t @@ -1375,19 +1375,19 @@ void Cy_SMIF_SetReadyPollingDelay(uint16_t pollTimeoutUs, * \ref CY_SMIF_SUCCESS - Memory is ready to accept new commands. * \ref CY_SMIF_EXCEED_TIMEOUT - Memory is busy. * -* \funcusage +* \funcusage * \snippet smif/snippet/main.c snippet_Cy_SMIF_MemIsReady * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_MemIsReady(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, +cy_en_smif_status_t Cy_SMIF_MemIsReady(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, uint32_t timeoutUs, cy_stc_smif_context_t const *context) -{ +{ bool isBusy = Cy_SMIF_Memslot_IsBusy(base, (cy_stc_smif_mem_config_t* )memConfig, context); CY_ASSERT_L1(NULL != context); if (context->memReadyPollDealy > 0U) - { + { if (isBusy) { uint16_t pollingDelay = (timeoutUs > context->memReadyPollDealy) ? context->memReadyPollDealy : (uint16_t)timeoutUs; @@ -1414,20 +1414,20 @@ cy_en_smif_status_t Cy_SMIF_MemIsReady(SMIF_Type *base, cy_stc_smif_mem_config_t uint32_t delayMs = 0UL; uint32_t timeoutSlice = 0UL; uint16_t delayUs = 0U; - + /* Calculate the slice of time to split the timeoutUs delay into TIMEOUT_SLICE_DIV times */ - timeoutSlice = timeoutUs / TIMEOUT_SLICE_DIV; - + timeoutSlice = timeoutUs / TIMEOUT_SLICE_DIV; + /* Reduce the slice if needed to avoid too big idle period between checking the busy state */ if (timeoutSlice > TIMEOUT_SLICE_MAX) { timeoutSlice = TIMEOUT_SLICE_MAX; } - if(timeoutSlice == 0UL) + if(timeoutSlice == 0UL) { timeoutSlice = 1UL; } - + do { delayMs = timeoutSlice / 1000UL; @@ -1446,9 +1446,9 @@ cy_en_smif_status_t Cy_SMIF_MemIsReady(SMIF_Type *base, cy_stc_smif_mem_config_t } isBusy = Cy_SMIF_Memslot_IsBusy(base, (cy_stc_smif_mem_config_t* )memConfig, context); - + timeoutUs = (timeoutUs > timeoutSlice) ? (timeoutUs - timeoutSlice) : 0UL; - + } while(isBusy && (timeoutUs > 0UL)); } } @@ -1485,7 +1485,7 @@ cy_en_smif_status_t Cy_SMIF_MemIsReady(SMIF_Type *base, cy_stc_smif_mem_config_t * * \return The status of the operation. See \ref cy_en_smif_status_t. * -* \funcusage +* \funcusage * \snippet smif/snippet/main.c snippet_Cy_SMIF_MemIsQuadEnabled * *******************************************************************************/ @@ -1527,7 +1527,7 @@ cy_en_smif_status_t Cy_SMIF_MemIsQuadEnabled(SMIF_Type *base, cy_stc_smif_mem_co * The memory device configuration. * * \param timeoutUs -* The timeout value in microseconds to apply while polling the memory. +* The timeout value in microseconds to apply while polling the memory. * * \param context * This is the pointer to the context structure \ref cy_stc_smif_context_t @@ -1537,11 +1537,11 @@ cy_en_smif_status_t Cy_SMIF_MemIsQuadEnabled(SMIF_Type *base, cy_stc_smif_mem_co * * \return The status of the operation. See \ref cy_en_smif_status_t. * -* \funcusage +* \funcusage * See \ref Cy_SMIF_MemIsQuadEnabled usage. * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_MemEnableQuadMode(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, +cy_en_smif_status_t Cy_SMIF_MemEnableQuadMode(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, uint32_t timeoutUs, cy_stc_smif_context_t const *context) { cy_en_smif_status_t status; @@ -1597,12 +1597,12 @@ cy_en_smif_status_t Cy_SMIF_MemEnableQuadMode(SMIF_Type *base, cy_stc_smif_mem_c * * \return The status of the operation. See \ref cy_en_smif_status_t. * -* \funcusage +* \funcusage * \snippet smif/snippet/main.c snippet_Cy_SMIF_MemRead * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_MemRead(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, - uint32_t address, uint8_t rxBuffer[], +cy_en_smif_status_t Cy_SMIF_MemRead(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, + uint32_t address, uint8_t rxBuffer[], uint32_t length, cy_stc_smif_context_t const *context) { cy_en_smif_status_t status = CY_SMIF_BAD_PARAM; @@ -1718,9 +1718,9 @@ cy_en_smif_status_t Cy_SMIF_MemRead(SMIF_Type *base, cy_stc_smif_mem_config_t co if(CY_SMIF_SUCCESS != status) { - break; + break; } - + /* Recalculate the next rxBuffer offset */ length -= chunk; address += chunk; @@ -1768,18 +1768,18 @@ cy_en_smif_status_t Cy_SMIF_MemRead(SMIF_Type *base, cy_stc_smif_mem_config_t co * * \return The status of the operation. See \ref cy_en_smif_status_t. * -* \funcusage +* \funcusage * \snippet smif/snippet/main.c snippet_Cy_SMIF_MemWrite * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, - uint32_t address, uint8_t const txBuffer[], +cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t const *memConfig, + uint32_t address, uint8_t const txBuffer[], uint32_t length, cy_stc_smif_context_t const *context) { cy_en_smif_status_t status = CY_SMIF_BAD_PARAM; uint32_t offset = 0UL; uint32_t chunk = 0UL; - uint32_t pageSize; + uint32_t pageSize; uint8_t addrArray[CY_SMIF_FOUR_BYTES_ADDR] = {0U}; cy_stc_smif_mem_cmd_t *cmdProgram; @@ -1802,12 +1802,12 @@ cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t c while (length > 0UL) { /* Get the number of bytes which can be written during one operation */ - offset = address % pageSize; + offset = address % pageSize; chunk = ((offset + length) < pageSize) ? length : (pageSize - offset); /* The Write Enable bit may be cleared by the memory after every successful * operation of write or erase operations. Therefore, must be set for - * every loop. + * every loop. */ status = Cy_SMIF_MemCmdWriteEnable(base, memConfig, context); @@ -1852,7 +1852,7 @@ cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t c cmdProgram->dataWidth, context); } - + if(CY_SMIF_SUCCESS == status) { /* Check if the memory has completed the write operation. ProgramTime is in microseconds */ @@ -1862,7 +1862,7 @@ cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t c if(CY_SMIF_SUCCESS != status) { - break; + break; } /* Recalculate the next rxBuffer offset */ @@ -1896,7 +1896,7 @@ cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t c * The memory device configuration. * * \param address -* The address of the block to be erased. The address should be aligned with +* The address of the block to be erased. The address should be aligned with * the start address of the sector. * * \param length @@ -1915,7 +1915,7 @@ cy_en_smif_status_t Cy_SMIF_MemWrite(SMIF_Type *base, cy_stc_smif_mem_config_t c * \note Memories like hybrid have sectors of different sizes. \n * Check the adress and length parameters before calling this function. * -* \funcusage +* \funcusage * \snippet smif/snippet/main.c snippet_Cy_SMIF_MemEraseSector * *******************************************************************************/ @@ -2089,7 +2089,7 @@ cy_en_smif_status_t Cy_SMIF_MemEraseSector(SMIF_Type *base, cy_stc_smif_mem_conf * * \return The status of the operation. See \ref cy_en_smif_status_t. * -* \funcusage +* \funcusage * \snippet smif/snippet/main.c snippet_Cy_SMIF_MemEraseChip * *******************************************************************************/ @@ -2102,7 +2102,7 @@ cy_en_smif_status_t Cy_SMIF_MemEraseChip(SMIF_Type *base, cy_stc_smif_mem_config /* The Write Enable bit may be cleared by the memory after every successful * operation of write/erase operations. Therefore, it must be set for - * every loop + * every loop */ status = Cy_SMIF_MemCmdWriteEnable(base, memConfig, context); @@ -2110,12 +2110,12 @@ cy_en_smif_status_t Cy_SMIF_MemEraseChip(SMIF_Type *base, cy_stc_smif_mem_config { /* Send the command to erase the entire chip */ status = Cy_SMIF_MemCmdChipErase(base, memConfig, context); - + if(CY_SMIF_SUCCESS == status) { /* Wait until the erase operation is completed or a timeout occurs. chipEraseTime is in milliseconds */ - status = Cy_SMIF_MemIsReady(base, memConfig, - (memConfig->deviceCfg->chipEraseTime * ONE_MILLI_IN_MICRO), context); + status = Cy_SMIF_MemIsReady(base, memConfig, + (memConfig->deviceCfg->chipEraseTime * ONE_MILLI_IN_MICRO), context); } } diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif_sfdp.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif_sfdp.c index a090cb0975..8b5ccdbfbd 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif_sfdp.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_smif_sfdp.c @@ -2128,7 +2128,7 @@ static cy_en_smif_status_t SfdpPopulateRegionInfo(SMIF_Type *base, /* Get the address length for configuration detection */ addrCode = _FLD2VAL(CY_SMIF_SFDP_SECTOR_MAP_ADDR_BYTES, sectorMapBuff[currTableIdx + CY_SMIF_SFDP_SECTOR_MAP_ADDR_LEN_OFFSET]); - switch(addrCode) + switch(addrCode) { case CY_SMIF_SFDP_THREE_BYTES_ADDR_CODE: /* No address cycle */ @@ -2455,7 +2455,7 @@ static cy_en_smif_protocol_mode_t GetOctalDDRParams(SMIF_Type *base, { ValueToByteArray(device->latencyCyclesRegAddr, cfr_reg_address, 0, 4U); cfr_reg_address[4] = cfr_value; - + result = Cy_SMIF_MemCmdWriteRegister(base, slaveSelect, device->writeEnCmd, diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sysclk_v2.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sysclk_v2.c index a44c65f917..47483b3de0 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sysclk_v2.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sysclk_v2.c @@ -974,7 +974,7 @@ void Cy_SysClk_ClkMfDisable(void) void Cy_SysClk_ClkMfSetDivider(uint32_t divider) { if (CY_SYSCLK_IS_MF_DIVIDER_VALID(divider)) - { + { if (!Cy_SysClk_ClkMfIsEnabled()) { CY_REG32_CLR_SET(SRSS_CLK_MF_SELECT, SRSS_CLK_MF_SELECT_MFCLK_DIV, divider - 1UL); @@ -1020,7 +1020,7 @@ cy_en_clkmf_in_sources_t Cy_SysClk_ClkMfGetSource(void) cy_en_sysclk_status_t Cy_SysClk_WcoEnable(uint32_t timeoutus) { cy_en_sysclk_status_t retVal = CY_SYSCLK_TIMEOUT; - + /* Enable WCO */ #if defined (CY_IP_MXS28SRSS) BACKUP_WCO_CTL |= BACKUP_WCO_CTL_WCO_EN_Msk; @@ -1035,12 +1035,12 @@ cy_en_sysclk_status_t Cy_SysClk_WcoEnable(uint32_t timeoutus) { Cy_SysLib_DelayUs(1U); } - + if (0UL != timeoutus) { retVal = CY_SYSCLK_SUCCESS; } - + return (retVal); } @@ -1539,7 +1539,7 @@ cy_en_sysclk_status_t Cy_SysClk_EcoPrescaleConfigure(uint32_t enable, uint32_t f { SRSS_CLK_ECO_PRESCALE |= SRSS_CLK_ECO_PRESCALE_ECO_DIV_ENABLED_Msk; SRSS_CLK_ECO_PRESCALE = _VAL2FLD(SRSS_CLK_ECO_PRESCALE_ECO_FRAC_DIV, frac_div); - SRSS_CLK_ECO_PRESCALE = _VAL2FLD(SRSS_CLK_ECO_PRESCALE_ECO_INT_DIV, int_div); + SRSS_CLK_ECO_PRESCALE = _VAL2FLD(SRSS_CLK_ECO_PRESCALE_ECO_INT_DIV, int_div); retVal = CY_SYSCLK_SUCCESS; } } diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sysint_v2.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sysint_v2.c index 43fcd724d9..f5d1de4112 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sysint_v2.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_sysint_v2.c @@ -65,11 +65,11 @@ cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t* config, cy_israddres if(NULL != config) { CY_ASSERT_L3(CY_SYSINT_IS_PRIORITY_VALID(config->intrPriority)); - + NVIC_SetPriority(config->intrSrc, config->intrPriority); #ifdef CY_SECURE_WORLD if (SCB->VTOR == (uint32_t)__s_vector_table) -#else +#else if (SCB->VTOR == (uint32_t)__ns_vector_table_rw_ptr) #endif { @@ -80,7 +80,7 @@ cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t* config, cy_israddres { status = CY_SYSINT_BAD_PARAM; } - + return(status); } @@ -107,7 +107,7 @@ cy_israddress Cy_SysInt_SetVector(IRQn_Type IRQn, cy_israddress userIsr) #endif else { - /* vector table is always loaded to non secure SRAM, so there is no need to return + /* vector table is always loaded to non secure SRAM, so there is no need to return the non-secure ROM vector */ prevIsr = NULL; } @@ -119,7 +119,7 @@ cy_israddress Cy_SysInt_SetVector(IRQn_Type IRQn, cy_israddress userIsr) cy_israddress Cy_SysInt_GetVector(IRQn_Type IRQn) { cy_israddress currIsr; - + #ifdef CY_SECURE_WORLD /* Return the SRAM ISR address only if it was moved to __ramVectors */ if (SCB->VTOR == (uint32_t)__s_vector_table) @@ -131,7 +131,7 @@ cy_israddress Cy_SysInt_GetVector(IRQn_Type IRQn) { currIsr = (cy_israddress)__ns_vector_table_rw_ptr[CY_INT_IRQ_BASE + (uint32_t)IRQn]; } -#endif +#endif else { /* vector table is always loaded to non-secure SRAM, so there is no need to return diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_syslib.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_syslib.c index 7f182063cc..c58cbf8768 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_syslib.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_syslib.c @@ -225,7 +225,7 @@ void Cy_SysLib_ClearResetReason(void) */ SRSS_RES_CAUSE = 0xFFFFFFFFU; SRSS_RES_CAUSE2 = 0xFFFFFFFFU; - + if(0U != _FLD2VAL(SRSS_PWR_HIBERNATE_TOKEN, SRSS_PWR_HIBERNATE)) { /* Clears PWR_HIBERNATE token */ @@ -233,7 +233,7 @@ void Cy_SysLib_ClearResetReason(void) CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_PWR_HIBERNATE, SRSS_PWR_HIBERNATE_TOKEN, 0UL); #else SRSS_PWR_HIBERNATE &= ~SRSS_PWR_HIBERNATE_TOKEN_Msk; -#endif /* CY_CPU_CORTEX_M4 && defined (CY_DEVICE_SECURE) */ +#endif /* CY_CPU_CORTEX_M4 && defined (CY_DEVICE_SECURE) */ } } @@ -421,8 +421,8 @@ uint8_t Cy_SysLib_GetDeviceRevision(void) #ifdef CY_IP_M4CPUSS return ((SFLASH_SI_REVISION_ID == 0UL) ? CY_SYSLIB_DEVICE_REV_0A : SFLASH_SI_REVISION_ID); #else - return 0; -#endif + return 0; +#endif } uint16_t Cy_SysLib_GetDevice(void) @@ -431,7 +431,7 @@ uint16_t Cy_SysLib_GetDevice(void) return ((SFLASH_FAMILY_ID == 0UL) ? CY_SYSLIB_DEVICE_PSOC6ABLE2 : SFLASH_FAMILY_ID); #else return 0; -#endif +#endif } #if defined (CY_IP_MXS40SSRSS) diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_syspm_v2.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_syspm_v2.c index 76ace59c9c..ea5a904c0a 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_syspm_v2.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_syspm_v2.c @@ -1652,7 +1652,7 @@ void Cy_SysPm_BackupWordReStore(uint32_t wordIndex, uint32_t *wordDstPointer, ui while(wordSize != 0UL) { - + if(wordIndex < CY_SRSS_BACKUP_BREG1_START_POS) { *wordDstPointer = BACKUP_BREG_SET0[wordIndex]; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_systick_v2.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_systick_v2.c index 1dc1056988..bf2f945f47 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_systick_v2.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_systick_v2.c @@ -29,7 +29,7 @@ #include /* for NULL */ #include "cy_systick.h" -#include "cy_sysint.h" +#include "cy_sysint.h" static Cy_SysTick_Callback Cy_SysTick_Callbacks[CY_SYS_SYST_NUM_OF_CALLBACKS]; static void Cy_SysTick_ServiceCallbacks(void); @@ -161,7 +161,7 @@ cy_en_systick_clock_source_t Cy_SysTick_GetClockSource(void) returnValue = (cy_en_systick_clock_source_t) ((uint32_t) _FLD2VAL(CPUSS_SYSTICK_S_CTL_CLOCK_SOURCE, CPUSS_SYSTICK_S_CTL)); #else returnValue = (cy_en_systick_clock_source_t) ((uint32_t) _FLD2VAL(CPUSS_SYSTICK_NS_CTL_CLOCK_SOURCE, CPUSS_SYSTICK_NS_CTL)); -#endif +#endif } diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_pwm.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_pwm.c index bd64b1da7f..a22a0d3672 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_pwm.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_pwm.c @@ -167,7 +167,7 @@ cy_en_tcpwm_status_t Cy_TCPWM_PWM_Init(TCPWM_Type *base, uint32_t cntNum, cy_st { if (CY_TCPWM_PWM_LEFT_ALIGN == config->pwmAlignment) { - TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= + TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_UP_DOWN_MODE, CY_TCPWM_PWM_LEFT_ALIGN); TCPWM_GRP_CNT_COUNTER(base, grp, cntNum) = CY_TCPWM_CNT_UP_INIT_VAL; TCPWM_GRP_CNT_TR_PWM_CTRL(base, grp, cntNum) = (CY_TCPWM_PWM_MODE_LEFT | @@ -175,15 +175,15 @@ cy_en_tcpwm_status_t Cy_TCPWM_PWM_Init(TCPWM_Type *base, uint32_t cntNum, cy_st } else if (CY_TCPWM_PWM_RIGHT_ALIGN == config->pwmAlignment) { - TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= + TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_UP_DOWN_MODE, CY_TCPWM_PWM_RIGHT_ALIGN); TCPWM_GRP_CNT_COUNTER(base, grp, cntNum) = config->period0; - TCPWM_GRP_CNT_TR_PWM_CTRL(base, grp, cntNum) = (CY_TCPWM_PWM_MODE_RIGHT | + TCPWM_GRP_CNT_TR_PWM_CTRL(base, grp, cntNum) = (CY_TCPWM_PWM_MODE_RIGHT | CY_TCPWM_PWM_MODE_CC1_IGNORE); } else if (CY_TCPWM_PWM_ASYMMETRIC_ALIGN == config->pwmAlignment) { - TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= + TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_UP_DOWN_MODE, CY_TCPWM_PWM_ASYMMETRIC_ALIGN); TCPWM_GRP_CNT_COUNTER(base, grp, cntNum) = CY_TCPWM_CNT_UP_DOWN_INIT_VAL; TCPWM_GRP_CNT_TR_PWM_CTRL(base, grp, cntNum) = ((config->swapOverflowUnderflow ? CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM_SWAPPED : CY_TCPWM_PWM_MODE_CNTR_OR_ASYMM) | @@ -199,14 +199,14 @@ cy_en_tcpwm_status_t Cy_TCPWM_PWM_Init(TCPWM_Type *base, uint32_t cntNum, cy_st } else if (TCPWM_GRP_CC1(base, grp) && (CY_TCPWM_PWM_ASYMMETRIC_CC0_CC1_ALIGN == config->pwmAlignment)) { - TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= + TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_UP_DOWN_MODE, CY_TCPWM_PWM_LEFT_ALIGN); TCPWM_GRP_CNT_COUNTER(base, grp, cntNum) = CY_TCPWM_CNT_UP_DOWN_INIT_VAL; TCPWM_GRP_CNT_TR_PWM_CTRL(base, grp, cntNum) = CY_TCPWM_PWM_MODE_ASYMM_CC0_CC1; } else if (TCPWM_GRP_CC1(base, grp) && (CY_TCPWM_PWM_CENTER_ASYMMETRIC_CC0_CC1_ALIGN == config->pwmAlignment)) { - TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= + TCPWM_GRP_CNT_CTRL(base, grp, cntNum) |= _VAL2FLD(TCPWM_GRP_CNT_V2_CTRL_UP_DOWN_MODE, CY_TCPWM_PWM_CENTER_ALIGN); TCPWM_GRP_CNT_COUNTER(base, grp, cntNum) = CY_TCPWM_CNT_UP_DOWN_INIT_VAL; TCPWM_GRP_CNT_TR_PWM_CTRL(base, grp, cntNum) = CY_TCPWM_PWM_MODE_CNTR_ASYMM_CC0_CC1; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_quaddec.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_quaddec.c index 230c428a9c..2ccc6de559 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_quaddec.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_quaddec.c @@ -108,7 +108,7 @@ cy_en_tcpwm_status_t Cy_TCPWM_QuadDec_Init(TCPWM_Type *base, uint32_t cntNum, _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_RELOAD_SEL, config->indexInput) | _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL0_STOP_SEL, config->stopInput)); - TCPWM_GRP_CNT_TR_IN_SEL1(base, grp, cntNum) = + TCPWM_GRP_CNT_TR_IN_SEL1(base, grp, cntNum) = _VAL2FLD(TCPWM_GRP_CNT_V2_TR_IN_SEL1_START_SEL, config->phiBInput); TCPWM_GRP_CNT_CC0(base, grp, cntNum) = config->compare0; diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_shiftreg.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_shiftreg.c index 6b1c17fa49..a424619c21 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_shiftreg.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tcpwm_shiftreg.c @@ -73,7 +73,7 @@ cy_en_tcpwm_status_t Cy_TCPWM_ShiftReg_Init(TCPWM_Type const *base, uint32_t cnt TCPWM_GRP_CNT_CC0(base, grp, cntNum) = config->compare0; TCPWM_GRP_CNT_CC0_BUFF(base, grp, cntNum) = config->compareBuf0; - + TCPWM_GRP_CNT_PERIOD_BUFF(base, grp, cntNum) = config->tapsEnabled; TCPWM_GRP_CNT_TR_IN_SEL0(base, grp, cntNum) = diff --git a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tdm.c b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tdm.c index 780797e6c2..9458bad6cd 100644 --- a/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tdm.c +++ b/bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/cy_tdm.c @@ -21,7 +21,7 @@ #if defined(__cplusplus) extern "C" { - + #endif /* __cplusplus */ @@ -58,7 +58,7 @@ void Cy_AudioTDM_RX_DeInit( TDM_RX_STRUCT_Type * base); cy_en_tdm_status_t Cy_AudioTDM_Init( TDM_STRUCT_Type * base, cy_stc_tdm_config_t const * config) { cy_en_tdm_status_t ret = CY_TDM_BAD_PARAM; - + if((NULL != base) && (NULL != config)) { if(config->tx_config->enable) @@ -117,7 +117,7 @@ cy_en_tdm_status_t Cy_AudioTDM_TX_Init( TDM_TX_STRUCT_Type * base, cy_stc_tdm_co ret = CY_TDM_BAD_PARAM; return(ret); } - + /* The TX interface setting */ TDM_STRUCT_TX_IF_CTL(base) = _VAL2FLD(TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_IF_CTL_CLOCK_DIV, clockDiv) | @@ -136,14 +136,14 @@ cy_en_tdm_status_t Cy_AudioTDM_TX_Init( TDM_TX_STRUCT_Type * base, cy_stc_tdm_co /* Chanel Enable */ TDM_STRUCT_TX_CH_CTL(base) = config->chEn; - /* The FIFO setting */ + /* The FIFO setting */ TDM_STRUCT_TX_FIFO_CTL(base) = _VAL2FLD(TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_FIFO_CTL_TRIGGER_LEVEL,config->fifoTriggerLevel); - /* The TC Interface setting */ + /* The TC Interface setting */ TDM_STRUCT_TX_CTL(base) = _VAL2FLD(TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_CTL_WORD_SIZE, config->wordSize) | _VAL2FLD(TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_CTL_FORMAT, config->format) | _VAL2FLD(TDM_TDM_STRUCT_TDM_TX_STRUCT_TX_CTL_MS, config->masterMode); - + return (ret); } @@ -162,7 +162,7 @@ cy_en_tdm_status_t Cy_AudioTDM_RX_Init( TDM_RX_STRUCT_Type * base, cy_stc_tdm_co CY_ASSERT_L2(CY_TDM_IS_CHANNELS_VALID(channelNum)); CY_ASSERT_L2(CY_TDM_IS_CHANNEL_SIZE_VALID(channelSIZE)); CY_ASSERT_L2(CY_I2S_TDM_IS_INPUT_SIGNAL_MODE_VALID(config->signalInput)); - + /* The RX interface setting */ TDM_STRUCT_RX_IF_CTL(base) = _VAL2FLD(TDM_TDM_STRUCT_TDM_RX_STRUCT_RX_IF_CTL_CLOCK_DIV, clockDiv) | @@ -182,9 +182,9 @@ cy_en_tdm_status_t Cy_AudioTDM_RX_Init( TDM_RX_STRUCT_Type * base, cy_stc_tdm_co /* Chanel Enable */ TDM_STRUCT_RX_CH_CTL(base) = config->chEn; - /* The FIFO setting */ + /* The FIFO setting */ TDM_STRUCT_RX_FIFO_CTL(base) = _VAL2FLD(TDM_TDM_STRUCT_TDM_RX_STRUCT_RX_FIFO_CTL_TRIGGER_LEVEL,config->fifoTriggerLevel); - /* The TC Interface setting */ + /* The TC Interface setting */ TDM_STRUCT_RX_CTL(base) = _VAL2FLD(TDM_TDM_STRUCT_TDM_RX_STRUCT_RX_CTL_WORD_SIZE, config->wordSize) | _VAL2FLD(TDM_TDM_STRUCT_TDM_RX_STRUCT_RX_CTL_WORD_SIGN_EXTEND, config->signExtend) | diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/.config b/bsp/cypress/psoc6-cy8cproto-4343w/.config index 914141447b..75cfea5903 100644 --- a/bsp/cypress/psoc6-cy8cproto-4343w/.config +++ b/bsp/cypress/psoc6-cy8cproto-4343w/.config @@ -141,7 +141,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_I2C is not set # CONFIG_RT_USING_PHY is not set CONFIG_RT_USING_PIN=y -CONFIG_RT_USING_ADC=y +# CONFIG_RT_USING_ADC is not set # CONFIG_RT_USING_DAC is not set # CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_MTD_NOR is not set @@ -679,8 +679,7 @@ CONFIG_BSP_USING_USB_TO_USART=y CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART1=y -CONFIG_BSP_USING_ADC=y -CONFIG_BSP_USING_ADC1=y +# CONFIG_BSP_USING_ADC is not set # # Board extended module Drivers diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/.project b/bsp/cypress/psoc6-cy8cproto-4343w/.project new file mode 100644 index 0000000000..e9e2cefe65 --- /dev/null +++ b/bsp/cypress/psoc6-cy8cproto-4343w/.project @@ -0,0 +1,28 @@ + + + psoc6-pioneerkit_modus + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.core.ccnature + com.cypress.studio.app.cymodusnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/EventRecorderStub.scvd b/bsp/cypress/psoc6-cy8cproto-4343w/EventRecorderStub.scvd new file mode 100644 index 0000000000..2956b29683 --- /dev/null +++ b/bsp/cypress/psoc6-cy8cproto-4343w/EventRecorderStub.scvd @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/applications/main.c b/bsp/cypress/psoc6-cy8cproto-4343w/applications/main.c index f2f177baaa..4d25fe61df 100644 --- a/bsp/cypress/psoc6-cy8cproto-4343w/applications/main.c +++ b/bsp/cypress/psoc6-cy8cproto-4343w/applications/main.c @@ -13,7 +13,7 @@ #include "drv_gpio.h" -#define LED_PIN GET_PIN(13, 7) +#define LED_PIN GET_PIN(13, 7) int main(void) { @@ -27,52 +27,3 @@ int main(void) rt_thread_mdelay(1000); } } - -#define KEY0_PIN_NUM GET_PIN(0, 4) - -void btn_test(void *args) -{ - rt_kprintf("down button!\n"); -} - -static void pin_btn_sample(void) -{ - rt_pin_mode(KEY0_PIN_NUM, PIN_MODE_INPUT_PULLUP); - rt_pin_attach_irq(KEY0_PIN_NUM, PIN_IRQ_MODE_FALLING, btn_test, RT_NULL); - rt_pin_irq_enable(KEY0_PIN_NUM, PIN_IRQ_ENABLE); - -} -MSH_CMD_EXPORT(pin_btn_sample, pin button sample); - -#if defined(BSP_USING_ADC1) -static int adc_vol_sample(int argc, char *argv[]) -{ - rt_adc_device_t adc_dev; - rt_uint32_t value, vol; - rt_err_t ret = RT_EOK; - - adc_dev = (rt_adc_device_t)rt_device_find("adc1"); - if (adc_dev == RT_NULL) - { - rt_kprintf("adc sample run failed! can't find %s device!\n", "adc1"); - return RT_ERROR; - } - - ret = rt_adc_enable(adc_dev, 10); - - while (1) - { - value = rt_adc_read(adc_dev, 10); - rt_kprintf("the value is :%d \n", value); - - vol = value * 330 / (1 << 12); - rt_kprintf("the voltage is :%d.%02d \n", vol / 100, vol % 100); - - rt_thread_mdelay(500); - } - - return ret; -} -MSH_CMD_EXPORT(adc_vol_sample, adc voltage convert sample); - -#endif diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig b/bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig index e2d1adcb9f..75ccf587c9 100644 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig +++ b/bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig @@ -42,11 +42,11 @@ menu "On-chip Peripheral Drivers" config BSP_USING_ADC1 bool "Enable ADC1" default n - endif + endif endmenu menu "Board extended module Drivers" endmenu - + endmenu diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/board.h b/bsp/cypress/psoc6-cy8cproto-4343w/board/board.h index 0ac0e3a55c..f7552bd2db 100644 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/board.h +++ b/bsp/cypress/psoc6-cy8cproto-4343w/board/board.h @@ -5,9 +5,9 @@ * * Change Logs: * Date Author Notes - * 2022-06-29 Rbb666 first version + * 2022-06-29 Rbb666 first version */ - + #ifndef __BOARD_H__ #define __BOARD_H__ @@ -36,7 +36,7 @@ #define HEAP_END (void*)&__HeapLimit #endif -#define HEAP_END IFX_SRAM_END +#define HEAP_END IFX_SRAM_END void cy_bsp_all_init(void); diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/project.uvoptx b/bsp/cypress/psoc6-cy8cproto-4343w/project.uvoptx index f3e18ab753..667ba5455e 100644 --- a/bsp/cypress/psoc6-cy8cproto-4343w/project.uvoptx +++ b/bsp/cypress/psoc6-cy8cproto-4343w/project.uvoptx @@ -422,18 +422,6 @@ 0 0 0 - ..\..\..\components\drivers\misc\adc.c - adc.c - 0 - 0 - - - 4 - 19 - 1 - 0 - 0 - 0 ..\..\..\components\drivers\misc\pin.c pin.c 0 @@ -441,7 +429,7 @@ 4 - 20 + 19 1 0 0 @@ -455,13 +443,13 @@ Drivers - 0 + 1 0 0 0 5 - 21 + 20 2 0 0 @@ -473,7 +461,7 @@ 5 - 22 + 21 1 0 0 @@ -485,19 +473,7 @@ 5 - 23 - 1 - 0 - 0 - 0 - ..\libraries\HAL_Drivers\drv_adc.c - drv_adc.c - 0 - 0 - - - 5 - 24 + 22 1 0 0 @@ -509,7 +485,7 @@ 5 - 25 + 23 1 0 0 @@ -521,7 +497,7 @@ 5 - 26 + 24 1 0 0 @@ -541,7 +517,7 @@ 0 6 - 27 + 25 1 0 0 @@ -553,7 +529,7 @@ 6 - 28 + 26 1 0 0 @@ -565,7 +541,7 @@ 6 - 29 + 27 1 0 0 @@ -577,7 +553,7 @@ 6 - 30 + 28 1 0 0 @@ -597,7 +573,7 @@ 0 7 - 31 + 29 1 0 0 @@ -609,7 +585,7 @@ 7 - 32 + 30 1 0 0 @@ -621,7 +597,7 @@ 7 - 33 + 31 1 0 0 @@ -633,7 +609,7 @@ 7 - 34 + 32 1 0 0 @@ -653,7 +629,7 @@ 0 8 - 35 + 33 1 0 0 @@ -665,7 +641,7 @@ 8 - 36 + 34 1 0 0 @@ -677,7 +653,7 @@ 8 - 37 + 35 1 0 0 @@ -689,7 +665,7 @@ 8 - 38 + 36 1 0 0 @@ -701,7 +677,7 @@ 8 - 39 + 37 1 0 0 @@ -713,7 +689,7 @@ 8 - 40 + 38 1 0 0 @@ -725,7 +701,7 @@ 8 - 41 + 39 1 0 0 @@ -737,7 +713,7 @@ 8 - 42 + 40 1 0 0 @@ -749,7 +725,7 @@ 8 - 43 + 41 1 0 0 @@ -761,7 +737,7 @@ 8 - 44 + 42 1 0 0 @@ -773,7 +749,7 @@ 8 - 45 + 43 1 0 0 @@ -785,7 +761,7 @@ 8 - 46 + 44 1 0 0 @@ -797,7 +773,7 @@ 8 - 47 + 45 1 0 0 @@ -817,283 +793,7 @@ 0 9 - 48 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_adc_sar.c - cyhal_adc_sar.c - 0 - 0 - - - 9 - 49 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysint.c - cy_sysint.c - 0 - 0 - - - 9 - 50 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\source\triggers\cyhal_triggers_psoc6_02.c - cyhal_triggers_psoc6_02.c - 0 - 0 - - - 9 - 51 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_04_cm0p_sleep.c - psoc6_04_cm0p_sleep.c - 0 - 0 - - - 9 - 52 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_analog_common.c - cyhal_analog_common.c - 0 - 0 - - - 9 - 53 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_i2c.c - cy_scb_i2c.c - 0 - 0 - - - 9 - 54 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_gpio.c - cy_gpio.c - 0 - 0 - - - 9 - 55 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_scb_common.c - cyhal_scb_common.c - 0 - 0 - - - 9 - 56 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_CM4\system_psoc6_cm4.c - system_psoc6_cm4.c - 0 - 0 - - - 9 - 57 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_clock.c - cyhal_clock.c - 0 - 0 - - - 9 - 58 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_dma_dmac.c - cyhal_dma_dmac.c - 0 - 0 - - - 9 - 59 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_uart.c - cy_scb_uart.c - 0 - 0 - - - 9 - 60 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\source\pin_packages\cyhal_psoc6_02_124_bga.c - cyhal_psoc6_02_124_bga.c - 0 - 0 - - - 9 - 61 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\cybsp.c - cybsp.c - 0 - 0 - - - 9 - 62 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_dmac.c - cy_dmac.c - 0 - 0 - - - 9 - 63 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_common.c - cy_scb_common.c - 0 - 0 - - - 9 - 64 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_prot.c - cy_prot.c - 0 - 0 - - - 9 - 65 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_gpio.c - cyhal_gpio.c - 0 - 0 - - - 9 - 66 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_system.c - cyhal_system.c - 0 - 0 - - - 9 - 67 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_sema.c - cy_ipc_sema.c - 0 - 0 - - - 9 - 68 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\retarget-io\cy_retarget_io.c - cy_retarget_io.c - 0 - 0 - - - 9 - 69 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils_psoc.c - cyhal_utils_psoc.c - 0 - 0 - - - 9 - 70 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils.c - cyhal_utils.c - 0 - 0 - - - 9 - 71 + 46 1 0 0 @@ -1105,319 +805,43 @@ 9 - 72 + 47 1 0 0 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_drv.c - cy_ipc_drv.c + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysint.c + cy_sysint.c 0 0 9 - 73 + 48 1 0 0 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_hwmgr.c - cyhal_hwmgr.c + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\source\triggers\cyhal_triggers_psoc6_02.c + cyhal_triggers_psoc6_02.c 0 0 9 - 74 + 49 1 0 0 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syslib.c - cy_syslib.c + ..\libraries\IFX_PSOC6_HAL\retarget-io\cy_retarget_io.c + cy_retarget_io.c 0 0 9 - 75 - 2 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\TOOLCHAIN_ARM\cy_syslib_mdk.s - cy_syslib_mdk.s - 0 - 0 - - - 9 - 76 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_peripherals.c - cycfg_peripherals.c - 0 - 0 - - - 9 - 77 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syspm.c - cy_syspm.c - 0 - 0 - - - 9 - 78 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_lptimer.c - cyhal_lptimer.c - 0 - 0 - - - 9 - 79 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_irq_psoc.c - cyhal_irq_psoc.c - 0 - 0 - - - 9 - 80 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_mcwdt.c - cy_mcwdt.c - 0 - 0 - - - 9 - 81 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysclk.c - cy_sysclk.c - 0 - 0 - - - 9 - 82 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_dma.c - cyhal_dma.c - 0 - 0 - - - 9 - 83 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_dma_dw.c - cyhal_dma_dw.c - 0 - 0 - - - 9 - 84 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_syspm.c - cyhal_syspm.c - 0 - 0 - - - 9 - 85 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_dma.c - cy_dma.c - 0 - 0 - - - 9 - 86 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_01_cm0p_sleep.c - psoc6_01_cm0p_sleep.c - 0 - 0 - - - 9 - 87 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_pins.c - cycfg_pins.c - 0 - 0 - - - 9 - 88 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_uart.c - cyhal_uart.c - 0 - 0 - - - 9 - 89 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sar.c - cy_sar.c - 0 - 0 - - - 9 - 90 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_systick.c - cy_systick.c - 0 - 0 - - - 9 - 91 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg.c - cycfg.c - 0 - 0 - - - 9 - 92 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_interconnect.c - cyhal_interconnect.c - 0 - 0 - - - 9 - 93 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_trigmux.c - cy_trigmux.c - 0 - 0 - - - 9 - 94 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\devices\COMPONENT_CAT1A\source\cy_device.c - cy_device.c - 0 - 0 - - - 9 - 95 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_routing.c - cycfg_routing.c - 0 - 0 - - - 9 - 96 - 4 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\lib\cy_capsense.lib - lib_cy_capsense.lib - 0 - 0 - - - 9 - 97 - 1 - 0 - 0 - 0 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_system.c - cycfg_system.c - 0 - 0 - - - 9 - 98 + 50 1 0 0 @@ -1429,19 +853,463 @@ 9 - 99 + 51 1 0 0 0 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysanalog.c - cy_sysanalog.c + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_i2c.c + cy_scb_i2c.c 0 0 9 - 100 + 52 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_gpio.c + cy_gpio.c + 0 + 0 + + + 9 + 53 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_scb_common.c + cyhal_scb_common.c + 0 + 0 + + + 9 + 54 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_CM4\system_psoc6_cm4.c + system_psoc6_cm4.c + 0 + 0 + + + 9 + 55 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_clock.c + cyhal_clock.c + 0 + 0 + + + 9 + 56 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_uart.c + cy_scb_uart.c + 0 + 0 + + + 9 + 57 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\source\pin_packages\cyhal_psoc6_02_124_bga.c + cyhal_psoc6_02_124_bga.c + 0 + 0 + + + 9 + 58 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\cybsp.c + cybsp.c + 0 + 0 + + + 9 + 59 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_common.c + cy_scb_common.c + 0 + 0 + + + 9 + 60 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_prot.c + cy_prot.c + 0 + 0 + + + 9 + 61 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_gpio.c + cyhal_gpio.c + 0 + 0 + + + 9 + 62 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_01_cm0p_sleep.c + psoc6_01_cm0p_sleep.c + 0 + 0 + + + 9 + 63 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_system.c + cyhal_system.c + 0 + 0 + + + 9 + 64 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_sema.c + cy_ipc_sema.c + 0 + 0 + + + 9 + 65 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils_psoc.c + cyhal_utils_psoc.c + 0 + 0 + + + 9 + 66 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils.c + cyhal_utils.c + 0 + 0 + + + 9 + 67 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_04_cm0p_sleep.c + psoc6_04_cm0p_sleep.c + 0 + 0 + + + 9 + 68 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_drv.c + cy_ipc_drv.c + 0 + 0 + + + 9 + 69 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_hwmgr.c + cyhal_hwmgr.c + 0 + 0 + + + 9 + 70 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syslib.c + cy_syslib.c + 0 + 0 + + + 9 + 71 + 2 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\TOOLCHAIN_ARM\cy_syslib_mdk.s + cy_syslib_mdk.s + 0 + 0 + + + 9 + 72 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_peripherals.c + cycfg_peripherals.c + 0 + 0 + + + 9 + 73 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syspm.c + cy_syspm.c + 0 + 0 + + + 9 + 74 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_lptimer.c + cyhal_lptimer.c + 0 + 0 + + + 9 + 75 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_irq_psoc.c + cyhal_irq_psoc.c + 0 + 0 + + + 9 + 76 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_mcwdt.c + cy_mcwdt.c + 0 + 0 + + + 9 + 77 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysclk.c + cy_sysclk.c + 0 + 0 + + + 9 + 78 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_syspm.c + cyhal_syspm.c + 0 + 0 + + + 9 + 79 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_pins.c + cycfg_pins.c + 0 + 0 + + + 9 + 80 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_uart.c + cyhal_uart.c + 0 + 0 + + + 9 + 81 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_systick.c + cy_systick.c + 0 + 0 + + + 9 + 82 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg.c + cycfg.c + 0 + 0 + + + 9 + 83 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_interconnect.c + cyhal_interconnect.c + 0 + 0 + + + 9 + 84 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_trigmux.c + cy_trigmux.c + 0 + 0 + + + 9 + 85 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\devices\COMPONENT_CAT1A\source\cy_device.c + cy_device.c + 0 + 0 + + + 9 + 86 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_routing.c + cycfg_routing.c + 0 + 0 + + + 9 + 87 + 4 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\lib\cy_capsense.lib + lib_cy_capsense.lib + 0 + 0 + + + 9 + 88 + 1 + 0 + 0 + 0 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_system.c + cycfg_system.c + 0 + 0 + + + 9 + 89 1 0 0 @@ -1453,7 +1321,7 @@ 9 - 101 + 90 1 0 0 diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/project.uvprojx b/bsp/cypress/psoc6-cy8cproto-4343w/project.uvprojx index bd593e4cdc..ca6485997b 100644 --- a/bsp/cypress/psoc6-cy8cproto-4343w/project.uvprojx +++ b/bsp/cypress/psoc6-cy8cproto-4343w/project.uvprojx @@ -11,6 +11,7 @@ 0x4 ARM-ADS 6160000::V6.16::ARMCLANG + 6160000::V6.16::ARMCLANG 1 @@ -339,7 +340,7 @@ COMPONENT_CAT1A, RT_USING_LIBC, CY_USING_HAL, __CLK_TCK=RT_TICK_PER_SECOND, COMPONENT_BSP_DESIGN_MODUS, IFX_PSOC6_43012, __RTTHREAD__, COMPONENT_CAT1, RT_USING_ARM_LIBC - applications;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\dfs\include;..\..\..\components\finsh;.;..\..\..\include;..\libraries\IFX_PSOC6_HAL\capsense;..\libraries\IFX_PSOC6_HAL\core-lib\include;..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\include;..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\include_pvt;..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\include;..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\include;..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\cmsis\include;..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\devices\COMPONENT_CAT1A\include;..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\devices\COMPONENT_CAT1B\include;..\libraries\IFX_PSOC6_HAL\psoc6cm0p;..\libraries\IFX_PSOC6_HAL\retarget-io;..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012;..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc + applications;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\dfs\include;..\..\..\components\finsh;.;..\..\..\include;..\libraries\IFX_PSOC6_HAL\capsense;..\libraries\IFX_PSOC6_HAL\psoc6cm0p;..\libraries\IFX_PSOC6_HAL\retarget-io;..\libraries\IFX_PSOC6_HAL\core-lib\include;..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\include;..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\include_pvt;..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\cmsis\include;..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\include;..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\include;..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\devices\COMPONENT_CAT1A\include;..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\devices\COMPONENT_CAT1B\include;..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012;..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc @@ -483,11 +484,6 @@ 1 ..\..\..\components\drivers\ipc\workqueue.c - - adc.c - 1 - ..\..\..\components\drivers\misc\adc.c - pin.c 1 @@ -513,11 +509,6 @@ 1 board\board.c - - drv_adc.c - 1 - ..\libraries\HAL_Drivers\drv_adc.c - drv_common.c 1 @@ -659,9 +650,9 @@ Libraries - cyhal_adc_sar.c + psoc6_02_cm0p_sleep.c 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_adc_sar.c + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_02_cm0p_sleep.c cy_sysint.c @@ -674,14 +665,14 @@ ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\source\triggers\cyhal_triggers_psoc6_02.c - psoc6_04_cm0p_sleep.c + cy_retarget_io.c 1 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_04_cm0p_sleep.c + ..\libraries\IFX_PSOC6_HAL\retarget-io\cy_retarget_io.c - cyhal_analog_common.c + psoc6_03_cm0p_sleep.c 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_analog_common.c + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_03_cm0p_sleep.c cy_scb_i2c.c @@ -708,11 +699,6 @@ 1 ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_clock.c - - cyhal_dma_dmac.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_dma_dmac.c - cy_scb_uart.c 1 @@ -728,11 +714,6 @@ 1 ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\cybsp.c - - cy_dmac.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_dmac.c - cy_scb_common.c 1 @@ -748,6 +729,11 @@ 1 ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_gpio.c + + psoc6_01_cm0p_sleep.c + 1 + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_01_cm0p_sleep.c + cyhal_system.c 1 @@ -758,11 +744,6 @@ 1 ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_sema.c - - cy_retarget_io.c - 1 - ..\libraries\IFX_PSOC6_HAL\retarget-io\cy_retarget_io.c - cyhal_utils_psoc.c 1 @@ -774,9 +755,9 @@ ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils.c - psoc6_02_cm0p_sleep.c + psoc6_04_cm0p_sleep.c 1 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_02_cm0p_sleep.c + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_04_cm0p_sleep.c cy_ipc_drv.c @@ -828,31 +809,11 @@ 1 ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysclk.c - - cyhal_dma.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_dma.c - - - cyhal_dma_dw.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_dma_dw.c - cyhal_syspm.c 1 ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_syspm.c - - cy_dma.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_dma.c - - - psoc6_01_cm0p_sleep.c - 1 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_01_cm0p_sleep.c - cycfg_pins.c 1 @@ -863,11 +824,6 @@ 1 ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_uart.c - - cy_sar.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sar.c - cy_systick.c 1 @@ -908,16 +864,6 @@ 1 ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_system.c - - psoc6_03_cm0p_sleep.c - 1 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_03_cm0p_sleep.c - - - cy_sysanalog.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysanalog.c - cycfg_clocks.c 1 diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h b/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h index 6a675bfb37..aa09834422 100644 --- a/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h +++ b/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h @@ -87,7 +87,6 @@ #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN -#define RT_USING_ADC /* Using USB */ @@ -200,8 +199,6 @@ #define BSP_USING_GPIO #define BSP_USING_UART #define BSP_USING_UART1 -#define BSP_USING_ADC -#define BSP_USING_ADC1 /* Board extended module Drivers */
Structure Field
1.10The CSD driver sources are enclosed with the conditional compilation +* The CSD driver sources are enclosed with the conditional compilation * to ensure a successful compilation for non-CapSense-capable devices * Compilation for non-CapSense-capable devices
VersionChangesReason for Change
1.60Added \ref Cy_GPIO_SetVtripAuto and \ref Cy_GPIO_GetVtripAuto APIs for +* Added \ref Cy_GPIO_SetVtripAuto and \ref Cy_GPIO_GetVtripAuto APIs for * configuring GPIO input buffer voltage for automotive compatible or not, * for CAT1C devices.New APIs support for CAT1C devices.
The Cy_SMIF_MemSfdpDetect() function is updated to support new +* The Cy_SMIF_MemSfdpDetect() function is updated to support new * commands for 4 bytes addressing. * Memory devices with new 4 byte addressing commands support. *
Added the blocking functions which take care of the +* Added the blocking functions which take care of the * busy-status check of the memory: * - \ref Cy_SMIF_MemIsReady * - \ref Cy_SMIF_MemIsQuadEnabled @@ -407,7 +407,7 @@ *
Updated the General Description section with minor changes. * Updated the ordering of the parameters descriptions for some functions. -* Added the text saying that the Cy_SMIF_MemInit() function is applicable +* Added the text saying that the Cy_SMIF_MemInit() function is applicable * to use the external memory as memory-mapped to PSoC (XIP mode). * Added the snippet for the Cy_SMIF_Encrypt() function to show how to use this function. * Added below the picture in the Low-Level Functions section the sequence of PDL @@ -425,7 +425,7 @@ *
1.20Flattened the organization of the driver source code into the single +* Flattened the organization of the driver source code into the single * source directory and the single include directory. * Driver library directory-structure simplification.
Added register access layer. Use register access macros instead * of direct register access using dereferenced pointers.Makes register access device-independent, so that the PDL does +* Makes register access device-independent, so that the PDL does * not need to be recompiled for each supported part number.
1.11Fixed internal function that writes to the SMIF FIFOThe write function stuck in the loop when write speed in external -* memory is significantly lower than PSoC CPU core speed and write -* transfer is not finished during the single function call. +* The write function stuck in the loop when write speed in external +* memory is significantly lower than PSoC CPU core speed and write +* transfer is not finished during the single function call. *
1.10Fix write to external memory from CM0+ core. Add checks of API input parameters. +* Fix write to external memory from CM0+ core. Add checks of API input parameters. * Minor documentation updates
1.40CAT1B, CAT1C devices support.
-* Newly added API's Cy_WDT_SetClkSource() to configure the WDT clock source, Cy_WDT_GetClkSource() to get the WDT clock source configured, +* Newly added API's Cy_WDT_SetClkSource() to configure the WDT clock source, Cy_WDT_GetClkSource() to get the WDT clock source configured, * Cy_WDT_SetMatchBits() to configure the bit position above which the bits will be ignored for match, Cy_WDT_GetMatchBits() to get the bit position above which the bits will be ignored for match.		Support for new devices.