diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_CAN.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_CAN.c deleted file mode 100644 index b4fdede12c..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_CAN.c +++ /dev/null @@ -1,321 +0,0 @@ -/* - * Copyright (c) 2015-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_CAN.h" - -#define ARM_CAN_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) // CAN driver version - -// Driver Version -static const ARM_DRIVER_VERSION can_driver_version = { ARM_CAN_API_VERSION, ARM_CAN_DRV_VERSION }; - -// Driver Capabilities -static const ARM_CAN_CAPABILITIES can_driver_capabilities = { - 32U, // Number of CAN Objects available - 1U, // Supports reentrant calls to ARM_CAN_MessageSend, ARM_CAN_MessageRead, ARM_CAN_ObjectConfigure and abort message sending used by ARM_CAN_Control. - 0U, // Does not support CAN with Flexible Data-rate mode (CAN_FD) - 0U, // Does not support restricted operation mode - 1U, // Supports bus monitoring mode - 1U, // Supports internal loopback mode - 1U, // Supports external loopback mode -}; - -// Object Capabilities -static const ARM_CAN_OBJ_CAPABILITIES can_object_capabilities = { - 1U, // Object supports transmission - 1U, // Object supports reception - 0U, // Object does not support RTR reception and automatic Data transmission - 0U, // Object does not support RTR transmission and automatic Data reception - 1U, // Object allows assignment of multiple filters to it - 1U, // Object supports exact identifier filtering - 0U, // Object does not support range identifier filtering - 1U, // Object supports mask identifier filtering - 3U // Object can buffer 3 messages -}; - -static uint8_t can_driver_powered = 0U; -static uint8_t can_driver_initialized = 0U; -static ARM_CAN_SignalUnitEvent_t CAN_SignalUnitEvent = NULL; -static ARM_CAN_SignalObjectEvent_t CAN_SignalObjectEvent = NULL; - -// -// Functions -// - -static ARM_DRIVER_VERSION CAN_GetVersion (void) { - // Return driver version - return can_driver_version; -} - -static ARM_CAN_CAPABILITIES CAN_GetCapabilities (void) { - // Return driver capabilities - return can_driver_capabilities; -} - -static int32_t CAN_Initialize (ARM_CAN_SignalUnitEvent_t cb_unit_event, - ARM_CAN_SignalObjectEvent_t cb_object_event) { - - if (can_driver_initialized != 0U) { return ARM_DRIVER_OK; } - - CAN_SignalUnitEvent = cb_unit_event; - CAN_SignalObjectEvent = cb_object_event; - - // Add code for pin, memory, RTX objects initialization - // .. - - can_driver_initialized = 1U; - - return ARM_DRIVER_OK; -} - -static int32_t CAN_Uninitialize (void) { - - // Add code for pin, memory, RTX objects de-initialization - // .. - - can_driver_initialized = 0U; - - return ARM_DRIVER_OK; -} - -static int32_t CAN_PowerControl (ARM_POWER_STATE state) { - switch (state) { - case ARM_POWER_OFF: - can_driver_powered = 0U; - // Add code to disable interrupts and put peripheral into reset mode, - // and if possible disable clock - // .. - - case ARM_POWER_FULL: - if (can_driver_initialized == 0U) { return ARM_DRIVER_ERROR; } - if (can_driver_powered != 0U) { return ARM_DRIVER_OK; } - - // Add code to enable clocks, reset variables enable interrupts - // and put peripheral into operational - // .. - - can_driver_powered = 1U; - break; - - default: - // Other states are not supported - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -uint32_t CAN_GetClock (void) { - - // Add code to return peripheral clock frequency - // .. -} - -static int32_t CAN_SetBitrate (ARM_CAN_BITRATE_SELECT select, uint32_t bitrate, uint32_t bit_segments) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - // Add code to setup peripheral parameters to generate specified bitrate - // with specified bit segments - // .. - - return ARM_DRIVER_OK; -} - -static int32_t CAN_SetMode (ARM_CAN_MODE mode) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - switch (mode) { - case ARM_CAN_MODE_INITIALIZATION: - // Add code to put peripheral into initialization mode - // .. - break; - case ARM_CAN_MODE_NORMAL: - // Add code to put peripheral into normal operation mode - // .. - break; - case ARM_CAN_MODE_RESTRICTED: - // Add code to put peripheral into restricted operation mode - // .. - break; - case ARM_CAN_MODE_MONITOR: - // Add code to put peripheral into bus monitoring mode - // .. - break; - case ARM_CAN_MODE_LOOPBACK_INTERNAL: - // Add code to put peripheral into internal loopback mode - // .. - break; - case ARM_CAN_MODE_LOOPBACK_EXTERNAL: - // Add code to put peripheral into external loopback mode - // .. - break; - default: - // Handle unknown mode code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -ARM_CAN_OBJ_CAPABILITIES CAN_ObjectGetCapabilities (uint32_t obj_idx) { - // Return object capabilities - return can_object_capabilities; -} - -static int32_t CAN_ObjectSetFilter (uint32_t obj_idx, ARM_CAN_FILTER_OPERATION operation, uint32_t id, uint32_t arg) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - switch (operation) { - case ARM_CAN_FILTER_ID_EXACT_ADD: - // Add code to setup peripheral to receive messages with specified exact ID - break; - case ARM_CAN_FILTER_ID_MASKABLE_ADD: - // Add code to setup peripheral to receive messages with specified maskable ID - break; - case ARM_CAN_FILTER_ID_RANGE_ADD: - // Add code to setup peripheral to receive messages within specified range of IDs - break; - case ARM_CAN_FILTER_ID_EXACT_REMOVE: - // Add code to remove specified exact ID from being received by peripheral - break; - case ARM_CAN_FILTER_ID_MASKABLE_REMOVE: - // Add code to remove specified maskable ID from being received by peripheral - break; - case ARM_CAN_FILTER_ID_RANGE_REMOVE: - // Add code to remove specified range of IDs from being received by peripheral - break; - default: - // Handle unknown operation code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -static int32_t CAN_ObjectConfigure (uint32_t obj_idx, ARM_CAN_OBJ_CONFIG obj_cfg) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - switch (obj_cfg) { - case ARM_CAN_OBJ_INACTIVE: - // Deactivate object - // .. - break; - case ARM_CAN_OBJ_RX_RTR_TX_DATA: - // Setup object to automatically return data when RTR with it's ID is received - // .. - break; - case ARM_CAN_OBJ_TX_RTR_RX_DATA: - // Setup object to send RTR and receive data response - // .. - break; - case ARM_CAN_OBJ_TX: - // Setup object to be used for sending messages - // .. - break; - case ARM_CAN_OBJ_RX: - // Setup object to be used for receiving messages - // .. - break; - default: - // Handle unknown object configuration code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -static int32_t CAN_MessageSend (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, const uint8_t *data, uint8_t size) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - // Add code to send requested message - // .. - - return ((int32_t)size); -} - -static int32_t CAN_MessageRead (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, uint8_t *data, uint8_t size) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - // Add code to read previously received message - // (reception was started when object was configured for reception) - // .. - - return ((int32_t)size); -} - -static int32_t CAN_Control (uint32_t control, uint32_t arg) { - - if (can_driver_powered == 0U) { return ARM_DRIVER_ERROR; } - - switch (control & ARM_CAN_CONTROL_Msk) { - case ARM_CAN_ABORT_MESSAGE_SEND: - // Add code to abort message pending to be sent - // .. - break; - case ARM_CAN_SET_FD_MODE: - // Add code to enable Flexible Data-rate mode - // .. - break; - case ARM_CAN_SET_TRANSCEIVER_DELAY: - // Add code to set transceiver delay - // .. - break; - default: - // Handle unknown control code - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - return ARM_DRIVER_OK; -} - -static ARM_CAN_STATUS CAN_GetStatus (void) { - - // Add code to return device bus and error status - // .. -} - - -// IRQ handlers -// Add interrupt routines to handle transmission, reception, error and status interrupts -// .. - -// CAN driver functions structure - -ARM_DRIVER_CAN Driver_CAN = { - CAN_GetVersion, - CAN_GetCapabilities, - CAN_Initialize, - CAN_Uninitialize, - CAN_PowerControl, - CAN_GetClock, - CAN_SetBitrate, - CAN_SetMode, - CAN_ObjectGetCapabilities, - CAN_ObjectSetFilter, - CAN_ObjectConfigure, - CAN_MessageSend, - CAN_MessageRead, - CAN_Control, - CAN_GetStatus -}; - diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c deleted file mode 100644 index 9e54e26b28..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_ETH_MAC.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_ETH_MAC.h" - -#define ARM_ETH_MAC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_ETH_MAC_API_VERSION, - ARM_ETH_MAC_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_ETH_MAC_CAPABILITIES DriverCapabilities = { - 0, /* 1 = IPv4 header checksum verified on receive */ - 0, /* 1 = IPv6 checksum verification supported on receive */ - 0, /* 1 = UDP payload checksum verified on receive */ - 0, /* 1 = TCP payload checksum verified on receive */ - 0, /* 1 = ICMP payload checksum verified on receive */ - 0, /* 1 = IPv4 header checksum generated on transmit */ - 0, /* 1 = IPv6 checksum generation supported on transmit */ - 0, /* 1 = UDP payload checksum generated on transmit */ - 0, /* 1 = TCP payload checksum generated on transmit */ - 0, /* 1 = ICMP payload checksum generated on transmit */ - 0, /* Ethernet Media Interface type */ - 0, /* 1 = driver provides initial valid MAC address */ - 0, /* 1 = callback event \ref ARM_ETH_MAC_EVENT_RX_FRAME generated */ - 0, /* 1 = callback event \ref ARM_ETH_MAC_EVENT_TX_FRAME generated */ - 0, /* 1 = wakeup event \ref ARM_ETH_MAC_EVENT_WAKEUP generated */ - 0 /* 1 = Precision Timer supported */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion(void) -{ -} - -ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities(void) -{ -} - -int32_t ARM_ETH_MAC_Initialize(ARM_ETH_MAC_SignalEvent_t cb_event) -{ -} - -int32_t ARM_ETH_MAC_Uninitialize(void) -{ -} - -int32_t ARM_ETH_MAC_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_ETH_MAC_GetMacAddress(ARM_ETH_MAC_ADDR *ptr_addr) -{ -} - -int32_t ARM_ETH_MAC_SetMacAddress(const ARM_ETH_MAC_ADDR *ptr_addr) -{ -} - -int32_t ARM_ETH_MAC_SetAddressFilter(const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr) -{ -} - -int32_t ARM_ETH_MAC_SendFrame(const uint8_t *frame, uint32_t len, uint32_t flags) -{ -} - -int32_t ARM_ETH_MAC_ReadFrame(uint8_t *frame, uint32_t len) -{ -} - -uint32_t ARM_ETH_MAC_GetRxFrameSize(void) -{ -} - -int32_t ARM_ETH_MAC_GetRxFrameTime(ARM_ETH_MAC_TIME *time) -{ -} - -int32_t ARM_ETH_MAC_GetTxFrameTime(ARM_ETH_MAC_TIME *time) -{ -} - -int32_t ARM_ETH_MAC_Control(uint32_t control, uint32_t arg) -{ - switch (control) - { - case ARM_ETH_MAC_CONFIGURE: - - switch (arg & ARM_ETH_MAC_SPEED_Msk) - { - case ARM_ETH_MAC_SPEED_10M: - break; - case ARM_ETH_SPEED_100M: - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - switch (arg & ARM_ETH_MAC_DUPLEX_Msk) - { - case ARM_ETH_MAC_DUPLEX_FULL: - break; - } - - if (arg & ARM_ETH_MAC_LOOPBACK) - { - } - - if ((arg & ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX) || - (arg & ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX)) - { - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - if (!(arg & ARM_ETH_MAC_ADDRESS_BROADCAST)) - { - } - - if (arg & ARM_ETH_MAC_ADDRESS_MULTICAST) - { - } - - if (arg & ARM_ETH_MAC_ADDRESS_ALL) - { - } - - break; - - case ARM_ETH_MAC_CONTROL_TX: - break; - - case ARM_ETH_MAC_CONTROL_RX: - break; - - case ARM_ETH_MAC_FLUSH: - if (arg & ARM_ETH_MAC_FLUSH_RX) - { - } - if (arg & ARM_ETH_MAC_FLUSH_TX) - { - } - break; - - case ARM_ETH_MAC_SLEEP: - break; - - case ARM_ETH_MAC_VLAN_FILTER: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_ETH_MAC_ControlTimer(uint32_t control, ARM_ETH_MAC_TIME *time) -{ -} - -int32_t ARM_ETH_MAC_PHY_Read(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) -{ -} - -int32_t ARM_ETH_MAC_PHY_Write(uint8_t phy_addr, uint8_t reg_addr, uint16_t data) -{ -} - -void ARM_ETH_MAC_SignalEvent(uint32_t event) -{ -} - -// End ETH MAC Interface - -ARM_DRIVER_ETH_MAC Driver_ETH_MAC = -{ - ARM_ETH_MAC_GetVersion, - ARM_ETH_MAC_GetCapabilities, - ARM_ETH_MAC_Initialize, - ARM_ETH_MAC_Uninitialize, - ARM_ETH_MAC_PowerControl, - ARM_ETH_MAC_GetMacAddress, - ARM_ETH_MAC_SetMacAddress, - ARM_ETH_MAC_SetAddressFilter, - ARM_ETH_MAC_SendFrame, - ARM_ETH_MAC_ReadFrame, - ARM_ETH_MAC_GetRxFrameSize, - ARM_ETH_MAC_GetRxFrameTime, - ARM_ETH_MAC_GetTxFrameTime, - ARM_ETH_MAC_ControlTimer, - ARM_ETH_MAC_Control, - ARM_ETH_MAC_PHY_Read, - ARM_ETH_MAC_PHY_Write -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c deleted file mode 100644 index 971fade020..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_ETH_PHY.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_ETH_PHY.h" - -#define ARM_ETH_PHY_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_ETH_PHY_API_VERSION, - ARM_ETH_PHY_DRV_VERSION -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_ETH_PHY_GetVersion(void) -{ -} - -int32_t ARM_ETH_PHY_Initialize(ARM_ETH_PHY_Read_t fn_read, ARM_ETH_PHY_Write_t fn_write) -{ -} - -int32_t ARM_ETH_PHY_Uninitialize(void) -{ -} - -int32_t ARM_ETH_PHY_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_ETH_PHY_SetInterface(uint32_t interface) -{ - switch (interface) - { - case ARM_ETH_INTERFACE_MII: - break; - case ARM_ETH_INTERFACE_RMII: - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_ETH_PHY_SetMode(uint32_t mode) -{ - switch (mode & ARM_ETH_PHY_SPEED_Msk) - { - case ARM_ETH_PHY_SPEED_10M: - break; - case ARM_ETH_PHY_SPEED_100M: - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - - switch (mode & ARM_ETH_PHY_DUPLEX_Msk) - { - case ARM_ETH_PHY_DUPLEX_HALF: - break; - case ARM_ETH_PHY_DUPLEX_FULL: - break; - } - - if (mode & ARM_ETH_PHY_AUTO_NEGOTIATE) - { - } - - if (mode & ARM_ETH_PHY_LOOPBACK) - { - } - - if (mode & ARM_ETH_PHY_ISOLATE) - { - } -} - -ARM_ETH_LINK_STATE ARM_ETH_PHY_GetLinkState(void) -{ -} - -ARM_ETH_LINK_INFO ARM_ETH_PHY_GetLinkInfo(void) -{ -} - -ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY_(ETH_PHY_NUM) = -{ - ARM_ETH_PHY_GetVersion, - ARM_ETH_PHY_Initialize, - ARM_ETH_PHY_Uninitialize, - ARM_ETH_PHY_PowerControl, - ARM_ETH_PHY_SetInterface, - ARM_ETH_PHY_SetMode, - ARM_ETH_PHY_GetLinkState, - ARM_ETH_PHY_GetLinkInfo, -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_Flash.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_Flash.c deleted file mode 100644 index 0f221da5f4..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_Flash.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_Flash.h" - -#define ARM_FLASH_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1, 0) /* driver version */ - -/* Sector Information */ -#ifdef FLASH_SECTORS -static ARM_FLASH_SECTOR FLASH_SECTOR_INFO[FLASH_SECTOR_COUNT] = { - FLASH_SECTORS -}; -#else -#define FLASH_SECTOR_INFO NULL -#endif - -/* Flash Information */ -static ARM_FLASH_INFO FlashInfo = { - 0, /* FLASH_SECTOR_INFO */ - 0, /* FLASH_SECTOR_COUNT */ - 0, /* FLASH_SECTOR_SIZE */ - 0, /* FLASH_PAGE_SIZE */ - 0, /* FLASH_PROGRAM_UNIT */ - 0 /* FLASH_ERASED_VALUE */ -}; - -/* Flash Status */ -static ARM_FLASH_STATUS FlashStatus; - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_FLASH_API_VERSION, - ARM_FLASH_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_FLASH_CAPABILITIES DriverCapabilities = { - 0, /* event_ready */ - 0, /* data_width = 0:8-bit, 1:16-bit, 2:32-bit */ - 0 /* erase_chip */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_Flash_GetVersion(void) -{ -} - -ARM_FLASH_CAPABILITIES ARM_Flash_GetCapabilities(void) -{ -} - -int32_t ARM_Flash_Initialize(ARM_Flash_SignalEvent_t cb_event) -{ -} - -int32_t ARM_Flash_Uninitialize(void) -{ -} - -int32_t ARM_Flash_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_Flash_ReadData(uint32_t addr, void *data, uint32_t cnt) -{ -} - -int32_t ARM_Flash_ProgramData(uint32_t addr, const void *data, uint32_t cnt) -{ -} - -int32_t ARM_Flash_EraseSector(uint32_t addr) -{ -} - -int32_t ARM_Flash_EraseChip(void) -{ -} - -ARM_FLASH_STATUS ARM_Flash_GetStatus(void) -{ -} - -ARM_FLASH_INFO * ARM_Flash_GetInfo(void) -{ -} - -void ARM_Flash_SignalEvent(uint32_t event) -{ -} -// End Flash Interface - -ARM_DRIVER_FLASH Driver_FLASH = { - ARM_Flash_GetVersion, - ARM_Flash_GetCapabilities, - ARM_Flash_Initialize, - ARM_Flash_Uninitialize, - ARM_Flash_PowerControl, - ARM_Flash_ReadData, - ARM_Flash_ProgramData, - ARM_Flash_EraseSector, - ARM_Flash_EraseChip, - ARM_Flash_GetStatus, - ARM_Flash_GetInfo -}; \ No newline at end of file diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_I2C.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_I2C.c deleted file mode 100644 index 99d82dd353..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_I2C.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_I2C.h" - -#define ARM_I2C_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_I2C_API_VERSION, - ARM_I2C_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_I2C_CAPABILITIES DriverCapabilities = { - 0 /* supports 10-bit addressing */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_I2C_GetVersion(void) -{ -} - -ARM_I2C_CAPABILITIES ARM_I2C_GetCapabilities(void) -{ -} - -int32_t ARM_I2C_Initialize(ARM_I2C_SignalEvent_t cb_event) -{ -} - -int32_t ARM_I2C_Uninitialize(void) -{ -} - -int32_t ARM_I2C_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_I2C_MasterTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending) -{ -} - -int32_t ARM_I2C_MasterReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending) -{ -} - -int32_t ARM_I2C_SlaveTransmit(const uint8_t *data, uint32_t num) -{ -} - -int32_t ARM_I2C_SlaveReceive(uint8_t *data, uint32_t num) -{ -} - -int32_t ARM_I2C_GetDataCount(void) -{ -} - -int32_t ARM_I2C_Control(uint32_t control, uint32_t arg) -{ - switch (control) - { - case ARM_I2C_OWN_ADDRESS: - break; - - case ARM_I2C_BUS_SPEED: - switch (arg) - { - case ARM_I2C_BUS_SPEED_STANDARD: - break; - case ARM_I2C_BUS_SPEED_FAST: - break; - case ARM_I2C_BUS_SPEED_FAST_PLUS: - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - break; - - case ARM_I2C_BUS_CLEAR: - break; - - case ARM_I2C_ABORT_TRANSFER: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -ARM_I2C_STATUS ARM_I2C_GetStatus(void) -{ -} - -void ARM_I2C_SignalEvent(uint32_t event) -{ - // function body -} - -// End I2C Interface - -ARM_DRIVER_I2C Driver_I2C = { - ARM_I2C_GetVersion, - ARM_I2C_GetCapabilities, - ARM_I2C_Initialize, - ARM_I2C_Uninitialize, - ARM_I2C_PowerControl, - ARM_I2C_MasterTransmit, - ARM_I2C_MasterReceive, - ARM_I2C_SlaveTransmit, - ARM_I2C_SlaveReceive, - ARM_I2C_GetDataCount, - ARM_I2C_Control, - ARM_I2C_GetStatus -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_MCI.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_MCI.c deleted file mode 100644 index a515074576..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_MCI.c +++ /dev/null @@ -1,219 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_MCI.h" - -#define ARM_MCI_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_MCI_API_VERSION, - ARM_MCI_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_MCI_CAPABILITIES DriverCapabilities = { - 0, /* cd_state */ - 0, /* cd_event */ - 0, /* vdd */ - 0, /* vdd_1v8 */ - 0, /* vccq */ - 0, /* vccq_1v8 */ - 0, /* vccq_1v2 */ - 1, /* data_width_4 */ - 1, /* data_width_8 */ - 0, /* data_width_4_ddr */ - 0, /* data_width_8_ddr */ - 0, /* high_speed */ - 0, /* uhs_signaling */ - 0, /* uhs_tuning */ - 0, /* uhs_sdr50 */ - 0, /* uhs_sdr104 */ - 0, /* uhs_ddr50 */ - 0, /* uhs_driver_type_a */ - 0, /* uhs_driver_type_c */ - 0, /* uhs_driver_type_d */ - 1, /* sdio_interrupt */ - 1, /* read_wait */ - 0, /* suspend_resume */ - 0, /* mmc_interrupt */ - 0, /* mmc_boot */ - 0, /* ccs */ - 0 /* ccs_timeout */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_MCI_GetVersion(void) -{ -} - -ARM_MCI_CAPABILITIES ARM_MCI_GetCapabilities(void) -{ -} - -int32_t ARM_MCI_Initialize(ARM_MCI_SignalEvent_t cb_event) -{ -} - -int32_t ARM_MCI_Uninitialize(void) -{ -} - -int32_t ARM_MCI_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_MCI_CardPower(uint32_t voltage) -{ - switch (voltage & ARM_MCI_POWER_VDD_Msk) - { - case ARM_MCI_POWER_VDD_OFF: - return ARM_DRIVER_OK; - - case ARM_MCI_POWER_VDD_3V3: - return ARM_DRIVER_OK; - - default: - break; - } -} - -int32_t ARM_MCI_ReadCD(void) -{ -} - -int32_t ARM_MCI_ReadWP(void) -{ -} - -int32_t ARM_MCI_SendCommand(uint32_t cmd, uint32_t arg, uint32_t flags, uint32_t *response) -{ -} - -int32_t ARM_MCI_SetupTransfer(uint8_t *data, uint32_t block_count, uint32_t block_size, uint32_t mode) -{ -} - -int32_t ARM_MCI_AbortTransfer(void) -{ -} - -int32_t ARM_MCI_Control(uint32_t control, uint32_t arg) -{ - switch (control) - { - case ARM_MCI_BUS_SPEED: - break; - - case ARM_MCI_BUS_SPEED_MODE: - break; - - case ARM_MCI_BUS_CMD_MODE: - /* Implement external pull-up control to support MMC cards in open-drain mode */ - /* Default mode is push-pull and is configured in Driver_MCI0.Initialize() */ - if (arg == ARM_MCI_BUS_CMD_PUSH_PULL) - { - /* Configure external circuit to work in push-pull mode */ - } - else if (arg == ARM_MCI_BUS_CMD_OPEN_DRAIN) - { - /* Configure external circuit to work in open-drain mode */ - } - else - { - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - break; - - case ARM_MCI_BUS_DATA_WIDTH: - switch (arg) - { - case ARM_MCI_BUS_DATA_WIDTH_1: - break; - case ARM_MCI_BUS_DATA_WIDTH_4: - break; - case ARM_MCI_BUS_DATA_WIDTH_8: - break; - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } - break; - - case ARM_MCI_CONTROL_RESET: - break; - - case ARM_MCI_CONTROL_CLOCK_IDLE: - break; - - case ARM_MCI_DATA_TIMEOUT: - break; - - case ARM_MCI_MONITOR_SDIO_INTERRUPT: - break; - - case ARM_MCI_CONTROL_READ_WAIT: - break; - - case ARM_MCI_DRIVER_STRENGTH: - default: return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -ARM_MCI_STATUS ARM_MCI_GetStatus(void) -{ -} - -void ARM_MCI_SignalEvent(uint32_t event) -{ - // function body -} - -// End MCI Interface - -ARM_DRIVER_MCI Driver_MCI = { - ARM_MCI_GetVersion, - ARM_MCI_GetCapabilities, - ARM_MCI_Initialize, - ARM_MCI_Uninitialize, - ARM_MCI_PowerControl, - ARM_MCI_CardPower, - ARM_MCI_ReadCD, - ARM_MCI_ReadWP, - ARM_MCI_SendCommand, - ARM_MCI_SetupTransfer, - ARM_MCI_AbortTransfer, - ARM_MCI_Control, - ARM_MCI_GetStatus -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_SAI.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_SAI.c deleted file mode 100644 index bc0746c962..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_SAI.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_SAI.h" - -#define ARM_SAI_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_SAI_API_VERSION, - ARM_SAI_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_SAI_CAPABILITIES DriverCapabilities = { - 1, /* supports asynchronous Transmit/Receive */ - 0, /* supports synchronous Transmit/Receive */ - 0, /* supports user defined Protocol */ - 1, /* supports I2S Protocol */ - 0, /* supports MSB/LSB justified Protocol */ - 0, /* supports PCM short/long frame Protocol */ - 0, /* supports AC'97 Protocol */ - 0, /* supports Mono mode */ - 0, /* supports Companding */ - 0, /* supports MCLK (Master Clock) pin */ - 0 /* supports Frame error event: \ref ARM_SAI_EVENT_FRAME_ERROR */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_SAI_GetVersion (void) -{ -} - -ARM_SAI_CAPABILITIES ARM_SAI_GetCapabilities (void) -{ -} - -int32_t ARM_SAI_Initialize (ARM_SAI_SignalEvent_t cb_event) -{ -} - -int32_t ARM_SAI_Uninitialize (void) -{ -} - -int32_t ARM_SAI_PowerControl (ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_SAI_Send (const void *data, uint32_t num) -{ -} - -int32_t ARM_SAI_Receive (void *data, uint32_t num) -{ -} - -uint32_t ARM_SAI_GetTxCount (void) -{ -} - -uint32_t ARM_SAI_GetRxCount (void) -{ -} - -int32_t ARM_SAI_Control (uint32_t control, uint32_t arg1, uint32_t arg2) -{ -} - -ARM_SAI_STATUS ARM_SAI_GetStatus (void) -{ -} - -void ARM_SAI_SignalEvent(uint32_t event) -{ - // function body -} - -// End SAI Interface - -ARM_DRIVER_SAI Driver_SAI = { - ARM_SAI_GetVersion, - ARM_SAI_GetCapabilities, - ARM_SAI_Initialize, - ARM_SAI_Uninitialize, - ARM_SAI_PowerControl, - ARM_SAI_Send, - ARM_SAI_Receive, - ARM_SAI_GetTxCount, - ARM_SAI_GetRxCount, - ARM_SAI_Control, - ARM_SAI_GetStatus -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_SPI.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_SPI.c deleted file mode 100644 index 9f31654fa9..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_SPI.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_SPI.h" - -#define ARM_SPI_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_SPI_API_VERSION, - ARM_SPI_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_SPI_CAPABILITIES DriverCapabilities = { - 1, /* Simplex Mode (Master and Slave) */ - 1, /* TI Synchronous Serial Interface */ - 1, /* Microwire Interface */ - 0 /* Signal Mode Fault event: \ref ARM_SPI_EVENT_MODE_FAULT */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_SPI_GetVersion(void) -{ -} - -ARM_SPI_CAPABILITIES ARM_SPI_GetCapabilities(void) -{ -} - -int32_t ARM_SPI_Initialize(ARM_SPI_SignalEvent_t cb_event) -{ -} - -int32_t ARM_SPI_Uninitialize(void) -{ -} - -int32_t ARM_SPI_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_SPI_Send(const void *data, uint32_t num) -{ -} - -int32_t ARM_SPI_Receive(void *data, uint32_t num) -{ -} - -int32_t ARM_SPI_Transfer(const void *data_out, void *data_in, uint32_t num) -{ -} - -uint32_t ARM_SPI_GetDataCount(void) -{ -} - -int32_t ARM_SPI_Control(uint32_t control, uint32_t arg) -{ - switch (control & ARM_SPI_CONTROL_Msk) - { - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - - case ARM_SPI_MODE_INACTIVE: // SPI Inactive - return ARM_DRIVER_OK; - - case ARM_SPI_MODE_MASTER: // SPI Master (Output on MOSI, Input on MISO); arg = Bus Speed in bps - break; - - case ARM_SPI_MODE_SLAVE: // SPI Slave (Output on MISO, Input on MOSI) - break; - - case ARM_SPI_MODE_MASTER_SIMPLEX: // SPI Master (Output/Input on MOSI); arg = Bus Speed in bps - case ARM_SPI_MODE_SLAVE_SIMPLEX: // SPI Slave (Output/Input on MISO) - return ARM_SPI_ERROR_MODE; - - case ARM_SPI_SET_BUS_SPEED: // Set Bus Speed in bps; arg = value - break; - - case ARM_SPI_GET_BUS_SPEED: // Get Bus Speed in bps - break; - - case ARM_SPI_SET_DEFAULT_TX_VALUE: // Set default Transmit value; arg = value - break; - - case ARM_SPI_CONTROL_SS: // Control Slave Select; arg = 0:inactive, 1:active - break; - - case ARM_SPI_ABORT_TRANSFER: // Abort current data transfer - break; - } -} - -ARM_SPI_STATUS ARM_SPI_GetStatus(void) -{ -} - -void ARM_SPI_SignalEvent(uint32_t event) -{ - // function body -} - -// End SPI Interface - -ARM_DRIVER_SPI Driver_SPI = { - ARM_SPI_GetVersion, - ARM_SPI_GetCapabilities, - ARM_SPI_Initialize, - ARM_SPI_Uninitialize, - ARM_SPI_PowerControl, - ARM_SPI_Send, - ARM_SPI_Receive, - ARM_SPI_Transfer, - ARM_SPI_GetDataCount, - ARM_SPI_Control, - ARM_SPI_GetStatus -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_Storage.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_Storage.c deleted file mode 100644 index 2b24436732..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_Storage.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#include "Driver_Storage.h" - -#define ARM_STORAGE_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_STORAGE_API_VERSION, - ARM_STORAGE_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_STORAGE_CAPABILITIES DriverCapabilities = { - 1, /* Asynchronous Mode */ - 1, /* Supports EraseAll operation */ - 0 /* Reserved */ -}; - - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_Storage_GetVersion (void) { -} - -ARM_STORAGE_CAPABILITIES ARM_Storage_GetCapabilities (void) { -} - -int32_t ARM_Storage_Initialize (ARM_Storage_Callback_t callback) { -} - -int32_t ARM_Storage_Uninitialize (void) { -} - -int32_t ARM_Storage_PowerControl (ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_Storage_ReadData (uint64_t addr, void *data, uint32_t size) { -} - -int32_t ARM_Storage_ProgramData (uint64_t addr, const void *data, uint32_t size) { -} - -int32_t ARM_Storage_Erase (uint64_t addr, uint32_t size) { -} - -int32_t ARM_Storage_EraseAll (void) { -} - -ARM_STORAGE_STATUS ARM_Storage_GetStatus (void) { -} - -int32_t ARM_Storage_GetInfo (ARM_STORAGE_INFO *info) { -} - -uint32_t ARM_Storage_ResolveAddress(uint64_t addr) { -} - -int32_t ARM_Storage_GetNextBlock(const ARM_STORAGE_BLOCK* prev_block, ARM_STORAGE_BLOCK *next_block) { -} - -int32_t ARM_Storage_GetBlock(uint64_t addr, ARM_STORAGE_BLOCK *block) { -} -// End Storage Interface - -ARM_DRIVER_STORAGE Driver_STORAGE = { - ARM_Storage_GetVersion, - ARM_Storage_GetCapabilities, - ARM_Storage_Initialize, - ARM_Storage_Uninitialize, - ARM_Storage_PowerControl, - ARM_Storage_ReadData, - ARM_Storage_ProgramData, - ARM_Storage_Erase, - ARM_Storage_EraseAll, - ARM_Storage_GetStatus, - ARM_Storage_GetInfo, - ARM_Storage_ResolveAddress, - ARM_Storage_GetNextBlock, - ARM_Storage_GetBlock -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USART.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USART.c deleted file mode 100644 index 6270a4cd91..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USART.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_USART.h" - -#define ARM_USART_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_USART_API_VERSION, - ARM_USART_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_USART_CAPABILITIES DriverCapabilities = { - 1, /* supports UART (Asynchronous) mode */ - 0, /* supports Synchronous Master mode */ - 0, /* supports Synchronous Slave mode */ - 0, /* supports UART Single-wire mode */ - 0, /* supports UART IrDA mode */ - 0, /* supports UART Smart Card mode */ - 0, /* Smart Card Clock generator available */ - 0, /* RTS Flow Control available */ - 0, /* CTS Flow Control available */ - 0, /* Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE */ - 0, /* Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT */ - 0, /* RTS Line: 0=not available, 1=available */ - 0, /* CTS Line: 0=not available, 1=available */ - 0, /* DTR Line: 0=not available, 1=available */ - 0, /* DSR Line: 0=not available, 1=available */ - 0, /* DCD Line: 0=not available, 1=available */ - 0, /* RI Line: 0=not available, 1=available */ - 0, /* Signal CTS change event: \ref ARM_USART_EVENT_CTS */ - 0, /* Signal DSR change event: \ref ARM_USART_EVENT_DSR */ - 0, /* Signal DCD change event: \ref ARM_USART_EVENT_DCD */ - 0 /* Signal RI change event: \ref ARM_USART_EVENT_RI */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_USART_GetVersion(void) -{ -} - -ARM_USART_CAPABILITIES ARM_USART_GetCapabilities(void) -{ -} - -int32_t ARM_USART_Initialize(ARM_USART_SignalEvent_t cb_event) -{ -} - -int32_t ARM_USART_Uninitialize(void) -{ -} - -int32_t ARM_USART_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_USART_Send(const void *data, uint32_t num) -{ -} - -int32_t ARM_USART_Receive(void *data, uint32_t num) -{ -} - -int32_t ARM_USART_Transfer(const void *data_out, void *data_in, uint32_t num) -{ -} - -uint32_t ARM_USART_GetTxCount(void) -{ -} - -uint32_t ARM_USART_GetRxCount(void) -{ -} - -int32_t ARM_USART_Control(uint32_t control, uint32_t arg) -{ -} - -ARM_USART_STATUS ARM_USART_GetStatus(void) -{ -} - -int32_t ARM_USART_SetModemControl(ARM_USART_MODEM_CONTROL control) -{ -} - -ARM_USART_MODEM_STATUS ARM_USART_GetModemStatus(void) -{ -} - -void ARM_USART_SignalEvent(uint32_t event) -{ - // function body -} - -// End USART Interface - -ARM_DRIVER_USART Driver_USART = { - ARM_USART_GetVersion, - ARM_USART_GetCapabilities, - ARM_USART_Initialize, - ARM_USART_Uninitialize, - ARM_USART_PowerControl, - ARM_USART_Send, - ARM_USART_Receive, - ARM_USART_Transfer, - ARM_USART_GetTxCount, - ARM_USART_GetRxCount, - ARM_USART_Control, - ARM_USART_GetStatus, - ARM_USART_SetModemControl, - ARM_USART_GetModemStatus -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USBD.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USBD.c deleted file mode 100644 index effbdf7922..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USBD.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_USBD.h" - -#define ARM_USBD_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION usbd_driver_version = { - ARM_USBD_API_VERSION, - ARM_USBD_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_USBD_CAPABILITIES usbd_driver_capabilities = { - 0, /* vbus_detection */ - 0, /* event_vbus_on */ - 0 /* event_vbus_off */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_USBD_GetVersion(void) -{ -} - -ARM_USBD_CAPABILITIES ARM_USBD_GetCapabilities(void) -{ -} - -int32_t ARM_USBD_Initialize(ARM_USBD_SignalDeviceEvent_t cb_device_event, - ARM_USBD_SignalEndpointEvent_t cb_endpoint_event) -{ -} - -int32_t ARM_USBD_Uninitialize(void) -{ -} - -int32_t ARM_USBD_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_USBD_DeviceConnect(void) -{ -} - -int32_t ARM_USBD_DeviceDisconnect(void) -{ -} - -ARM_USBD_STATE ARM_USBD_DeviceGetState(void) -{ -} - -int32_t ARM_USBD_DeviceRemoteWakeup(void) -{ -} - -int32_t ARM_USBD_DeviceSetAddress(uint8_t dev_addr) -{ -} - -int32_t ARM_USBD_ReadSetupPacket(uint8_t *setup) -{ -} - -int32_t ARM_USBD_EndpointConfigure(uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size) -{ -} - -int32_t ARM_USBD_EndpointUnconfigure(uint8_t ep_addr) -{ -} - -int32_t ARM_USBD_EndpointStall(uint8_t ep_addr, bool stall) -{ -} - -int32_t ARM_USBD_EndpointTransfer(uint8_t ep_addr, uint8_t *data, uint32_t num) -{ -} - -uint32_t ARM_USBD_EndpointTransferGetResult(uint8_t ep_addr) -{ -} - -int32_t ARM_USBD_EndpointTransferAbort(uint8_t ep_addr) -{ -} - -uint16_t ARM_USBD_GetFrameNumber(void) -{ -} - -void ARM_USBD_SignalDeviceEvent(uint32_t event) -{ - // function body -} - -void ARM_USBD_SignalEndpointEvent(uint8_t ep_addr, uint32_t ep_event) -{ - // function body -} - -// End USBD Interface - -ARM_DRIVER_USBD Driver_USBD = -{ - ARM_USBD_GetVersion, - ARM_USBD_GetCapabilities, - ARM_USBD_Initialize, - ARM_USBD_Uninitialize, - ARM_USBD_PowerControl, - ARM_USBD_DeviceConnect, - ARM_USBD_DeviceDisconnect, - ARM_USBD_DeviceGetState, - ARM_USBD_DeviceRemoteWakeup, - ARM_USBD_DeviceSetAddress, - ARM_USBD_ReadSetupPacket, - ARM_USBD_EndpointConfigure, - ARM_USBD_EndpointUnconfigure, - ARM_USBD_EndpointStall, - ARM_USBD_EndpointTransfer, - ARM_USBD_EndpointTransferGetResult, - ARM_USBD_EndpointTransferAbort, - ARM_USBD_GetFrameNumber -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USBH.c b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USBH.c deleted file mode 100644 index 12074ed7ab..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/DriverTemplates/Driver_USBH.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Copyright (c) 2013-2018 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_USBH.h" - -/* USB Host Driver */ - -#define ARM_USBH_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) /* driver version */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION usbh_driver_version = { - ARM_USBH_API_VERSION, - ARM_USBH_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_USBH_CAPABILITIES usbd_driver_capabilities = { - 0x0001, /* Root HUB available Ports Mask */ - 0, /* Automatic SPLIT packet handling */ - 0, /* Signal Connect event */ - 0, /* Signal Disconnect event */ - 0 /* Signal Overcurrent event */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_USBH_GetVersion(void) -{ -} - -ARM_USBH_CAPABILITIES ARM_USBH_GetCapabilities(void) -{ -} - -int32_t ARM_USBH_Initialize(ARM_USBH_SignalPortEvent_t cb_port_event, - ARM_USBH_SignalEndpointEvent_t cb_endpoint_event) -{ -} - -int32_t ARM_USBH_Uninitialize(void) -{ -} - -int32_t ARM_USBH_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_USBH_PortVbusOnOff(uint8_t port, bool vbus) -{ -} - -int32_t ARM_USBH_PortReset(uint8_t port) -{ -} - -int32_t ARM_USBH_PortSuspend(uint8_t port) -{ -} - -int32_t ARM_USBH_PortResume(uint8_t port) -{ -} - -ARM_USBH_PORT_STATE ARM_USBH_PortGetState(uint8_t port) -{ -} - -ARM_USBH_EP_HANDLE ARM_USBH_EndpointCreate(uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size, - uint8_t ep_interval) -{ -} - -int32_t ARM_USBH_EndpointModify(ARM_USBH_EP_HANDLE ep_hndl, - uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint16_t ep_max_packet_size) -{ -} - -int32_t ARM_USBH_EndpointDelete(ARM_USBH_EP_HANDLE ep_hndl) -{ -} - -int32_t ARM_USBH_EndpointReset(ARM_USBH_EP_HANDLE ep_hndl) -{ -} - -int32_t ARM_USBH_EndpointTransfer(ARM_USBH_EP_HANDLE ep_hndl, - uint32_t packet, - uint8_t *data, - uint32_t num) -{ -} - -uint32_t ARM_USBH_EndpointTransferGetResult(ARM_USBH_EP_HANDLE ep_hndl) -{ -} - -int32_t ARM_USBH_EndpointTransferAbort(ARM_USBH_EP_HANDLE ep_hndl) -{ -} - -uint16_t ARM_USBH_GetFrameNumber(void) -{ -} - -void ARM_USBH_SignalPortEvent(uint8_t port, uint32_t event) -{ - // function body -} - -void ARM_USBH_SignalEndpointEvent(ARM_USBH_EP_HANDLE ep_hndl, uint32_t event) -{ - // function body -} - -/* USB Host HCI (OHCI/EHCI) Driver */ - -/* Driver Version */ -static const ARM_DRIVER_VERSION usbh_hci_driver_version = { - ARM_USBH_API_VERSION, - ARM_USBH_DRV_VERSION -}; - -/* Driver Capabilities */ -static const ARM_USBH_HCI_CAPABILITIES usbh_hci_driver_capabilities = { - 0x0001 /* Root HUB available Ports Mask */ -}; - -// -// Functions -// - -ARM_DRIVER_VERSION ARM_USBH_HCI_GetVersion(void) -{ -} - -ARM_USBH_HCI_CAPABILITIES ARM_USBH_HCI_GetCapabilities(void) -{ -} - -int32_t ARM_USBH_HCI_Initialize(ARM_USBH_HCI_Interrupt_t cb_interrupt) -{ -} - -int32_t ARM_USBH_HCI_Uninitialize(void) -{ -} - -int32_t ARM_USBH_HCI_PowerControl(ARM_POWER_STATE state) -{ - switch (state) - { - case ARM_POWER_OFF: - break; - - case ARM_POWER_LOW: - break; - - case ARM_POWER_FULL: - break; - - default: - return ARM_DRIVER_ERROR_UNSUPPORTED; - } -} - -int32_t ARM_USBH_HCI_PortVbusOnOff(uint8_t port, bool vbus) -{ -} - -void ARM_USBH_HCI_Interrupt(void) -{ - // function body -} - -// End USBH Interface - -ARM_DRIVER_USBH_HCI Driver_USBH_HCI = { - ARM_USBH_HCI_GetVersion, - ARM_USBH_HCI_GetCapabilities, - ARM_USBH_HCI_Initialize, - ARM_USBH_HCI_Uninitialize, - ARM_USBH_HCI_PowerControl, - ARM_USBH_HCI_PortVbusOnOff -}; diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_CAN.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_CAN.h deleted file mode 100644 index 5c567e6fc6..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_CAN.h +++ /dev/null @@ -1,382 +0,0 @@ -/* - * Copyright (c) 2015-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 13. Sept 2017 - * $Revision: V1.2 - * - * Project: CAN (Controller Area Network) Driver definitions - */ - -/* History: - * Version 1.2 - * Added ARM_CAN_UNIT_STATE_BUS_OFF unit state and - * ARM_CAN_EVENT_UNIT_INACTIVE unit event - * Version 1.1 - * ARM_CAN_STATUS made volatile - * Version 1.0 - * Initial release - */ - -#ifndef DRIVER_CAN_H_ -#define DRIVER_CAN_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_Common.h" - -#define ARM_CAN_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,2) /* API version */ - - -/****** CAN Bitrate selection codes *****/ -typedef enum _ARM_CAN_BITRATE_SELECT { - ARM_CAN_BITRATE_NOMINAL, ///< Select nominal (flexible data-rate arbitration) bitrate - ARM_CAN_BITRATE_FD_DATA ///< Select flexible data-rate data bitrate -} ARM_CAN_BITRATE_SELECT; - -/****** CAN Bit Propagation Segment codes (PROP_SEG) *****/ -#define ARM_CAN_BIT_PROP_SEG_Pos 0UL ///< bits 7..0 -#define ARM_CAN_BIT_PROP_SEG_Msk (0xFFUL << ARM_CAN_BIT_PROP_SEG_Pos) -#define ARM_CAN_BIT_PROP_SEG(x) (((x) << ARM_CAN_BIT_PROP_SEG_Pos) & ARM_CAN_BIT_PROP_SEG_Msk) - -/****** CAN Bit Phase Buffer Segment 1 (PHASE_SEG1) codes *****/ -#define ARM_CAN_BIT_PHASE_SEG1_Pos 8UL ///< bits 15..8 -#define ARM_CAN_BIT_PHASE_SEG1_Msk (0xFFUL << ARM_CAN_BIT_PHASE_SEG1_Pos) -#define ARM_CAN_BIT_PHASE_SEG1(x) (((x) << ARM_CAN_BIT_PHASE_SEG1_Pos) & ARM_CAN_BIT_PHASE_SEG1_Msk) - -/****** CAN Bit Phase Buffer Segment 2 (PHASE_SEG2) codes *****/ -#define ARM_CAN_BIT_PHASE_SEG2_Pos 16UL ///< bits 23..16 -#define ARM_CAN_BIT_PHASE_SEG2_Msk (0xFFUL << ARM_CAN_BIT_PHASE_SEG2_Pos) -#define ARM_CAN_BIT_PHASE_SEG2(x) (((x) << ARM_CAN_BIT_PHASE_SEG2_Pos) & ARM_CAN_BIT_PHASE_SEG2_Msk) - -/****** CAN Bit (Re)Synchronization Jump Width Segment (SJW) *****/ -#define ARM_CAN_BIT_SJW_Pos 24UL ///< bits 28..24 -#define ARM_CAN_BIT_SJW_Msk (0x1FUL << ARM_CAN_BIT_SJW_Pos) -#define ARM_CAN_BIT_SJW(x) (((x) << ARM_CAN_BIT_SJW_Pos) & ARM_CAN_BIT_SJW_Msk) - -/****** CAN Mode codes *****/ -typedef enum _ARM_CAN_MODE { - ARM_CAN_MODE_INITIALIZATION, ///< Initialization mode - ARM_CAN_MODE_NORMAL, ///< Normal operation mode - ARM_CAN_MODE_RESTRICTED, ///< Restricted operation mode - ARM_CAN_MODE_MONITOR, ///< Bus monitoring mode - ARM_CAN_MODE_LOOPBACK_INTERNAL, ///< Loopback internal mode - ARM_CAN_MODE_LOOPBACK_EXTERNAL ///< Loopback external mode -} ARM_CAN_MODE; - -/****** CAN Filter Operation codes *****/ -typedef enum _ARM_CAN_FILTER_OPERATION { - ARM_CAN_FILTER_ID_EXACT_ADD, ///< Add exact id filter - ARM_CAN_FILTER_ID_EXACT_REMOVE, ///< Remove exact id filter - ARM_CAN_FILTER_ID_RANGE_ADD, ///< Add range id filter - ARM_CAN_FILTER_ID_RANGE_REMOVE, ///< Remove range id filter - ARM_CAN_FILTER_ID_MASKABLE_ADD, ///< Add maskable id filter - ARM_CAN_FILTER_ID_MASKABLE_REMOVE ///< Remove maskable id filter -} ARM_CAN_FILTER_OPERATION; - -/****** CAN Object Configuration codes *****/ -typedef enum _ARM_CAN_OBJ_CONFIG { - ARM_CAN_OBJ_INACTIVE, ///< CAN object inactive - ARM_CAN_OBJ_TX, ///< CAN transmit object - ARM_CAN_OBJ_RX, ///< CAN receive object - ARM_CAN_OBJ_RX_RTR_TX_DATA, ///< CAN object that on RTR reception automatically transmits Data Frame - ARM_CAN_OBJ_TX_RTR_RX_DATA ///< CAN object that transmits RTR and automatically receives Data Frame -} ARM_CAN_OBJ_CONFIG; - -/** -\brief CAN Object Capabilities -*/ -typedef struct _ARM_CAN_OBJ_CAPABILITIES { - uint32_t tx : 1; ///< Object supports transmission - uint32_t rx : 1; ///< Object supports reception - uint32_t rx_rtr_tx_data : 1; ///< Object supports RTR reception and automatic Data Frame transmission - uint32_t tx_rtr_rx_data : 1; ///< Object supports RTR transmission and automatic Data Frame reception - uint32_t multiple_filters : 1; ///< Object allows assignment of multiple filters to it - uint32_t exact_filtering : 1; ///< Object supports exact identifier filtering - uint32_t range_filtering : 1; ///< Object supports range identifier filtering - uint32_t mask_filtering : 1; ///< Object supports mask identifier filtering - uint32_t message_depth : 8; ///< Number of messages buffers (FIFO) for that object - uint32_t reserved : 16; ///< Reserved (must be zero) -} ARM_CAN_OBJ_CAPABILITIES; - -/****** CAN Control Function Operation codes *****/ -#define ARM_CAN_CONTROL_Pos 0UL -#define ARM_CAN_CONTROL_Msk (0xFFUL << ARM_CAN_CONTROL_Pos) -#define ARM_CAN_SET_FD_MODE (1UL << ARM_CAN_CONTROL_Pos) ///< Set FD operation mode; arg: 0 = disable, 1 = enable -#define ARM_CAN_ABORT_MESSAGE_SEND (2UL << ARM_CAN_CONTROL_Pos) ///< Abort sending of CAN message; arg = object -#define ARM_CAN_CONTROL_RETRANSMISSION (3UL << ARM_CAN_CONTROL_Pos) ///< Enable/disable automatic retransmission; arg: 0 = disable, 1 = enable (default state) -#define ARM_CAN_SET_TRANSCEIVER_DELAY (4UL << ARM_CAN_CONTROL_Pos) ///< Set transceiver delay; arg = delay in time quanta - -/****** CAN ID Frame Format codes *****/ -#define ARM_CAN_ID_IDE_Pos 31UL -#define ARM_CAN_ID_IDE_Msk (1UL << ARM_CAN_ID_IDE_Pos) - -/****** CAN Identifier encoding *****/ -#define ARM_CAN_STANDARD_ID(id) (id & 0x000007FFUL) ///< CAN identifier in standard format (11-bits) -#define ARM_CAN_EXTENDED_ID(id) ((id & 0x1FFFFFFFUL) | ARM_CAN_ID_IDE_Msk)///< CAN identifier in extended format (29-bits) - -/** -\brief CAN Message Information -*/ -typedef struct _ARM_CAN_MSG_INFO { - uint32_t id; ///< CAN identifier with frame format specifier (bit 31) - uint32_t rtr : 1; ///< Remote transmission request frame - uint32_t edl : 1; ///< Flexible data-rate format extended data length - uint32_t brs : 1; ///< Flexible data-rate format with bitrate switch - uint32_t esi : 1; ///< Flexible data-rate format error state indicator - uint32_t dlc : 4; ///< Data length code - uint32_t reserved : 24; -} ARM_CAN_MSG_INFO; - -/****** CAN specific error code *****/ -#define ARM_CAN_INVALID_BITRATE_SELECT (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Bitrate selection not supported -#define ARM_CAN_INVALID_BITRATE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Requested bitrate not supported -#define ARM_CAN_INVALID_BIT_PROP_SEG (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Propagation segment value not supported -#define ARM_CAN_INVALID_BIT_PHASE_SEG1 (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Phase segment 1 value not supported -#define ARM_CAN_INVALID_BIT_PHASE_SEG2 (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Phase segment 2 value not supported -#define ARM_CAN_INVALID_BIT_SJW (ARM_DRIVER_ERROR_SPECIFIC - 6) ///< SJW value not supported -#define ARM_CAN_NO_MESSAGE_AVAILABLE (ARM_DRIVER_ERROR_SPECIFIC - 7) ///< Message is not available - -/****** CAN Status codes *****/ -#define ARM_CAN_UNIT_STATE_INACTIVE (0U) ///< Unit state: Not active on bus (initialization) -#define ARM_CAN_UNIT_STATE_ACTIVE (1U) ///< Unit state: Active on bus (can generate active error frame) -#define ARM_CAN_UNIT_STATE_PASSIVE (2U) ///< Unit state: Error passive (can not generate active error frame) -#define ARM_CAN_UNIT_STATE_BUS_OFF (3U) ///< Unit state: Bus-off (can recover to active state) -#define ARM_CAN_LEC_NO_ERROR (0U) ///< Last error code: No error -#define ARM_CAN_LEC_BIT_ERROR (1U) ///< Last error code: Bit error -#define ARM_CAN_LEC_STUFF_ERROR (2U) ///< Last error code: Bit stuffing error -#define ARM_CAN_LEC_CRC_ERROR (3U) ///< Last error code: CRC error -#define ARM_CAN_LEC_FORM_ERROR (4U) ///< Last error code: Illegal fixed-form bit -#define ARM_CAN_LEC_ACK_ERROR (5U) ///< Last error code: Acknowledgment error - -/** -\brief CAN Status -*/ -typedef volatile struct _ARM_CAN_STATUS { - uint32_t unit_state : 4; ///< Unit bus state - uint32_t last_error_code : 4; ///< Last error code - uint32_t tx_error_count : 8; ///< Transmitter error count - uint32_t rx_error_count : 8; ///< Receiver error count - uint32_t reserved : 8; -} ARM_CAN_STATUS; - - -/****** CAN Unit Event *****/ -#define ARM_CAN_EVENT_UNIT_INACTIVE (0U) ///< Unit entered Inactive state -#define ARM_CAN_EVENT_UNIT_ACTIVE (1U) ///< Unit entered Error Active state -#define ARM_CAN_EVENT_UNIT_WARNING (2U) ///< Unit entered Error Warning state (one or both error counters >= 96) -#define ARM_CAN_EVENT_UNIT_PASSIVE (3U) ///< Unit entered Error Passive state -#define ARM_CAN_EVENT_UNIT_BUS_OFF (4U) ///< Unit entered Bus-off state - -/****** CAN Send/Receive Event *****/ -#define ARM_CAN_EVENT_SEND_COMPLETE (1UL << 0) ///< Send complete -#define ARM_CAN_EVENT_RECEIVE (1UL << 1) ///< Message received -#define ARM_CAN_EVENT_RECEIVE_OVERRUN (1UL << 2) ///< Received message overrun - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_CAN_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn ARM_CAN_CAPABILITIES ARM_CAN_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_CAN_CAPABILITIES - - \fn int32_t ARM_CAN_Initialize (ARM_CAN_SignalUnitEvent_t cb_unit_event, - ARM_CAN_SignalObjectEvent_t cb_object_event) - \brief Initialize CAN interface and register signal (callback) functions. - \param[in] cb_unit_event Pointer to \ref ARM_CAN_SignalUnitEvent callback function - \param[in] cb_object_event Pointer to \ref ARM_CAN_SignalObjectEvent callback function - \return \ref execution_status - - \fn int32_t ARM_CAN_Uninitialize (void) - \brief De-initialize CAN interface. - \return \ref execution_status - - \fn int32_t ARM_CAN_PowerControl (ARM_POWER_STATE state) - \brief Control CAN interface power. - \param[in] state Power state - - \ref ARM_POWER_OFF : power off: no operation possible - - \ref ARM_POWER_LOW : low power mode: retain state, detect and signal wake-up events - - \ref ARM_POWER_FULL : power on: full operation at maximum performance - \return \ref execution_status - - \fn uint32_t ARM_CAN_GetClock (void) - \brief Retrieve CAN base clock frequency. - \return base clock frequency - - \fn int32_t ARM_CAN_SetBitrate (ARM_CAN_BITRATE_SELECT select, uint32_t bitrate, uint32_t bit_segments) - \brief Set bitrate for CAN interface. - \param[in] select Bitrate selection - - \ref ARM_CAN_BITRATE_NOMINAL : nominal (flexible data-rate arbitration) bitrate - - \ref ARM_CAN_BITRATE_FD_DATA : flexible data-rate data bitrate - \param[in] bitrate Bitrate - \param[in] bit_segments Bit segments settings - - \ref ARM_CAN_BIT_PROP_SEG(x) : number of time quanta for propagation time segment - - \ref ARM_CAN_BIT_PHASE_SEG1(x) : number of time quanta for phase buffer segment 1 - - \ref ARM_CAN_BIT_PHASE_SEG2(x) : number of time quanta for phase buffer Segment 2 - - \ref ARM_CAN_BIT_SJW(x) : number of time quanta for (re-)synchronization jump width - \return \ref execution_status - - \fn int32_t ARM_CAN_SetMode (ARM_CAN_MODE mode) - \brief Set operating mode for CAN interface. - \param[in] mode Operating mode - - \ref ARM_CAN_MODE_INITIALIZATION : initialization mode - - \ref ARM_CAN_MODE_NORMAL : normal operation mode - - \ref ARM_CAN_MODE_RESTRICTED : restricted operation mode - - \ref ARM_CAN_MODE_MONITOR : bus monitoring mode - - \ref ARM_CAN_MODE_LOOPBACK_INTERNAL : loopback internal mode - - \ref ARM_CAN_MODE_LOOPBACK_EXTERNAL : loopback external mode - \return \ref execution_status - - \fn ARM_CAN_OBJ_CAPABILITIES ARM_CAN_ObjectGetCapabilities (uint32_t obj_idx) - \brief Retrieve capabilities of an object. - \param[in] obj_idx Object index - \return \ref ARM_CAN_OBJ_CAPABILITIES - - \fn int32_t ARM_CAN_ObjectSetFilter (uint32_t obj_idx, ARM_CAN_FILTER_OPERATION operation, uint32_t id, uint32_t arg) - \brief Add or remove filter for message reception. - \param[in] obj_idx Object index of object that filter should be or is assigned to - \param[in] operation Operation on filter - - \ref ARM_CAN_FILTER_ID_EXACT_ADD : add exact id filter - - \ref ARM_CAN_FILTER_ID_EXACT_REMOVE : remove exact id filter - - \ref ARM_CAN_FILTER_ID_RANGE_ADD : add range id filter - - \ref ARM_CAN_FILTER_ID_RANGE_REMOVE : remove range id filter - - \ref ARM_CAN_FILTER_ID_MASKABLE_ADD : add maskable id filter - - \ref ARM_CAN_FILTER_ID_MASKABLE_REMOVE : remove maskable id filter - \param[in] id ID or start of ID range (depending on filter type) - \param[in] arg Mask or end of ID range (depending on filter type) - \return \ref execution_status - - \fn int32_t ARM_CAN_ObjectConfigure (uint32_t obj_idx, ARM_CAN_OBJ_CONFIG obj_cfg) - \brief Configure object. - \param[in] obj_idx Object index - \param[in] obj_cfg Object configuration state - - \ref ARM_CAN_OBJ_INACTIVE : deactivate object - - \ref ARM_CAN_OBJ_RX : configure object for reception - - \ref ARM_CAN_OBJ_TX : configure object for transmission - - \ref ARM_CAN_OBJ_RX_RTR_TX_DATA : configure object that on RTR reception automatically transmits Data Frame - - \ref ARM_CAN_OBJ_TX_RTR_RX_DATA : configure object that transmits RTR and automatically receives Data Frame - \return \ref execution_status - - \fn int32_t ARM_CAN_MessageSend (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, const uint8_t *data, uint8_t size) - \brief Send message on CAN bus. - \param[in] obj_idx Object index - \param[in] msg_info Pointer to CAN message information - \param[in] data Pointer to data buffer - \param[in] size Number of data bytes to send - \return value >= 0 number of data bytes accepted to send - \return value < 0 \ref execution_status - - \fn int32_t ARM_CAN_MessageRead (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, uint8_t *data, uint8_t size) - \brief Read message received on CAN bus. - \param[in] obj_idx Object index - \param[out] msg_info Pointer to read CAN message information - \param[out] data Pointer to data buffer for read data - \param[in] size Maximum number of data bytes to read - \return value >= 0 number of data bytes read - \return value < 0 \ref execution_status - - \fn int32_t ARM_CAN_Control (uint32_t control, uint32_t arg) - \brief Control CAN interface. - \param[in] control Operation - - \ref ARM_CAN_SET_FD_MODE : set FD operation mode - - \ref ARM_CAN_ABORT_MESSAGE_SEND : abort sending of CAN message - - \ref ARM_CAN_CONTROL_RETRANSMISSION : enable/disable automatic retransmission - - \ref ARM_CAN_SET_TRANSCEIVER_DELAY : set transceiver delay - \param[in] arg Argument of operation - \return \ref execution_status - - \fn ARM_CAN_STATUS ARM_CAN_GetStatus (void) - \brief Get CAN status. - \return CAN status \ref ARM_CAN_STATUS - - \fn void ARM_CAN_SignalUnitEvent (uint32_t event) - \brief Signal CAN unit event. - \param[in] event \ref CAN_unit_events - \return none - - \fn void ARM_CAN_SignalObjectEvent (uint32_t obj_idx, uint32_t event) - \brief Signal CAN object event. - \param[in] obj_idx Object index - \param[in] event \ref CAN_events - \return none -*/ - -typedef void (*ARM_CAN_SignalUnitEvent_t) (uint32_t event); ///< Pointer to \ref ARM_CAN_SignalUnitEvent : Signal CAN Unit Event. -typedef void (*ARM_CAN_SignalObjectEvent_t) (uint32_t obj_idx, uint32_t event); ///< Pointer to \ref ARM_CAN_SignalObjectEvent : Signal CAN Object Event. - - -/** -\brief CAN Device Driver Capabilities. -*/ -typedef struct _ARM_CAN_CAPABILITIES { - uint32_t num_objects : 8; ///< Number of \ref can_objects available - uint32_t reentrant_operation : 1; ///< Support for reentrant calls to \ref ARM_CAN_MessageSend, \ref ARM_CAN_MessageRead, \ref ARM_CAN_ObjectConfigure and abort message sending used by \ref ARM_CAN_Control - uint32_t fd_mode : 1; ///< Support for CAN with flexible data-rate mode (CAN_FD) (set by \ref ARM_CAN_Control) - uint32_t restricted_mode : 1; ///< Support for restricted operation mode (set by \ref ARM_CAN_SetMode) - uint32_t monitor_mode : 1; ///< Support for bus monitoring mode (set by \ref ARM_CAN_SetMode) - uint32_t internal_loopback : 1; ///< Support for internal loopback mode (set by \ref ARM_CAN_SetMode) - uint32_t external_loopback : 1; ///< Support for external loopback mode (set by \ref ARM_CAN_SetMode) - uint32_t reserved : 18; ///< Reserved (must be zero) -} ARM_CAN_CAPABILITIES; - - -/** -\brief Access structure of the CAN Driver. -*/ -typedef struct _ARM_DRIVER_CAN { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_CAN_GetVersion : Get driver version. - ARM_CAN_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_CAN_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_CAN_SignalUnitEvent_t cb_unit_event, - ARM_CAN_SignalObjectEvent_t cb_object_event); ///< Pointer to \ref ARM_CAN_Initialize : Initialize CAN interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_CAN_Uninitialize : De-initialize CAN interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_CAN_PowerControl : Control CAN interface power. - uint32_t (*GetClock) (void); ///< Pointer to \ref ARM_CAN_GetClock : Retrieve CAN base clock frequency. - int32_t (*SetBitrate) (ARM_CAN_BITRATE_SELECT select, - uint32_t bitrate, - uint32_t bit_segments); ///< Pointer to \ref ARM_CAN_SetBitrate : Set bitrate for CAN interface. - int32_t (*SetMode) (ARM_CAN_MODE mode); ///< Pointer to \ref ARM_CAN_SetMode : Set operating mode for CAN interface. - ARM_CAN_OBJ_CAPABILITIES (*ObjectGetCapabilities) (uint32_t obj_idx); ///< Pointer to \ref ARM_CAN_ObjectGetCapabilities : Retrieve capabilities of an object. - int32_t (*ObjectSetFilter) (uint32_t obj_idx, - ARM_CAN_FILTER_OPERATION operation, - uint32_t id, - uint32_t arg); ///< Pointer to \ref ARM_CAN_ObjectSetFilter : Add or remove filter for message reception. - int32_t (*ObjectConfigure) (uint32_t obj_idx, - ARM_CAN_OBJ_CONFIG obj_cfg); ///< Pointer to \ref ARM_CAN_ObjectConfigure : Configure object. - int32_t (*MessageSend) (uint32_t obj_idx, - ARM_CAN_MSG_INFO *msg_info, - const uint8_t *data, - uint8_t size); ///< Pointer to \ref ARM_CAN_MessageSend : Send message on CAN bus. - int32_t (*MessageRead) (uint32_t obj_idx, - ARM_CAN_MSG_INFO *msg_info, - uint8_t *data, - uint8_t size); ///< Pointer to \ref ARM_CAN_MessageRead : Read message received on CAN bus. - int32_t (*Control) (uint32_t control, - uint32_t arg); ///< Pointer to \ref ARM_CAN_Control : Control CAN interface. - ARM_CAN_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_CAN_GetStatus : Get CAN status. -} const ARM_DRIVER_CAN; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_CAN_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_Common.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_Common.h deleted file mode 100644 index 59d5b759cc..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_Common.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.0 - * - * Project: Common Driver definitions - */ - -/* History: - * Version 2.0 - * Changed prefix ARM_DRV -> ARM_DRIVER - * Added General return codes definitions - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_COMMON_H_ -#define DRIVER_COMMON_H_ - -#include -#include -#include - -#define ARM_DRIVER_VERSION_MAJOR_MINOR(major,minor) (((major) << 8) | (minor)) - -/** -\brief Driver Version -*/ -typedef struct _ARM_DRIVER_VERSION { - uint16_t api; ///< API version - uint16_t drv; ///< Driver version -} ARM_DRIVER_VERSION; - -/* General return codes */ -#define ARM_DRIVER_OK 0 ///< Operation succeeded -#define ARM_DRIVER_ERROR -1 ///< Unspecified error -#define ARM_DRIVER_ERROR_BUSY -2 ///< Driver is busy -#define ARM_DRIVER_ERROR_TIMEOUT -3 ///< Timeout occurred -#define ARM_DRIVER_ERROR_UNSUPPORTED -4 ///< Operation not supported -#define ARM_DRIVER_ERROR_PARAMETER -5 ///< Parameter error -#define ARM_DRIVER_ERROR_SPECIFIC -6 ///< Start of driver specific errors - -/** -\brief General power states -*/ -typedef enum _ARM_POWER_STATE { - ARM_POWER_OFF, ///< Power off: no operation possible - ARM_POWER_LOW, ///< Low Power mode: retain state, detect and signal wake-up events - ARM_POWER_FULL ///< Power on: full operation at maximum performance -} ARM_POWER_STATE; - -#endif /* DRIVER_COMMON_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH.h deleted file mode 100644 index d60f5fd559..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.1 - * - * Project: Ethernet PHY and MAC Driver common definitions - */ - -/* History: - * Version 2.1 - * ARM_ETH_LINK_INFO made volatile - * Version 2.0 - * Removed ARM_ETH_STATUS enumerator - * Removed ARM_ETH_MODE enumerator - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_ETH_H_ -#define DRIVER_ETH_H_ - -#include "Driver_Common.h" - -/** -\brief Ethernet Media Interface type -*/ -#define ARM_ETH_INTERFACE_MII (0) ///< Media Independent Interface (MII) -#define ARM_ETH_INTERFACE_RMII (1) ///< Reduced Media Independent Interface (RMII) -#define ARM_ETH_INTERFACE_SMII (2) ///< Serial Media Independent Interface (SMII) - -/** -\brief Ethernet link speed -*/ -#define ARM_ETH_SPEED_10M (0) ///< 10 Mbps link speed -#define ARM_ETH_SPEED_100M (1) ///< 100 Mbps link speed -#define ARM_ETH_SPEED_1G (2) ///< 1 Gpbs link speed - -/** -\brief Ethernet duplex mode -*/ -#define ARM_ETH_DUPLEX_HALF (0) ///< Half duplex link -#define ARM_ETH_DUPLEX_FULL (1) ///< Full duplex link - -/** -\brief Ethernet link state -*/ -typedef enum _ARM_ETH_LINK_STATE { - ARM_ETH_LINK_DOWN, ///< Link is down - ARM_ETH_LINK_UP ///< Link is up -} ARM_ETH_LINK_STATE; - -/** -\brief Ethernet link information -*/ -typedef volatile struct _ARM_ETH_LINK_INFO { - uint32_t speed : 2; ///< Link speed: 0= 10 MBit, 1= 100 MBit, 2= 1 GBit - uint32_t duplex : 1; ///< Duplex mode: 0= Half, 1= Full - uint32_t reserved : 29; -} ARM_ETH_LINK_INFO; - -/** -\brief Ethernet MAC Address -*/ -typedef struct _ARM_ETH_MAC_ADDR { - uint8_t b[6]; ///< MAC Address (6 bytes), MSB first -} ARM_ETH_MAC_ADDR; - -#endif /* DRIVER_ETH_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH_MAC.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH_MAC.h deleted file mode 100644 index e26019f9cf..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH_MAC.h +++ /dev/null @@ -1,308 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.1 - * - * Project: Ethernet MAC (Media Access Control) Driver definitions - */ - -/* History: - * Version 2.1 - * Added ARM_ETH_MAC_SLEEP Control - * Version 2.0 - * Changed MAC Address handling: - * moved from ARM_ETH_MAC_Initialize - * to new functions ARM_ETH_MAC_GetMacAddress and ARM_ETH_MAC_SetMacAddress - * Replaced ARM_ETH_MAC_SetMulticastAddr function with ARM_ETH_MAC_SetAddressFilter - * Extended ARM_ETH_MAC_SendFrame function with flags - * Added ARM_ETH_MAC_Control function: - * more control options (Broadcast, Multicast, Checksum offload, VLAN, ...) - * replaces ARM_ETH_MAC_SetMode - * replaces ARM_ETH_MAC_EnableTx, ARM_ETH_MAC_EnableRx - * Added optional event on transmitted frame - * Added support for PTP (Precision Time Protocol) through new functions: - * ARM_ETH_MAC_ControlTimer - * ARM_ETH_MAC_GetRxFrameTime - * ARM_ETH_MAC_GetTxFrameTime - * Changed prefix ARM_DRV -> ARM_DRIVER - * Changed return values of some functions to int32_t - * Version 1.10 - * Name space prefix ARM_ added - * Version 1.01 - * Renamed capabilities items for checksum offload - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_ETH_MAC_H_ -#define DRIVER_ETH_MAC_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_ETH.h" - -#define ARM_ETH_MAC_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,1) /* API version */ - - -#define _ARM_Driver_ETH_MAC_(n) Driver_ETH_MAC##n -#define ARM_Driver_ETH_MAC_(n) _ARM_Driver_ETH_MAC_(n) - - -/****** Ethernet MAC Control Codes *****/ - -#define ARM_ETH_MAC_CONFIGURE (0x01) ///< Configure MAC; arg = configuration -#define ARM_ETH_MAC_CONTROL_TX (0x02) ///< Transmitter; arg: 0=disabled (default), 1=enabled -#define ARM_ETH_MAC_CONTROL_RX (0x03) ///< Receiver; arg: 0=disabled (default), 1=enabled -#define ARM_ETH_MAC_FLUSH (0x04) ///< Flush buffer; arg = ARM_ETH_MAC_FLUSH_... -#define ARM_ETH_MAC_SLEEP (0x05) ///< Sleep mode; arg: 1=enter and wait for Magic packet, 0=exit -#define ARM_ETH_MAC_VLAN_FILTER (0x06) ///< VLAN Filter for received frames; arg15..0: VLAN Tag; arg16: optional ARM_ETH_MAC_VLAN_FILTER_ID_ONLY; 0=disabled (default) - -/*----- Ethernet MAC Configuration -----*/ -#define ARM_ETH_MAC_SPEED_Pos 0 -#define ARM_ETH_MAC_SPEED_Msk (3UL << ARM_ETH_MAC_SPEED_Pos) -#define ARM_ETH_MAC_SPEED_10M (ARM_ETH_SPEED_10M << ARM_ETH_MAC_SPEED_Pos) ///< 10 Mbps link speed -#define ARM_ETH_MAC_SPEED_100M (ARM_ETH_SPEED_100M << ARM_ETH_MAC_SPEED_Pos) ///< 100 Mbps link speed -#define ARM_ETH_MAC_SPEED_1G (ARM_ETH_SPEED_1G << ARM_ETH_MAC_SPEED_Pos) ///< 1 Gpbs link speed -#define ARM_ETH_MAC_DUPLEX_Pos 2 -#define ARM_ETH_MAC_DUPLEX_Msk (1UL << ARM_ETH_MAC_DUPLEX_Pos) -#define ARM_ETH_MAC_DUPLEX_HALF (ARM_ETH_DUPLEX_HALF << ARM_ETH_MAC_DUPLEX_Pos) ///< Half duplex link -#define ARM_ETH_MAC_DUPLEX_FULL (ARM_ETH_DUPLEX_FULL << ARM_ETH_MAC_DUPLEX_Pos) ///< Full duplex link -#define ARM_ETH_MAC_LOOPBACK (1UL << 4) ///< Loop-back test mode -#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX (1UL << 5) ///< Receiver Checksum offload -#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX (1UL << 6) ///< Transmitter Checksum offload -#define ARM_ETH_MAC_ADDRESS_BROADCAST (1UL << 7) ///< Accept frames with Broadcast address -#define ARM_ETH_MAC_ADDRESS_MULTICAST (1UL << 8) ///< Accept frames with any Multicast address -#define ARM_ETH_MAC_ADDRESS_ALL (1UL << 9) ///< Accept frames with any address (Promiscuous Mode) - -/*----- Ethernet MAC Flush Flags -----*/ -#define ARM_ETH_MAC_FLUSH_RX (1UL << 0) ///< Flush Receive buffer -#define ARM_ETH_MAC_FLUSH_TX (1UL << 1) ///< Flush Transmit buffer - -/*----- Ethernet MAC VLAN Filter Flag -----*/ -#define ARM_ETH_MAC_VLAN_FILTER_ID_ONLY (1UL << 16) ///< Compare only the VLAN Identifier (12-bit) - - -/****** Ethernet MAC Frame Transmit Flags *****/ -#define ARM_ETH_MAC_TX_FRAME_FRAGMENT (1UL << 0) ///< Indicate frame fragment -#define ARM_ETH_MAC_TX_FRAME_EVENT (1UL << 1) ///< Generate event when frame is transmitted -#define ARM_ETH_MAC_TX_FRAME_TIMESTAMP (1UL << 2) ///< Capture frame time stamp - - -/****** Ethernet MAC Timer Control Codes *****/ -#define ARM_ETH_MAC_TIMER_GET_TIME (0x01) ///< Get current time -#define ARM_ETH_MAC_TIMER_SET_TIME (0x02) ///< Set new time -#define ARM_ETH_MAC_TIMER_INC_TIME (0x03) ///< Increment current time -#define ARM_ETH_MAC_TIMER_DEC_TIME (0x04) ///< Decrement current time -#define ARM_ETH_MAC_TIMER_SET_ALARM (0x05) ///< Set alarm time -#define ARM_ETH_MAC_TIMER_ADJUST_CLOCK (0x06) ///< Adjust clock frequency; time->ns: correction factor * 2^31 - - -/** -\brief Ethernet MAC Time -*/ -typedef struct _ARM_ETH_MAC_TIME { - uint32_t ns; ///< Nano seconds - uint32_t sec; ///< Seconds -} ARM_ETH_MAC_TIME; - - -/****** Ethernet MAC Event *****/ -#define ARM_ETH_MAC_EVENT_RX_FRAME (1UL << 0) ///< Frame Received -#define ARM_ETH_MAC_EVENT_TX_FRAME (1UL << 1) ///< Frame Transmitted -#define ARM_ETH_MAC_EVENT_WAKEUP (1UL << 2) ///< Wake-up (on Magic Packet) -#define ARM_ETH_MAC_EVENT_TIMER_ALARM (1UL << 3) ///< Timer Alarm - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_ETH_MAC_CAPABILITIES -*/ -/** - \fn int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event) - \brief Initialize Ethernet MAC Device. - \param[in] cb_event Pointer to \ref ARM_ETH_MAC_SignalEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_Uninitialize (void) - \brief De-initialize Ethernet MAC Device. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state) - \brief Control Ethernet MAC Device Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr) - \brief Get Ethernet MAC Address. - \param[in] ptr_addr Pointer to address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr) - \brief Set Ethernet MAC Address. - \param[in] ptr_addr Pointer to address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, - uint32_t num_addr) - \brief Configure Address Filter. - \param[in] ptr_addr Pointer to addresses - \param[in] num_addr Number of addresses to configure - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags) - \brief Send Ethernet frame. - \param[in] frame Pointer to frame buffer with data to send - \param[in] len Frame buffer length in bytes - \param[in] flags Frame transmit flags (see ARM_ETH_MAC_TX_FRAME_...) - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_ReadFrame (uint8_t *frame, uint32_t len) - \brief Read data of received Ethernet frame. - \param[in] frame Pointer to frame buffer for data to read into - \param[in] len Frame buffer length in bytes - \return number of data bytes read or execution status - - value >= 0: number of data bytes read - - value < 0: error occurred, value is execution status as defined with \ref execution_status -*/ -/** - \fn uint32_t ARM_ETH_MAC_GetRxFrameSize (void) - \brief Get size of received Ethernet frame. - \return number of bytes in received frame -*/ -/** - \fn int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time) - \brief Get time of received Ethernet frame. - \param[in] time Pointer to time structure for data to read into - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time) - \brief Get time of transmitted Ethernet frame. - \param[in] time Pointer to time structure for data to read into - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_Control (uint32_t control, uint32_t arg) - \brief Control Ethernet Interface. - \param[in] control Operation - \param[in] arg Argument of operation (optional) - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time) - \brief Control Precision Timer. - \param[in] control Operation - \param[in] time Pointer to time structure - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) - \brief Read Ethernet PHY Register through Management Interface. - \param[in] phy_addr 5-bit device address - \param[in] reg_addr 5-bit register address - \param[out] data Pointer where the result is written to - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data) - \brief Write Ethernet PHY Register through Management Interface. - \param[in] phy_addr 5-bit device address - \param[in] reg_addr 5-bit register address - \param[in] data 16-bit data to write - \return \ref execution_status -*/ - -/** - \fn void ARM_ETH_MAC_SignalEvent (uint32_t event) - \brief Callback function that signals a Ethernet Event. - \param[in] event event notification mask - \return none -*/ - -typedef void (*ARM_ETH_MAC_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_ETH_MAC_SignalEvent : Signal Ethernet Event. - - -/** -\brief Ethernet MAC Capabilities -*/ -typedef struct _ARM_ETH_MAC_CAPABILITIES { - uint32_t checksum_offload_rx_ip4 : 1; ///< 1 = IPv4 header checksum verified on receive - uint32_t checksum_offload_rx_ip6 : 1; ///< 1 = IPv6 checksum verification supported on receive - uint32_t checksum_offload_rx_udp : 1; ///< 1 = UDP payload checksum verified on receive - uint32_t checksum_offload_rx_tcp : 1; ///< 1 = TCP payload checksum verified on receive - uint32_t checksum_offload_rx_icmp : 1; ///< 1 = ICMP payload checksum verified on receive - uint32_t checksum_offload_tx_ip4 : 1; ///< 1 = IPv4 header checksum generated on transmit - uint32_t checksum_offload_tx_ip6 : 1; ///< 1 = IPv6 checksum generation supported on transmit - uint32_t checksum_offload_tx_udp : 1; ///< 1 = UDP payload checksum generated on transmit - uint32_t checksum_offload_tx_tcp : 1; ///< 1 = TCP payload checksum generated on transmit - uint32_t checksum_offload_tx_icmp : 1; ///< 1 = ICMP payload checksum generated on transmit - uint32_t media_interface : 2; ///< Ethernet Media Interface type - uint32_t mac_address : 1; ///< 1 = driver provides initial valid MAC address - uint32_t event_rx_frame : 1; ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_RX_FRAME generated - uint32_t event_tx_frame : 1; ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_TX_FRAME generated - uint32_t event_wakeup : 1; ///< 1 = wakeup event \ref ARM_ETH_MAC_EVENT_WAKEUP generated - uint32_t precision_timer : 1; ///< 1 = Precision Timer supported - uint32_t reserved : 15; ///< Reserved (must be zero) -} ARM_ETH_MAC_CAPABILITIES; - - -/** -\brief Access structure of the Ethernet MAC Driver -*/ -typedef struct _ARM_DRIVER_ETH_MAC { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_ETH_MAC_GetVersion : Get driver version. - ARM_ETH_MAC_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_ETH_MAC_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_ETH_MAC_SignalEvent_t cb_event); ///< Pointer to \ref ARM_ETH_MAC_Initialize : Initialize Ethernet MAC Device. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_ETH_MAC_Uninitialize : De-initialize Ethernet MAC Device. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_ETH_MAC_PowerControl : Control Ethernet MAC Device Power. - int32_t (*GetMacAddress) ( ARM_ETH_MAC_ADDR *ptr_addr); ///< Pointer to \ref ARM_ETH_MAC_GetMacAddress : Get Ethernet MAC Address. - int32_t (*SetMacAddress) (const ARM_ETH_MAC_ADDR *ptr_addr); ///< Pointer to \ref ARM_ETH_MAC_SetMacAddress : Set Ethernet MAC Address. - int32_t (*SetAddressFilter)(const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr); ///< Pointer to \ref ARM_ETH_MAC_SetAddressFilter : Configure Address Filter. - int32_t (*SendFrame) (const uint8_t *frame, uint32_t len, uint32_t flags); ///< Pointer to \ref ARM_ETH_MAC_SendFrame : Send Ethernet frame. - int32_t (*ReadFrame) ( uint8_t *frame, uint32_t len); ///< Pointer to \ref ARM_ETH_MAC_ReadFrame : Read data of received Ethernet frame. - uint32_t (*GetRxFrameSize) (void); ///< Pointer to \ref ARM_ETH_MAC_GetRxFrameSize : Get size of received Ethernet frame. - int32_t (*GetRxFrameTime) (ARM_ETH_MAC_TIME *time); ///< Pointer to \ref ARM_ETH_MAC_GetRxFrameTime : Get time of received Ethernet frame. - int32_t (*GetTxFrameTime) (ARM_ETH_MAC_TIME *time); ///< Pointer to \ref ARM_ETH_MAC_GetTxFrameTime : Get time of transmitted Ethernet frame. - int32_t (*ControlTimer) (uint32_t control, ARM_ETH_MAC_TIME *time); ///< Pointer to \ref ARM_ETH_MAC_ControlTimer : Control Precision Timer. - int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_ETH_MAC_Control : Control Ethernet Interface. - int32_t (*PHY_Read) (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data); ///< Pointer to \ref ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register through Management Interface. - int32_t (*PHY_Write) (uint8_t phy_addr, uint8_t reg_addr, uint16_t data); ///< Pointer to \ref ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register through Management Interface. -} const ARM_DRIVER_ETH_MAC; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_ETH_MAC_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH_PHY.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH_PHY.h deleted file mode 100644 index 95635edbe5..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_ETH_PHY.h +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.1 - * - * Project: Ethernet PHY (Physical Transceiver) Driver definitions - */ - -/* History: - * Version 2.1 - * ARM_ETH_LINK_INFO made volatile - * Version 2.0 - * changed parameter "mode" in function ARM_ETH_PHY_SetMode - * Changed prefix ARM_DRV -> ARM_DRIVER - * Changed return values of some functions to int32_t - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_ETH_PHY_H_ -#define DRIVER_ETH_PHY_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_ETH.h" - -#define ARM_ETH_PHY_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,1) /* API version */ - - -#define _ARM_Driver_ETH_PHY_(n) Driver_ETH_PHY##n -#define ARM_Driver_ETH_PHY_(n) _ARM_Driver_ETH_PHY_(n) - - -/****** Ethernet PHY Mode *****/ -#define ARM_ETH_PHY_SPEED_Pos 0 -#define ARM_ETH_PHY_SPEED_Msk (3UL << ARM_ETH_PHY_SPEED_Pos) -#define ARM_ETH_PHY_SPEED_10M (ARM_ETH_SPEED_10M << ARM_ETH_PHY_SPEED_Pos) ///< 10 Mbps link speed -#define ARM_ETH_PHY_SPEED_100M (ARM_ETH_SPEED_100M << ARM_ETH_PHY_SPEED_Pos) ///< 100 Mbps link speed -#define ARM_ETH_PHY_SPEED_1G (ARM_ETH_SPEED_1G << ARM_ETH_PHY_SPEED_Pos) ///< 1 Gpbs link speed -#define ARM_ETH_PHY_DUPLEX_Pos 2 -#define ARM_ETH_PHY_DUPLEX_Msk (1UL << ARM_ETH_PHY_DUPLEX_Pos) -#define ARM_ETH_PHY_DUPLEX_HALF (ARM_ETH_DUPLEX_HALF << ARM_ETH_PHY_DUPLEX_Pos) ///< Half duplex link -#define ARM_ETH_PHY_DUPLEX_FULL (ARM_ETH_DUPLEX_FULL << ARM_ETH_PHY_DUPLEX_Pos) ///< Full duplex link -#define ARM_ETH_PHY_AUTO_NEGOTIATE (1UL << 3) ///< Auto Negotiation mode -#define ARM_ETH_PHY_LOOPBACK (1UL << 4) ///< Loop-back test mode -#define ARM_ETH_PHY_ISOLATE (1UL << 5) ///< Isolate PHY from MII/RMII interface - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_ETH_PHY_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn int32_t ARM_ETH_PHY_Initialize (ARM_ETH_PHY_Read_t fn_read, - ARM_ETH_PHY_Write_t fn_write) - \brief Initialize Ethernet PHY Device. - \param[in] fn_read Pointer to \ref ARM_ETH_MAC_PHY_Read - \param[in] fn_write Pointer to \ref ARM_ETH_MAC_PHY_Write - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_PHY_Uninitialize (void) - \brief De-initialize Ethernet PHY Device. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_PHY_PowerControl (ARM_POWER_STATE state) - \brief Control Ethernet PHY Device Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_PHY_SetInterface (uint32_t interface) - \brief Set Ethernet Media Interface. - \param[in] interface Media Interface type - \return \ref execution_status -*/ -/** - \fn int32_t ARM_ETH_PHY_SetMode (uint32_t mode) - \brief Set Ethernet PHY Device Operation mode. - \param[in] mode Operation Mode - \return \ref execution_status -*/ -/** - \fn ARM_ETH_LINK_STATE ARM_ETH_PHY_GetLinkState (void) - \brief Get Ethernet PHY Device Link state. - \return current link status \ref ARM_ETH_LINK_STATE -*/ -/** - \fn ARM_ETH_LINK_INFO ARM_ETH_PHY_GetLinkInfo (void) - \brief Get Ethernet PHY Device Link information. - \return current link parameters \ref ARM_ETH_LINK_INFO -*/ - - -typedef int32_t (*ARM_ETH_PHY_Read_t) (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data); ///< Pointer to \ref ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register. -typedef int32_t (*ARM_ETH_PHY_Write_t) (uint8_t phy_addr, uint8_t reg_addr, uint16_t data); ///< Pointer to \ref ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register. - - -/** -\brief Access structure of the Ethernet PHY Driver -*/ -typedef struct _ARM_DRIVER_ETH_PHY { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_ETH_PHY_GetVersion : Get driver version. - int32_t (*Initialize) (ARM_ETH_PHY_Read_t fn_read, - ARM_ETH_PHY_Write_t fn_write); ///< Pointer to \ref ARM_ETH_PHY_Initialize : Initialize PHY Device. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_ETH_PHY_Uninitialize : De-initialize PHY Device. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_ETH_PHY_PowerControl : Control PHY Device Power. - int32_t (*SetInterface) (uint32_t interface); ///< Pointer to \ref ARM_ETH_PHY_SetInterface : Set Ethernet Media Interface. - int32_t (*SetMode) (uint32_t mode); ///< Pointer to \ref ARM_ETH_PHY_SetMode : Set Ethernet PHY Device Operation mode. - ARM_ETH_LINK_STATE (*GetLinkState) (void); ///< Pointer to \ref ARM_ETH_PHY_GetLinkState : Get Ethernet PHY Device Link state. - ARM_ETH_LINK_INFO (*GetLinkInfo) (void); ///< Pointer to \ref ARM_ETH_PHY_GetLinkInfo : Get Ethernet PHY Device Link information. -} const ARM_DRIVER_ETH_PHY; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_ETH_PHY_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_Flash.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_Flash.h deleted file mode 100644 index 287add1398..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_Flash.h +++ /dev/null @@ -1,204 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.1 - * - * Project: Flash Driver definitions - */ - -/* History: - * Version 2.1 - * ARM_FLASH_STATUS made volatile - * Version 2.0 - * Renamed driver NOR -> Flash (more generic) - * Non-blocking operation - * Added Events, Status and Capabilities - * Linked Flash information (GetInfo) - * Version 1.11 - * Changed prefix ARM_DRV -> ARM_DRIVER - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_FLASH_H_ -#define DRIVER_FLASH_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_Common.h" - -#define ARM_FLASH_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,1) /* API version */ - - -#define _ARM_Driver_Flash_(n) Driver_Flash##n -#define ARM_Driver_Flash_(n) _ARM_Driver_Flash_(n) - - -#define ARM_FLASH_SECTOR_INFO(addr,size) { (addr), (addr)+(size)-1 } - -/** -\brief Flash Sector information -*/ -typedef struct _ARM_FLASH_SECTOR { - uint32_t start; ///< Sector Start address - uint32_t end; ///< Sector End address (start+size-1) -} const ARM_FLASH_SECTOR; - -/** -\brief Flash information -*/ -typedef struct _ARM_FLASH_INFO { - ARM_FLASH_SECTOR *sector_info; ///< Sector layout information (NULL=Uniform sectors) - uint32_t sector_count; ///< Number of sectors - uint32_t sector_size; ///< Uniform sector size in bytes (0=sector_info used) - uint32_t page_size; ///< Optimal programming page size in bytes - uint32_t program_unit; ///< Smallest programmable unit in bytes - uint8_t erased_value; ///< Contents of erased memory (usually 0xFF) -} const ARM_FLASH_INFO; - - -/** -\brief Flash Status -*/ -typedef volatile struct _ARM_FLASH_STATUS { - uint32_t busy : 1; ///< Flash busy flag - uint32_t error : 1; ///< Read/Program/Erase error flag (cleared on start of next operation) - uint32_t reserved : 30; -} ARM_FLASH_STATUS; - - -/****** Flash Event *****/ -#define ARM_FLASH_EVENT_READY (1UL << 0) ///< Flash Ready -#define ARM_FLASH_EVENT_ERROR (1UL << 1) ///< Read/Program/Erase Error - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_Flash_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_FLASH_CAPABILITIES ARM_Flash_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_FLASH_CAPABILITIES -*/ -/** - \fn int32_t ARM_Flash_Initialize (ARM_Flash_SignalEvent_t cb_event) - \brief Initialize the Flash Interface. - \param[in] cb_event Pointer to \ref ARM_Flash_SignalEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_Flash_Uninitialize (void) - \brief De-initialize the Flash Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_Flash_PowerControl (ARM_POWER_STATE state) - \brief Control the Flash interface power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_Flash_ReadData (uint32_t addr, void *data, uint32_t cnt) - \brief Read data from Flash. - \param[in] addr Data address. - \param[out] data Pointer to a buffer storing the data read from Flash. - \param[in] cnt Number of data items to read. - \return number of data items read or \ref execution_status -*/ -/** - \fn int32_t ARM_Flash_ProgramData (uint32_t addr, const void *data, uint32_t cnt) - \brief Program data to Flash. - \param[in] addr Data address. - \param[in] data Pointer to a buffer containing the data to be programmed to Flash. - \param[in] cnt Number of data items to program. - \return number of data items programmed or \ref execution_status -*/ -/** - \fn int32_t ARM_Flash_EraseSector (uint32_t addr) - \brief Erase Flash Sector. - \param[in] addr Sector address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_Flash_EraseChip (void) - \brief Erase complete Flash. - Optional function for faster full chip erase. - \return \ref execution_status -*/ -/** - \fn ARM_FLASH_STATUS ARM_Flash_GetStatus (void) - \brief Get Flash status. - \return Flash status \ref ARM_FLASH_STATUS -*/ -/** - \fn ARM_FLASH_INFO * ARM_Flash_GetInfo (void) - \brief Get Flash information. - \return Pointer to Flash information \ref ARM_FLASH_INFO -*/ - -/** - \fn void ARM_Flash_SignalEvent (uint32_t event) - \brief Signal Flash event. - \param[in] event Event notification mask - \return none -*/ - -typedef void (*ARM_Flash_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_Flash_SignalEvent : Signal Flash Event. - - -/** -\brief Flash Driver Capabilities. -*/ -typedef struct _ARM_FLASH_CAPABILITIES { - uint32_t event_ready : 1; ///< Signal Flash Ready event - uint32_t data_width : 2; ///< Data width: 0=8-bit, 1=16-bit, 2=32-bit - uint32_t erase_chip : 1; ///< Supports EraseChip operation - uint32_t reserved : 28; ///< Reserved (must be zero) -} ARM_FLASH_CAPABILITIES; - - -/** -\brief Access structure of the Flash Driver -*/ -typedef struct _ARM_DRIVER_FLASH { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_Flash_GetVersion : Get driver version. - ARM_FLASH_CAPABILITIES (*GetCapabilities)(void); ///< Pointer to \ref ARM_Flash_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_Flash_SignalEvent_t cb_event); ///< Pointer to \ref ARM_Flash_Initialize : Initialize Flash Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_Flash_Uninitialize : De-initialize Flash Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_Flash_PowerControl : Control Flash Interface Power. - int32_t (*ReadData) (uint32_t addr, void *data, uint32_t cnt); ///< Pointer to \ref ARM_Flash_ReadData : Read data from Flash. - int32_t (*ProgramData) (uint32_t addr, const void *data, uint32_t cnt); ///< Pointer to \ref ARM_Flash_ProgramData : Program data to Flash. - int32_t (*EraseSector) (uint32_t addr); ///< Pointer to \ref ARM_Flash_EraseSector : Erase Flash Sector. - int32_t (*EraseChip) (void); ///< Pointer to \ref ARM_Flash_EraseChip : Erase complete Flash. - ARM_FLASH_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_Flash_GetStatus : Get Flash status. - ARM_FLASH_INFO * (*GetInfo) (void); ///< Pointer to \ref ARM_Flash_GetInfo : Get Flash information. -} const ARM_DRIVER_FLASH; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_FLASH_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_I2C.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_I2C.h deleted file mode 100644 index c883472962..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_I2C.h +++ /dev/null @@ -1,217 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.3 - * - * Project: I2C (Inter-Integrated Circuit) Driver definitions - */ - -/* History: - * Version 2.3 - * ARM_I2C_STATUS made volatile - * Version 2.2 - * Removed function ARM_I2C_MasterTransfer in order to simplify drivers - * and added back parameter "xfer_pending" to functions - * ARM_I2C_MasterTransmit and ARM_I2C_MasterReceive - * Version 2.1 - * Added function ARM_I2C_MasterTransfer and removed parameter "xfer_pending" - * from functions ARM_I2C_MasterTransmit and ARM_I2C_MasterReceive - * Added function ARM_I2C_GetDataCount - * Removed flag "address_nack" from ARM_I2C_STATUS - * Replaced events ARM_I2C_EVENT_MASTER_DONE and ARM_I2C_EVENT_SLAVE_DONE - * with event ARM_I2C_EVENT_TRANSFER_DONE - * Added event ARM_I2C_EVENT_TRANSFER_INCOMPLETE - * Removed parameter "arg" from function ARM_I2C_SignalEvent - * Version 2.0 - * New simplified driver: - * complexity moved to upper layer (especially data handling) - * more unified API for different communication interfaces - * Added: - * Slave Mode - * Changed prefix ARM_DRV -> ARM_DRIVER - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_I2C_H_ -#define DRIVER_I2C_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_Common.h" - -#define ARM_I2C_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */ - - -/****** I2C Control Codes *****/ - -#define ARM_I2C_OWN_ADDRESS (0x01) ///< Set Own Slave Address; arg = address -#define ARM_I2C_BUS_SPEED (0x02) ///< Set Bus Speed; arg = speed -#define ARM_I2C_BUS_CLEAR (0x03) ///< Execute Bus clear: send nine clock pulses -#define ARM_I2C_ABORT_TRANSFER (0x04) ///< Abort Master/Slave Transmit/Receive - -/*----- I2C Bus Speed -----*/ -#define ARM_I2C_BUS_SPEED_STANDARD (0x01) ///< Standard Speed (100kHz) -#define ARM_I2C_BUS_SPEED_FAST (0x02) ///< Fast Speed (400kHz) -#define ARM_I2C_BUS_SPEED_FAST_PLUS (0x03) ///< Fast+ Speed ( 1MHz) -#define ARM_I2C_BUS_SPEED_HIGH (0x04) ///< High Speed (3.4MHz) - - -/****** I2C Address Flags *****/ - -#define ARM_I2C_ADDRESS_10BIT (0x0400) ///< 10-bit address flag -#define ARM_I2C_ADDRESS_GC (0x8000) ///< General Call flag - - -/** -\brief I2C Status -*/ -typedef volatile struct _ARM_I2C_STATUS { - uint32_t busy : 1; ///< Busy flag - uint32_t mode : 1; ///< Mode: 0=Slave, 1=Master - uint32_t direction : 1; ///< Direction: 0=Transmitter, 1=Receiver - uint32_t general_call : 1; ///< General Call indication (cleared on start of next Slave operation) - uint32_t arbitration_lost : 1; ///< Master lost arbitration (cleared on start of next Master operation) - uint32_t bus_error : 1; ///< Bus error detected (cleared on start of next Master/Slave operation) - uint32_t reserved : 26; -} ARM_I2C_STATUS; - - -/****** I2C Event *****/ -#define ARM_I2C_EVENT_TRANSFER_DONE (1UL << 0) ///< Master/Slave Transmit/Receive finished -#define ARM_I2C_EVENT_TRANSFER_INCOMPLETE (1UL << 1) ///< Master/Slave Transmit/Receive incomplete transfer -#define ARM_I2C_EVENT_SLAVE_TRANSMIT (1UL << 2) ///< Slave Transmit operation requested -#define ARM_I2C_EVENT_SLAVE_RECEIVE (1UL << 3) ///< Slave Receive operation requested -#define ARM_I2C_EVENT_ADDRESS_NACK (1UL << 4) ///< Address not acknowledged from Slave -#define ARM_I2C_EVENT_GENERAL_CALL (1UL << 5) ///< General Call indication -#define ARM_I2C_EVENT_ARBITRATION_LOST (1UL << 6) ///< Master lost arbitration -#define ARM_I2C_EVENT_BUS_ERROR (1UL << 7) ///< Bus error detected (START/STOP at illegal position) -#define ARM_I2C_EVENT_BUS_CLEAR (1UL << 8) ///< Bus clear finished - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_I2C_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn ARM_I2C_CAPABILITIES ARM_I2C_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_I2C_CAPABILITIES - - \fn int32_t ARM_I2C_Initialize (ARM_I2C_SignalEvent_t cb_event) - \brief Initialize I2C Interface. - \param[in] cb_event Pointer to \ref ARM_I2C_SignalEvent - \return \ref execution_status - - \fn int32_t ARM_I2C_Uninitialize (void) - \brief De-initialize I2C Interface. - \return \ref execution_status - - \fn int32_t ARM_I2C_PowerControl (ARM_POWER_STATE state) - \brief Control I2C Interface Power. - \param[in] state Power state - \return \ref execution_status - - \fn int32_t ARM_I2C_MasterTransmit (uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending) - \brief Start transmitting data as I2C Master. - \param[in] addr Slave address (7-bit or 10-bit) - \param[in] data Pointer to buffer with data to transmit to I2C Slave - \param[in] num Number of data bytes to transmit - \param[in] xfer_pending Transfer operation is pending - Stop condition will not be generated - \return \ref execution_status - - \fn int32_t ARM_I2C_MasterReceive (uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending) - \brief Start receiving data as I2C Master. - \param[in] addr Slave address (7-bit or 10-bit) - \param[out] data Pointer to buffer for data to receive from I2C Slave - \param[in] num Number of data bytes to receive - \param[in] xfer_pending Transfer operation is pending - Stop condition will not be generated - \return \ref execution_status - - \fn int32_t ARM_I2C_SlaveTransmit (const uint8_t *data, uint32_t num) - \brief Start transmitting data as I2C Slave. - \param[in] data Pointer to buffer with data to transmit to I2C Master - \param[in] num Number of data bytes to transmit - \return \ref execution_status - - \fn int32_t ARM_I2C_SlaveReceive (uint8_t *data, uint32_t num) - \brief Start receiving data as I2C Slave. - \param[out] data Pointer to buffer for data to receive from I2C Master - \param[in] num Number of data bytes to receive - \return \ref execution_status - - \fn int32_t ARM_I2C_GetDataCount (void) - \brief Get transferred data count. - \return number of data bytes transferred; -1 when Slave is not addressed by Master - - \fn int32_t ARM_I2C_Control (uint32_t control, uint32_t arg) - \brief Control I2C Interface. - \param[in] control Operation - \param[in] arg Argument of operation (optional) - \return \ref execution_status - - \fn ARM_I2C_STATUS ARM_I2C_GetStatus (void) - \brief Get I2C status. - \return I2C status \ref ARM_I2C_STATUS - - \fn void ARM_I2C_SignalEvent (uint32_t event) - \brief Signal I2C Events. - \param[in] event \ref I2C_events notification mask -*/ - -typedef void (*ARM_I2C_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_I2C_SignalEvent : Signal I2C Event. - - -/** -\brief I2C Driver Capabilities. -*/ -typedef struct _ARM_I2C_CAPABILITIES { - uint32_t address_10_bit : 1; ///< supports 10-bit addressing - uint32_t reserved : 31; ///< Reserved (must be zero) -} ARM_I2C_CAPABILITIES; - - -/** -\brief Access structure of the I2C Driver. -*/ -typedef struct _ARM_DRIVER_I2C { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_I2C_GetVersion : Get driver version. - ARM_I2C_CAPABILITIES (*GetCapabilities)(void); ///< Pointer to \ref ARM_I2C_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_I2C_SignalEvent_t cb_event); ///< Pointer to \ref ARM_I2C_Initialize : Initialize I2C Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_I2C_Uninitialize : De-initialize I2C Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_I2C_PowerControl : Control I2C Interface Power. - int32_t (*MasterTransmit) (uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending); ///< Pointer to \ref ARM_I2C_MasterTransmit : Start transmitting data as I2C Master. - int32_t (*MasterReceive) (uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending); ///< Pointer to \ref ARM_I2C_MasterReceive : Start receiving data as I2C Master. - int32_t (*SlaveTransmit) ( const uint8_t *data, uint32_t num); ///< Pointer to \ref ARM_I2C_SlaveTransmit : Start transmitting data as I2C Slave. - int32_t (*SlaveReceive) ( uint8_t *data, uint32_t num); ///< Pointer to \ref ARM_I2C_SlaveReceive : Start receiving data as I2C Slave. - int32_t (*GetDataCount) (void); ///< Pointer to \ref ARM_I2C_GetDataCount : Get transferred data count. - int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_I2C_Control : Control I2C Interface. - ARM_I2C_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_I2C_GetStatus : Get I2C status. -} const ARM_DRIVER_I2C; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_I2C_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_MCI.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_MCI.h deleted file mode 100644 index 59caa11216..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_MCI.h +++ /dev/null @@ -1,360 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.3 - * - * Project: MCI (Memory Card Interface) Driver definitions - */ - -/* History: - * Version 2.3 - * ARM_MCI_STATUS made volatile - * Version 2.2 - * Added timeout and error flags to ARM_MCI_STATUS - * Added support for controlling optional RST_n pin (eMMC) - * Removed explicit Clock Control (ARM_MCI_CONTROL_CLOCK) - * Removed event ARM_MCI_EVENT_BOOT_ACK_TIMEOUT - * Version 2.1 - * Decoupled SPI mode from MCI driver - * Replaced function ARM_MCI_CardSwitchRead with ARM_MCI_ReadCD and ARM_MCI_ReadWP - * Version 2.0 - * Added support for: - * SD UHS-I (Ultra High Speed) - * SD I/O Interrupt - * Read Wait (SD I/O) - * Suspend/Resume (SD I/O) - * MMC Interrupt - * MMC Boot - * Stream Data transfer (MMC) - * VCCQ Power Supply Control (eMMC) - * Command Completion Signal (CCS) for CE-ATA - * Added ARM_MCI_Control function - * Added ARM_MCI_GetStatus function - * Removed ARM_MCI_BusMode, ARM_MCI_BusDataWidth, ARM_MCI_BusSingaling functions - * (replaced by ARM_MCI_Control) - * Changed ARM_MCI_CardPower function (voltage parameter) - * Changed ARM_MCI_SendCommnad function (flags parameter) - * Changed ARM_MCI_SetupTransfer function (mode parameter) - * Removed ARM_MCI_ReadTransfer and ARM_MCI_WriteTransfer functions - * Changed prefix ARM_DRV -> ARM_DRIVER - * Changed return values of some functions to int32_t - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_MCI_H_ -#define DRIVER_MCI_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_Common.h" - -#define ARM_MCI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */ - - -/****** MCI Send Command Flags *****/ -#define ARM_MCI_RESPONSE_Pos 0 -#define ARM_MCI_RESPONSE_Msk (3UL << ARM_MCI_RESPONSE_Pos) -#define ARM_MCI_RESPONSE_NONE (0UL << ARM_MCI_RESPONSE_Pos) ///< No response expected (default) -#define ARM_MCI_RESPONSE_SHORT (1UL << ARM_MCI_RESPONSE_Pos) ///< Short response (48-bit) -#define ARM_MCI_RESPONSE_SHORT_BUSY (2UL << ARM_MCI_RESPONSE_Pos) ///< Short response with busy signal (48-bit) -#define ARM_MCI_RESPONSE_LONG (3UL << ARM_MCI_RESPONSE_Pos) ///< Long response (136-bit) - -#define ARM_MCI_RESPONSE_INDEX (1UL << 2) ///< Check command index in response -#define ARM_MCI_RESPONSE_CRC (1UL << 3) ///< Check CRC in response - -#define ARM_MCI_WAIT_BUSY (1UL << 4) ///< Wait until busy before sending the command - -#define ARM_MCI_TRANSFER_DATA (1UL << 5) ///< Activate Data transfer - -#define ARM_MCI_CARD_INITIALIZE (1UL << 6) ///< Execute Memory Card initialization sequence - -#define ARM_MCI_INTERRUPT_COMMAND (1UL << 7) ///< Send Interrupt command (CMD40 - MMC only) -#define ARM_MCI_INTERRUPT_RESPONSE (1UL << 8) ///< Send Interrupt response (CMD40 - MMC only) - -#define ARM_MCI_BOOT_OPERATION (1UL << 9) ///< Execute Boot operation (MMC only) -#define ARM_MCI_BOOT_ALTERNATIVE (1UL << 10) ///< Execute Alternative Boot operation (MMC only) -#define ARM_MCI_BOOT_ACK (1UL << 11) ///< Expect Boot Acknowledge (MMC only) - -#define ARM_MCI_CCSD (1UL << 12) ///< Send Command Completion Signal Disable (CCSD) for CE-ATA device -#define ARM_MCI_CCS (1UL << 13) ///< Expect Command Completion Signal (CCS) for CE-ATA device - - -/****** MCI Setup Transfer Mode *****/ -#define ARM_MCI_TRANSFER_READ (0UL << 0) ///< Data Read Transfer (from MCI) -#define ARM_MCI_TRANSFER_WRITE (1UL << 0) ///< Data Write Transfer (to MCI) -#define ARM_MCI_TRANSFER_BLOCK (0UL << 1) ///< Block Data transfer (default) -#define ARM_MCI_TRANSFER_STREAM (1UL << 1) ///< Stream Data transfer (MMC only) - - -/****** MCI Control Codes *****/ -#define ARM_MCI_BUS_SPEED (0x01) ///< Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s -#define ARM_MCI_BUS_SPEED_MODE (0x02) ///< Set Bus Speed Mode as specified with arg -#define ARM_MCI_BUS_CMD_MODE (0x03) ///< Set CMD Line Mode as specified with arg -#define ARM_MCI_BUS_DATA_WIDTH (0x04) ///< Set Bus Data Width as specified with arg -#define ARM_MCI_DRIVER_STRENGTH (0x05) ///< Set SD UHS-I Driver Strength as specified with arg -#define ARM_MCI_CONTROL_RESET (0x06) ///< Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active -#define ARM_MCI_CONTROL_CLOCK_IDLE (0x07) ///< Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled -#define ARM_MCI_UHS_TUNING_OPERATION (0x08) ///< Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute -#define ARM_MCI_UHS_TUNING_RESULT (0x09) ///< Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error -#define ARM_MCI_DATA_TIMEOUT (0x0A) ///< Set Data timeout; arg = timeout in bus cycles -#define ARM_MCI_CSS_TIMEOUT (0x0B) ///< Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles -#define ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0C) ///< Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled -#define ARM_MCI_CONTROL_READ_WAIT (0x0D) ///< Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled -#define ARM_MCI_SUSPEND_TRANSFER (0x0E) ///< Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer -#define ARM_MCI_RESUME_TRANSFER (0x0F) ///< Resume Data transfer (SD I/O) - -/*----- MCI Bus Speed Mode -----*/ -#define ARM_MCI_BUS_DEFAULT_SPEED (0x00) ///< SD/MMC: Default Speed mode up to 25/26MHz -#define ARM_MCI_BUS_HIGH_SPEED (0x01) ///< SD/MMC: High Speed mode up to 50/52MHz -#define ARM_MCI_BUS_UHS_SDR12 (0x02) ///< SD: SDR12 (Single Data Rate) up to 25MHz, 12.5MB/s: UHS-I (Ultra High Speed) 1.8V signaling -#define ARM_MCI_BUS_UHS_SDR25 (0x03) ///< SD: SDR25 (Single Data Rate) up to 50MHz, 25 MB/s: UHS-I (Ultra High Speed) 1.8V signaling -#define ARM_MCI_BUS_UHS_SDR50 (0x04) ///< SD: SDR50 (Single Data Rate) up to 100MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling -#define ARM_MCI_BUS_UHS_SDR104 (0x05) ///< SD: SDR104 (Single Data Rate) up to 208MHz, 104 MB/s: UHS-I (Ultra High Speed) 1.8V signaling -#define ARM_MCI_BUS_UHS_DDR50 (0x06) ///< SD: DDR50 (Dual Data Rate) up to 50MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling - -/*----- MCI CMD Line Mode -----*/ -#define ARM_MCI_BUS_CMD_PUSH_PULL (0x00) ///< Push-Pull CMD line (default) -#define ARM_MCI_BUS_CMD_OPEN_DRAIN (0x01) ///< Open Drain CMD line (MMC only) - -/*----- MCI Bus Data Width -----*/ -#define ARM_MCI_BUS_DATA_WIDTH_1 (0x00) ///< Bus data width: 1 bit (default) -#define ARM_MCI_BUS_DATA_WIDTH_4 (0x01) ///< Bus data width: 4 bits -#define ARM_MCI_BUS_DATA_WIDTH_8 (0x02) ///< Bus data width: 8 bits -#define ARM_MCI_BUS_DATA_WIDTH_4_DDR (0x03) ///< Bus data width: 4 bits, DDR (Dual Data Rate) - MMC only -#define ARM_MCI_BUS_DATA_WIDTH_8_DDR (0x04) ///< Bus data width: 8 bits, DDR (Dual Data Rate) - MMC only - -/*----- MCI Driver Strength -----*/ -#define ARM_MCI_DRIVER_TYPE_A (0x01) ///< SD UHS-I Driver Type A -#define ARM_MCI_DRIVER_TYPE_B (0x00) ///< SD UHS-I Driver Type B (default) -#define ARM_MCI_DRIVER_TYPE_C (0x02) ///< SD UHS-I Driver Type C -#define ARM_MCI_DRIVER_TYPE_D (0x03) ///< SD UHS-I Driver Type D - - -/****** MCI Card Power *****/ -#define ARM_MCI_POWER_VDD_Pos 0 -#define ARM_MCI_POWER_VDD_Msk (0x0FUL << ARM_MCI_POWER_VDD_Pos) -#define ARM_MCI_POWER_VDD_OFF (0x01UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) turned off -#define ARM_MCI_POWER_VDD_3V3 (0x02UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) = 3.3V -#define ARM_MCI_POWER_VDD_1V8 (0x03UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) = 1.8V -#define ARM_MCI_POWER_VCCQ_Pos 4 -#define ARM_MCI_POWER_VCCQ_Msk (0x0FUL << ARM_MCI_POWER_VCCQ_Pos) -#define ARM_MCI_POWER_VCCQ_OFF (0x01UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ turned off -#define ARM_MCI_POWER_VCCQ_3V3 (0x02UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 3.3V -#define ARM_MCI_POWER_VCCQ_1V8 (0x03UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 1.8V -#define ARM_MCI_POWER_VCCQ_1V2 (0x04UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 1.2V - - -/** -\brief MCI Status -*/ -typedef volatile struct _ARM_MCI_STATUS { - uint32_t command_active : 1; ///< Command active flag - uint32_t command_timeout : 1; ///< Command timeout flag (cleared on start of next command) - uint32_t command_error : 1; ///< Command error flag (cleared on start of next command) - uint32_t transfer_active : 1; ///< Transfer active flag - uint32_t transfer_timeout : 1; ///< Transfer timeout flag (cleared on start of next command) - uint32_t transfer_error : 1; ///< Transfer error flag (cleared on start of next command) - uint32_t sdio_interrupt : 1; ///< SD I/O Interrupt flag (cleared on start of monitoring) - uint32_t ccs : 1; ///< CCS flag (cleared on start of next command) - uint32_t reserved : 24; -} ARM_MCI_STATUS; - - -/****** MCI Card Event *****/ -#define ARM_MCI_EVENT_CARD_INSERTED (1UL << 0) ///< Memory Card inserted -#define ARM_MCI_EVENT_CARD_REMOVED (1UL << 1) ///< Memory Card removed -#define ARM_MCI_EVENT_COMMAND_COMPLETE (1UL << 2) ///< Command completed -#define ARM_MCI_EVENT_COMMAND_TIMEOUT (1UL << 3) ///< Command timeout -#define ARM_MCI_EVENT_COMMAND_ERROR (1UL << 4) ///< Command response error (CRC error or invalid response) -#define ARM_MCI_EVENT_TRANSFER_COMPLETE (1UL << 5) ///< Data transfer completed -#define ARM_MCI_EVENT_TRANSFER_TIMEOUT (1UL << 6) ///< Data transfer timeout -#define ARM_MCI_EVENT_TRANSFER_ERROR (1UL << 7) ///< Data transfer CRC failed -#define ARM_MCI_EVENT_SDIO_INTERRUPT (1UL << 8) ///< SD I/O Interrupt -#define ARM_MCI_EVENT_CCS (1UL << 9) ///< Command Completion Signal (CCS) -#define ARM_MCI_EVENT_CCS_TIMEOUT (1UL << 10) ///< Command Completion Signal (CCS) Timeout - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_MCI_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_MCI_CAPABILITIES ARM_MCI_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_MCI_CAPABILITIES -*/ -/** - \fn int32_t ARM_MCI_Initialize (ARM_MCI_SignalEvent_t cb_event) - \brief Initialize the Memory Card Interface - \param[in] cb_event Pointer to \ref ARM_MCI_SignalEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_Uninitialize (void) - \brief De-initialize Memory Card Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_PowerControl (ARM_POWER_STATE state) - \brief Control Memory Card Interface Power. - \param[in] state Power state \ref ARM_POWER_STATE - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_CardPower (uint32_t voltage) - \brief Set Memory Card Power supply voltage. - \param[in] voltage Memory Card Power supply voltage - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_ReadCD (void) - \brief Read Card Detect (CD) state. - \return 1:card detected, 0:card not detected, or error -*/ -/** - \fn int32_t ARM_MCI_ReadWP (void) - \brief Read Write Protect (WP) state. - \return 1:write protected, 0:not write protected, or error -*/ -/** - \fn int32_t ARM_MCI_SendCommand (uint32_t cmd, - uint32_t arg, - uint32_t flags, - uint32_t *response) - \brief Send Command to card and get the response. - \param[in] cmd Memory Card command - \param[in] arg Command argument - \param[in] flags Command flags - \param[out] response Pointer to buffer for response - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_SetupTransfer (uint8_t *data, - uint32_t block_count, - uint32_t block_size, - uint32_t mode) - \brief Setup read or write transfer operation. - \param[in,out] data Pointer to data block(s) to be written or read - \param[in] block_count Number of blocks - \param[in] block_size Size of a block in bytes - \param[in] mode Transfer mode - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_AbortTransfer (void) - \brief Abort current read/write data transfer. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_MCI_Control (uint32_t control, uint32_t arg) - \brief Control MCI Interface. - \param[in] control Operation - \param[in] arg Argument of operation (optional) - \return \ref execution_status -*/ -/** - \fn ARM_MCI_STATUS ARM_MCI_GetStatus (void) - \brief Get MCI status. - \return MCI status \ref ARM_MCI_STATUS -*/ - -/** - \fn void ARM_MCI_SignalEvent (uint32_t event) - \brief Callback function that signals a MCI Card Event. - \param[in] event \ref mci_event_gr - \return none -*/ - -typedef void (*ARM_MCI_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_MCI_SignalEvent : Signal MCI Card Event. - - -/** -\brief MCI Driver Capabilities. -*/ -typedef struct _ARM_MCI_CAPABILITIES { - uint32_t cd_state : 1; ///< Card Detect State available - uint32_t cd_event : 1; ///< Signal Card Detect change event - uint32_t wp_state : 1; ///< Write Protect State available - uint32_t vdd : 1; ///< Supports VDD Card Power Supply Control - uint32_t vdd_1v8 : 1; ///< Supports 1.8 VDD Card Power Supply - uint32_t vccq : 1; ///< Supports VCCQ Card Power Supply Control (eMMC) - uint32_t vccq_1v8 : 1; ///< Supports 1.8 VCCQ Card Power Supply (eMMC) - uint32_t vccq_1v2 : 1; ///< Supports 1.2 VCCQ Card Power Supply (eMMC) - uint32_t data_width_4 : 1; ///< Supports 4-bit data - uint32_t data_width_8 : 1; ///< Supports 8-bit data - uint32_t data_width_4_ddr : 1; ///< Supports 4-bit data, DDR (Dual Data Rate) - MMC only - uint32_t data_width_8_ddr : 1; ///< Supports 8-bit data, DDR (Dual Data Rate) - MMC only - uint32_t high_speed : 1; ///< Supports SD/MMC High Speed Mode - uint32_t uhs_signaling : 1; ///< Supports SD UHS-I (Ultra High Speed) 1.8V signaling - uint32_t uhs_tuning : 1; ///< Supports SD UHS-I tuning - uint32_t uhs_sdr50 : 1; ///< Supports SD UHS-I SDR50 (Single Data Rate) up to 50MB/s - uint32_t uhs_sdr104 : 1; ///< Supports SD UHS-I SDR104 (Single Data Rate) up to 104MB/s - uint32_t uhs_ddr50 : 1; ///< Supports SD UHS-I DDR50 (Dual Data Rate) up to 50MB/s - uint32_t uhs_driver_type_a : 1; ///< Supports SD UHS-I Driver Type A - uint32_t uhs_driver_type_c : 1; ///< Supports SD UHS-I Driver Type C - uint32_t uhs_driver_type_d : 1; ///< Supports SD UHS-I Driver Type D - uint32_t sdio_interrupt : 1; ///< Supports SD I/O Interrupt - uint32_t read_wait : 1; ///< Supports Read Wait (SD I/O) - uint32_t suspend_resume : 1; ///< Supports Suspend/Resume (SD I/O) - uint32_t mmc_interrupt : 1; ///< Supports MMC Interrupt - uint32_t mmc_boot : 1; ///< Supports MMC Boot - uint32_t rst_n : 1; ///< Supports RST_n Pin Control (eMMC) - uint32_t ccs : 1; ///< Supports Command Completion Signal (CCS) for CE-ATA - uint32_t ccs_timeout : 1; ///< Supports Command Completion Signal (CCS) timeout for CE-ATA - uint32_t reserved : 3; ///< Reserved (must be zero) -} ARM_MCI_CAPABILITIES; - - -/** -\brief Access structure of the MCI Driver. -*/ -typedef struct _ARM_DRIVER_MCI { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_MCI_GetVersion : Get driver version. - ARM_MCI_CAPABILITIES (*GetCapabilities)(void); ///< Pointer to \ref ARM_MCI_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_MCI_SignalEvent_t cb_event); ///< Pointer to \ref ARM_MCI_Initialize : Initialize MCI Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_MCI_Uninitialize : De-initialize MCI Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_MCI_PowerControl : Control MCI Interface Power. - int32_t (*CardPower) (uint32_t voltage); ///< Pointer to \ref ARM_MCI_CardPower : Set card power supply voltage. - int32_t (*ReadCD) (void); ///< Pointer to \ref ARM_MCI_ReadCD : Read Card Detect (CD) state. - int32_t (*ReadWP) (void); ///< Pointer to \ref ARM_MCI_ReadWP : Read Write Protect (WP) state. - int32_t (*SendCommand) (uint32_t cmd, - uint32_t arg, - uint32_t flags, - uint32_t *response); ///< Pointer to \ref ARM_MCI_SendCommand : Send Command to card and get the response. - int32_t (*SetupTransfer) (uint8_t *data, - uint32_t block_count, - uint32_t block_size, - uint32_t mode); ///< Pointer to \ref ARM_MCI_SetupTransfer : Setup data transfer operation. - int32_t (*AbortTransfer) (void); ///< Pointer to \ref ARM_MCI_AbortTransfer : Abort current data transfer. - int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_MCI_Control : Control MCI Interface. - ARM_MCI_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_MCI_GetStatus : Get MCI status. -} const ARM_DRIVER_MCI; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_MCI_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_NAND.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_NAND.h deleted file mode 100644 index 827fd4bc20..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_NAND.h +++ /dev/null @@ -1,420 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 14. Nov 2017 - * $Revision: V2.3 - * - * Project: NAND Flash Driver definitions - */ - -/* History: - * Version 2.3 - * Extended ARM_NAND_ECC_INFO structure - * Version 2.2 - * ARM_NAND_STATUS made volatile - * Version 2.1 - * Updated ARM_NAND_ECC_INFO structure and ARM_NAND_ECC_xxx definitions - * Version 2.0 - * New simplified driver: - * complexity moved to upper layer (command agnostic) - * Added support for: - * NV-DDR & NV-DDR2 Interface (ONFI specification) - * VCC, VCCQ and VPP Power Supply Control - * WP (Write Protect) Control - * Version 1.11 - * Changed prefix ARM_DRV -> ARM_DRIVER - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_NAND_H_ -#define DRIVER_NAND_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_Common.h" - -#define ARM_NAND_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */ - - -/****** NAND Device Power *****/ -#define ARM_NAND_POWER_VCC_Pos 0 -#define ARM_NAND_POWER_VCC_Msk (0x07UL << ARM_NAND_POWER_VCC_Pos) -#define ARM_NAND_POWER_VCC_OFF (0x01UL << ARM_NAND_POWER_VCC_Pos) ///< VCC Power off -#define ARM_NAND_POWER_VCC_3V3 (0x02UL << ARM_NAND_POWER_VCC_Pos) ///< VCC = 3.3V -#define ARM_NAND_POWER_VCC_1V8 (0x03UL << ARM_NAND_POWER_VCC_Pos) ///< VCC = 1.8V -#define ARM_NAND_POWER_VCCQ_Pos 3 -#define ARM_NAND_POWER_VCCQ_Msk (0x07UL << ARM_NAND_POWER_VCCQ_Pos) -#define ARM_NAND_POWER_VCCQ_OFF (0x01UL << ARM_NAND_POWER_VCCQ_Pos) ///< VCCQ I/O Power off -#define ARM_NAND_POWER_VCCQ_3V3 (0x02UL << ARM_NAND_POWER_VCCQ_Pos) ///< VCCQ = 3.3V -#define ARM_NAND_POWER_VCCQ_1V8 (0x03UL << ARM_NAND_POWER_VCCQ_Pos) ///< VCCQ = 1.8V -#define ARM_NAND_POWER_VPP_OFF (1UL << 6) ///< VPP off -#define ARM_NAND_POWER_VPP_ON (1Ul << 7) ///< VPP on - - -/****** NAND Control Codes *****/ -#define ARM_NAND_BUS_MODE (0x01) ///< Set Bus Mode as specified with arg -#define ARM_NAND_BUS_DATA_WIDTH (0x02) ///< Set Bus Data Width as specified with arg -#define ARM_NAND_DRIVER_STRENGTH (0x03) ///< Set Driver Strength as specified with arg -#define ARM_NAND_DEVICE_READY_EVENT (0x04) ///< Generate \ref ARM_NAND_EVENT_DEVICE_READY; arg: 0=disabled (default), 1=enabled -#define ARM_NAND_DRIVER_READY_EVENT (0x05) ///< Generate \ref ARM_NAND_EVENT_DRIVER_READY; arg: 0=disabled (default), 1=enabled - -/*----- NAND Bus Mode (ONFI - Open NAND Flash Interface) -----*/ -#define ARM_NAND_BUS_INTERFACE_Pos 4 -#define ARM_NAND_BUS_INTERFACE_Msk (0x03UL << ARM_NAND_BUS_INTERFACE_Pos) -#define ARM_NAND_BUS_SDR (0x00UL << ARM_NAND_BUS_INTERFACE_Pos) ///< Data Interface: SDR (Single Data Rate) - Traditional interface (default) -#define ARM_NAND_BUS_DDR (0x01UL << ARM_NAND_BUS_INTERFACE_Pos) ///< Data Interface: NV-DDR (Double Data Rate) -#define ARM_NAND_BUS_DDR2 (0x02UL << ARM_NAND_BUS_INTERFACE_Pos) ///< Data Interface: NV-DDR2 (Double Data Rate) -#define ARM_NAND_BUS_TIMING_MODE_Pos 0 -#define ARM_NAND_BUS_TIMING_MODE_Msk (0x0FUL << ARM_NAND_BUS_TIMING_MODE_Pos) -#define ARM_NAND_BUS_TIMING_MODE_0 (0x00UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 0 (default) -#define ARM_NAND_BUS_TIMING_MODE_1 (0x01UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 1 -#define ARM_NAND_BUS_TIMING_MODE_2 (0x02UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 2 -#define ARM_NAND_BUS_TIMING_MODE_3 (0x03UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 3 -#define ARM_NAND_BUS_TIMING_MODE_4 (0x04UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 4 (SDR EDO capable) -#define ARM_NAND_BUS_TIMING_MODE_5 (0x05UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 5 (SDR EDO capable) -#define ARM_NAND_BUS_TIMING_MODE_6 (0x06UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 6 (NV-DDR2 only) -#define ARM_NAND_BUS_TIMING_MODE_7 (0x07UL << ARM_NAND_BUS_TIMING_MODE_Pos) ///< Timing Mode 7 (NV-DDR2 only) -#define ARM_NAND_BUS_DDR2_DO_WCYC_Pos 8 -#define ARM_NAND_BUS_DDR2_DO_WCYC_Msk (0x0FUL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) -#define ARM_NAND_BUS_DDR2_DO_WCYC_0 (0x00UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) ///< DDR2 Data Output Warm-up cycles: 0 (default) -#define ARM_NAND_BUS_DDR2_DO_WCYC_1 (0x01UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) ///< DDR2 Data Output Warm-up cycles: 1 -#define ARM_NAND_BUS_DDR2_DO_WCYC_2 (0x02UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) ///< DDR2 Data Output Warm-up cycles: 2 -#define ARM_NAND_BUS_DDR2_DO_WCYC_4 (0x03UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos) ///< DDR2 Data Output Warm-up cycles: 4 -#define ARM_NAND_BUS_DDR2_DI_WCYC_Pos 12 -#define ARM_NAND_BUS_DDR2_DI_WCYC_Msk (0x0FUL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) -#define ARM_NAND_BUS_DDR2_DI_WCYC_0 (0x00UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) ///< DDR2 Data Input Warm-up cycles: 0 (default) -#define ARM_NAND_BUS_DDR2_DI_WCYC_1 (0x01UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) ///< DDR2 Data Input Warm-up cycles: 1 -#define ARM_NAND_BUS_DDR2_DI_WCYC_2 (0x02UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) ///< DDR2 Data Input Warm-up cycles: 2 -#define ARM_NAND_BUS_DDR2_DI_WCYC_4 (0x03UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos) ///< DDR2 Data Input Warm-up cycles: 4 -#define ARM_NAND_BUS_DDR2_VEN (1UL << 16) ///< DDR2 Enable external VREFQ as reference -#define ARM_NAND_BUS_DDR2_CMPD (1UL << 17) ///< DDR2 Enable complementary DQS (DQS_c) signal -#define ARM_NAND_BUS_DDR2_CMPR (1UL << 18) ///< DDR2 Enable complementary RE_n (RE_c) signal - -/*----- NAND Data Bus Width -----*/ -#define ARM_NAND_BUS_DATA_WIDTH_8 (0x00) ///< Bus Data Width: 8 bit (default) -#define ARM_NAND_BUS_DATA_WIDTH_16 (0x01) ///< Bus Data Width: 16 bit - -/*----- NAND Driver Strength (ONFI - Open NAND Flash Interface) -----*/ -#define ARM_NAND_DRIVER_STRENGTH_18 (0x00) ///< Driver Strength 2.0x = 18 Ohms -#define ARM_NAND_DRIVER_STRENGTH_25 (0x01) ///< Driver Strength 1.4x = 25 Ohms -#define ARM_NAND_DRIVER_STRENGTH_35 (0x02) ///< Driver Strength 1.0x = 35 Ohms (default) -#define ARM_NAND_DRIVER_STRENGTH_50 (0x03) ///< Driver Strength 0.7x = 50 Ohms - - -/****** NAND ECC for Read/Write Data Mode and Sequence Execution Code *****/ -#define ARM_NAND_ECC_INDEX_Pos 0 -#define ARM_NAND_ECC_INDEX_Msk (0xFFUL << ARM_NAND_ECC_INDEX_Pos) -#define ARM_NAND_ECC(n) ((n) & ARM_NAND_ECC_INDEX_Msk) ///< Select ECC -#define ARM_NAND_ECC0 (1UL << 8) ///< Use ECC0 of selected ECC -#define ARM_NAND_ECC1 (1UL << 9) ///< Use ECC1 of selected ECC - -/****** NAND Flag for Read/Write Data Mode and Sequence Execution Code *****/ -#define ARM_NAND_DRIVER_DONE_EVENT (1UL << 16) ///< Generate \ref ARM_NAND_EVENT_DRIVER_DONE - -/****** NAND Sequence Execution Code *****/ -#define ARM_NAND_CODE_SEND_CMD1 (1UL << 17) ///< Send Command 1 -#define ARM_NAND_CODE_SEND_ADDR_COL1 (1UL << 18) ///< Send Column Address 1 -#define ARM_NAND_CODE_SEND_ADDR_COL2 (1UL << 19) ///< Send Column Address 2 -#define ARM_NAND_CODE_SEND_ADDR_ROW1 (1UL << 20) ///< Send Row Address 1 -#define ARM_NAND_CODE_SEND_ADDR_ROW2 (1UL << 21) ///< Send Row Address 2 -#define ARM_NAND_CODE_SEND_ADDR_ROW3 (1UL << 22) ///< Send Row Address 3 -#define ARM_NAND_CODE_INC_ADDR_ROW (1UL << 23) ///< Auto-increment Row Address -#define ARM_NAND_CODE_WRITE_DATA (1UL << 24) ///< Write Data -#define ARM_NAND_CODE_SEND_CMD2 (1UL << 25) ///< Send Command 2 -#define ARM_NAND_CODE_WAIT_BUSY (1UL << 26) ///< Wait while R/Bn busy -#define ARM_NAND_CODE_READ_DATA (1UL << 27) ///< Read Data -#define ARM_NAND_CODE_SEND_CMD3 (1UL << 28) ///< Send Command 3 -#define ARM_NAND_CODE_READ_STATUS (1UL << 29) ///< Read Status byte and check FAIL bit (bit 0) - -/*----- NAND Sequence Execution Code: Command -----*/ -#define ARM_NAND_CODE_CMD1_Pos 0 -#define ARM_NAND_CODE_CMD1_Msk (0xFFUL << ARM_NAND_CODE_CMD1_Pos) -#define ARM_NAND_CODE_CMD2_Pos 8 -#define ARM_NAND_CODE_CMD2_Msk (0xFFUL << ARM_NAND_CODE_CMD2_Pos) -#define ARM_NAND_CODE_CMD3_Pos 16 -#define ARM_NAND_CODE_CMD3_Msk (0xFFUL << ARM_NAND_CODE_CMD3_Pos) - -/*----- NAND Sequence Execution Code: Column Address -----*/ -#define ARM_NAND_CODE_ADDR_COL1_Pos 0 -#define ARM_NAND_CODE_ADDR_COL1_Msk (0xFFUL << ARM_NAND_CODE_ADDR_COL1_Pos) -#define ARM_NAND_CODE_ADDR_COL2_Pos 8 -#define ARM_NAND_CODE_ADDR_COL2_Msk (0xFFUL << ARM_NAND_CODE_ADDR_COL2_Pos) - -/*----- NAND Sequence Execution Code: Row Address -----*/ -#define ARM_NAND_CODE_ADDR_ROW1_Pos 0 -#define ARM_NAND_CODE_ADDR_ROW1_Msk (0xFFUL << ARM_NAND_CODE_ADDR_ROW1_Pos) -#define ARM_NAND_CODE_ADDR_ROW2_Pos 8 -#define ARM_NAND_CODE_ADDR_ROW2_Msk (0xFFUL << ARM_NAND_CODE_ADDR_ROW2_Pos) -#define ARM_NAND_CODE_ADDR_ROW3_Pos 16 -#define ARM_NAND_CODE_ADDR_ROW3_Msk (0xFFUL << ARM_NAND_CODE_ADDR_ROW3_Pos) - - -/****** NAND specific error codes *****/ -#define ARM_NAND_ERROR_ECC (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< ECC generation/correction failed - - -/** -\brief NAND ECC (Error Correction Code) Information -*/ -typedef struct _ARM_NAND_ECC_INFO { - uint32_t type : 2; ///< Type: 1=ECC0 over Main, 2=ECC0 over Main+Spare, 3=ECC0 over Main and ECC1 over Spare - uint32_t page_layout : 1; ///< Page layout: 0=|Main0|Spare0|...|MainN-1|SpareN-1|, 1=|Main0|...|MainN-1|Spare0|...|SpareN-1| - uint32_t page_count : 3; ///< Number of virtual pages: N = 2 ^ page_count - uint32_t page_size : 4; ///< Virtual Page size (Main+Spare): 0=512+16, 1=1k+32, 2=2k+64, 3=4k+128, 4=8k+256, 8=512+28, 9=1k+56, 10=2k+112, 11=4k+224, 12=8k+448, 15=Not used (extended description) - uint32_t reserved : 14; ///< Reserved (must be zero) - uint32_t correctable_bits : 8; ///< Number of correctable bits (based on 512 byte codeword size) - uint16_t codeword_size [2]; ///< Number of bytes over which ECC is calculated - uint16_t ecc_size [2]; ///< ECC size in bytes (rounded up) - uint16_t ecc_offset [2]; ///< ECC offset in bytes (where ECC starts in Spare) - /* Extended description */ - uint16_t virtual_page_size [2]; ///< Virtual Page size in bytes (Main/Spare) - uint16_t codeword_offset [2]; ///< Codeword offset in bytes (where ECC protected data starts in Main/Spare) - uint16_t codeword_gap [2]; ///< Codeword gap in bytes till next protected data - uint16_t ecc_gap [2]; ///< ECC gap in bytes till next generated ECC -} ARM_NAND_ECC_INFO; - - -/** -\brief NAND Status -*/ -typedef volatile struct _ARM_NAND_STATUS { - uint32_t busy : 1; ///< Driver busy flag - uint32_t ecc_error : 1; ///< ECC error detected (cleared on next Read/WriteData or ExecuteSequence) - uint32_t reserved : 30; -} ARM_NAND_STATUS; - - -/****** NAND Event *****/ -#define ARM_NAND_EVENT_DEVICE_READY (1UL << 0) ///< Device Ready: R/Bn rising edge -#define ARM_NAND_EVENT_DRIVER_READY (1UL << 1) ///< Driver Ready -#define ARM_NAND_EVENT_DRIVER_DONE (1UL << 2) ///< Driver operation done -#define ARM_NAND_EVENT_ECC_ERROR (1UL << 3) ///< ECC could not correct data - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_NAND_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_NAND_CAPABILITIES ARM_NAND_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_NAND_CAPABILITIES -*/ -/** - \fn int32_t ARM_NAND_Initialize (ARM_NAND_SignalEvent_t cb_event) - \brief Initialize the NAND Interface. - \param[in] cb_event Pointer to \ref ARM_NAND_SignalEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_Uninitialize (void) - \brief De-initialize the NAND Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_PowerControl (ARM_POWER_STATE state) - \brief Control the NAND interface power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_DevicePower (uint32_t voltage) - \brief Set device power supply voltage. - \param[in] voltage NAND Device supply voltage - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_WriteProtect (uint32_t dev_num, bool enable) - \brief Control WPn (Write Protect). - \param[in] dev_num Device number - \param[in] enable - - \b false Write Protect off - - \b true Write Protect on - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_ChipEnable (uint32_t dev_num, bool enable) - \brief Control CEn (Chip Enable). - \param[in] dev_num Device number - \param[in] enable - - \b false Chip Enable off - - \b true Chip Enable on - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_GetDeviceBusy (uint32_t dev_num) - \brief Get Device Busy pin state. - \param[in] dev_num Device number - \return 1=busy, 0=not busy, or error -*/ -/** - \fn int32_t ARM_NAND_SendCommand (uint32_t dev_num, uint8_t cmd) - \brief Send command to NAND device. - \param[in] dev_num Device number - \param[in] cmd Command - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_SendAddress (uint32_t dev_num, uint8_t addr) - \brief Send address to NAND device. - \param[in] dev_num Device number - \param[in] addr Address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_ReadData (uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode) - \brief Read data from NAND device. - \param[in] dev_num Device number - \param[out] data Pointer to buffer for data to read from NAND device - \param[in] cnt Number of data items to read - \param[in] mode Operation mode - \return number of data items read or \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_WriteData (uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode) - \brief Write data to NAND device. - \param[in] dev_num Device number - \param[out] data Pointer to buffer with data to write to NAND device - \param[in] cnt Number of data items to write - \param[in] mode Operation mode - \return number of data items written or \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_ExecuteSequence (uint32_t dev_num, uint32_t code, uint32_t cmd, - uint32_t addr_col, uint32_t addr_row, - void *data, uint32_t data_cnt, - uint8_t *status, uint32_t *count) - \brief Execute sequence of operations. - \param[in] dev_num Device number - \param[in] code Sequence code - \param[in] cmd Command(s) - \param[in] addr_col Column address - \param[in] addr_row Row address - \param[in,out] data Pointer to data to be written or read - \param[in] data_cnt Number of data items in one iteration - \param[out] status Pointer to status read - \param[in,out] count Number of iterations - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_AbortSequence (uint32_t dev_num) - \brief Abort sequence execution. - \param[in] dev_num Device number - \return \ref execution_status -*/ -/** - \fn int32_t ARM_NAND_Control (uint32_t dev_num, uint32_t control, uint32_t arg) - \brief Control NAND Interface. - \param[in] dev_num Device number - \param[in] control Operation - \param[in] arg Argument of operation - \return \ref execution_status -*/ -/** - \fn ARM_NAND_STATUS ARM_NAND_GetStatus (uint32_t dev_num) - \brief Get NAND status. - \param[in] dev_num Device number - \return NAND status \ref ARM_NAND_STATUS -*/ -/** - \fn int32_t ARM_NAND_InquireECC (int32_t index, ARM_NAND_ECC_INFO *info) - \brief Inquire about available ECC. - \param[in] index Inquire ECC index - \param[out] info Pointer to ECC information \ref ARM_NAND_ECC_INFO retrieved - \return \ref execution_status -*/ - -/** - \fn void ARM_NAND_SignalEvent (uint32_t dev_num, uint32_t event) - \brief Signal NAND event. - \param[in] dev_num Device number - \param[in] event Event notification mask - \return none -*/ - -typedef void (*ARM_NAND_SignalEvent_t) (uint32_t dev_num, uint32_t event); ///< Pointer to \ref ARM_NAND_SignalEvent : Signal NAND Event. - - -/** -\brief NAND Driver Capabilities. -*/ -typedef struct _ARM_NAND_CAPABILITIES { - uint32_t event_device_ready : 1; ///< Signal Device Ready event (R/Bn rising edge) - uint32_t reentrant_operation : 1; ///< Supports re-entrant operation (SendCommand/Address, Read/WriteData) - uint32_t sequence_operation : 1; ///< Supports Sequence operation (ExecuteSequence, AbortSequence) - uint32_t vcc : 1; ///< Supports VCC Power Supply Control - uint32_t vcc_1v8 : 1; ///< Supports 1.8 VCC Power Supply - uint32_t vccq : 1; ///< Supports VCCQ I/O Power Supply Control - uint32_t vccq_1v8 : 1; ///< Supports 1.8 VCCQ I/O Power Supply - uint32_t vpp : 1; ///< Supports VPP High Voltage Power Supply Control - uint32_t wp : 1; ///< Supports WPn (Write Protect) Control - uint32_t ce_lines : 4; ///< Number of CEn (Chip Enable) lines: ce_lines + 1 - uint32_t ce_manual : 1; ///< Supports manual CEn (Chip Enable) Control - uint32_t rb_monitor : 1; ///< Supports R/Bn (Ready/Busy) Monitoring - uint32_t data_width_16 : 1; ///< Supports 16-bit data - uint32_t ddr : 1; ///< Supports NV-DDR Data Interface (ONFI) - uint32_t ddr2 : 1; ///< Supports NV-DDR2 Data Interface (ONFI) - uint32_t sdr_timing_mode : 3; ///< Fastest (highest) SDR Timing Mode supported (ONFI) - uint32_t ddr_timing_mode : 3; ///< Fastest (highest) NV_DDR Timing Mode supported (ONFI) - uint32_t ddr2_timing_mode : 3; ///< Fastest (highest) NV_DDR2 Timing Mode supported (ONFI) - uint32_t driver_strength_18 : 1; ///< Supports Driver Strength 2.0x = 18 Ohms - uint32_t driver_strength_25 : 1; ///< Supports Driver Strength 1.4x = 25 Ohms - uint32_t driver_strength_50 : 1; ///< Supports Driver Strength 0.7x = 50 Ohms - uint32_t reserved : 2; ///< Reserved (must be zero) -} ARM_NAND_CAPABILITIES; - - -/** -\brief Access structure of the NAND Driver. -*/ -typedef struct _ARM_DRIVER_NAND { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_NAND_GetVersion : Get driver version. - ARM_NAND_CAPABILITIES (*GetCapabilities)(void); ///< Pointer to \ref ARM_NAND_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_NAND_SignalEvent_t cb_event); ///< Pointer to \ref ARM_NAND_Initialize : Initialize NAND Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_NAND_Uninitialize : De-initialize NAND Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_NAND_PowerControl : Control NAND Interface Power. - int32_t (*DevicePower) (uint32_t voltage); ///< Pointer to \ref ARM_NAND_DevicePower : Set device power supply voltage. - int32_t (*WriteProtect) (uint32_t dev_num, bool enable); ///< Pointer to \ref ARM_NAND_WriteProtect : Control WPn (Write Protect). - int32_t (*ChipEnable) (uint32_t dev_num, bool enable); ///< Pointer to \ref ARM_NAND_ChipEnable : Control CEn (Chip Enable). - int32_t (*GetDeviceBusy) (uint32_t dev_num); ///< Pointer to \ref ARM_NAND_GetDeviceBusy : Get Device Busy pin state. - int32_t (*SendCommand) (uint32_t dev_num, uint8_t cmd); ///< Pointer to \ref ARM_NAND_SendCommand : Send command to NAND device. - int32_t (*SendAddress) (uint32_t dev_num, uint8_t addr); ///< Pointer to \ref ARM_NAND_SendAddress : Send address to NAND device. - int32_t (*ReadData) (uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode); ///< Pointer to \ref ARM_NAND_ReadData : Read data from NAND device. - int32_t (*WriteData) (uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode); ///< Pointer to \ref ARM_NAND_WriteData : Write data to NAND device. - int32_t (*ExecuteSequence)(uint32_t dev_num, uint32_t code, uint32_t cmd, - uint32_t addr_col, uint32_t addr_row, - void *data, uint32_t data_cnt, - uint8_t *status, uint32_t *count); ///< Pointer to \ref ARM_NAND_ExecuteSequence : Execute sequence of operations. - int32_t (*AbortSequence) (uint32_t dev_num); ///< Pointer to \ref ARM_NAND_AbortSequence : Abort sequence execution. - int32_t (*Control) (uint32_t dev_num, uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_NAND_Control : Control NAND Interface. - ARM_NAND_STATUS (*GetStatus) (uint32_t dev_num); ///< Pointer to \ref ARM_NAND_GetStatus : Get NAND status. - int32_t (*InquireECC) ( int32_t index, ARM_NAND_ECC_INFO *info); ///< Pointer to \ref ARM_NAND_InquireECC : Inquire about available ECC. -} const ARM_DRIVER_NAND; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_NAND_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_SAI.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_SAI.h deleted file mode 100644 index 56e11af857..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_SAI.h +++ /dev/null @@ -1,308 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V1.1 - * - * Project: SAI (Serial Audio Interface) Driver definitions - */ - -/* History: - * Version 1.1 - * ARM_SAI_STATUS made volatile - * Version 1.0 - * Initial release - */ - -#ifndef DRIVER_SAI_H_ -#define DRIVER_SAI_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_Common.h" - -#define ARM_SAI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */ - - -/****** SAI Control Codes *****/ - -#define ARM_SAI_CONTROL_Msk (0xFFU) -#define ARM_SAI_CONFIGURE_TX (0x01U) ///< Configure Transmitter; arg1 and arg2 provide additional configuration -#define ARM_SAI_CONFIGURE_RX (0x02U) ///< Configure Receiver; arg1 and arg2 provide additional configuration -#define ARM_SAI_CONTROL_TX (0x03U) ///< Control Transmitter; arg1.0: 0=disable (default), 1=enable; arg1.1: mute -#define ARM_SAI_CONTROL_RX (0x04U) ///< Control Receiver; arg1.0: 0=disable (default), 1=enable -#define ARM_SAI_MASK_SLOTS_TX (0x05U) ///< Mask Transmitter slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default -#define ARM_SAI_MASK_SLOTS_RX (0x06U) ///< Mask Receiver slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default -#define ARM_SAI_ABORT_SEND (0x07U) ///< Abort \ref ARM_SAI_Send -#define ARM_SAI_ABORT_RECEIVE (0x08U) ///< Abort \ref ARM_SAI_Receive - -/*----- SAI Control Codes: Configuration Parameters: Mode -----*/ -#define ARM_SAI_MODE_Pos 8 -#define ARM_SAI_MODE_Msk (1U << ARM_SAI_MODE_Pos) -#define ARM_SAI_MODE_MASTER (1U << ARM_SAI_MODE_Pos) ///< Master Mode -#define ARM_SAI_MODE_SLAVE (0U << ARM_SAI_MODE_Pos) ///< Slave Mode (default) - -/*----- SAI Control Codes: Configuration Parameters: Synchronization -----*/ -#define ARM_SAI_SYNCHRONIZATION_Pos 9 -#define ARM_SAI_SYNCHRONIZATION_Msk (1U << ARM_SAI_SYNCHRONIZATION_Pos) -#define ARM_SAI_ASYNCHRONOUS (0U << ARM_SAI_SYNCHRONIZATION_Pos) ///< Asynchronous (default) -#define ARM_SAI_SYNCHRONOUS (1U << ARM_SAI_SYNCHRONIZATION_Pos) ///< Synchronous - -/*----- SAI Control Codes: Configuration Parameters: Protocol -----*/ -#define ARM_SAI_PROTOCOL_Pos 10 -#define ARM_SAI_PROTOCOL_Msk (7U << ARM_SAI_PROTOCOL_Pos) -#define ARM_SAI_PROTOCOL_USER (0U << ARM_SAI_PROTOCOL_Pos) ///< User defined (default) -#define ARM_SAI_PROTOCOL_I2S (1U << ARM_SAI_PROTOCOL_Pos) ///< I2S -#define ARM_SAI_PROTOCOL_MSB_JUSTIFIED (2U << ARM_SAI_PROTOCOL_Pos) ///< MSB (left) justified -#define ARM_SAI_PROTOCOL_LSB_JUSTIFIED (3U << ARM_SAI_PROTOCOL_Pos) ///< LSB (right) justified -#define ARM_SAI_PROTOCOL_PCM_SHORT (4U << ARM_SAI_PROTOCOL_Pos) ///< PCM with short frame -#define ARM_SAI_PROTOCOL_PCM_LONG (5U << ARM_SAI_PROTOCOL_Pos) ///< PCM with long frame -#define ARM_SAI_PROTOCOL_AC97 (6U << ARM_SAI_PROTOCOL_Pos) ///< AC'97 - -/*----- SAI Control Codes: Configuration Parameters: Data Size -----*/ -#define ARM_SAI_DATA_SIZE_Pos 13 -#define ARM_SAI_DATA_SIZE_Msk (0x1FU << ARM_SAI_DATA_SIZE_Pos) -#define ARM_SAI_DATA_SIZE(n) ((((n)-1)&0x1FU) << ARM_SAI_DATA_SIZE_Pos) ///< Data size in bits (8..32) - -/*----- SAI Control Codes: Configuration Parameters: Bit Order -----*/ -#define ARM_SAI_BIT_ORDER_Pos 18 -#define ARM_SAI_BIT_ORDER_Msk (1U << ARM_SAI_BIT_ORDER_Pos) -#define ARM_SAI_MSB_FIRST (0U << ARM_SAI_BIT_ORDER_Pos) ///< Data is transferred with MSB first (default) -#define ARM_SAI_LSB_FIRST (1U << ARM_SAI_BIT_ORDER_Pos) ///< Data is transferred with LSB first; User Protocol only (ignored otherwise) - -/*----- SAI Control Codes: Configuration Parameters: Mono Mode -----*/ -#define ARM_SAI_MONO_MODE (1U << 19) ///< Mono Mode (only for I2S, MSB/LSB justified) - -/*----- SAI Control Codes:Configuration Parameters: Companding -----*/ -#define ARM_SAI_COMPANDING_Pos 20 -#define ARM_SAI_COMPANDING_Msk (3U << ARM_SAI_COMPANDING_Pos) -#define ARM_SAI_COMPANDING_NONE (0U << ARM_SAI_COMPANDING_Pos) ///< No compading (default) -#define ARM_SAI_COMPANDING_A_LAW (2U << ARM_SAI_COMPANDING_Pos) ///< A-Law companding -#define ARM_SAI_COMPANDING_U_LAW (3U << ARM_SAI_COMPANDING_Pos) ///< u-Law companding - -/*----- SAI Control Codes: Configuration Parameters: Clock Polarity -----*/ -#define ARM_SAI_CLOCK_POLARITY_Pos 23 -#define ARM_SAI_CLOCK_POLARITY_Msk (1U << ARM_SAI_CLOCK_POLARITY_Pos) -#define ARM_SAI_CLOCK_POLARITY_0 (0U << ARM_SAI_CLOCK_POLARITY_Pos) ///< Drive on falling edge, Capture on rising edge (default) -#define ARM_SAI_CLOCK_POLARITY_1 (1U << ARM_SAI_CLOCK_POLARITY_Pos) ///< Drive on rising edge, Capture on falling edge - -/*----- SAI Control Codes: Configuration Parameters: Master Clock Pin -----*/ -#define ARM_SAI_MCLK_PIN_Pos 24 -#define ARM_SAI_MCLK_PIN_Msk (3U << ARM_SAI_MCLK_PIN_Pos) -#define ARM_SAI_MCLK_PIN_INACTIVE (0U << ARM_SAI_MCLK_PIN_Pos) ///< MCLK not used (default) -#define ARM_SAI_MCLK_PIN_OUTPUT (1U << ARM_SAI_MCLK_PIN_Pos) ///< MCLK is output (Master only) -#define ARM_SAI_MCLK_PIN_INPUT (2U << ARM_SAI_MCLK_PIN_Pos) ///< MCLK is input (Master only) - - -/****** SAI Configuration (arg1) *****/ - -/*----- SAI Configuration (arg1): Frame Length -----*/ -#define ARM_SAI_FRAME_LENGTH_Pos 0 -#define ARM_SAI_FRAME_LENGTH_Msk (0x3FFU << ARM_SAI_FRAME_LENGTH_Pos) -#define ARM_SAI_FRAME_LENGTH(n) ((((n)-1)&0x3FFU) << ARM_SAI_FRAME_LENGTH_Pos) ///< Frame length in bits (8..1024); default depends on protocol and data - -/*----- SAI Configuration (arg1): Frame Sync Width -----*/ -#define ARM_SAI_FRAME_SYNC_WIDTH_Pos 10 -#define ARM_SAI_FRAME_SYNC_WIDTH_Msk (0xFFU << ARM_SAI_FRAME_SYNC_WIDTH_Pos) -#define ARM_SAI_FRAME_SYNC_WIDTH(n) ((((n)-1)&0xFFU) << ARM_SAI_FRAME_SYNC_WIDTH_Pos) ///< Frame Sync width in bits (1..256); default=1; User Protocol only (ignored otherwise) - -/*----- SAI Configuration (arg1): Frame Sync Polarity -----*/ -#define ARM_SAI_FRAME_SYNC_POLARITY_Pos 18 -#define ARM_SAI_FRAME_SYNC_POLARITY_Msk (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) -#define ARM_SAI_FRAME_SYNC_POLARITY_HIGH (0U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) ///< Frame Sync is active high (default); User Protocol only (ignored otherwise) -#define ARM_SAI_FRAME_SYNC_POLARITY_LOW (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) ///< Frame Sync is active low; User Protocol only (ignored otherwise) - -/*----- SAI Configuration (arg1): Frame Sync Early -----*/ -#define ARM_SAI_FRAME_SYNC_EARLY (1U << 19) ///< Frame Sync one bit before the first bit of the frame; User Protocol only (ignored otherwise) - -/*----- SAI Configuration (arg1): Slot Count -----*/ -#define ARM_SAI_SLOT_COUNT_Pos 20 -#define ARM_SAI_SLOT_COUNT_Msk (0x1FU << ARM_SAI_SLOT_COUNT_Pos) -#define ARM_SAI_SLOT_COUNT(n) ((((n)-1)&0x1FU) << ARM_SAI_SLOT_COUNT_Pos) ///< Number of slots in frame (1..32); default=1; User Protocol only (ignored otherwise) - -/*----- SAI Configuration (arg1): Slot Size -----*/ -#define ARM_SAI_SLOT_SIZE_Pos 25 -#define ARM_SAI_SLOT_SIZE_Msk (3U << ARM_SAI_SLOT_SIZE_Pos) -#define ARM_SAI_SLOT_SIZE_DEFAULT (0U << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size is equal to data size (default) -#define ARM_SAI_SLOT_SIZE_16 (1U << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size = 16 bits; User Protocol only (ignored otherwise) -#define ARM_SAI_SLOT_SIZE_32 (3U << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size = 32 bits; User Protocol only (ignored otherwise) - -/*----- SAI Configuration (arg1): Slot Offset -----*/ -#define ARM_SAI_SLOT_OFFSET_Pos 27 -#define ARM_SAI_SLOT_OFFSET_Msk (0x1FU << ARM_SAI_SLOT_OFFSET_Pos) -#define ARM_SAI_SLOT_OFFSET(n) (((n)&0x1FU) << ARM_SAI_SLOT_OFFSET_Pos) ///< Offset of first data bit in slot (0..31); default=0; User Protocol only (ignored otherwise) - -/****** SAI Configuration (arg2) *****/ - -/*----- SAI Control Codes: Configuration Parameters: Audio Frequency (Master only) -----*/ -#define ARM_SAI_AUDIO_FREQ_Msk (0x0FFFFFU) ///< Audio frequency mask - -/*----- SAI Control Codes: Configuration Parameters: Master Clock Prescaler (Master only and MCLK Pin) -----*/ -#define ARM_SAI_MCLK_PRESCALER_Pos 20 -#define ARM_SAI_MCLK_PRESCALER_Msk (0xFFFU << ARM_SAI_MCLK_PRESCALER_Pos) -#define ARM_SAI_MCLK_PRESCALER(n) ((((n)-1)&0xFFFU) << ARM_SAI_MCLK_PRESCALER_Pos) ///< MCLK prescaler; Audio_frequency = MCLK/n; n = 1..4096 (default=1) - - -/****** SAI specific error codes *****/ -#define ARM_SAI_ERROR_SYNCHRONIZATION (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Specified Synchronization not supported -#define ARM_SAI_ERROR_PROTOCOL (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Specified Protocol not supported -#define ARM_SAI_ERROR_DATA_SIZE (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Specified Data size not supported -#define ARM_SAI_ERROR_BIT_ORDER (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Specified Bit order not supported -#define ARM_SAI_ERROR_MONO_MODE (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Specified Mono mode not supported -#define ARM_SAI_ERROR_COMPANDING (ARM_DRIVER_ERROR_SPECIFIC - 6) ///< Specified Companding not supported -#define ARM_SAI_ERROR_CLOCK_POLARITY (ARM_DRIVER_ERROR_SPECIFIC - 7) ///< Specified Clock polarity not supported -#define ARM_SAI_ERROR_AUDIO_FREQ (ARM_DRIVER_ERROR_SPECIFIC - 8) ///< Specified Audio frequency not supported -#define ARM_SAI_ERROR_MCLK_PIN (ARM_DRIVER_ERROR_SPECIFIC - 9) ///< Specified MCLK Pin setting not supported -#define ARM_SAI_ERROR_MCLK_PRESCALER (ARM_DRIVER_ERROR_SPECIFIC - 10) ///< Specified MCLK Prescaler not supported -#define ARM_SAI_ERROR_FRAME_LENGHT (ARM_DRIVER_ERROR_SPECIFIC - 11) ///< Specified Frame length not supported -#define ARM_SAI_ERROR_FRAME_SYNC_WIDTH (ARM_DRIVER_ERROR_SPECIFIC - 12) ///< Specified Frame Sync width not supported -#define ARM_SAI_ERROR_FRAME_SYNC_POLARITY (ARM_DRIVER_ERROR_SPECIFIC - 13) ///< Specified Frame Sync polarity not supported -#define ARM_SAI_ERROR_FRAME_SYNC_EARLY (ARM_DRIVER_ERROR_SPECIFIC - 14) ///< Specified Frame Sync early not supported -#define ARM_SAI_ERROR_SLOT_COUNT (ARM_DRIVER_ERROR_SPECIFIC - 15) ///< Specified Slot count not supported -#define ARM_SAI_ERROR_SLOT_SIZE (ARM_DRIVER_ERROR_SPECIFIC - 16) ///< Specified Slot size not supported -#define ARM_SAI_ERROR_SLOT_OFFESET (ARM_DRIVER_ERROR_SPECIFIC - 17) ///< Specified Slot offset not supported - - -/** -\brief SAI Status -*/ -typedef volatile struct _ARM_SAI_STATUS { - uint32_t tx_busy : 1; ///< Transmitter busy flag - uint32_t rx_busy : 1; ///< Receiver busy flag - uint32_t tx_underflow : 1; ///< Transmit data underflow detected (cleared on start of next send operation) - uint32_t rx_overflow : 1; ///< Receive data overflow detected (cleared on start of next receive operation) - uint32_t frame_error : 1; ///< Sync Frame error detected (cleared on start of next send/receive operation) - uint32_t reserved : 27; -} ARM_SAI_STATUS; - - -/****** SAI Event *****/ -#define ARM_SAI_EVENT_SEND_COMPLETE (1U << 0) ///< Send completed -#define ARM_SAI_EVENT_RECEIVE_COMPLETE (1U << 1) ///< Receive completed -#define ARM_SAI_EVENT_TX_UNDERFLOW (1U << 2) ///< Transmit data not available -#define ARM_SAI_EVENT_RX_OVERFLOW (1U << 3) ///< Receive data overflow -#define ARM_SAI_EVENT_FRAME_ERROR (1U << 4) ///< Sync Frame error in Slave mode (optional) - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_SAI_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn ARM_SAI_CAPABILITIES ARM_SAI_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_SAI_CAPABILITIES - - \fn int32_t ARM_SAI_Initialize (ARM_SAI_SignalEvent_t cb_event) - \brief Initialize SAI Interface. - \param[in] cb_event Pointer to \ref ARM_SAI_SignalEvent - \return \ref execution_status - - \fn int32_t ARM_SAI_Uninitialize (void) - \brief De-initialize SAI Interface. - \return \ref execution_status - - \fn int32_t ARM_SAI_PowerControl (ARM_POWER_STATE state) - \brief Control SAI Interface Power. - \param[in] state Power state - \return \ref execution_status - - \fn int32_t ARM_SAI_Send (const void *data, uint32_t num) - \brief Start sending data to SAI transmitter. - \param[in] data Pointer to buffer with data to send to SAI transmitter - \param[in] num Number of data items to send - \return \ref execution_status - - \fn int32_t ARM_SAI_Receive (void *data, uint32_t num) - \brief Start receiving data from SAI receiver. - \param[out] data Pointer to buffer for data to receive from SAI receiver - \param[in] num Number of data items to receive - \return \ref execution_status - - \fn uint32_t ARM_SAI_GetTxCount (void) - \brief Get transmitted data count. - \return number of data items transmitted - - \fn uint32_t ARM_SAI_GetRxCount (void) - \brief Get received data count. - \return number of data items received - - \fn int32_t ARM_SAI_Control (uint32_t control, uint32_t arg1, uint32_t arg2) - \brief Control SAI Interface. - \param[in] control Operation - \param[in] arg1 Argument 1 of operation (optional) - \param[in] arg2 Argument 2 of operation (optional) - \return common \ref execution_status and driver specific \ref sai_execution_status - - \fn ARM_SAI_STATUS ARM_SAI_GetStatus (void) - \brief Get SAI status. - \return SAI status \ref ARM_SAI_STATUS - - \fn void ARM_SAI_SignalEvent (uint32_t event) - \brief Signal SAI Events. - \param[in] event \ref SAI_events notification mask - \return none -*/ - -typedef void (*ARM_SAI_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_SAI_SignalEvent : Signal SAI Event. - - -/** -\brief SAI Driver Capabilities. -*/ -typedef struct _ARM_SAI_CAPABILITIES { - uint32_t asynchronous : 1; ///< supports asynchronous Transmit/Receive - uint32_t synchronous : 1; ///< supports synchronous Transmit/Receive - uint32_t protocol_user : 1; ///< supports user defined Protocol - uint32_t protocol_i2s : 1; ///< supports I2S Protocol - uint32_t protocol_justified : 1; ///< supports MSB/LSB justified Protocol - uint32_t protocol_pcm : 1; ///< supports PCM short/long frame Protocol - uint32_t protocol_ac97 : 1; ///< supports AC'97 Protocol - uint32_t mono_mode : 1; ///< supports Mono mode - uint32_t companding : 1; ///< supports Companding - uint32_t mclk_pin : 1; ///< supports MCLK (Master Clock) pin - uint32_t event_frame_error : 1; ///< supports Frame error event: \ref ARM_SAI_EVENT_FRAME_ERROR - uint32_t reserved : 21; ///< Reserved (must be zero) -} ARM_SAI_CAPABILITIES; - - -/** -\brief Access structure of the SAI Driver. -*/ -typedef struct _ARM_DRIVER_SAI { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_SAI_GetVersion : Get driver version. - ARM_SAI_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_SAI_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_SAI_SignalEvent_t cb_event); ///< Pointer to \ref ARM_SAI_Initialize : Initialize SAI Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_SAI_Uninitialize : De-initialize SAI Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_SAI_PowerControl : Control SAI Interface Power. - int32_t (*Send) (const void *data, uint32_t num); ///< Pointer to \ref ARM_SAI_Send : Start sending data to SAI Interface. - int32_t (*Receive) ( void *data, uint32_t num); ///< Pointer to \ref ARM_SAI_Receive : Start receiving data from SAI Interface. - uint32_t (*GetTxCount) (void); ///< Pointer to \ref ARM_SAI_GetTxCount : Get transmitted data count. - uint32_t (*GetRxCount) (void); ///< Pointer to \ref ARM_SAI_GetRxCount : Get received data count. - int32_t (*Control) (uint32_t control, uint32_t arg1, uint32_t arg2); ///< Pointer to \ref ARM_SAI_Control : Control SAI Interface. - ARM_SAI_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_SAI_GetStatus : Get SAI status. -} const ARM_DRIVER_SAI; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_SAI_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_SPI.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_SPI.h deleted file mode 100644 index 61b4d806c4..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_SPI.h +++ /dev/null @@ -1,247 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.2 - * - * Project: SPI (Serial Peripheral Interface) Driver definitions - */ - -/* History: - * Version 2.2 - * ARM_SPI_STATUS made volatile - * Version 2.1 - * Renamed status flag "tx_rx_busy" to "busy" - * Version 2.0 - * New simplified driver: - * complexity moved to upper layer (especially data handling) - * more unified API for different communication interfaces - * Added: - * Slave Mode - * Half-duplex Modes - * Configurable number of data bits - * Support for TI Mode and Microwire - * Changed prefix ARM_DRV -> ARM_DRIVER - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.01 - * Added "send_done_event" to Capabilities - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_SPI_H_ -#define DRIVER_SPI_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_Common.h" - -#define ARM_SPI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */ - - -/****** SPI Control Codes *****/ - -#define ARM_SPI_CONTROL_Pos 0 -#define ARM_SPI_CONTROL_Msk (0xFFUL << ARM_SPI_CONTROL_Pos) - -/*----- SPI Control Codes: Mode -----*/ -#define ARM_SPI_MODE_INACTIVE (0x00UL << ARM_SPI_CONTROL_Pos) ///< SPI Inactive -#define ARM_SPI_MODE_MASTER (0x01UL << ARM_SPI_CONTROL_Pos) ///< SPI Master (Output on MOSI, Input on MISO); arg = Bus Speed in bps -#define ARM_SPI_MODE_SLAVE (0x02UL << ARM_SPI_CONTROL_Pos) ///< SPI Slave (Output on MISO, Input on MOSI) -#define ARM_SPI_MODE_MASTER_SIMPLEX (0x03UL << ARM_SPI_CONTROL_Pos) ///< SPI Master (Output/Input on MOSI); arg = Bus Speed in bps -#define ARM_SPI_MODE_SLAVE_SIMPLEX (0x04UL << ARM_SPI_CONTROL_Pos) ///< SPI Slave (Output/Input on MISO) - -/*----- SPI Control Codes: Mode Parameters: Frame Format -----*/ -#define ARM_SPI_FRAME_FORMAT_Pos 8 -#define ARM_SPI_FRAME_FORMAT_Msk (7UL << ARM_SPI_FRAME_FORMAT_Pos) -#define ARM_SPI_CPOL0_CPHA0 (0UL << ARM_SPI_FRAME_FORMAT_Pos) ///< Clock Polarity 0, Clock Phase 0 (default) -#define ARM_SPI_CPOL0_CPHA1 (1UL << ARM_SPI_FRAME_FORMAT_Pos) ///< Clock Polarity 0, Clock Phase 1 -#define ARM_SPI_CPOL1_CPHA0 (2UL << ARM_SPI_FRAME_FORMAT_Pos) ///< Clock Polarity 1, Clock Phase 0 -#define ARM_SPI_CPOL1_CPHA1 (3UL << ARM_SPI_FRAME_FORMAT_Pos) ///< Clock Polarity 1, Clock Phase 1 -#define ARM_SPI_TI_SSI (4UL << ARM_SPI_FRAME_FORMAT_Pos) ///< Texas Instruments Frame Format -#define ARM_SPI_MICROWIRE (5UL << ARM_SPI_FRAME_FORMAT_Pos) ///< National Microwire Frame Format - -/*----- SPI Control Codes: Mode Parameters: Data Bits -----*/ -#define ARM_SPI_DATA_BITS_Pos 12 -#define ARM_SPI_DATA_BITS_Msk (0x3FUL << ARM_SPI_DATA_BITS_Pos) -#define ARM_SPI_DATA_BITS(n) (((n) & 0x3F) << ARM_SPI_DATA_BITS_Pos) ///< Number of Data bits - -/*----- SPI Control Codes: Mode Parameters: Bit Order -----*/ -#define ARM_SPI_BIT_ORDER_Pos 18 -#define ARM_SPI_BIT_ORDER_Msk (1UL << ARM_SPI_BIT_ORDER_Pos) -#define ARM_SPI_MSB_LSB (0UL << ARM_SPI_BIT_ORDER_Pos) ///< SPI Bit order from MSB to LSB (default) -#define ARM_SPI_LSB_MSB (1UL << ARM_SPI_BIT_ORDER_Pos) ///< SPI Bit order from LSB to MSB - -/*----- SPI Control Codes: Mode Parameters: Slave Select Mode -----*/ -#define ARM_SPI_SS_MASTER_MODE_Pos 19 -#define ARM_SPI_SS_MASTER_MODE_Msk (3UL << ARM_SPI_SS_MASTER_MODE_Pos) -#define ARM_SPI_SS_MASTER_UNUSED (0UL << ARM_SPI_SS_MASTER_MODE_Pos) ///< SPI Slave Select when Master: Not used (default) -#define ARM_SPI_SS_MASTER_SW (1UL << ARM_SPI_SS_MASTER_MODE_Pos) ///< SPI Slave Select when Master: Software controlled -#define ARM_SPI_SS_MASTER_HW_OUTPUT (2UL << ARM_SPI_SS_MASTER_MODE_Pos) ///< SPI Slave Select when Master: Hardware controlled Output -#define ARM_SPI_SS_MASTER_HW_INPUT (3UL << ARM_SPI_SS_MASTER_MODE_Pos) ///< SPI Slave Select when Master: Hardware monitored Input -#define ARM_SPI_SS_SLAVE_MODE_Pos 21 -#define ARM_SPI_SS_SLAVE_MODE_Msk (1UL << ARM_SPI_SS_SLAVE_MODE_Pos) -#define ARM_SPI_SS_SLAVE_HW (0UL << ARM_SPI_SS_SLAVE_MODE_Pos) ///< SPI Slave Select when Slave: Hardware monitored (default) -#define ARM_SPI_SS_SLAVE_SW (1UL << ARM_SPI_SS_SLAVE_MODE_Pos) ///< SPI Slave Select when Slave: Software controlled - - -/*----- SPI Control Codes: Miscellaneous Controls -----*/ -#define ARM_SPI_SET_BUS_SPEED (0x10UL << ARM_SPI_CONTROL_Pos) ///< Set Bus Speed in bps; arg = value -#define ARM_SPI_GET_BUS_SPEED (0x11UL << ARM_SPI_CONTROL_Pos) ///< Get Bus Speed in bps -#define ARM_SPI_SET_DEFAULT_TX_VALUE (0x12UL << ARM_SPI_CONTROL_Pos) ///< Set default Transmit value; arg = value -#define ARM_SPI_CONTROL_SS (0x13UL << ARM_SPI_CONTROL_Pos) ///< Control Slave Select; arg: 0=inactive, 1=active -#define ARM_SPI_ABORT_TRANSFER (0x14UL << ARM_SPI_CONTROL_Pos) ///< Abort current data transfer - - -/****** SPI Slave Select Signal definitions *****/ -#define ARM_SPI_SS_INACTIVE 0 ///< SPI Slave Select Signal Inactive -#define ARM_SPI_SS_ACTIVE 1 ///< SPI Slave Select Signal Active - - -/****** SPI specific error codes *****/ -#define ARM_SPI_ERROR_MODE (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Specified Mode not supported -#define ARM_SPI_ERROR_FRAME_FORMAT (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Specified Frame Format not supported -#define ARM_SPI_ERROR_DATA_BITS (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Specified number of Data bits not supported -#define ARM_SPI_ERROR_BIT_ORDER (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Specified Bit order not supported -#define ARM_SPI_ERROR_SS_MODE (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Specified Slave Select Mode not supported - - -/** -\brief SPI Status -*/ -typedef volatile struct _ARM_SPI_STATUS { - uint32_t busy : 1; ///< Transmitter/Receiver busy flag - uint32_t data_lost : 1; ///< Data lost: Receive overflow / Transmit underflow (cleared on start of transfer operation) - uint32_t mode_fault : 1; ///< Mode fault detected; optional (cleared on start of transfer operation) - uint32_t reserved : 29; -} ARM_SPI_STATUS; - - -/****** SPI Event *****/ -#define ARM_SPI_EVENT_TRANSFER_COMPLETE (1UL << 0) ///< Data Transfer completed -#define ARM_SPI_EVENT_DATA_LOST (1UL << 1) ///< Data lost: Receive overflow / Transmit underflow -#define ARM_SPI_EVENT_MODE_FAULT (1UL << 2) ///< Master Mode Fault (SS deactivated when Master) - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_SPI_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn ARM_SPI_CAPABILITIES ARM_SPI_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_SPI_CAPABILITIES - - \fn int32_t ARM_SPI_Initialize (ARM_SPI_SignalEvent_t cb_event) - \brief Initialize SPI Interface. - \param[in] cb_event Pointer to \ref ARM_SPI_SignalEvent - \return \ref execution_status - - \fn int32_t ARM_SPI_Uninitialize (void) - \brief De-initialize SPI Interface. - \return \ref execution_status - - \fn int32_t ARM_SPI_PowerControl (ARM_POWER_STATE state) - \brief Control SPI Interface Power. - \param[in] state Power state - \return \ref execution_status - - \fn int32_t ARM_SPI_Send (const void *data, uint32_t num) - \brief Start sending data to SPI transmitter. - \param[in] data Pointer to buffer with data to send to SPI transmitter - \param[in] num Number of data items to send - \return \ref execution_status - - \fn int32_t ARM_SPI_Receive (void *data, uint32_t num) - \brief Start receiving data from SPI receiver. - \param[out] data Pointer to buffer for data to receive from SPI receiver - \param[in] num Number of data items to receive - \return \ref execution_status - - \fn int32_t ARM_SPI_Transfer (const void *data_out, - void *data_in, - uint32_t num) - \brief Start sending/receiving data to/from SPI transmitter/receiver. - \param[in] data_out Pointer to buffer with data to send to SPI transmitter - \param[out] data_in Pointer to buffer for data to receive from SPI receiver - \param[in] num Number of data items to transfer - \return \ref execution_status - - \fn uint32_t ARM_SPI_GetDataCount (void) - \brief Get transferred data count. - \return number of data items transferred - - \fn int32_t ARM_SPI_Control (uint32_t control, uint32_t arg) - \brief Control SPI Interface. - \param[in] control Operation - \param[in] arg Argument of operation (optional) - \return common \ref execution_status and driver specific \ref spi_execution_status - - \fn ARM_SPI_STATUS ARM_SPI_GetStatus (void) - \brief Get SPI status. - \return SPI status \ref ARM_SPI_STATUS - - \fn void ARM_SPI_SignalEvent (uint32_t event) - \brief Signal SPI Events. - \param[in] event \ref SPI_events notification mask - \return none -*/ - -typedef void (*ARM_SPI_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_SPI_SignalEvent : Signal SPI Event. - - -/** -\brief SPI Driver Capabilities. -*/ -typedef struct _ARM_SPI_CAPABILITIES { - uint32_t simplex : 1; ///< supports Simplex Mode (Master and Slave) - uint32_t ti_ssi : 1; ///< supports TI Synchronous Serial Interface - uint32_t microwire : 1; ///< supports Microwire Interface - uint32_t event_mode_fault : 1; ///< Signal Mode Fault event: \ref ARM_SPI_EVENT_MODE_FAULT - uint32_t reserved : 28; ///< Reserved (must be zero) -} ARM_SPI_CAPABILITIES; - - -/** -\brief Access structure of the SPI Driver. -*/ -typedef struct _ARM_DRIVER_SPI { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_SPI_GetVersion : Get driver version. - ARM_SPI_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_SPI_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_SPI_SignalEvent_t cb_event); ///< Pointer to \ref ARM_SPI_Initialize : Initialize SPI Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_SPI_Uninitialize : De-initialize SPI Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_SPI_PowerControl : Control SPI Interface Power. - int32_t (*Send) (const void *data, uint32_t num); ///< Pointer to \ref ARM_SPI_Send : Start sending data to SPI Interface. - int32_t (*Receive) ( void *data, uint32_t num); ///< Pointer to \ref ARM_SPI_Receive : Start receiving data from SPI Interface. - int32_t (*Transfer) (const void *data_out, - void *data_in, - uint32_t num); ///< Pointer to \ref ARM_SPI_Transfer : Start sending/receiving data to/from SPI. - uint32_t (*GetDataCount) (void); ///< Pointer to \ref ARM_SPI_GetDataCount : Get transferred data count. - int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_SPI_Control : Control SPI Interface. - ARM_SPI_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_SPI_GetStatus : Get SPI status. -} const ARM_DRIVER_SPI; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_SPI_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USART.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USART.h deleted file mode 100644 index e60bf51a31..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USART.h +++ /dev/null @@ -1,341 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.3 - * - * Project: USART (Universal Synchronous Asynchronous Receiver Transmitter) - * Driver definitions - */ - -/* History: - * Version 2.3 - * ARM_USART_STATUS and ARM_USART_MODEM_STATUS made volatile - * Version 2.2 - * Corrected ARM_USART_CPOL_Pos and ARM_USART_CPHA_Pos definitions - * Version 2.1 - * Removed optional argument parameter from Signal Event - * Version 2.0 - * New simplified driver: - * complexity moved to upper layer (especially data handling) - * more unified API for different communication interfaces - * renamed driver UART -> USART (Asynchronous & Synchronous) - * Added modes: - * Synchronous - * Single-wire - * IrDA - * Smart Card - * Changed prefix ARM_DRV -> ARM_DRIVER - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.01 - * Added events: - * ARM_UART_EVENT_TX_EMPTY, ARM_UART_EVENT_RX_TIMEOUT - * ARM_UART_EVENT_TX_THRESHOLD, ARM_UART_EVENT_RX_THRESHOLD - * Added functions: SetTxThreshold, SetRxThreshold - * Added "rx_timeout_event" to capabilities - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_USART_H_ -#define DRIVER_USART_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_Common.h" - -#define ARM_USART_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */ - - -/****** USART Control Codes *****/ - -#define ARM_USART_CONTROL_Pos 0 -#define ARM_USART_CONTROL_Msk (0xFFUL << ARM_USART_CONTROL_Pos) - -/*----- USART Control Codes: Mode -----*/ -#define ARM_USART_MODE_ASYNCHRONOUS (0x01UL << ARM_USART_CONTROL_Pos) ///< UART (Asynchronous); arg = Baudrate -#define ARM_USART_MODE_SYNCHRONOUS_MASTER (0x02UL << ARM_USART_CONTROL_Pos) ///< Synchronous Master (generates clock signal); arg = Baudrate -#define ARM_USART_MODE_SYNCHRONOUS_SLAVE (0x03UL << ARM_USART_CONTROL_Pos) ///< Synchronous Slave (external clock signal) -#define ARM_USART_MODE_SINGLE_WIRE (0x04UL << ARM_USART_CONTROL_Pos) ///< UART Single-wire (half-duplex); arg = Baudrate -#define ARM_USART_MODE_IRDA (0x05UL << ARM_USART_CONTROL_Pos) ///< UART IrDA; arg = Baudrate -#define ARM_USART_MODE_SMART_CARD (0x06UL << ARM_USART_CONTROL_Pos) ///< UART Smart Card; arg = Baudrate - -/*----- USART Control Codes: Mode Parameters: Data Bits -----*/ -#define ARM_USART_DATA_BITS_Pos 8 -#define ARM_USART_DATA_BITS_Msk (7UL << ARM_USART_DATA_BITS_Pos) -#define ARM_USART_DATA_BITS_5 (5UL << ARM_USART_DATA_BITS_Pos) ///< 5 Data bits -#define ARM_USART_DATA_BITS_6 (6UL << ARM_USART_DATA_BITS_Pos) ///< 6 Data bit -#define ARM_USART_DATA_BITS_7 (7UL << ARM_USART_DATA_BITS_Pos) ///< 7 Data bits -#define ARM_USART_DATA_BITS_8 (0UL << ARM_USART_DATA_BITS_Pos) ///< 8 Data bits (default) -#define ARM_USART_DATA_BITS_9 (1UL << ARM_USART_DATA_BITS_Pos) ///< 9 Data bits - -/*----- USART Control Codes: Mode Parameters: Parity -----*/ -#define ARM_USART_PARITY_Pos 12 -#define ARM_USART_PARITY_Msk (3UL << ARM_USART_PARITY_Pos) -#define ARM_USART_PARITY_NONE (0UL << ARM_USART_PARITY_Pos) ///< No Parity (default) -#define ARM_USART_PARITY_EVEN (1UL << ARM_USART_PARITY_Pos) ///< Even Parity -#define ARM_USART_PARITY_ODD (2UL << ARM_USART_PARITY_Pos) ///< Odd Parity - -/*----- USART Control Codes: Mode Parameters: Stop Bits -----*/ -#define ARM_USART_STOP_BITS_Pos 14 -#define ARM_USART_STOP_BITS_Msk (3UL << ARM_USART_STOP_BITS_Pos) -#define ARM_USART_STOP_BITS_1 (0UL << ARM_USART_STOP_BITS_Pos) ///< 1 Stop bit (default) -#define ARM_USART_STOP_BITS_2 (1UL << ARM_USART_STOP_BITS_Pos) ///< 2 Stop bits -#define ARM_USART_STOP_BITS_1_5 (2UL << ARM_USART_STOP_BITS_Pos) ///< 1.5 Stop bits -#define ARM_USART_STOP_BITS_0_5 (3UL << ARM_USART_STOP_BITS_Pos) ///< 0.5 Stop bits - -/*----- USART Control Codes: Mode Parameters: Flow Control -----*/ -#define ARM_USART_FLOW_CONTROL_Pos 16 -#define ARM_USART_FLOW_CONTROL_Msk (3UL << ARM_USART_FLOW_CONTROL_Pos) -#define ARM_USART_FLOW_CONTROL_NONE (0UL << ARM_USART_FLOW_CONTROL_Pos) ///< No Flow Control (default) -#define ARM_USART_FLOW_CONTROL_RTS (1UL << ARM_USART_FLOW_CONTROL_Pos) ///< RTS Flow Control -#define ARM_USART_FLOW_CONTROL_CTS (2UL << ARM_USART_FLOW_CONTROL_Pos) ///< CTS Flow Control -#define ARM_USART_FLOW_CONTROL_RTS_CTS (3UL << ARM_USART_FLOW_CONTROL_Pos) ///< RTS/CTS Flow Control - -/*----- USART Control Codes: Mode Parameters: Clock Polarity (Synchronous mode) -----*/ -#define ARM_USART_CPOL_Pos 18 -#define ARM_USART_CPOL_Msk (1UL << ARM_USART_CPOL_Pos) -#define ARM_USART_CPOL0 (0UL << ARM_USART_CPOL_Pos) ///< CPOL = 0 (default) -#define ARM_USART_CPOL1 (1UL << ARM_USART_CPOL_Pos) ///< CPOL = 1 - -/*----- USART Control Codes: Mode Parameters: Clock Phase (Synchronous mode) -----*/ -#define ARM_USART_CPHA_Pos 19 -#define ARM_USART_CPHA_Msk (1UL << ARM_USART_CPHA_Pos) -#define ARM_USART_CPHA0 (0UL << ARM_USART_CPHA_Pos) ///< CPHA = 0 (default) -#define ARM_USART_CPHA1 (1UL << ARM_USART_CPHA_Pos) ///< CPHA = 1 - - -/*----- USART Control Codes: Miscellaneous Controls -----*/ -#define ARM_USART_SET_DEFAULT_TX_VALUE (0x10UL << ARM_USART_CONTROL_Pos) ///< Set default Transmit value (Synchronous Receive only); arg = value -#define ARM_USART_SET_IRDA_PULSE (0x11UL << ARM_USART_CONTROL_Pos) ///< Set IrDA Pulse in ns; arg: 0=3/16 of bit period -#define ARM_USART_SET_SMART_CARD_GUARD_TIME (0x12UL << ARM_USART_CONTROL_Pos) ///< Set Smart Card Guard Time; arg = number of bit periods -#define ARM_USART_SET_SMART_CARD_CLOCK (0x13UL << ARM_USART_CONTROL_Pos) ///< Set Smart Card Clock in Hz; arg: 0=Clock not generated -#define ARM_USART_CONTROL_SMART_CARD_NACK (0x14UL << ARM_USART_CONTROL_Pos) ///< Smart Card NACK generation; arg: 0=disabled, 1=enabled -#define ARM_USART_CONTROL_TX (0x15UL << ARM_USART_CONTROL_Pos) ///< Transmitter; arg: 0=disabled, 1=enabled -#define ARM_USART_CONTROL_RX (0x16UL << ARM_USART_CONTROL_Pos) ///< Receiver; arg: 0=disabled, 1=enabled -#define ARM_USART_CONTROL_BREAK (0x17UL << ARM_USART_CONTROL_Pos) ///< Continuous Break transmission; arg: 0=disabled, 1=enabled -#define ARM_USART_ABORT_SEND (0x18UL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Send -#define ARM_USART_ABORT_RECEIVE (0x19UL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Receive -#define ARM_USART_ABORT_TRANSFER (0x1AUL << ARM_USART_CONTROL_Pos) ///< Abort \ref ARM_USART_Transfer - - - -/****** USART specific error codes *****/ -#define ARM_USART_ERROR_MODE (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Specified Mode not supported -#define ARM_USART_ERROR_BAUDRATE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Specified baudrate not supported -#define ARM_USART_ERROR_DATA_BITS (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Specified number of Data bits not supported -#define ARM_USART_ERROR_PARITY (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Specified Parity not supported -#define ARM_USART_ERROR_STOP_BITS (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Specified number of Stop bits not supported -#define ARM_USART_ERROR_FLOW_CONTROL (ARM_DRIVER_ERROR_SPECIFIC - 6) ///< Specified Flow Control not supported -#define ARM_USART_ERROR_CPOL (ARM_DRIVER_ERROR_SPECIFIC - 7) ///< Specified Clock Polarity not supported -#define ARM_USART_ERROR_CPHA (ARM_DRIVER_ERROR_SPECIFIC - 8) ///< Specified Clock Phase not supported - - -/** -\brief USART Status -*/ -typedef volatile struct _ARM_USART_STATUS { - uint32_t tx_busy : 1; ///< Transmitter busy flag - uint32_t rx_busy : 1; ///< Receiver busy flag - uint32_t tx_underflow : 1; ///< Transmit data underflow detected (cleared on start of next send operation) - uint32_t rx_overflow : 1; ///< Receive data overflow detected (cleared on start of next receive operation) - uint32_t rx_break : 1; ///< Break detected on receive (cleared on start of next receive operation) - uint32_t rx_framing_error : 1; ///< Framing error detected on receive (cleared on start of next receive operation) - uint32_t rx_parity_error : 1; ///< Parity error detected on receive (cleared on start of next receive operation) - uint32_t reserved : 25; -} ARM_USART_STATUS; - -/** -\brief USART Modem Control -*/ -typedef enum _ARM_USART_MODEM_CONTROL { - ARM_USART_RTS_CLEAR, ///< Deactivate RTS - ARM_USART_RTS_SET, ///< Activate RTS - ARM_USART_DTR_CLEAR, ///< Deactivate DTR - ARM_USART_DTR_SET ///< Activate DTR -} ARM_USART_MODEM_CONTROL; - -/** -\brief USART Modem Status -*/ -typedef volatile struct _ARM_USART_MODEM_STATUS { - uint32_t cts : 1; ///< CTS state: 1=Active, 0=Inactive - uint32_t dsr : 1; ///< DSR state: 1=Active, 0=Inactive - uint32_t dcd : 1; ///< DCD state: 1=Active, 0=Inactive - uint32_t ri : 1; ///< RI state: 1=Active, 0=Inactive - uint32_t reserved : 28; -} ARM_USART_MODEM_STATUS; - - -/****** USART Event *****/ -#define ARM_USART_EVENT_SEND_COMPLETE (1UL << 0) ///< Send completed; however USART may still transmit data -#define ARM_USART_EVENT_RECEIVE_COMPLETE (1UL << 1) ///< Receive completed -#define ARM_USART_EVENT_TRANSFER_COMPLETE (1UL << 2) ///< Transfer completed -#define ARM_USART_EVENT_TX_COMPLETE (1UL << 3) ///< Transmit completed (optional) -#define ARM_USART_EVENT_TX_UNDERFLOW (1UL << 4) ///< Transmit data not available (Synchronous Slave) -#define ARM_USART_EVENT_RX_OVERFLOW (1UL << 5) ///< Receive data overflow -#define ARM_USART_EVENT_RX_TIMEOUT (1UL << 6) ///< Receive character timeout (optional) -#define ARM_USART_EVENT_RX_BREAK (1UL << 7) ///< Break detected on receive -#define ARM_USART_EVENT_RX_FRAMING_ERROR (1UL << 8) ///< Framing error detected on receive -#define ARM_USART_EVENT_RX_PARITY_ERROR (1UL << 9) ///< Parity error detected on receive -#define ARM_USART_EVENT_CTS (1UL << 10) ///< CTS state changed (optional) -#define ARM_USART_EVENT_DSR (1UL << 11) ///< DSR state changed (optional) -#define ARM_USART_EVENT_DCD (1UL << 12) ///< DCD state changed (optional) -#define ARM_USART_EVENT_RI (1UL << 13) ///< RI state changed (optional) - - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_USART_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn ARM_USART_CAPABILITIES ARM_USART_GetCapabilities (void) - \brief Get driver capabilities - \return \ref ARM_USART_CAPABILITIES - - \fn int32_t ARM_USART_Initialize (ARM_USART_SignalEvent_t cb_event) - \brief Initialize USART Interface. - \param[in] cb_event Pointer to \ref ARM_USART_SignalEvent - \return \ref execution_status - - \fn int32_t ARM_USART_Uninitialize (void) - \brief De-initialize USART Interface. - \return \ref execution_status - - \fn int32_t ARM_USART_PowerControl (ARM_POWER_STATE state) - \brief Control USART Interface Power. - \param[in] state Power state - \return \ref execution_status - - \fn int32_t ARM_USART_Send (const void *data, uint32_t num) - \brief Start sending data to USART transmitter. - \param[in] data Pointer to buffer with data to send to USART transmitter - \param[in] num Number of data items to send - \return \ref execution_status - - \fn int32_t ARM_USART_Receive (void *data, uint32_t num) - \brief Start receiving data from USART receiver. - \param[out] data Pointer to buffer for data to receive from USART receiver - \param[in] num Number of data items to receive - \return \ref execution_status - - \fn int32_t ARM_USART_Transfer (const void *data_out, - void *data_in, - uint32_t num) - \brief Start sending/receiving data to/from USART transmitter/receiver. - \param[in] data_out Pointer to buffer with data to send to USART transmitter - \param[out] data_in Pointer to buffer for data to receive from USART receiver - \param[in] num Number of data items to transfer - \return \ref execution_status - - \fn uint32_t ARM_USART_GetTxCount (void) - \brief Get transmitted data count. - \return number of data items transmitted - - \fn uint32_t ARM_USART_GetRxCount (void) - \brief Get received data count. - \return number of data items received - - \fn int32_t ARM_USART_Control (uint32_t control, uint32_t arg) - \brief Control USART Interface. - \param[in] control Operation - \param[in] arg Argument of operation (optional) - \return common \ref execution_status and driver specific \ref usart_execution_status - - \fn ARM_USART_STATUS ARM_USART_GetStatus (void) - \brief Get USART status. - \return USART status \ref ARM_USART_STATUS - - \fn int32_t ARM_USART_SetModemControl (ARM_USART_MODEM_CONTROL control) - \brief Set USART Modem Control line state. - \param[in] control \ref ARM_USART_MODEM_CONTROL - \return \ref execution_status - - \fn ARM_USART_MODEM_STATUS ARM_USART_GetModemStatus (void) - \brief Get USART Modem Status lines state. - \return modem status \ref ARM_USART_MODEM_STATUS - - \fn void ARM_USART_SignalEvent (uint32_t event) - \brief Signal USART Events. - \param[in] event \ref USART_events notification mask - \return none -*/ - -typedef void (*ARM_USART_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_USART_SignalEvent : Signal USART Event. - - -/** -\brief USART Device Driver Capabilities. -*/ -typedef struct _ARM_USART_CAPABILITIES { - uint32_t asynchronous : 1; ///< supports UART (Asynchronous) mode - uint32_t synchronous_master : 1; ///< supports Synchronous Master mode - uint32_t synchronous_slave : 1; ///< supports Synchronous Slave mode - uint32_t single_wire : 1; ///< supports UART Single-wire mode - uint32_t irda : 1; ///< supports UART IrDA mode - uint32_t smart_card : 1; ///< supports UART Smart Card mode - uint32_t smart_card_clock : 1; ///< Smart Card Clock generator available - uint32_t flow_control_rts : 1; ///< RTS Flow Control available - uint32_t flow_control_cts : 1; ///< CTS Flow Control available - uint32_t event_tx_complete : 1; ///< Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE - uint32_t event_rx_timeout : 1; ///< Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT - uint32_t rts : 1; ///< RTS Line: 0=not available, 1=available - uint32_t cts : 1; ///< CTS Line: 0=not available, 1=available - uint32_t dtr : 1; ///< DTR Line: 0=not available, 1=available - uint32_t dsr : 1; ///< DSR Line: 0=not available, 1=available - uint32_t dcd : 1; ///< DCD Line: 0=not available, 1=available - uint32_t ri : 1; ///< RI Line: 0=not available, 1=available - uint32_t event_cts : 1; ///< Signal CTS change event: \ref ARM_USART_EVENT_CTS - uint32_t event_dsr : 1; ///< Signal DSR change event: \ref ARM_USART_EVENT_DSR - uint32_t event_dcd : 1; ///< Signal DCD change event: \ref ARM_USART_EVENT_DCD - uint32_t event_ri : 1; ///< Signal RI change event: \ref ARM_USART_EVENT_RI - uint32_t reserved : 11; ///< Reserved (must be zero) -} ARM_USART_CAPABILITIES; - - -/** -\brief Access structure of the USART Driver. -*/ -typedef struct _ARM_DRIVER_USART { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USART_GetVersion : Get driver version. - ARM_USART_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USART_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_USART_SignalEvent_t cb_event); ///< Pointer to \ref ARM_USART_Initialize : Initialize USART Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USART_Uninitialize : De-initialize USART Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USART_PowerControl : Control USART Interface Power. - int32_t (*Send) (const void *data, uint32_t num); ///< Pointer to \ref ARM_USART_Send : Start sending data to USART transmitter. - int32_t (*Receive) ( void *data, uint32_t num); ///< Pointer to \ref ARM_USART_Receive : Start receiving data from USART receiver. - int32_t (*Transfer) (const void *data_out, - void *data_in, - uint32_t num); ///< Pointer to \ref ARM_USART_Transfer : Start sending/receiving data to/from USART. - uint32_t (*GetTxCount) (void); ///< Pointer to \ref ARM_USART_GetTxCount : Get transmitted data count. - uint32_t (*GetRxCount) (void); ///< Pointer to \ref ARM_USART_GetRxCount : Get received data count. - int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_USART_Control : Control USART Interface. - ARM_USART_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_USART_GetStatus : Get USART status. - int32_t (*SetModemControl) (ARM_USART_MODEM_CONTROL control); ///< Pointer to \ref ARM_USART_SetModemControl : Set USART Modem Control line state. - ARM_USART_MODEM_STATUS (*GetModemStatus) (void); ///< Pointer to \ref ARM_USART_GetModemStatus : Get USART Modem Status lines state. -} const ARM_DRIVER_USART; - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_USART_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USB.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USB.h deleted file mode 100644 index fbb3f4d734..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USB.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.0 - * - * Project: USB Driver common definitions - */ - -/* History: - * Version 2.0 - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.01 - * Added PID Types - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_USB_H_ -#define DRIVER_USB_H_ - -#include "Driver_Common.h" - -/* USB Role */ -#define ARM_USB_ROLE_NONE (0) -#define ARM_USB_ROLE_HOST (1) -#define ARM_USB_ROLE_DEVICE (2) - -/* USB Pins */ -#define ARM_USB_PIN_DP (1 << 0) ///< USB D+ pin -#define ARM_USB_PIN_DM (1 << 1) ///< USB D- pin -#define ARM_USB_PIN_VBUS (1 << 2) ///< USB VBUS pin -#define ARM_USB_PIN_OC (1 << 3) ///< USB OverCurrent pin -#define ARM_USB_PIN_ID (1 << 4) ///< USB ID pin - -/* USB Speed */ -#define ARM_USB_SPEED_LOW (0) ///< Low-speed USB -#define ARM_USB_SPEED_FULL (1) ///< Full-speed USB -#define ARM_USB_SPEED_HIGH (2) ///< High-speed USB - -/* USB PID Types */ -#define ARM_USB_PID_OUT (1) -#define ARM_USB_PID_IN (9) -#define ARM_USB_PID_SOF (5) -#define ARM_USB_PID_SETUP (13) -#define ARM_USB_PID_DATA0 (3) -#define ARM_USB_PID_DATA1 (11) -#define ARM_USB_PID_DATA2 (7) -#define ARM_USB_PID_MDATA (15) -#define ARM_USB_PID_ACK (2) -#define ARM_USB_PID_NAK (10) -#define ARM_USB_PID_STALL (14) -#define ARM_USB_PID_NYET (6) -#define ARM_USB_PID_PRE (12) -#define ARM_USB_PID_ERR (12) -#define ARM_USB_PID_SPLIT (8) -#define ARM_USB_PID_PING (4) -#define ARM_USB_PID_RESERVED (0) - -/* USB Endpoint Address (bEndpointAddress) */ -#define ARM_USB_ENDPOINT_NUMBER_MASK (0x0F) -#define ARM_USB_ENDPOINT_DIRECTION_MASK (0x80) - -/* USB Endpoint Type */ -#define ARM_USB_ENDPOINT_CONTROL (0) ///< Control Endpoint -#define ARM_USB_ENDPOINT_ISOCHRONOUS (1) ///< Isochronous Endpoint -#define ARM_USB_ENDPOINT_BULK (2) ///< Bulk Endpoint -#define ARM_USB_ENDPOINT_INTERRUPT (3) ///< Interrupt Endpoint - -/* USB Endpoint Maximum Packet Size (wMaxPacketSize) */ -#define ARM_USB_ENDPOINT_MAX_PACKET_SIZE_MASK (0x07FF) -#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_MASK (0x1800) -#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_1 (0x0000) -#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_2 (0x0800) -#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_3 (0x1000) - -#endif /* DRIVER_USB_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USBD.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USBD.h deleted file mode 100644 index f6b230aad3..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USBD.h +++ /dev/null @@ -1,273 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.2 - * - * Project: USB Device Driver definitions - */ - -/* History: - * Version 2.2 - * ARM_USBD_STATE made volatile - * Version 2.1 - * Added ARM_USBD_ReadSetupPacket function - * Version 2.0 - * Removed ARM_USBD_DeviceConfigure function - * Removed ARM_USBD_SET_ADDRESS_STAGE parameter from ARM_USBD_DeviceSetAddress function - * Removed ARM_USBD_EndpointReadStart function - * Replaced ARM_USBD_EndpointRead and ARM_USBD_EndpointWrite functions with ARM_USBD_EndpointTransfer - * Added ARM_USBD_EndpointTransferGetResult function - * Renamed ARM_USBD_EndpointAbort function to ARM_USBD_EndpointTransferAbort - * Changed prefix ARM_DRV -> ARM_DRIVER - * Changed return values of some functions to int32_t - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_USBD_H_ -#define DRIVER_USBD_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_USB.h" - -#define ARM_USBD_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */ - - -/** -\brief USB Device State -*/ -typedef volatile struct _ARM_USBD_STATE { - uint32_t vbus : 1; ///< USB Device VBUS flag - uint32_t speed : 2; ///< USB Device speed setting (ARM_USB_SPEED_xxx) - uint32_t active : 1; ///< USB Device active flag - uint32_t reserved : 28; -} ARM_USBD_STATE; - - -/****** USB Device Event *****/ -#define ARM_USBD_EVENT_VBUS_ON (1UL << 0) ///< USB Device VBUS On -#define ARM_USBD_EVENT_VBUS_OFF (1UL << 1) ///< USB Device VBUS Off -#define ARM_USBD_EVENT_RESET (1UL << 2) ///< USB Reset occurred -#define ARM_USBD_EVENT_HIGH_SPEED (1UL << 3) ///< USB switch to High Speed occurred -#define ARM_USBD_EVENT_SUSPEND (1UL << 4) ///< USB Suspend occurred -#define ARM_USBD_EVENT_RESUME (1UL << 5) ///< USB Resume occurred - -/****** USB Endpoint Event *****/ -#define ARM_USBD_EVENT_SETUP (1UL << 0) ///< SETUP Packet -#define ARM_USBD_EVENT_OUT (1UL << 1) ///< OUT Packet(s) -#define ARM_USBD_EVENT_IN (1UL << 2) ///< IN Packet(s) - - -#ifndef __DOXYGEN_MW__ // exclude from middleware documentation - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_USBD_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_USBD_CAPABILITIES ARM_USBD_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_USBD_CAPABILITIES -*/ -/** - \fn int32_t ARM_USBD_Initialize (ARM_USBD_SignalDeviceEvent_t cb_device_event, - ARM_USBD_SignalEndpointEvent_t cb_endpoint_event) - \brief Initialize USB Device Interface. - \param[in] cb_device_event Pointer to \ref ARM_USBD_SignalDeviceEvent - \param[in] cb_endpoint_event Pointer to \ref ARM_USBD_SignalEndpointEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_Uninitialize (void) - \brief De-initialize USB Device Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_PowerControl (ARM_POWER_STATE state) - \brief Control USB Device Interface Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_DeviceConnect (void) - \brief Connect USB Device. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_DeviceDisconnect (void) - \brief Disconnect USB Device. - \return \ref execution_status -*/ -/** - \fn ARM_USBD_STATE ARM_USBD_DeviceGetState (void) - \brief Get current USB Device State. - \return Device State \ref ARM_USBD_STATE -*/ -/** - \fn int32_t ARM_USBD_DeviceRemoteWakeup (void) - \brief Trigger USB Remote Wakeup. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_DeviceSetAddress (uint8_t dev_addr) - \brief Set USB Device Address. - \param[in] dev_addr Device Address - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_ReadSetupPacket (uint8_t *setup) - \brief Read setup packet received over Control Endpoint. - \param[out] setup Pointer to buffer for setup packet - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_EndpointConfigure (uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size) - \brief Configure USB Endpoint. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[in] ep_type Endpoint Type (ARM_USB_ENDPOINT_xxx) - \param[in] ep_max_packet_size Endpoint Maximum Packet Size - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_EndpointUnconfigure (uint8_t ep_addr) - \brief Unconfigure USB Endpoint. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_EndpointStall (uint8_t ep_addr, bool stall) - \brief Set/Clear Stall for USB Endpoint. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[in] stall Operation - - \b false Clear - - \b true Set - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBD_EndpointTransfer (uint8_t ep_addr, uint8_t *data, uint32_t num) - \brief Read data from or Write data to USB Endpoint. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[out] data Pointer to buffer for data to read or with data to write - \param[in] num Number of data bytes to transfer - \return \ref execution_status -*/ -/** - \fn uint32_t ARM_USBD_EndpointTransferGetResult (uint8_t ep_addr) - \brief Get result of USB Endpoint transfer. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \return number of successfully transferred data bytes -*/ -/** - \fn int32_t ARM_USBD_EndpointTransferAbort (uint8_t ep_addr) - \brief Abort current USB Endpoint transfer. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \return \ref execution_status -*/ -/** - \fn uint16_t ARM_USBD_GetFrameNumber (void) - \brief Get current USB Frame Number. - \return Frame Number -*/ - -/** - \fn void ARM_USBD_SignalDeviceEvent (uint32_t event) - \brief Signal USB Device Event. - \param[in] event \ref USBD_dev_events - \return none -*/ -/** - \fn void ARM_USBD_SignalEndpointEvent (uint8_t ep_addr, uint32_t event) - \brief Signal USB Endpoint Event. - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[in] event \ref USBD_ep_events - \return none -*/ - -typedef void (*ARM_USBD_SignalDeviceEvent_t) (uint32_t event); ///< Pointer to \ref ARM_USBD_SignalDeviceEvent : Signal USB Device Event. -typedef void (*ARM_USBD_SignalEndpointEvent_t) (uint8_t ep_addr, uint32_t event); ///< Pointer to \ref ARM_USBD_SignalEndpointEvent : Signal USB Endpoint Event. - - -/** -\brief USB Device Driver Capabilities. -*/ -typedef struct _ARM_USBD_CAPABILITIES { - uint32_t vbus_detection : 1; ///< VBUS detection - uint32_t event_vbus_on : 1; ///< Signal VBUS On event - uint32_t event_vbus_off : 1; ///< Signal VBUS Off event - uint32_t reserved : 29; ///< Reserved (must be zero) -} ARM_USBD_CAPABILITIES; - - -/** -\brief Access structure of the USB Device Driver. -*/ -typedef struct _ARM_DRIVER_USBD { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USBD_GetVersion : Get driver version. - ARM_USBD_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USBD_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_USBD_SignalDeviceEvent_t cb_device_event, - ARM_USBD_SignalEndpointEvent_t cb_endpoint_event); ///< Pointer to \ref ARM_USBD_Initialize : Initialize USB Device Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USBD_Uninitialize : De-initialize USB Device Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USBD_PowerControl : Control USB Device Interface Power. - int32_t (*DeviceConnect) (void); ///< Pointer to \ref ARM_USBD_DeviceConnect : Connect USB Device. - int32_t (*DeviceDisconnect) (void); ///< Pointer to \ref ARM_USBD_DeviceDisconnect : Disconnect USB Device. - ARM_USBD_STATE (*DeviceGetState) (void); ///< Pointer to \ref ARM_USBD_DeviceGetState : Get current USB Device State. - int32_t (*DeviceRemoteWakeup) (void); ///< Pointer to \ref ARM_USBD_DeviceRemoteWakeup : Trigger USB Remote Wakeup. - int32_t (*DeviceSetAddress) (uint8_t dev_addr); ///< Pointer to \ref ARM_USBD_DeviceSetAddress : Set USB Device Address. - int32_t (*ReadSetupPacket) (uint8_t *setup); ///< Pointer to \ref ARM_USBD_ReadSetupPacket : Read setup packet received over Control Endpoint. - int32_t (*EndpointConfigure) (uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size); ///< Pointer to \ref ARM_USBD_EndpointConfigure : Configure USB Endpoint. - int32_t (*EndpointUnconfigure) (uint8_t ep_addr); ///< Pointer to \ref ARM_USBD_EndpointUnconfigure : Unconfigure USB Endpoint. - int32_t (*EndpointStall) (uint8_t ep_addr, bool stall); ///< Pointer to \ref ARM_USBD_EndpointStall : Set/Clear Stall for USB Endpoint. - int32_t (*EndpointTransfer) (uint8_t ep_addr, uint8_t *data, uint32_t num); ///< Pointer to \ref ARM_USBD_EndpointTransfer : Read data from or Write data to USB Endpoint. - uint32_t (*EndpointTransferGetResult) (uint8_t ep_addr); ///< Pointer to \ref ARM_USBD_EndpointTransferGetResult : Get result of USB Endpoint transfer. - int32_t (*EndpointTransferAbort) (uint8_t ep_addr); ///< Pointer to \ref ARM_USBD_EndpointTransferAbort : Abort current USB Endpoint transfer. - uint16_t (*GetFrameNumber) (void); ///< Pointer to \ref ARM_USBD_GetFrameNumber : Get current USB Frame Number. -} const ARM_DRIVER_USBD; - -#endif /* __DOXYGEN_MW__ */ - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_USBD_H_ */ diff --git a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USBH.h b/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USBH.h deleted file mode 100644 index a30eacafe1..0000000000 --- a/bsp/lpc54114-lite/Libraries/CMSIS/Driver/Include/Driver_USBH.h +++ /dev/null @@ -1,417 +0,0 @@ -/* - * Copyright (c) 2013-2017 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Feb 2017 - * $Revision: V2.2 - * - * Project: USB Host Driver definitions -*/ - -/* History: - * Version 2.2 - * ARM_USBH_PORT_STATE made volatile - * Version 2.1 - * Renamed structure ARM_USBH_EP_HANDLE to ARM_USBH_PIPE_HANDLE - * Renamed functions ARM_USBH_Endpoint... to ARM_USBH_Pipe... - * Renamed function ARM_USBH_SignalEndpointEvent to ARM_USBH_SignalPipeEvent - * Version 2.0 - * Replaced function ARM_USBH_PortPowerOnOff with ARM_USBH_PortVbusOnOff - * Changed function ARM_USBH_EndpointCreate parameters - * Replaced function ARM_USBH_EndpointConfigure with ARM_USBH_EndpointModify - * Replaced function ARM_USBH_EndpointClearHalt with ARM_USBH_EndpointReset - * Replaced function ARM_USBH_URB_Submit with ARM_USBH_EndpointTransfer - * Replaced function ARM_USBH_URB_Abort with ARM_USBH_EndpointTransferAbort - * Added function ARM_USBH_EndpointTransferGetResult - * Added function ARM_USBH_GetFrameNumber - * Changed prefix ARM_DRV -> ARM_DRIVER - * Version 1.20 - * Added API for OHCI/EHCI Host Controller Interface (HCI) - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef DRIVER_USBH_H_ -#define DRIVER_USBH_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "Driver_USB.h" - -#define ARM_USBH_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */ - - -/** -\brief USB Host Port State -*/ -typedef volatile struct _ARM_USBH_PORT_STATE { - uint32_t connected : 1; ///< USB Host Port connected flag - uint32_t overcurrent : 1; ///< USB Host Port overcurrent flag - uint32_t speed : 2; ///< USB Host Port speed setting (ARM_USB_SPEED_xxx) - uint32_t reserved : 28; -} ARM_USBH_PORT_STATE; - -/** -\brief USB Host Pipe Handle -*/ -typedef uint32_t ARM_USBH_PIPE_HANDLE; -#define ARM_USBH_EP_HANDLE ARM_USBH_PIPE_HANDLE /* Legacy name */ - - -/****** USB Host Packet Information *****/ -#define ARM_USBH_PACKET_TOKEN_Pos 0 -#define ARM_USBH_PACKET_TOKEN_Msk (0x0FUL << ARM_USBH_PACKET_TOKEN_Pos) -#define ARM_USBH_PACKET_SETUP (0x01UL << ARM_USBH_PACKET_TOKEN_Pos) ///< SETUP Packet -#define ARM_USBH_PACKET_OUT (0x02UL << ARM_USBH_PACKET_TOKEN_Pos) ///< OUT Packet -#define ARM_USBH_PACKET_IN (0x03UL << ARM_USBH_PACKET_TOKEN_Pos) ///< IN Packet -#define ARM_USBH_PACKET_PING (0x04UL << ARM_USBH_PACKET_TOKEN_Pos) ///< PING Packet - -#define ARM_USBH_PACKET_DATA_Pos 4 -#define ARM_USBH_PACKET_DATA_Msk (0x0FUL << ARM_USBH_PACKET_DATA_Pos) -#define ARM_USBH_PACKET_DATA0 (0x01UL << ARM_USBH_PACKET_DATA_Pos) ///< DATA0 PID -#define ARM_USBH_PACKET_DATA1 (0x02UL << ARM_USBH_PACKET_DATA_Pos) ///< DATA1 PID - -#define ARM_USBH_PACKET_SPLIT_Pos 8 -#define ARM_USBH_PACKET_SPLIT_Msk (0x0FUL << ARM_USBH_PACKET_SPLIT_Pos) -#define ARM_USBH_PACKET_SSPLIT (0x08UL << ARM_USBH_PACKET_SPLIT_Pos) ///< SSPLIT Packet -#define ARM_USBH_PACKET_SSPLIT_S (0x09UL << ARM_USBH_PACKET_SPLIT_Pos) ///< SSPLIT Packet: Data Start -#define ARM_USBH_PACKET_SSPLIT_E (0x0AUL << ARM_USBH_PACKET_SPLIT_Pos) ///< SSPLIT Packet: Data End -#define ARM_USBH_PACKET_SSPLIT_S_E (0x0BUL << ARM_USBH_PACKET_SPLIT_Pos) ///< SSPLIT Packet: Data All -#define ARM_USBH_PACKET_CSPLIT (0x0CUL << ARM_USBH_PACKET_SPLIT_Pos) ///< CSPLIT Packet - -#define ARM_USBH_PACKET_PRE (1UL << 12) ///< PRE Token - - -/****** USB Host Port Event *****/ -#define ARM_USBH_EVENT_CONNECT (1UL << 0) ///< USB Device Connected to Port -#define ARM_USBH_EVENT_DISCONNECT (1UL << 1) ///< USB Device Disconnected from Port -#define ARM_USBH_EVENT_OVERCURRENT (1UL << 2) ///< USB Device caused Overcurrent -#define ARM_USBH_EVENT_RESET (1UL << 3) ///< USB Reset completed -#define ARM_USBH_EVENT_SUSPEND (1UL << 4) ///< USB Suspend occurred -#define ARM_USBH_EVENT_RESUME (1UL << 5) ///< USB Resume occurred -#define ARM_USBH_EVENT_REMOTE_WAKEUP (1UL << 6) ///< USB Device activated Remote Wakeup - -/****** USB Host Pipe Event *****/ -#define ARM_USBH_EVENT_TRANSFER_COMPLETE (1UL << 0) ///< Transfer completed -#define ARM_USBH_EVENT_HANDSHAKE_NAK (1UL << 1) ///< NAK Handshake received -#define ARM_USBH_EVENT_HANDSHAKE_NYET (1UL << 2) ///< NYET Handshake received -#define ARM_USBH_EVENT_HANDSHAKE_MDATA (1UL << 3) ///< MDATA Handshake received -#define ARM_USBH_EVENT_HANDSHAKE_STALL (1UL << 4) ///< STALL Handshake received -#define ARM_USBH_EVENT_HANDSHAKE_ERR (1UL << 5) ///< ERR Handshake received -#define ARM_USBH_EVENT_BUS_ERROR (1UL << 6) ///< Bus Error detected - - -#ifndef __DOXYGEN_MW__ // exclude from middleware documentation - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_USBH_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_USBH_CAPABILITIES ARM_USBH_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_USBH_CAPABILITIES -*/ -/** - \fn int32_t ARM_USBH_Initialize (ARM_USBH_SignalPortEvent_t cb_port_event, - ARM_USBH_SignalPipeEvent_t cb_pipe_event) - \brief Initialize USB Host Interface. - \param[in] cb_port_event Pointer to \ref ARM_USBH_SignalPortEvent - \param[in] cb_pipe_event Pointer to \ref ARM_USBH_SignalPipeEvent - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_Uninitialize (void) - \brief De-initialize USB Host Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PowerControl (ARM_POWER_STATE state) - \brief Control USB Host Interface Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PortVbusOnOff (uint8_t port, bool vbus) - \brief Root HUB Port VBUS on/off. - \param[in] port Root HUB Port Number - \param[in] vbus - - \b false VBUS off - - \b true VBUS on - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PortReset (uint8_t port) - \brief Do Root HUB Port Reset. - \param[in] port Root HUB Port Number - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PortSuspend (uint8_t port) - \brief Suspend Root HUB Port (stop generating SOFs). - \param[in] port Root HUB Port Number - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PortResume (uint8_t port) - \brief Resume Root HUB Port (start generating SOFs). - \param[in] port Root HUB Port Number - \return \ref execution_status -*/ -/** - \fn ARM_USBH_PORT_STATE ARM_USBH_PortGetState (uint8_t port) - \brief Get current Root HUB Port State. - \param[in] port Root HUB Port Number - \return Port State \ref ARM_USBH_PORT_STATE -*/ -/** - \fn ARM_USBH_PIPE_HANDLE ARM_USBH_PipeCreate (uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size, - uint8_t ep_interval) - \brief Create Pipe in System. - \param[in] dev_addr Device Address - \param[in] dev_speed Device Speed - \param[in] hub_addr Hub Address - \param[in] hub_port Hub Port - \param[in] ep_addr Endpoint Address - - ep_addr.0..3: Address - - ep_addr.7: Direction - \param[in] ep_type Endpoint Type (ARM_USB_ENDPOINT_xxx) - \param[in] ep_max_packet_size Endpoint Maximum Packet Size - \param[in] ep_interval Endpoint Polling Interval - \return Pipe Handle \ref ARM_USBH_PIPE_HANDLE -*/ -/** - \fn int32_t ARM_USBH_PipeModify (ARM_USBH_PIPE_HANDLE pipe_hndl, - uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint16_t ep_max_packet_size) - \brief Modify Pipe in System. - \param[in] pipe_hndl Pipe Handle - \param[in] dev_addr Device Address - \param[in] dev_speed Device Speed - \param[in] hub_addr Hub Address - \param[in] hub_port Hub Port - \param[in] ep_max_packet_size Endpoint Maximum Packet Size - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PipeDelete (ARM_USBH_PIPE_HANDLE pipe_hndl) - \brief Delete Pipe from System. - \param[in] pipe_hndl Pipe Handle - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PipeReset (ARM_USBH_PIPE_HANDLE pipe_hndl) - \brief Reset Pipe. - \param[in] pipe_hndl Pipe Handle - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_PipeTransfer (ARM_USBH_PIPE_HANDLE pipe_hndl, - uint32_t packet, - uint8_t *data, - uint32_t num) - \brief Transfer packets through USB Pipe. - \param[in] pipe_hndl Pipe Handle - \param[in] packet Packet information - \param[in] data Pointer to buffer with data to send or for data to receive - \param[in] num Number of data bytes to transfer - \return \ref execution_status -*/ -/** - \fn uint32_t ARM_USBH_PipeTransferGetResult (ARM_USBH_PIPE_HANDLE pipe_hndl) - \brief Get result of USB Pipe transfer. - \param[in] pipe_hndl Pipe Handle - \return number of successfully transferred data bytes -*/ -/** - \fn int32_t ARM_USBH_PipeTransferAbort (ARM_USBH_PIPE_HANDLE pipe_hndl) - \brief Abort current USB Pipe transfer. - \param[in] pipe_hndl Pipe Handle - \return \ref execution_status -*/ -/** - \fn uint16_t ARM_USBH_GetFrameNumber (void) - \brief Get current USB Frame Number. - \return Frame Number -*/ - -/** - \fn void ARM_USBH_SignalPortEvent (uint8_t port, uint32_t event) - \brief Signal Root HUB Port Event. - \param[in] port Root HUB Port Number - \param[in] event \ref USBH_port_events - \return none -*/ -/** - \fn void ARM_USBH_SignalPipeEvent (ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t event) - \brief Signal Pipe Event. - \param[in] pipe_hndl Pipe Handle - \param[in] event \ref USBH_pipe_events - \return none -*/ - -typedef void (*ARM_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event); ///< Pointer to \ref ARM_USBH_SignalPortEvent : Signal Root HUB Port Event. -typedef void (*ARM_USBH_SignalPipeEvent_t) (ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t event); ///< Pointer to \ref ARM_USBH_SignalPipeEvent : Signal Pipe Event. -#define ARM_USBH_SignalEndpointEvent_t ARM_USBH_SignalPipeEvent_t /* Legacy name */ - - -/** -\brief USB Host Driver Capabilities. -*/ -typedef struct _ARM_USBH_CAPABILITIES { - uint32_t port_mask : 15; ///< Root HUB available Ports Mask - uint32_t auto_split : 1; ///< Automatic SPLIT packet handling - uint32_t event_connect : 1; ///< Signal Connect event - uint32_t event_disconnect : 1; ///< Signal Disconnect event - uint32_t event_overcurrent : 1; ///< Signal Overcurrent event - uint32_t reserved : 13; ///< Reserved (must be zero) -} ARM_USBH_CAPABILITIES; - - -/** -\brief Access structure of USB Host Driver. -*/ -typedef struct _ARM_DRIVER_USBH { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USBH_GetVersion : Get driver version. - ARM_USBH_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USBH_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_USBH_SignalPortEvent_t cb_port_event, - ARM_USBH_SignalPipeEvent_t cb_pipe_event); ///< Pointer to \ref ARM_USBH_Initialize : Initialize USB Host Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USBH_Uninitialize : De-initialize USB Host Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USBH_PowerControl : Control USB Host Interface Power. - int32_t (*PortVbusOnOff) (uint8_t port, bool vbus); ///< Pointer to \ref ARM_USBH_PortVbusOnOff : Root HUB Port VBUS on/off. - int32_t (*PortReset) (uint8_t port); ///< Pointer to \ref ARM_USBH_PortReset : Do Root HUB Port Reset. - int32_t (*PortSuspend) (uint8_t port); ///< Pointer to \ref ARM_USBH_PortSuspend : Suspend Root HUB Port (stop generating SOFs). - int32_t (*PortResume) (uint8_t port); ///< Pointer to \ref ARM_USBH_PortResume : Resume Root HUB Port (start generating SOFs). - ARM_USBH_PORT_STATE (*PortGetState) (uint8_t port); ///< Pointer to \ref ARM_USBH_PortGetState : Get current Root HUB Port State. - ARM_USBH_PIPE_HANDLE (*PipeCreate) (uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint8_t ep_addr, - uint8_t ep_type, - uint16_t ep_max_packet_size, - uint8_t ep_interval); ///< Pointer to \ref ARM_USBH_PipeCreate : Create Pipe in System. - int32_t (*PipeModify) (ARM_USBH_PIPE_HANDLE pipe_hndl, - uint8_t dev_addr, - uint8_t dev_speed, - uint8_t hub_addr, - uint8_t hub_port, - uint16_t ep_max_packet_size); ///< Pointer to \ref ARM_USBH_PipeModify : Modify Pipe in System. - int32_t (*PipeDelete) (ARM_USBH_PIPE_HANDLE pipe_hndl); ///< Pointer to \ref ARM_USBH_PipeDelete : Delete Pipe from System. - int32_t (*PipeReset) (ARM_USBH_PIPE_HANDLE pipe_hndl); ///< Pointer to \ref ARM_USBH_PipeReset : Reset Pipe. - int32_t (*PipeTransfer) (ARM_USBH_PIPE_HANDLE pipe_hndl, - uint32_t packet, - uint8_t *data, - uint32_t num); ///< Pointer to \ref ARM_USBH_PipeTransfer : Transfer packets through USB Pipe. - uint32_t (*PipeTransferGetResult) (ARM_USBH_PIPE_HANDLE pipe_hndl); ///< Pointer to \ref ARM_USBH_PipeTransferGetResult : Get result of USB Pipe transfer. - int32_t (*PipeTransferAbort) (ARM_USBH_PIPE_HANDLE pipe_hndl); ///< Pointer to \ref ARM_USBH_PipeTransferAbort : Abort current USB Pipe transfer. - uint16_t (*GetFrameNumber) (void); ///< Pointer to \ref ARM_USBH_GetFrameNumber : Get current USB Frame Number. -} const ARM_DRIVER_USBH; - - -// HCI (OHCI/EHCI) - -// Function documentation -/** - \fn ARM_DRIVER_VERSION ARM_USBH_HCI_GetVersion (void) - \brief Get USB Host HCI (OHCI/EHCI) driver version. - \return \ref ARM_DRIVER_VERSION -*/ -/** - \fn ARM_USBH_HCI_CAPABILITIES ARM_USBH_HCI_GetCapabilities (void) - \brief Get driver capabilities. - \return \ref ARM_USBH_HCI_CAPABILITIES -*/ -/** - \fn int32_t ARM_USBH_HCI_Initialize (ARM_USBH_HCI_Interrupt_t *cb_interrupt) - \brief Initialize USB Host HCI (OHCI/EHCI) Interface. - \param[in] cb_interrupt Pointer to Interrupt Handler Routine - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_HCI_Uninitialize (void) - \brief De-initialize USB Host HCI (OHCI/EHCI) Interface. - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_HCI_PowerControl (ARM_POWER_STATE state) - \brief Control USB Host HCI (OHCI/EHCI) Interface Power. - \param[in] state Power state - \return \ref execution_status -*/ -/** - \fn int32_t ARM_USBH_HCI_PortVbusOnOff (uint8_t port, bool vbus) - \brief USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off. - \param[in] port Root HUB Port Number - \param[in] vbus - - \b false VBUS off - - \b true VBUS on - \return \ref execution_status -*/ - -/** - \fn void ARM_USBH_HCI_Interrupt (void) - \brief USB Host HCI Interrupt Handler. - \return none -*/ - -typedef void (*ARM_USBH_HCI_Interrupt_t) (void); ///< Pointer to Interrupt Handler Routine. - - -/** -\brief USB Host HCI (OHCI/EHCI) Driver Capabilities. -*/ -typedef struct _ARM_USBH_HCI_CAPABILITIES { - uint32_t port_mask : 15; ///< Root HUB available Ports Mask - uint32_t reserved : 17; ///< Reserved (must be zero) -} ARM_USBH_HCI_CAPABILITIES; - - -/** - \brief Access structure of USB Host HCI (OHCI/EHCI) Driver. -*/ -typedef struct _ARM_DRIVER_USBH_HCI { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_USBH_HCI_GetVersion : Get USB Host HCI (OHCI/EHCI) driver version. - ARM_USBH_HCI_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_USBH_HCI_GetCapabilities : Get driver capabilities. - int32_t (*Initialize) (ARM_USBH_HCI_Interrupt_t cb_interrupt); ///< Pointer to \ref ARM_USBH_HCI_Initialize : Initialize USB Host HCI (OHCI/EHCI) Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_USBH_HCI_Uninitialize : De-initialize USB Host HCI (OHCI/EHCI) Interface. - int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_USBH_HCI_PowerControl : Control USB Host HCI (OHCI/EHCI) Interface Power. - int32_t (*PortVbusOnOff) (uint8_t port, bool vbus); ///< Pointer to \ref ARM_USBH_HCI_PortVbusOnOff : USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off. -} const ARM_DRIVER_USBH_HCI; - -#endif /* __DOXYGEN_MW__ */ - -#ifdef __cplusplus -} -#endif - -#endif /* DRIVER_USBH_H_ */