[bsp][ch32v307v]添加了硬件iic驱动
This commit is contained in:
白熊
Meco Man
parent
f61b69fcb0
commit
f3d7c8567a
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@ -18,6 +18,9 @@ if GetDepend('SOC_RISCV_FAMILY_CH32'):
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if GetDepend('BSP_USING_DAC'):
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src += ['drv_dac.c']
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if GetDepend('BSP_USING_I2C'):
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src += ['drv_i2c.c']
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if GetDepend('BSP_USING_SOFT_I2C'):
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src += ['drv_soft_i2c.c']
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@ -0,0 +1,252 @@
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-4-1 IceBear003 the first version
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*/
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#include "board.h"
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#include "drv_i2c.h"
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#ifdef BSP_USING_HWI2C
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#define LOG_TAG "drv.hwi2c"
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#include "drv_log.h"
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#if !defined(BSP_USING_I2C1) && !defined(BSP_USING_I2C2)
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#error "Please define at least one BSP_USING_I2Cx"
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/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
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#endif
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#define TIMEOUT 0xFF
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#ifdef BSP_USING_I2C1
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struct i2c_bus_device i2c_bus1;
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#endif
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#ifdef BSP_USING_I2C2
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struct i2c_bus_device i2c_bus2;
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#endif
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static int i2c_read(I2C_TypeDef *i2c_periph,
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rt_uint16_t addr,
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rt_uint8_t flags,
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rt_uint16_t len,
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rt_uint8_t *buf)
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{
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rt_uint16_t try = 0;
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while (I2C_GetFlagStatus(i2c_periph, I2C_FLAG_BUSY))
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if (try++ >= TIMEOUT) return -1;
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I2C_GenerateSTART(i2c_periph, ENABLE);
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try = 0;
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while (!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_MODE_SELECT)) //EVT5
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if (try++ >= TIMEOUT) return -1;
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if(flags & RT_I2C_ADDR_10BIT) //10-bit address mode
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{
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rt_uint8_t frame_head = 0xF0 + (addr >> 8) << 1; //11110XX0
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I2C_SendData(i2c_periph, frame_head); //FrameHead
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try = 0;
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while (!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_MODE_ADDRESS10)) //EVT9
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if (try++ >= TIMEOUT) return -1;
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I2C_SendData(i2c_periph,0xff & addr);
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try = 0;
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while (!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) //EVT6
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if (try++ >= TIMEOUT) return -1;
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I2C_GenerateSTART(i2c_periph, ENABLE); //Sr
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try = 0;
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while (!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_MODE_SELECT)) //EVT5
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if (try++ >= TIMEOUT) return -1;
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I2C_SendData(i2c_periph,frame_head); //Resend FrameHead
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}
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else
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{
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I2C_Send7bitAddress(i2c_periph, addr << 1, I2C_Direction_Receiver);
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}
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try = 0;
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while (!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)) //EVT6
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if (try++ >= TIMEOUT) return -1;
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while(len-- > 0)
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{
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try = 0;
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while (!I2C_GetFlagStatus(i2c_periph, I2C_FLAG_RXNE)) //Got ACK For the Last Byte
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if (try++ >= TIMEOUT) return -1;
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*(buf++)=I2C_ReceiveData(i2c_periph);
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}
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I2C_GenerateSTOP(i2c_periph, ENABLE);
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}
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static int i2c_write(I2C_TypeDef *i2c_periph,
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rt_uint16_t addr,
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rt_uint8_t flags,
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rt_uint8_t *buf,
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rt_uint16_t len)
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{
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rt_uint16_t try = 0;
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while (I2C_GetFlagStatus(i2c_periph, I2C_FLAG_BUSY))
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if (try++ >= TIMEOUT) return -1;
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I2C_GenerateSTART(i2c_periph, ENABLE);
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try = 0;
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while (!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_MODE_SELECT)) //EVT5
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if (try++ >= TIMEOUT) return -1;
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if(flags & RT_I2C_ADDR_10BIT) //10-bit address mode
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{
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I2C_SendData(i2c_periph,0xF0 + (addr >> 8) << 1); //FrameHead 11110XX0
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try = 0;
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while (!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_MODE_ADDRESS10)) //EVT9
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if (try++ >= TIMEOUT) return -1;
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I2C_SendData(i2c_periph,0xff & addr);
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}
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else //7-bit address mode
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{
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I2C_Send7bitAddress(i2c_periph, addr << 1, I2C_Direction_Transmitter);
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}
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try = 0;
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while (!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) //EVT6
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if (try++ >= TIMEOUT) return -1;
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//Missing Evt8_1 (No definition)
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while(len-- > 0)
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{
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try = 0;
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while (!I2C_GetFlagStatus(i2c_periph, I2C_FLAG_TXE)) //Got ACK For the Last Byte
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if (try++ >= TIMEOUT) return -1;
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I2C_SendData(i2c_periph,*(buf++));
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}
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try = 0;
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while(!I2C_CheckEvent(i2c_periph, I2C_EVENT_MASTER_BYTE_TRANSMITTING)) //Last byte sent successfully
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if (try++ >= TIMEOUT) return -1;
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I2C_GenerateSTOP(i2c_periph, ENABLE);
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}
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rt_size_t i2c_master_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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struct rt_i2c_msg *msg;
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struct i2c_bus_device *i2c_bus_dev;
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rt_uint32_t index;
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i2c_bus_dev = (struct i2c_bus_device *)bus;
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for (index = 0; index < num; index++)
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{
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msg = &msgs[index];
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if (msg->flags & RT_I2C_RD)
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{
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i2c_read(i2c_bus_dev->periph,
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msg->addr,
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msg->flags,
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msg->len,
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msg->buf);
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}
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else
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{
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i2c_write(i2c_bus_dev->periph,
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msg->addr,
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msg->flags,
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msg->buf,
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msg->len);
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}
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}
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return index;
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}
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static const struct rt_i2c_bus_device_ops ch32_i2c_ops =
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{
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.master_xfer = i2c_master_xfer,
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.slave_xfer = RT_NULL, //Not Used in i2c_core?
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.i2c_bus_control = RT_NULL
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};
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int rt_hw_i2c_init(struct i2c_config *config = &{5000, I2C_DutyCycle_2, 0, I2C_Ack_Disable, I2C_AcknowledgedAddress_7bit})
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{
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int result = RT_EOK;
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
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I2C_InitTypeDef I2C_InitTSturcture = {0};
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I2C_StructInit(&I2C_InitTSturcture);
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I2C_InitTSturcture.I2C_ClockSpeed = config->clock_speed;
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I2C_InitTSturcture.I2C_DutyCycle = config->duty_cycle;
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I2C_InitTSturcture.I2C_OwnAddress1 = config->own_address;
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I2C_InitTSturcture.I2C_Ack = config->enable_ack ? I2C_Ack_Enable : I2C_Ack_Disable;
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I2C_InitTSturcture.I2C_AcknowledgedAddress = config->is_7_bit_address ? I2C_AcknowledgedAddress_7bit : I2C_AcknowledgedAddress_10bit;
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#ifdef BSP_USING_I2C1
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i2c_bus1.periph = I2C1;
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//Clock & IO Initialization
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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GPIO_PinRemapConfig(GPIO_Remap_I2C1, ENABLE);
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//I2C Initialization Config
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I2C_Init(I2C1, &I2C_InitTSturcture);
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I2C_Cmd(I2C1, ENABLE);
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//Hook to RT-Thread
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i2c_bus1.parent.ops = &ch32_i2c_ops;
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result += rt_i2c_bus_device_register(&i2c_bus1.parent, "i2c1");
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#endif
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#ifdef BSP_USING_I2C2
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i2c_bus2.periph = I2C2;
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//Clock & IO Initialization
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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//I2C Initialization Config
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I2C_Init(I2C2, &I2C_InitTSturcture);
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I2C_Cmd(I2C2, ENABLE);
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//Hook to RT-Thread
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i2c_bus2.parent.ops = &ch32_i2c_ops;
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result += rt_i2c_bus_device_register(&i2c_bus2.parent, "i2c2");
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#endif
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return result;
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}
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#endif //BSP_USING_HWI2C
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@ -0,0 +1,36 @@
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-4-1 IceBear003 the first version
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*/
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#ifndef __DRV_I2C_H_
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#define __DRV_I2C_H_
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#include <rtthread.h>
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#include <rtdevice.h>
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struct i2c_bus_device
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{
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struct rt_i2c_bus_device parent;
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I2C_TypeDef *periph;
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};
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struct i2c_config
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{
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rt_uint32_t clock_speed;
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uint16_t duty_cycle;
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uint16_t own_address;
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uint8_t enable_ack;
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uint8_t is_7_bit_address;
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};
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struct i2c_config i2c_default_conf={5000, I2C_Mode_I2C, I2C_DutyCycle_2, 0, I2C_Ack_Disable, I2C_AcknowledgedAddress_7bit};
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int rt_hw_i2c_init(struct i2c_config *config);
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#endif
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@ -121,6 +121,21 @@ menu "On-chip Peripheral Drivers"
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default n
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endif
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menuconfig BSP_USING_I2C
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bool "Enable I2C"
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select RT_USING_I2C
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if BSP_USING_I2C
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config BSP_USING_I2C1
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bool "Enable I2C1"
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default n
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config BSP_USING_I2C2
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bool "Enable I2C2"
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default n
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endif
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menuconfig BSP_USING_SOFT_I2C
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bool "Enable I2C Bus"
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select RT_USING_I2C
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