[bsp/es32f0334] add spi/i2c/pwm drivers
This commit is contained in:
wangyq2018
parent
79fd4d3345
commit
f1ba61e413
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@ -324,9 +324,30 @@ CONFIG_BSP_USING_GPIO=y
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# CONFIG_BSP_USING_UART0 is not set
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CONFIG_BSP_USING_UART1=y
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#
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# SPI Drivers
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#
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# CONFIG_BSP_USING_SPI0 is not set
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# CONFIG_BSP_USING_SPI1 is not set
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#
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# I2C Drivers
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#
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# CONFIG_BSP_USING_I2C0 is not set
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# CONFIG_BSP_USING_I2C1 is not set
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#
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# PWM Drivers
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#
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# CONFIG_BSP_USING_PWM0 is not set
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# CONFIG_BSP_USING_PWM1 is not set
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# CONFIG_BSP_USING_PWM2 is not set
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# CONFIG_BSP_USING_PWM3 is not set
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#
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# Onboard Peripheral Drivers
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#
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# CONFIG_BSP_USING_SPI_FLASH is not set
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#
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# Offboard Peripheral Drivers
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@ -20,7 +20,7 @@ ES-PDS-ES32F0334-V1.1
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该开发板常用 **板载资源** 如下：
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- MCU：ES32F0334LT，主频 48MHz，32KB SRAM，256KB FLASH，54 GPIOs
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- 外部 FLASH：MX25L64（SPI，16MB）、EEPROM（24c04）
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- 外部模块：SPI FLASH (MX25L64，8MB)、I2C EEPROM (M24C04，512B)
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- 常用外设
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- LED：2个，(PA12/PC12)
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- 液晶屏：1个
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@ -35,13 +35,13 @@ ES-PDS-ES32F0334-V1.1
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| **板载外设** | **支持情况** | **备注** |
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| :---------------- | :----------: | :------------------------------------|
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| SPI FLASH | 支持 | SPI0 |
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| **片上外设** | **支持情况** | **备注** |
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| :---------------- | :----------: | :------------------------------------|
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| GPIO | 支持 | 54 GPIOs |
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| UART | 支持 | UART0/1 |
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| **扩展模块** | **支持情况** | **备注** |
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| SPI | 支持 | SPI0/1 |
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| I2C | 支持 | I2C0/1 |
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| PWM | 支持 | PWM0/1/2/3 |
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更多详细信息请咨询[上海东软载波微电子技术支持](http://www.essemi.com/)
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@ -19,10 +19,64 @@ menu "Hardware Drivers Config"
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endmenu
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menu "SPI Drivers"
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config BSP_USING_SPI0
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bool "Enable SPI0 BUS PB03/PB04/PB05(CLK/MISO/MOSI)"
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select RT_USING_SPI
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select RT_USING_PIN
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default n
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config BSP_USING_SPI1
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bool "Enable SPI1 BUS PB13/PB14/PB15(CLK/MISO/MOSI)"
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select RT_USING_SPI
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select RT_USING_PIN
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default n
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endmenu
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menu "I2C Drivers"
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config BSP_USING_I2C0
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bool "Enable I2C0 BUS PB08/PB09(SCL/SDA)"
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select RT_USING_I2C
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default n
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config BSP_USING_I2C1
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bool "Enable I2C1 BUS PB10/PB11(SCL/SDA)"
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select RT_USING_I2C
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default n
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endmenu
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menu "PWM Drivers"
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config BSP_USING_PWM0
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bool "Using PWM0 PA08/PA09/PA10/PA11"
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select RT_USING_PWM
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default n
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config BSP_USING_PWM1
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bool "Using PWM1 PB06/PB07/PB08"
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select RT_USING_PWM
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default n
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config BSP_USING_PWM2
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bool "Using PWM2 PA00/PA01"
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select RT_USING_PWM
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default n
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config BSP_USING_PWM3
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bool "Using PWM3 PC06/PC07"
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select RT_USING_PWM
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default n
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endmenu
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endmenu
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menu "Onboard Peripheral Drivers"
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config BSP_USING_SPI_FLASH
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bool "Enable SPI FLASH (W25Q64 spi0)"
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select BSP_USING_SPI
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select BSP_USING_SPI0
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select RT_USING_SFUD
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select RT_SFUD_USING_SFDP
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default n
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endmenu
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menu "Offboard Peripheral Drivers"
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@ -15,6 +15,22 @@ if GetDepend('RT_USING_PIN'):
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if GetDepend('BSP_USING_UART0') or GetDepend('BSP_USING_UART1'):
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src += ['drv_uart.c']
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# add spi driver code
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if GetDepend('BSP_USING_SPI0') or GetDepend('BSP_USING_SPI1'):
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src += ['drv_spi.c']
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# add i2c driver code
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if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'):
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src += ['drv_i2c.c']
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# add spi flash driver code
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if GetDepend('BSP_USING_SPI_FLASH'):
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src += ['drv_spiflash.c']
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# add pwm driver code
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if GetDepend('BSP_USING_PWM0') or GetDepend('BSP_USING_PWM1') or GetDepend('BSP_USING_PWM2') or GetDepend('BSP_USING_PWM3'):
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src += ['drv_pwm.c']
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CPPPATH = [cwd]
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group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
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@ -45,7 +45,7 @@ void SystemClock_Config(void)
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/* hosc 12MHz, from hosc/3 pll to 48MHz */
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cmu_pll1_config(CMU_PLL1_INPUT_HOSC_3, CMU_PLL1_OUTPUT_48M);
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/* MCLK 48MHz*/
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/* MCLK 48MHz */
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cmu_clock_config(CMU_CLOCK_PLL1, 48000000);
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}
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@ -58,14 +58,8 @@ void SystemClock_Config(void)
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*******************************************************************************/
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void SysTick_Configuration(void)
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{
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rt_uint32_t _mclk;
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rt_uint32_t _sys_div = READ_BITS(CMU->CFGR, CMU_CFGR_SYSDIV_MSK, CMU_CFGR_SYSDIV_POSS);
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/* get hrc clock*/
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_mclk = cmu_get_clock();
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/* SYSCLK = MCLK/SYSDIV */
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SysTick_Config(_mclk / (RT_TICK_PER_SECOND << _sys_div));
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/* ticks = sysclk / RT_TICK_PER_SECOND */
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SysTick_Config(cmu_get_sys_clock() / RT_TICK_PER_SECOND);
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}
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/**
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@ -108,3 +102,22 @@ void rt_hw_board_init(void)
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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}
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/**
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* This function will delay for some us.
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*
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* @param us the delay time of us
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*/
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void rt_hw_us_delay(rt_uint32_t us)
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{
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unsigned int start, now, delta, reload, us_tick;
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start = SysTick->VAL;
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reload = SysTick->LOAD;
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us_tick = cmu_get_sys_clock() / 1000000UL;
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do
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{
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now = SysTick->VAL;
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delta = start > now ? start - now : reload + start - now;
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}
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while (delta < us_tick * us);
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}
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@ -257,7 +257,7 @@ rt_err_t es32f0_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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{
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return RT_ENOSYS;
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}
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/**pin no. convert to dec no.**/
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/* pin no. convert to dec no. */
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for (irqindex = 0; irqindex < 16; irqindex++)
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{
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if ((0x01 << irqindex) == index->pin)
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@ -327,7 +327,7 @@ rt_err_t es32f0_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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const struct pin_irq_map *irqmap;
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rt_base_t level;
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rt_int32_t irqindex = -1;
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/*Configure GPIO_InitStructure & EXTI_InitStructure*/
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/* Configure GPIO_InitStructure & EXTI_InitStructure */
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gpio_init_t gpio_initstruct;
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exti_init_t exti_initstruct;
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exti_initstruct.filter = DISABLE;
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@ -341,7 +341,7 @@ rt_err_t es32f0_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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}
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if (enabled == PIN_IRQ_ENABLE)
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{
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/**pin no. convert to dec no.**/
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/* pin no. convert to dec no. */
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for (irqindex = 0; irqindex < 16; irqindex++)
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{
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if ((0x01 << irqindex) == index->pin)
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@ -421,7 +421,7 @@ INIT_BOARD_EXPORT(rt_hw_pin_init);
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rt_inline void pin_irq_hdr(uint16_t GPIO_Pin)
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{
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uint16_t irqno;
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/**pin no. convert to dec no.**/
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/* pin no. convert to dec no. */
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for (irqno = 0; irqno < 16; irqno++)
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{
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if ((0x01 << irqno) == GPIO_Pin)
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@ -0,0 +1,141 @@
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/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-03-19 wangyq the first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_i2c.h"
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#include <ald_i2c.h>
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#include <ald_gpio.h>
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#ifdef RT_USING_I2C
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#define TIMEOUT 0x0FFF
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/* I2C struct definition */
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static i2c_handle_t _h_i2c0, _h_i2c1;
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static void _i2c_init(void)
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{
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gpio_init_t gpio_instruct;
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/* Initialize I2C Pin */
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gpio_instruct.mode = GPIO_MODE_OUTPUT;
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gpio_instruct.odos = GPIO_PUSH_PULL;
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gpio_instruct.pupd = GPIO_PUSH_UP;
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gpio_instruct.odrv = GPIO_OUT_DRIVE_NORMAL;
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gpio_instruct.flt = GPIO_FILTER_DISABLE;
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gpio_instruct.type = GPIO_TYPE_CMOS;
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gpio_instruct.func = GPIO_FUNC_5;
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#ifdef BSP_USING_I2C0
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/* Initialize I2C Function */
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_h_i2c0.perh = I2C0;
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_h_i2c0.init.clk_speed = 100000;
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_h_i2c0.init.duty = I2C_DUTYCYCLE_2;
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_h_i2c0.init.own_addr1 = 0x0A;
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_h_i2c0.init.addr_mode = I2C_ADDR_7BIT;
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_h_i2c0.init.general_call = I2C_GENERALCALL_DISABLE;
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_h_i2c0.init.no_stretch = I2C_NOSTRETCH_ENABLE;
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i2c_reset(&_h_i2c0);
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i2c_init(&_h_i2c0);
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/* I2C0_SCL->PB8, I2C0_SDA->PB9 */
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gpio_init(GPIOB, GPIO_PIN_8 | GPIO_PIN_9, &gpio_instruct);
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#endif
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#ifdef BSP_USING_I2C1
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/* Initialize i2c function */
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_h_i2c1.perh = I2C1;
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_h_i2c1.init.clk_speed = 100000;
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_h_i2c1.init.duty = I2C_DUTYCYCLE_2;
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_h_i2c1.init.own_addr1 = 0xA0;
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_h_i2c1.init.addr_mode = I2C_ADDR_7BIT;
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_h_i2c1.init.general_call = I2C_GENERALCALL_DISABLE;
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_h_i2c1.init.no_stretch = I2C_NOSTRETCH_ENABLE;
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i2c_reset(&_h_i2c1);
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i2c_init(&_h_i2c1);
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/* I2C1_SCL->PB10, I2C1_SDA->PB11 */
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gpio_init(GPIOB, GPIO_PIN_10 | GPIO_PIN_11, &gpio_instruct);
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#endif
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}
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static rt_size_t es32f0_master_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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struct rt_i2c_msg *msg;
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rt_uint32_t i;
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rt_err_t ret = RT_ERROR;
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for (i = 0; i < num; i++)
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{
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msg = &msgs[i];
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if (msg->flags & RT_I2C_RD)
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{
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if (i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
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{
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i2c_dbg("i2c bus write failed,i2c bus stop!\n");
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goto out;
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}
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}
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else
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{
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if (i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
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{
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i2c_dbg("i2c bus write failed,i2c bus stop!\n");
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goto out;
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}
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}
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}
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ret = i;
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out:
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i2c_dbg("send stop condition\n");
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return ret;
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}
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const struct rt_i2c_bus_device_ops es32f0_i2c_ops =
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{
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es32f0_master_xfer,
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RT_NULL,
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RT_NULL,
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};
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int rt_hw_i2c_init(void)
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{
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_i2c_init();
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#ifdef BSP_USING_I2C0
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/* define i2c Instance */
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static struct rt_i2c_bus_device _i2c_device0;
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rt_memset((void *)&_i2c_device0, 0, sizeof(struct rt_i2c_bus_device));
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_i2c_device0.ops = &es32f0_i2c_ops;
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_i2c_device0.priv = &_h_i2c0;
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rt_i2c_bus_device_register(&_i2c_device0, "i2c0");
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#endif
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#ifdef BSP_USING_I2C1
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/* define i2c Instance */
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static struct rt_i2c_bus_device _i2c_device1;
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rt_memset((void *)&_i2c_device1, 0, sizeof(struct rt_i2c_bus_device));
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_i2c_device1.ops = &es32f0_i2c_ops;
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_i2c_device1.priv = &_h_i2c1;
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rt_i2c_bus_device_register(&_i2c_device1, "i2c1");
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#endif
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return RT_EOK;
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}
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INIT_DEVICE_EXPORT(rt_hw_i2c_init);
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#endif
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@ -0,0 +1,16 @@
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/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-03-19 wangyq the first version
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*/
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#ifndef DRV_I2C_H__
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#define DRV_I2C_H__
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int rt_hw_i2c_init(void);
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#endif
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@ -0,0 +1,211 @@
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/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-03-19 wangyq the first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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#include <ald_cmu.h>
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#include <ald_timer.h>
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#include <ald_gpio.h>
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static void pwm_set_freq(timer_handle_t *timer_initstruct, uint32_t ns)
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{
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uint64_t _arr = (uint64_t)cmu_get_pclk1_clock() * ns / 1000000000 /
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(timer_initstruct->init.prescaler + 1);
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WRITE_REG(timer_initstruct->perh->AR, (uint32_t)_arr);
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timer_initstruct->init.period = (uint32_t)_arr;
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}
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static void pwm_set_duty(timer_handle_t *timer_initstruct, timer_channel_t ch, uint32_t ns)
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{
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uint64_t tmp = (uint64_t)cmu_get_pclk1_clock() * ns / 1000000000 /
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(timer_initstruct->init.prescaler + 1);
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if (ch == TIMER_CHANNEL_1)
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WRITE_REG(timer_initstruct->perh->CCVAL1, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_2)
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WRITE_REG(timer_initstruct->perh->CCVAL2, (uint32_t)tmp);
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else if (ch == TIMER_CHANNEL_3)
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WRITE_REG(timer_initstruct->perh->CCVAL3, (uint32_t)tmp);
|
||||
else if (ch == TIMER_CHANNEL_4)
|
||||
WRITE_REG(timer_initstruct->perh->CCVAL4, (uint32_t)tmp);
|
||||
}
|
||||
|
||||
static rt_err_t es32f0_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
uint32_t _ccep;
|
||||
timer_channel_t pwm_channel;
|
||||
timer_oc_init_t tim_ocinit;
|
||||
timer_handle_t *timer_initstruct = (timer_handle_t *)device->parent.user_data;
|
||||
struct rt_pwm_configuration *cfg = (struct rt_pwm_configuration *)arg;
|
||||
|
||||
RT_ASSERT(timer_initstruct != RT_NULL);
|
||||
|
||||
tim_ocinit.oc_mode = TIMER_OC_MODE_PWM1;
|
||||
tim_ocinit.oc_polarity = TIMER_OC_POLARITY_HIGH;
|
||||
tim_ocinit.oc_fast_en = DISABLE;
|
||||
tim_ocinit.ocn_polarity = TIMER_OCN_POLARITY_HIGH;
|
||||
tim_ocinit.ocn_idle = TIMER_OCN_IDLE_RESET;
|
||||
tim_ocinit.oc_idle = TIMER_OC_IDLE_RESET;
|
||||
|
||||
/* select pwm output channel */
|
||||
if (1 == cfg->channel)
|
||||
{
|
||||
pwm_channel = TIMER_CHANNEL_1;
|
||||
}
|
||||
else if (2 == cfg->channel)
|
||||
{
|
||||
pwm_channel = TIMER_CHANNEL_2;
|
||||
}
|
||||
else if (3 == cfg->channel)
|
||||
{
|
||||
if (timer_initstruct->perh == GP16C2T0 || timer_initstruct->perh == GP16C2T1)
|
||||
return RT_EINVAL;
|
||||
pwm_channel = TIMER_CHANNEL_3;
|
||||
}
|
||||
else if (4 == cfg->channel)
|
||||
{
|
||||
if (timer_initstruct->perh == GP16C2T0 || timer_initstruct->perh == GP16C2T1 ||
|
||||
timer_initstruct->perh == GP16C4T0)
|
||||
return RT_EINVAL;
|
||||
pwm_channel = TIMER_CHANNEL_4;
|
||||
}
|
||||
else
|
||||
{
|
||||
return RT_EINVAL;
|
||||
}
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case PWM_CMD_ENABLE:
|
||||
timer_pwm_start(timer_initstruct, pwm_channel);
|
||||
break;
|
||||
|
||||
case PWM_CMD_DISABLE:
|
||||
timer_pwm_stop(timer_initstruct, pwm_channel);
|
||||
break;
|
||||
|
||||
case PWM_CMD_SET:
|
||||
_ccep = timer_initstruct->perh->CCEP;
|
||||
/* count registers max 0xFFFF, auto adjust prescaler */
|
||||
do
|
||||
{
|
||||
pwm_set_freq(timer_initstruct, cfg->period);
|
||||
timer_initstruct->init.prescaler ++;
|
||||
}
|
||||
while (timer_initstruct->init.period > 0xFFFF);
|
||||
/* update prescaler */
|
||||
WRITE_REG(timer_initstruct->perh->PRES, --timer_initstruct->init.prescaler);
|
||||
timer_oc_config_channel(timer_initstruct, &tim_ocinit, pwm_channel);
|
||||
pwm_set_duty(timer_initstruct, pwm_channel, cfg->pulse);
|
||||
timer_initstruct->perh->CCEP = _ccep;
|
||||
break;
|
||||
|
||||
case PWM_CMD_GET:
|
||||
cfg->pulse = timer_read_capture_value(timer_initstruct, pwm_channel) * 100 /
|
||||
READ_REG(timer_initstruct->perh->AR);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
const static struct rt_pwm_ops es32f0_pwm_ops =
|
||||
{
|
||||
es32f0_pwm_control
|
||||
};
|
||||
|
||||
int rt_hw_pwm_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
gpio_init_t gpio_initstructure;
|
||||
|
||||
gpio_initstructure.mode = GPIO_MODE_OUTPUT;
|
||||
gpio_initstructure.odos = GPIO_PUSH_PULL;
|
||||
gpio_initstructure.pupd = GPIO_PUSH_UP;
|
||||
gpio_initstructure.odrv = GPIO_OUT_DRIVE_NORMAL;
|
||||
gpio_initstructure.flt = GPIO_FILTER_DISABLE;
|
||||
gpio_initstructure.type = GPIO_TYPE_TTL;
|
||||
|
||||
#ifdef BSP_USING_PWM0 /* 4 channels */
|
||||
static struct rt_device_pwm pwm_dev0;
|
||||
static timer_handle_t timer_initstruct0;
|
||||
|
||||
timer_initstruct0.perh = AD16C4T0;
|
||||
timer_pwm_init(&timer_initstruct0);
|
||||
|
||||
/* gpio initialization */
|
||||
gpio_initstructure.func = GPIO_FUNC_2;
|
||||
gpio_init(GPIOA, GPIO_PIN_8, &gpio_initstructure);
|
||||
gpio_init(GPIOA, GPIO_PIN_9, &gpio_initstructure);
|
||||
gpio_init(GPIOA, GPIO_PIN_10, &gpio_initstructure);
|
||||
gpio_init(GPIOA, GPIO_PIN_11, &gpio_initstructure);
|
||||
|
||||
ret = rt_device_pwm_register(&pwm_dev0, "pwm0", &es32f0_pwm_ops,
|
||||
&timer_initstruct0);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_PWM1 /* 3 channels */
|
||||
static struct rt_device_pwm pwm_dev1;
|
||||
static timer_handle_t timer_initstruct1;
|
||||
|
||||
timer_initstruct1.perh = GP16C4T0;
|
||||
timer_pwm_init(&timer_initstruct1);
|
||||
|
||||
/* gpio initialization */
|
||||
gpio_initstructure.func = GPIO_FUNC_2;
|
||||
gpio_init(GPIOB, GPIO_PIN_6, &gpio_initstructure);
|
||||
gpio_init(GPIOB, GPIO_PIN_7, &gpio_initstructure);
|
||||
gpio_init(GPIOB, GPIO_PIN_8, &gpio_initstructure);
|
||||
|
||||
ret = rt_device_pwm_register(&pwm_dev1, "pwm1", &es32f0_pwm_ops,
|
||||
&timer_initstruct1);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_PWM2 /* 2 channels */
|
||||
static struct rt_device_pwm pwm_dev2;
|
||||
static timer_handle_t timer_initstruct2;
|
||||
|
||||
timer_initstruct2.perh = GP16C2T0;
|
||||
timer_pwm_init(&timer_initstruct2);
|
||||
|
||||
/* gpio initialization */
|
||||
gpio_initstructure.func = GPIO_FUNC_2;
|
||||
gpio_init(GPIOA, GPIO_PIN_0, &gpio_initstructure);
|
||||
gpio_init(GPIOA, GPIO_PIN_1, &gpio_initstructure);
|
||||
|
||||
ret = rt_device_pwm_register(&pwm_dev2, "pwm2", &es32f0_pwm_ops,
|
||||
&timer_initstruct2);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_PWM3 /* 2 channels */
|
||||
static struct rt_device_pwm pwm_dev3;
|
||||
static timer_handle_t timer_initstruct3;
|
||||
|
||||
timer_initstruct3.perh = GP16C2T1;
|
||||
timer_pwm_init(&timer_initstruct3);
|
||||
|
||||
/* gpio initialization */
|
||||
gpio_initstructure.func = GPIO_FUNC_3;
|
||||
gpio_init(GPIOC, GPIO_PIN_6, &gpio_initstructure);
|
||||
gpio_init(GPIOC, GPIO_PIN_7, &gpio_initstructure);
|
||||
|
||||
ret = rt_device_pwm_register(&pwm_dev3, "pwm3", &es32f0_pwm_ops,
|
||||
&timer_initstruct3);
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_pwm_init);
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_PWM_H__
|
||||
#define DRV_PWM_H__
|
||||
|
||||
int rt_hw_pwm_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,297 @@
|
|||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 wangyq the first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <string.h>
|
||||
#include <rthw.h>
|
||||
#include "board.h"
|
||||
#include "drv_spi.h"
|
||||
#include <ald_spi.h>
|
||||
#include <ald_gpio.h>
|
||||
#include <ald_cmu.h>
|
||||
|
||||
#ifdef RT_USING_SPI
|
||||
|
||||
#define SPITIMEOUT 0x0FFF
|
||||
|
||||
rt_err_t spi_configure(struct rt_spi_device *device,
|
||||
struct rt_spi_configuration *cfg)
|
||||
{
|
||||
spi_handle_t *hspi;
|
||||
hspi = (spi_handle_t *)device->bus->parent.user_data;
|
||||
|
||||
/* config spi mode */
|
||||
if (cfg->mode & RT_SPI_SLAVE)
|
||||
{
|
||||
hspi->init.mode = SPI_MODE_SLAVER;
|
||||
}
|
||||
else
|
||||
{
|
||||
hspi->init.mode = SPI_MODE_MASTER;
|
||||
}
|
||||
if (cfg->mode & RT_SPI_3WIRE)
|
||||
{
|
||||
hspi->init.dir = SPI_DIRECTION_1LINE;
|
||||
}
|
||||
else
|
||||
{
|
||||
hspi->init.dir = SPI_DIRECTION_2LINES;
|
||||
}
|
||||
if (cfg->data_width == 8)
|
||||
{
|
||||
hspi->init.data_size = SPI_DATA_SIZE_8;
|
||||
}
|
||||
else if (cfg->data_width == 16)
|
||||
{
|
||||
hspi->init.data_size = SPI_DATA_SIZE_16;
|
||||
}
|
||||
|
||||
if (cfg->mode & RT_SPI_CPHA)
|
||||
{
|
||||
hspi->init.phase = SPI_CPHA_SECOND;
|
||||
}
|
||||
else
|
||||
{
|
||||
hspi->init.phase = SPI_CPHA_FIRST;
|
||||
}
|
||||
if (cfg->mode & RT_SPI_CPOL)
|
||||
{
|
||||
hspi->init.polarity = SPI_CPOL_HIGH;
|
||||
}
|
||||
else
|
||||
{
|
||||
hspi->init.polarity = SPI_CPOL_LOW;
|
||||
}
|
||||
if (cfg->mode & RT_SPI_NO_CS)
|
||||
{
|
||||
hspi->init.ss_en = DISABLE;
|
||||
}
|
||||
else
|
||||
{
|
||||
hspi->init.ss_en = ENABLE;
|
||||
}
|
||||
|
||||
/* config spi clock */
|
||||
if (cfg->max_hz >= cmu_get_pclk1_clock() / 2)
|
||||
{
|
||||
/* pclk1 max speed 48MHz, spi master max speed 10MHz */
|
||||
if (cmu_get_pclk1_clock() / 2 <= 10000000)
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_2;
|
||||
}
|
||||
else if (cmu_get_pclk1_clock() / 4 <= 10000000)
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_4;
|
||||
}
|
||||
else
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_8;
|
||||
}
|
||||
}
|
||||
else if (cfg->max_hz >= cmu_get_pclk1_clock() / 4)
|
||||
{
|
||||
/* pclk1 max speed 48MHz, spi master max speed 10MHz */
|
||||
if (cmu_get_pclk1_clock() / 4 <= 10000000)
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_4;
|
||||
}
|
||||
else
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_8;
|
||||
}
|
||||
}
|
||||
else if (cfg->max_hz >= cmu_get_pclk1_clock() / 8)
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_8;
|
||||
}
|
||||
else if (cfg->max_hz >= cmu_get_pclk1_clock() / 16)
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_16;
|
||||
}
|
||||
else if (cfg->max_hz >= cmu_get_pclk1_clock() / 32)
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_32;
|
||||
}
|
||||
else if (cfg->max_hz >= cmu_get_pclk1_clock() / 64)
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_64;
|
||||
}
|
||||
else if (cfg->max_hz >= cmu_get_pclk1_clock() / 128)
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_128;
|
||||
}
|
||||
else
|
||||
{
|
||||
hspi->init.baud = SPI_BAUD_256;
|
||||
}
|
||||
spi_init(hspi);
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
|
||||
{
|
||||
rt_err_t res;
|
||||
spi_handle_t *hspi;
|
||||
struct es32f0_hw_spi_cs *cs;
|
||||
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
RT_ASSERT(device->bus != RT_NULL);
|
||||
RT_ASSERT(device->bus->parent.user_data != RT_NULL);
|
||||
RT_ASSERT(message->send_buf != RT_NULL || message->recv_buf != RT_NULL);
|
||||
|
||||
hspi = (spi_handle_t *)device->bus->parent.user_data;
|
||||
cs = device->parent.user_data;
|
||||
|
||||
/* only send data */
|
||||
if (message->recv_buf == RT_NULL)
|
||||
{
|
||||
if (message->cs_take)
|
||||
{
|
||||
rt_pin_write(cs->pin, 0);
|
||||
}
|
||||
res = spi_send(hspi, (rt_uint8_t *)message->send_buf, (rt_int32_t)message->length, SPITIMEOUT);
|
||||
if (message->cs_release)
|
||||
{
|
||||
rt_pin_write(cs->pin, 1);
|
||||
}
|
||||
if (res != RT_EOK)
|
||||
return RT_ERROR;
|
||||
}
|
||||
|
||||
/* only receive data */
|
||||
if (message->send_buf == RT_NULL)
|
||||
{
|
||||
if (message->cs_take)
|
||||
{
|
||||
rt_pin_write(cs->pin, 0);
|
||||
}
|
||||
res = spi_recv(hspi, (rt_uint8_t *)message->recv_buf, (rt_int32_t)message->length, SPITIMEOUT);
|
||||
if (message->cs_release)
|
||||
{
|
||||
rt_pin_write(cs->pin, 1);
|
||||
}
|
||||
if (res != RT_EOK)
|
||||
return RT_ERROR;
|
||||
}
|
||||
|
||||
/* send & receive */
|
||||
else
|
||||
{
|
||||
if (message->cs_take)
|
||||
{
|
||||
rt_pin_write(cs->pin, 0);
|
||||
}
|
||||
res = spi_send_recv(hspi, (rt_uint8_t *)message->send_buf, (rt_uint8_t *)message->recv_buf,
|
||||
(rt_int32_t)message->length, SPITIMEOUT);
|
||||
if (message->cs_release)
|
||||
{
|
||||
rt_pin_write(cs->pin, 1);
|
||||
}
|
||||
if (res != RT_EOK)
|
||||
return RT_ERROR;
|
||||
}
|
||||
|
||||
return message->length;
|
||||
}
|
||||
|
||||
const struct rt_spi_ops es32f0_spi_ops =
|
||||
{
|
||||
spi_configure,
|
||||
spixfer,
|
||||
};
|
||||
|
||||
static struct rt_spi_bus _spi_bus0, _spi_bus1;
|
||||
static spi_handle_t _spi0, _spi1;
|
||||
int es32f0_spi_register_bus(SPI_TypeDef *SPIx, const char *name)
|
||||
{
|
||||
struct rt_spi_bus *spi_bus;
|
||||
spi_handle_t *spi;
|
||||
gpio_init_t gpio_instruct;
|
||||
|
||||
if (SPIx == SPI0)
|
||||
{
|
||||
_spi0.perh = SPI0;
|
||||
spi_bus = &_spi_bus0;
|
||||
spi = &_spi0;
|
||||
|
||||
/* SPI0 gpio init */
|
||||
gpio_instruct.mode = GPIO_MODE_OUTPUT;
|
||||
gpio_instruct.odos = GPIO_PUSH_PULL;
|
||||
gpio_instruct.func = GPIO_FUNC_4;
|
||||
gpio_instruct.type = GPIO_TYPE_CMOS;
|
||||
gpio_instruct.flt = GPIO_FILTER_DISABLE;
|
||||
|
||||
/* PB3->SPI0_SCK, PB5->SPI0_MOSI */
|
||||
gpio_init(GPIOB, GPIO_PIN_3 | GPIO_PIN_5, &gpio_instruct);
|
||||
|
||||
/* PB4->SPI0_MISO */
|
||||
gpio_instruct.mode = GPIO_MODE_INPUT;
|
||||
gpio_init(GPIOB, GPIO_PIN_4, &gpio_instruct);
|
||||
}
|
||||
else if (SPIx == SPI1)
|
||||
{
|
||||
_spi1.perh = SPI1;
|
||||
spi_bus = &_spi_bus1;
|
||||
spi = &_spi1;
|
||||
|
||||
/* SPI1 gpio init */
|
||||
gpio_instruct.mode = GPIO_MODE_OUTPUT;
|
||||
gpio_instruct.odos = GPIO_PUSH_PULL;
|
||||
gpio_instruct.func = GPIO_FUNC_4;
|
||||
gpio_instruct.type = GPIO_TYPE_CMOS;
|
||||
gpio_instruct.flt = GPIO_FILTER_DISABLE;
|
||||
|
||||
/* PB13->SPI1_SCK, PB15->SPI1_MOSI */
|
||||
gpio_init(GPIOB, GPIO_PIN_13 | GPIO_PIN_15, &gpio_instruct);
|
||||
|
||||
/* PB14->SPI1_MISO */
|
||||
gpio_instruct.mode = GPIO_MODE_INPUT;
|
||||
gpio_init(GPIOB, GPIO_PIN_14, &gpio_instruct);
|
||||
}
|
||||
else
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
spi_bus->parent.user_data = spi;
|
||||
|
||||
return rt_spi_bus_register(spi_bus, name, &es32f0_spi_ops);
|
||||
}
|
||||
|
||||
rt_err_t es32f0_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name)
|
||||
{
|
||||
/* define spi Instance */
|
||||
struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
|
||||
RT_ASSERT(spi_device != RT_NULL);
|
||||
struct es32f0_hw_spi_cs *cs_pin = (struct es32f0_hw_spi_cs *)rt_malloc(sizeof(struct es32f0_hw_spi_cs));
|
||||
RT_ASSERT(cs_pin != RT_NULL);
|
||||
cs_pin->pin = pin;
|
||||
rt_pin_mode(pin, PIN_MODE_OUTPUT);
|
||||
rt_pin_write(pin, 1);
|
||||
return rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
|
||||
}
|
||||
|
||||
int rt_hw_spi_init(void)
|
||||
{
|
||||
int result = 0;
|
||||
|
||||
#ifdef BSP_USING_SPI0
|
||||
result = es32f0_spi_register_bus(SPI0, "spi0");
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
result = es32f0_spi_register_bus(SPI1, "spi1");
|
||||
#endif
|
||||
|
||||
return result;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_spi_init);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_SPI_H__
|
||||
#define DRV_SPI_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rthw.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
struct es32f0_hw_spi_cs
|
||||
{
|
||||
rt_uint32_t pin;
|
||||
};
|
||||
|
||||
/* cannot be used before completion init */
|
||||
rt_err_t es32f0_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name);
|
||||
int rt_hw_spi_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 wangyq the first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "spi_flash.h"
|
||||
#include "drv_spiflash.h"
|
||||
#include "spi_flash_sfud.h"
|
||||
#include "drv_spi.h"
|
||||
|
||||
#if defined(BSP_USING_SPI_FLASH)
|
||||
static int rt_hw_spi_flash_init(void)
|
||||
{
|
||||
es32f0_spi_device_attach(50, "spi0", "spi00");
|
||||
|
||||
if (RT_NULL == rt_sfud_flash_probe("W25Q64", "spi00"))
|
||||
{
|
||||
return -RT_ERROR;
|
||||
};
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_COMPONENT_EXPORT(rt_hw_spi_flash_init);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 wangyq the first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_NOR_FLASH_H__
|
||||
#define DRV_NOR_FLASH_H__
|
||||
|
||||
int rt_hw_spi_flash_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -45,13 +45,10 @@ static rt_err_t es32f0x_configure(struct rt_serial_device *serial, struct serial
|
|||
gpio_init_initstructure.func = GPIO_FUNC_3;
|
||||
gpio_init(GPIOB, GPIO_PIN_10, &gpio_init_initstructure);
|
||||
|
||||
/* Initialize rx pin ,the same as txpin except mode*/
|
||||
/* Initialize rx pin ,the same as txpin except mode */
|
||||
gpio_init_initstructure.mode = GPIO_MODE_INPUT;
|
||||
gpio_init(GPIOB, GPIO_PIN_11, &gpio_init_initstructure);
|
||||
|
||||
NVIC_EnableIRQ(UART0_IRQn);
|
||||
|
||||
#endif /* uart0 gpio init */
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART1
|
||||
/* Initialize tx pin */
|
||||
|
|
@ -61,9 +58,7 @@ static rt_err_t es32f0x_configure(struct rt_serial_device *serial, struct serial
|
|||
/* Initialize rx pin ,the same as txpin except mode*/
|
||||
gpio_init_initstructure.mode = GPIO_MODE_INPUT;
|
||||
gpio_init(GPIOC, GPIO_PIN_11, &gpio_init_initstructure);
|
||||
|
||||
NVIC_EnableIRQ(UART1_IRQn);
|
||||
#endif /* uart1 gpio init */
|
||||
#endif
|
||||
|
||||
uart->huart.init.mode = UART_MODE_UART;
|
||||
uart->huart.init.baud = cfg->baud_rate;
|
||||
|
|
@ -90,7 +85,7 @@ static rt_err_t es32f0x_configure(struct rt_serial_device *serial, struct serial
|
|||
UART_DATA_INV_DISABLE(&uart->huart);
|
||||
}
|
||||
|
||||
/*enable rx int*/
|
||||
/* enable rx int */
|
||||
uart_interrupt_config(&uart->huart, UART_IT_RXRD, ENABLE);
|
||||
|
||||
return RT_EOK;
|
||||
|
|
|
|||
|
|
@ -101,7 +101,7 @@
|
|||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<nTsel>3</nTsel>
|
||||
<nTsel>2</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
|
|
@ -112,9 +112,14 @@
|
|||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"Any" -UAny -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ES32F033x.FLM -FS00 -FL040000 -FP0($$Device:ES32F0334LT$Flash\ES32F033x.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
|
|
|
|||
|
|
@ -365,7 +365,7 @@
|
|||
<ScatterFile />
|
||||
<IncludeLibs />
|
||||
<IncludeLibsPath />
|
||||
<Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab)</Misc>
|
||||
<Misc />
|
||||
<LinkerInputFile />
|
||||
<DisabledWarnings />
|
||||
</LDads>
|
||||
|
|
|
|||
|
|
@ -163,8 +163,18 @@
|
|||
|
||||
#define BSP_USING_UART1
|
||||
|
||||
/* SPI Drivers */
|
||||
|
||||
|
||||
/* I2C Drivers */
|
||||
|
||||
|
||||
/* PWM Drivers */
|
||||
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
|
||||
/* Offboard Peripheral Drivers */
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -101,7 +101,7 @@
|
|||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<bEvRecOn>1</bEvRecOn>
|
||||
<nTsel>3</nTsel>
|
||||
<nTsel>2</nTsel>
|
||||
<sDll></sDll>
|
||||
<sDllPa></sDllPa>
|
||||
<sDlgDll></sDlgDll>
|
||||
|
|
@ -112,9 +112,14 @@
|
|||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
<pMon>Segger\JL2CM3.dll</pMon>
|
||||
<pMon>BIN\CMSIS_AGDI.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>CMSIS_AGDI</Key>
|
||||
<Name>-X"Any" -UAny -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0ES32F033x.FLM -FS00 -FL040000 -FP0($$Device:ES32F0334LT$Flash\ES32F033x.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>JL2CM3</Key>
|
||||
|
|
|
|||
Loading…
Reference in New Issue