auto formatted
This commit is contained in:
parent
849c99d2fa
commit
f18dfa0850
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
@ -65,16 +65,16 @@ void timer0_isr(int vector, void *param)
|
||||||
|
|
||||||
void timer0_init(void)
|
void timer0_init(void)
|
||||||
{
|
{
|
||||||
TMR0CON = BIT(7); //TIE
|
TMR0CON = BIT(7); //TIE
|
||||||
TMR0CNT = 0;
|
TMR0CNT = 0;
|
||||||
|
|
||||||
rt_hw_interrupt_install(IRQ_TMR0_VECTOR, timer0_isr, RT_NULL, "tick");
|
rt_hw_interrupt_install(IRQ_TMR0_VECTOR, timer0_isr, RT_NULL, "tick");
|
||||||
}
|
}
|
||||||
|
|
||||||
void timer0_cfg(uint32_t ticks)
|
void timer0_cfg(uint32_t ticks)
|
||||||
{
|
{
|
||||||
TMR0PR = (uint32_t)(ticks - 1UL); //1ms interrupt
|
TMR0PR = (uint32_t)(ticks - 1UL); //1ms interrupt
|
||||||
TMR0CON |= BIT(0); // EN
|
TMR0CON |= BIT(0); // EN
|
||||||
}
|
}
|
||||||
|
|
||||||
void hal_mdelay(uint32_t ms)
|
void hal_mdelay(uint32_t ms)
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
|
@ -139,7 +139,7 @@ void saia_volume_set(rt_uint8_t volume)
|
||||||
{
|
{
|
||||||
if (volume > 100)
|
if (volume > 100)
|
||||||
volume = 100;
|
volume = 100;
|
||||||
|
|
||||||
uint32_t dvol = volume * 327; // max is 0x7ffff
|
uint32_t dvol = volume * 327; // max is 0x7ffff
|
||||||
LOG_D("dvol=0x%x", dvol);
|
LOG_D("dvol=0x%x", dvol);
|
||||||
DACVOLCON = dvol | (0x02 << 16); // dac fade in
|
DACVOLCON = dvol | (0x02 << 16); // dac fade in
|
||||||
|
@ -155,7 +155,7 @@ static rt_err_t sound_getcaps(struct rt_audio_device *audio, struct rt_audio_cap
|
||||||
rt_err_t result = RT_EOK;
|
rt_err_t result = RT_EOK;
|
||||||
struct sound_device *snd_dev = RT_NULL;
|
struct sound_device *snd_dev = RT_NULL;
|
||||||
|
|
||||||
RT_ASSERT(audio != RT_NULL);
|
RT_ASSERT(audio != RT_NULL);
|
||||||
snd_dev = (struct sound_device *)audio->parent.user_data;
|
snd_dev = (struct sound_device *)audio->parent.user_data;
|
||||||
|
|
||||||
switch (caps->main_type)
|
switch (caps->main_type)
|
||||||
|
@ -231,7 +231,7 @@ static rt_err_t sound_getcaps(struct rt_audio_device *audio, struct rt_audio_cap
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
|
static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
|
||||||
|
@ -320,14 +320,14 @@ static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_c
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t sound_init(struct rt_audio_device *audio)
|
static rt_err_t sound_init(struct rt_audio_device *audio)
|
||||||
{
|
{
|
||||||
struct sound_device *snd_dev = RT_NULL;
|
struct sound_device *snd_dev = RT_NULL;
|
||||||
|
|
||||||
RT_ASSERT(audio != RT_NULL);
|
RT_ASSERT(audio != RT_NULL);
|
||||||
snd_dev = (struct sound_device *)audio->parent.user_data;
|
snd_dev = (struct sound_device *)audio->parent.user_data;
|
||||||
|
|
||||||
adpll_init(0);
|
adpll_init(0);
|
||||||
|
@ -337,14 +337,14 @@ static rt_err_t sound_init(struct rt_audio_device *audio)
|
||||||
saia_frequency_set(snd_dev->replay_config.samplerate);
|
saia_frequency_set(snd_dev->replay_config.samplerate);
|
||||||
saia_channels_set(snd_dev->replay_config.channels);
|
saia_channels_set(snd_dev->replay_config.channels);
|
||||||
|
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
|
static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
|
||||||
{
|
{
|
||||||
struct sound_device *snd_dev = RT_NULL;
|
struct sound_device *snd_dev = RT_NULL;
|
||||||
|
|
||||||
RT_ASSERT(audio != RT_NULL);
|
RT_ASSERT(audio != RT_NULL);
|
||||||
snd_dev = (struct sound_device *)audio->parent.user_data;
|
snd_dev = (struct sound_device *)audio->parent.user_data;
|
||||||
|
|
||||||
if (stream == AUDIO_STREAM_REPLAY)
|
if (stream == AUDIO_STREAM_REPLAY)
|
||||||
|
@ -369,8 +369,8 @@ static rt_err_t sound_stop(struct rt_audio_device *audio, int stream)
|
||||||
{
|
{
|
||||||
struct sound_device *snd_dev = RT_NULL;
|
struct sound_device *snd_dev = RT_NULL;
|
||||||
|
|
||||||
RT_ASSERT(audio != RT_NULL);
|
RT_ASSERT(audio != RT_NULL);
|
||||||
snd_dev = (struct sound_device *)audio->parent.user_data;
|
snd_dev = (struct sound_device *)audio->parent.user_data;
|
||||||
|
|
||||||
if (stream == AUDIO_STREAM_REPLAY)
|
if (stream == AUDIO_STREAM_REPLAY)
|
||||||
{
|
{
|
||||||
|
@ -387,7 +387,7 @@ rt_size_t sound_transmit(struct rt_audio_device *audio, const void *writeBuf, vo
|
||||||
rt_size_t tmp_size = size / 4;
|
rt_size_t tmp_size = size / 4;
|
||||||
rt_size_t count = 0;
|
rt_size_t count = 0;
|
||||||
|
|
||||||
RT_ASSERT(audio != RT_NULL);
|
RT_ASSERT(audio != RT_NULL);
|
||||||
snd_dev = (struct sound_device *)audio->parent.user_data;
|
snd_dev = (struct sound_device *)audio->parent.user_data;
|
||||||
|
|
||||||
while (tmp_size-- > 0) {
|
while (tmp_size-- > 0) {
|
||||||
|
@ -395,14 +395,14 @@ rt_size_t sound_transmit(struct rt_audio_device *audio, const void *writeBuf, vo
|
||||||
AUBUFDATA = ((const uint32_t *)writeBuf)[count++];
|
AUBUFDATA = ((const uint32_t *)writeBuf)[count++];
|
||||||
}
|
}
|
||||||
|
|
||||||
return size;
|
return size;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void sound_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
|
static void sound_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
|
||||||
{
|
{
|
||||||
struct sound_device *snd_dev = RT_NULL;
|
struct sound_device *snd_dev = RT_NULL;
|
||||||
|
|
||||||
RT_ASSERT(audio != RT_NULL);
|
RT_ASSERT(audio != RT_NULL);
|
||||||
snd_dev = (struct sound_device *)audio->parent.user_data;
|
snd_dev = (struct sound_device *)audio->parent.user_data;
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -425,7 +425,7 @@ static struct rt_audio_ops ops =
|
||||||
.init = sound_init,
|
.init = sound_init,
|
||||||
.start = sound_start,
|
.start = sound_start,
|
||||||
.stop = sound_stop,
|
.stop = sound_stop,
|
||||||
.transmit = sound_transmit,
|
.transmit = sound_transmit,
|
||||||
.buffer_info = sound_buffer_info,
|
.buffer_info = sound_buffer_info,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -443,11 +443,11 @@ void audio_isr(int vector, void *param)
|
||||||
|
|
||||||
static int rt_hw_sound_init(void)
|
static int rt_hw_sound_init(void)
|
||||||
{
|
{
|
||||||
rt_uint8_t *tx_fifo = RT_NULL;
|
rt_uint8_t *tx_fifo = RT_NULL;
|
||||||
rt_uint8_t *rx_fifo = RT_NULL;
|
rt_uint8_t *rx_fifo = RT_NULL;
|
||||||
|
|
||||||
/* 分配 DMA 搬运 buffer */
|
/* 分配 DMA 搬运 buffer */
|
||||||
tx_fifo = rt_calloc(1, TX_FIFO_SIZE);
|
tx_fifo = rt_calloc(1, TX_FIFO_SIZE);
|
||||||
if(tx_fifo == RT_NULL)
|
if(tx_fifo == RT_NULL)
|
||||||
{
|
{
|
||||||
return -RT_ENOMEM;
|
return -RT_ENOMEM;
|
||||||
|
@ -455,8 +455,8 @@ static int rt_hw_sound_init(void)
|
||||||
|
|
||||||
snd_dev.tx_fifo = tx_fifo;
|
snd_dev.tx_fifo = tx_fifo;
|
||||||
|
|
||||||
/* 分配 DMA 搬运 buffer */
|
/* 分配 DMA 搬运 buffer */
|
||||||
rx_fifo = rt_calloc(1, TX_FIFO_SIZE);
|
rx_fifo = rt_calloc(1, TX_FIFO_SIZE);
|
||||||
if(rx_fifo == RT_NULL)
|
if(rx_fifo == RT_NULL)
|
||||||
{
|
{
|
||||||
return -RT_ENOMEM;
|
return -RT_ENOMEM;
|
||||||
|
|
|
@ -41,9 +41,9 @@ rt_uint8_t *rt_hw_stack_init(void *tentry,
|
||||||
stk--;
|
stk--;
|
||||||
*stk = (rt_uint32_t)0x10003; /* Start address */
|
*stk = (rt_uint32_t)0x10003; /* Start address */
|
||||||
stk--;
|
stk--;
|
||||||
*stk = (rt_uint32_t)tentry; /* Start address */
|
*stk = (rt_uint32_t)tentry; /* Start address */
|
||||||
stk -= 22;
|
stk -= 22;
|
||||||
*stk = (rt_uint32_t)parameter; /* Register a0 parameter*/
|
*stk = (rt_uint32_t)parameter; /* Register a0 parameter*/
|
||||||
stk -= 6;
|
stk -= 6;
|
||||||
*stk = (rt_uint32_t)tp; /* Register thread pointer */
|
*stk = (rt_uint32_t)tp; /* Register thread pointer */
|
||||||
stk --;
|
stk --;
|
||||||
|
|
|
@ -24,16 +24,16 @@ void set_cpu_irq_comm(void (*irq_hook)(void))
|
||||||
|
|
||||||
void cpu_irq_comm_do(void)
|
void cpu_irq_comm_do(void)
|
||||||
{
|
{
|
||||||
void (*pfnct)(void);
|
void (*pfnct)(void);
|
||||||
uint32_t irq_pend = PICPND & irq_mask;
|
uint32_t irq_pend = PICPND & irq_mask;
|
||||||
for (int i = 0; i < IRQ_TOTAL_NUM; i++) {
|
for (int i = 0; i < IRQ_TOTAL_NUM; i++) {
|
||||||
if (irq_pend & BIT(i)) {
|
if (irq_pend & BIT(i)) {
|
||||||
pfnct = tbl_irq_vector[i];
|
pfnct = tbl_irq_vector[i];
|
||||||
if (pfnct) {
|
if (pfnct) {
|
||||||
pfnct(); /* call ISR */
|
pfnct(); /* call ISR */
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void rt_hw_irq_enable(int vector)
|
void rt_hw_irq_enable(int vector)
|
||||||
|
@ -56,12 +56,12 @@ void rt_hw_interrupt_init(void)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function will install a interrupt service routine to a interrupt.
|
* @brief This function will install a interrupt service routine to a interrupt.
|
||||||
*
|
*
|
||||||
* @param vector
|
* @param vector
|
||||||
* @param handler
|
* @param handler
|
||||||
* @param param
|
* @param param
|
||||||
* @param name
|
* @param name
|
||||||
* @return rt_isr_handler_t
|
* @return rt_isr_handler_t
|
||||||
*/
|
*/
|
||||||
rt_isr_handler_t rt_hw_interrupt_install(int vector,
|
rt_isr_handler_t rt_hw_interrupt_install(int vector,
|
||||||
rt_isr_handler_t handler,
|
rt_isr_handler_t handler,
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
@ -45,7 +45,7 @@ static rt_err_t ab32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann
|
||||||
{
|
{
|
||||||
RT_ASSERT(device != RT_NULL);
|
RT_ASSERT(device != RT_NULL);
|
||||||
|
|
||||||
hal_adc_enable(enabled);
|
hal_adc_enable(enabled);
|
||||||
|
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
@ -53,7 +53,7 @@ static rt_err_t ab32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann
|
||||||
static rt_uint32_t ab32_adc_get_channel(rt_uint32_t channel)
|
static rt_uint32_t ab32_adc_get_channel(rt_uint32_t channel)
|
||||||
{
|
{
|
||||||
rt_uint32_t ab32_channel = 0;
|
rt_uint32_t ab32_channel = 0;
|
||||||
|
|
||||||
switch (channel)
|
switch (channel)
|
||||||
{
|
{
|
||||||
case 0:
|
case 0:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -235,8 +235,8 @@ int rt_hw_i2c_init(void)
|
||||||
ab32_i2c_bus_unlock(&soft_i2c_config[i]);
|
ab32_i2c_bus_unlock(&soft_i2c_config[i]);
|
||||||
|
|
||||||
LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
|
LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
|
||||||
soft_i2c_config[i].bus_name,
|
soft_i2c_config[i].bus_name,
|
||||||
soft_i2c_config[i].scl,
|
soft_i2c_config[i].scl,
|
||||||
soft_i2c_config[i].sda);
|
soft_i2c_config[i].sda);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2020-2021, Bluetrum Development Team
|
* Copyright (c) 2020-2021, Bluetrum Development Team
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
|
|
|
@ -31,28 +31,28 @@
|
||||||
#define ADC_CHANNEL_15 (1u << 15)
|
#define ADC_CHANNEL_15 (1u << 15)
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Enable ADC
|
* @brief Enable ADC
|
||||||
*
|
*
|
||||||
* @param enable
|
* @param enable
|
||||||
*/
|
*/
|
||||||
void hal_adc_enable(uint8_t enable);
|
void hal_adc_enable(uint8_t enable);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Starts conversion of the channels
|
* @brief Starts conversion of the channels
|
||||||
*
|
*
|
||||||
* @param channel @ref ADC_channels
|
* @param channel @ref ADC_channels
|
||||||
*/
|
*/
|
||||||
void hal_adc_start(uint32_t channel);
|
void hal_adc_start(uint32_t channel);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Poll for conversion complete
|
* @brief Poll for conversion complete
|
||||||
*
|
*
|
||||||
* @param timeout Timeout value in millisecond
|
* @param timeout Timeout value in millisecond
|
||||||
* @return hal_error_t
|
* @return hal_error_t
|
||||||
*/
|
*/
|
||||||
hal_error_t hal_adc_poll_for_conversion(uint32_t timeout);
|
hal_error_t hal_adc_poll_for_conversion(uint32_t timeout);
|
||||||
|
|
||||||
|
|
|
@ -13,7 +13,7 @@ struct gpio_init
|
||||||
{
|
{
|
||||||
uint8_t pin;
|
uint8_t pin;
|
||||||
uint8_t dir;
|
uint8_t dir;
|
||||||
uint8_t de;
|
uint8_t de;
|
||||||
uint8_t pull;
|
uint8_t pull;
|
||||||
uint32_t alternate;
|
uint32_t alternate;
|
||||||
uint32_t af_con; /*!< Alternate function control
|
uint32_t af_con; /*!< Alternate function control
|
||||||
|
|
|
@ -28,7 +28,7 @@
|
||||||
* G5: tx:PA1 rx:PA0
|
* G5: tx:PA1 rx:PA0
|
||||||
* G6: tx:PE0 rx:PE1
|
* G6: tx:PE0 rx:PE1
|
||||||
* G7: tx:PF2 rx:map to tx
|
* G7: tx:PF2 rx:map to tx
|
||||||
*
|
*
|
||||||
* UART1:
|
* UART1:
|
||||||
* G1: tx:PA7 rx:PA6
|
* G1: tx:PA7 rx:PA6
|
||||||
* G2: tx:PA4 rx:PA3
|
* G2: tx:PA4 rx:PA3
|
||||||
|
@ -52,17 +52,17 @@
|
||||||
* G1: PE7
|
* G1: PE7
|
||||||
* G2: PF2
|
* G2: PF2
|
||||||
* G3: PA3
|
* G3: PA3
|
||||||
*
|
*
|
||||||
* LPWM2:
|
* LPWM2:
|
||||||
* G1: PE6
|
* G1: PE6
|
||||||
* G2: PE0
|
* G2: PE0
|
||||||
* G3: PA2
|
* G3: PA2
|
||||||
*
|
*
|
||||||
* LPWM1:
|
* LPWM1:
|
||||||
* G1: PE5
|
* G1: PE5
|
||||||
* G2: PB4
|
* G2: PB4
|
||||||
* G3: PA1
|
* G3: PA1
|
||||||
*
|
*
|
||||||
* LPWM0:
|
* LPWM0:
|
||||||
* G1: PE4
|
* G1: PE4
|
||||||
* G2: PB3
|
* G2: PB3
|
||||||
|
@ -76,10 +76,10 @@
|
||||||
/**
|
/**
|
||||||
* TMR5:
|
* TMR5:
|
||||||
* G1: PE1 PE2 PE3
|
* G1: PE1 PE2 PE3
|
||||||
*
|
*
|
||||||
* TMR4:
|
* TMR4:
|
||||||
* G1: PA5 PA6 PA7
|
* G1: PA5 PA6 PA7
|
||||||
*
|
*
|
||||||
* TMR3:
|
* TMR3:
|
||||||
* G1: PB0 PB1 PB2
|
* G1: PB0 PB1 PB2
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -39,7 +39,7 @@ struct uart_init
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief UART handle struction definition
|
* @brief UART handle struction definition
|
||||||
*
|
*
|
||||||
*/
|
*/
|
||||||
struct uart_handle
|
struct uart_handle
|
||||||
{
|
{
|
||||||
|
@ -76,8 +76,8 @@ struct uart_handle
|
||||||
/** @defgroup UART_Mode UART Transfer Mode
|
/** @defgroup UART_Mode UART Transfer Mode
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define UART_MODE_TX (0x00u) /*!< TX mode */
|
#define UART_MODE_TX (0x00u) /*!< TX mode */
|
||||||
#define UART_MODE_TX_RX (0x01u) /*!< RX and TX mode */
|
#define UART_MODE_TX_RX (0x01u) /*!< RX and TX mode */
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
|
|
|
@ -105,7 +105,7 @@ void hal_gpio_init(hal_sfr_t gpiox, gpio_init_t gpio_init)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Read the specified input port pin.
|
* @brief Read the specified input port pin.
|
||||||
*
|
*
|
||||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||||
* @return uint8_t The input port pin value.
|
* @return uint8_t The input port pin value.
|
||||||
|
@ -117,7 +117,7 @@ uint8_t hal_gpio_read(hal_sfr_t gpiox, uint8_t pin)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Set or clear the selected data port bit.
|
* @brief Set or clear the selected data port bit.
|
||||||
*
|
*
|
||||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||||
* @param state specifies the value to be written to the selected bit.
|
* @param state specifies the value to be written to the selected bit.
|
||||||
|
@ -135,7 +135,7 @@ void hal_gpio_write(hal_sfr_t gpiox, uint8_t pin, uint8_t state)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Toggle the specified GPIO pin.
|
* @brief Toggle the specified GPIO pin.
|
||||||
*
|
*
|
||||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -232,7 +232,7 @@ static bool sd_go_ready_try(sd_handle_t hsd)
|
||||||
case CARD_V1:
|
case CARD_V1:
|
||||||
sdmmc_acmd_op_cond(hsd, 0x00ff8000);
|
sdmmc_acmd_op_cond(hsd, 0x00ff8000);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CARD_V2:
|
case CARD_V2:
|
||||||
sdmmc_acmd_op_cond(hsd, 0x40ff8000);
|
sdmmc_acmd_op_cond(hsd, 0x40ff8000);
|
||||||
break;
|
break;
|
||||||
|
@ -389,8 +389,8 @@ bool hal_sd_read(sd_handle_t hsd, void *buf, uint32_t lba)
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
hsd->sdcard.state = HAL_SD_STATE_INVAL;
|
hsd->sdcard.state = HAL_SD_STATE_INVAL;
|
||||||
|
|
||||||
hal_mdelay(20);
|
hal_mdelay(20);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -18,7 +18,7 @@ enum
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Set the UART baud rate.
|
* @brief Set the UART baud rate.
|
||||||
*
|
*
|
||||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||||
* @param baud Baud rate.
|
* @param baud Baud rate.
|
||||||
*/
|
*/
|
||||||
|
@ -33,9 +33,9 @@ void hal_uart_setbaud(hal_sfr_t uartx, uint32_t baud)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Initialize the UART mode.
|
* @brief Initialize the UART mode.
|
||||||
*
|
*
|
||||||
* @param huart UART handle.
|
* @param huart UART handle.
|
||||||
* @return hal_error_t
|
* @return hal_error_t
|
||||||
*/
|
*/
|
||||||
hal_error_t hal_uart_init(struct uart_handle *huart)
|
hal_error_t hal_uart_init(struct uart_handle *huart)
|
||||||
{
|
{
|
||||||
|
@ -51,7 +51,7 @@ hal_error_t hal_uart_init(struct uart_handle *huart)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief DeInitialize the UART peripheral.
|
* @brief DeInitialize the UART peripheral.
|
||||||
*
|
*
|
||||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||||
*/
|
*/
|
||||||
void hal_uart_deinit(hal_sfr_t uartx)
|
void hal_uart_deinit(hal_sfr_t uartx)
|
||||||
|
@ -61,7 +61,7 @@ void hal_uart_deinit(hal_sfr_t uartx)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Initialize the UART MSP.
|
* @brief Initialize the UART MSP.
|
||||||
*
|
*
|
||||||
* @param huart UART handle.
|
* @param huart UART handle.
|
||||||
*/
|
*/
|
||||||
WEAK void HAL_UART_MspInit(struct uart_handle *huart)
|
WEAK void HAL_UART_MspInit(struct uart_handle *huart)
|
||||||
|
@ -69,9 +69,9 @@ WEAK void HAL_UART_MspInit(struct uart_handle *huart)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Control the UART peripheral.
|
* @brief Control the UART peripheral.
|
||||||
*
|
*
|
||||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||||
* @param cntl
|
* @param cntl
|
||||||
* @arg UART_MODULE_ENABLE
|
* @arg UART_MODULE_ENABLE
|
||||||
* @arg UART_BIT9_ENABLE
|
* @arg UART_BIT9_ENABLE
|
||||||
* @arg UART_RXIT_ENABLE
|
* @arg UART_RXIT_ENABLE
|
||||||
|
@ -80,7 +80,7 @@ WEAK void HAL_UART_MspInit(struct uart_handle *huart)
|
||||||
* @arg UART_CLK_SRC1
|
* @arg UART_CLK_SRC1
|
||||||
* @arg UART_1LINE_ENABLE
|
* @arg UART_1LINE_ENABLE
|
||||||
* @arg UART_RX_ENABLE
|
* @arg UART_RX_ENABLE
|
||||||
* @param param
|
* @param param
|
||||||
* @arg HAL_DISABLE
|
* @arg HAL_DISABLE
|
||||||
* @arg HAL_ENABLE
|
* @arg HAL_ENABLE
|
||||||
*/
|
*/
|
||||||
|
@ -95,7 +95,7 @@ void hal_uart_control(hal_sfr_t uartx, uint32_t cntl, uint32_t param)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Send a character
|
* @brief Send a character
|
||||||
*
|
*
|
||||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||||
* @param data The characters that need to be sent
|
* @param data The characters that need to be sent
|
||||||
*/
|
*/
|
||||||
|
@ -106,7 +106,7 @@ void hal_uart_write(hal_sfr_t uartx, uint8_t data)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Receive a character.
|
* @brief Receive a character.
|
||||||
*
|
*
|
||||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||||
* @return uint8_t Received character.
|
* @return uint8_t Received character.
|
||||||
*/
|
*/
|
||||||
|
@ -117,12 +117,12 @@ uint8_t hal_uart_read(hal_sfr_t uartx)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Get the UART flag.
|
* @brief Get the UART flag.
|
||||||
*
|
*
|
||||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||||
* @param flag
|
* @param flag
|
||||||
* @arg UART_FLAG_RXPND
|
* @arg UART_FLAG_RXPND
|
||||||
* @arg UART_FLAG_TXPND
|
* @arg UART_FLAG_TXPND
|
||||||
* @return uint32_t
|
* @return uint32_t
|
||||||
*/
|
*/
|
||||||
uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag)
|
uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag)
|
||||||
{
|
{
|
||||||
|
@ -132,9 +132,9 @@ uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Clear the UART flag.
|
* @brief Clear the UART flag.
|
||||||
*
|
*
|
||||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||||
* @param flag
|
* @param flag
|
||||||
* @arg UART_FLAG_RXPND
|
* @arg UART_FLAG_RXPND
|
||||||
* @arg UART_FLAG_TXPND
|
* @arg UART_FLAG_TXPND
|
||||||
*/
|
*/
|
||||||
|
@ -145,7 +145,7 @@ void hal_uart_clrflag(hal_sfr_t uartx, uint32_t flag)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Configure the UART peripheral.
|
* @brief Configure the UART peripheral.
|
||||||
*
|
*
|
||||||
* @param huart UART handle.
|
* @param huart UART handle.
|
||||||
*/
|
*/
|
||||||
void uart_config_all(struct uart_handle *huart)
|
void uart_config_all(struct uart_handle *huart)
|
||||||
|
|
|
@ -17,18 +17,18 @@ typedef enum
|
||||||
IRQ_SW_VECTOR = 2,
|
IRQ_SW_VECTOR = 2,
|
||||||
IRQ_TMR0_VECTOR = 3,
|
IRQ_TMR0_VECTOR = 3,
|
||||||
IRQ_TMR1_VECTOR = 4,
|
IRQ_TMR1_VECTOR = 4,
|
||||||
IRQ_TMR2_4_5_VECTOR = 5, /*!< Timer 2, 4 and 5 Interrupt */
|
IRQ_TMR2_4_5_VECTOR = 5, /*!< Timer 2, 4 and 5 Interrupt */
|
||||||
IRQ_IRRX_VECTOR = 6, /*!< Timer 3 and IR receiver Interrupt */
|
IRQ_IRRX_VECTOR = 6, /*!< Timer 3 and IR receiver Interrupt */
|
||||||
IRQ_USB_VECTOR = 7,
|
IRQ_USB_VECTOR = 7,
|
||||||
IRQ_SD_VECTOR = 8,
|
IRQ_SD_VECTOR = 8,
|
||||||
IRQ_AUBUF0_1_VECTOR = 9, /*!< Audio buffer 0 and 1 Interrupt */
|
IRQ_AUBUF0_1_VECTOR = 9, /*!< Audio buffer 0 and 1 Interrupt */
|
||||||
IRQ_SDADC_VECTOR = 10,
|
IRQ_SDADC_VECTOR = 10,
|
||||||
IRQ_AUDEC_VECTOR = 11, /*!< Audio codec, SBC encode and AEC FFT Interrupt */
|
IRQ_AUDEC_VECTOR = 11, /*!< Audio codec, SBC encode and AEC FFT Interrupt */
|
||||||
IRQ_SRC_VECTOR = 12, /*!< SRC, PLC and CVSD Interrupt */
|
IRQ_SRC_VECTOR = 12, /*!< SRC, PLC and CVSD Interrupt */
|
||||||
IRQ_FM_SPDIF_VECTOR = 13, /*!< FM TX, RX and SPDIF RX Interrupt */
|
IRQ_FM_SPDIF_VECTOR = 13, /*!< FM TX, RX and SPDIF RX Interrupt */
|
||||||
IRQ_UART0_2_VECTOR = 14, /*!< UART 0 to 2 Interrupt */
|
IRQ_UART0_2_VECTOR = 14, /*!< UART 0 to 2 Interrupt */
|
||||||
IRQ_HSUART_VECTOR = 15,
|
IRQ_HSUART_VECTOR = 15,
|
||||||
IRQ_RTC_VECTOR = 16, /*!< RTC, LVD and WDT Interrupt */
|
IRQ_RTC_VECTOR = 16, /*!< RTC, LVD and WDT Interrupt */
|
||||||
IRQ_I2S_VECTOR = 17,
|
IRQ_I2S_VECTOR = 17,
|
||||||
IRQ_TOTAL_NUM = 23,
|
IRQ_TOTAL_NUM = 23,
|
||||||
} irq_type;
|
} irq_type;
|
||||||
|
|
Loading…
Reference in New Issue