diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c index 44f7c24167..12ebf98669 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2020-01-15 Leo first version + * 2021-08-20 breo.com first version */ #include diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.h index 38f06c3144..69ae05bcba 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.h +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_adc.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-12-07 Leo first version + * 2021-08-20 breo.com first version */ #ifndef __ADC_CONFIG_H__ diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_common.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_common.c index bc653ca6a2..b7bae8bf2c 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_common.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_common.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-7 SummerGift first version + * 2021-08-20 breo.com first version */ #include "drv_common.h" diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_common.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_common.h index 5b9a9e61ca..9f053e4a07 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_common.h +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_common.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-7 SummerGift first version + * 2021-08-20 breo.com first version */ #ifndef __DRV_COMMON_H__ diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_flash.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_flash.c index 45b9b6956c..85839243c8 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_flash.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_flash.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2021-02-09 shelton the first version + * 2021-08-20 breo.com first version */ #include diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_flash.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_flash.h index ef4b1c716b..caac8795cb 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_flash.h +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_flash.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2021-02-09 shelton the first version + * 2021-08-20 breo.com first version */ #ifndef __DRV_FLASH_H__ diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c index 71c41848c7..93ed12ea86 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2017-10-20 ZYH the first version + * 2021-08-20 breo.com first version */ #include "drv_gpio.h" diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c index dede483e54..688186e920 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2020-03-16 Leo first version + * 2021-08-20 breo.com first version */ #include @@ -18,255 +18,257 @@ #ifdef BSP_USING_HWTIMER enum { -#ifdef BSP_USING_HWTMR1 - TMR1_INDEX, +#ifdef BSP_USING_HWTIM1 + TIM1_INDEX, #endif -#ifdef BSP_USING_HWTMR2 - TMR2_INDEX, +#ifdef BSP_USING_HWTIM2 + TIM2_INDEX, #endif -#ifdef BSP_USING_HWTMR3 - TMR3_INDEX, +#ifdef BSP_USING_HWTIM3 + TIM3_INDEX, #endif -#ifdef BSP_USING_HWTMR4 - TMR4_INDEX, +#ifdef BSP_USING_HWTIM4 + TIM4_INDEX, #endif -#ifdef BSP_USING_HWTMR5 - TMR5_INDEX, +#ifdef BSP_USING_HWTIM5 + TIM5_INDEX, #endif -#ifdef BSP_USING_HWTMR6 - TMR6_INDEX, +#ifdef BSP_USING_HWTIM6 + TIM6_INDEX, #endif -#ifdef BSP_USING_HWTMR7 - TMR7_INDEX, +#ifdef BSP_USING_HWTIM7 + TIM7_INDEX, #endif -#ifdef BSP_USING_HW_TMR8 - TMR8_INDEX, +#ifdef BSP_USING_HW_TIM8 + TIM8_INDEX, #endif -#ifdef BSP_USING_HWTMR9 - TMR9_INDEX, +#ifdef BSP_USING_HWTIM9 + TIM9_INDEX, #endif -#ifdef BSP_USING_HWTMR10 - TMR10_INDEX, +#ifdef BSP_USING_HWTIM10 + TIM10_INDEX, #endif -#ifdef BSP_USING_HWTMR11 - TMR11_INDEX, +#ifdef BSP_USING_HWTIM11 + TIM11_INDEX, #endif -#ifdef BSP_USING_HWTMR12 - TMR12_INDEX, +#ifdef BSP_USING_HWTIM12 + TIM12_INDEX, #endif -#ifdef BSP_USING_HWTMR13 - TMR13_INDEX, +#ifdef BSP_USING_HWTIM13 + TIM13_INDEX, #endif -#ifdef BSP_USING_HWTMR14 - TMR14_INDEX, +#ifdef BSP_USING_HWTIM14 + TIM14_INDEX, #endif -#ifdef BSP_USING_HWTMR15 - TMR15_INDEX, +#ifdef BSP_USING_HWTIM15 + TIM15_INDEX, #endif }; -struct at32_hwtimer +struct n32_hwtimer { - rt_hwtimer_t time_device; - TMR_Type* tim_handle; - IRQn_Type tim_irqn; - char *name; + rt_hwtimer_t time_device; + TIM_Module* tim_handle; + IRQn_Type tim_irqn; + char *name; }; -static struct at32_hwtimer at32_hwtimer_obj[] = +static struct n32_hwtimer n32_hwtimer_obj[] = { -#ifdef BSP_USING_HWTMR1 - TMR1_CONFIG, +#ifdef BSP_USING_HWTIM1 + TIM1_CONFIG, #endif -#ifdef BSP_USING_HWTMR2 - TMR2_CONFIG, +#ifdef BSP_USING_HWTIM2 + TIM2_CONFIG, #endif -#ifdef BSP_USING_HWTMR3 - TMR3_CONFIG, +#ifdef BSP_USING_HWTIM3 + TIM3_CONFIG, #endif -#ifdef BSP_USING_HWTMR4 - TMR4_CONFIG, +#ifdef BSP_USING_HWTIM4 + TIM4_CONFIG, #endif -#ifdef BSP_USING_HWTMR5 - TMR5_CONFIG, +#ifdef BSP_USING_HWTIM5 + TIM5_CONFIG, #endif -#ifdef BSP_USING_HWTMR6 - TMR6_CONFIG, +#ifdef BSP_USING_HWTIM6 + TIM6_CONFIG, #endif -#ifdef BSP_USING_HWTMR7 - TMR7_CONFIG, +#ifdef BSP_USING_HWTIM7 + TIM7_CONFIG, #endif -#ifdef BSP_USING_HWTMR8 - TMR8_CONFIG, +#ifdef BSP_USING_HWTIM8 + TIM8_CONFIG, #endif -#ifdef BSP_USING_HWTMR9 - TMR9_CONFIG, +#ifdef BSP_USING_HWTIM9 + TIM9_CONFIG, #endif -#ifdef BSP_USING_HWTMR10 - TMR10_CONFIG, +#ifdef BSP_USING_HWTIM10 + TIM10_CONFIG, #endif -#ifdef BSP_USING_HWTMR11 - TMR11_CONFIG, +#ifdef BSP_USING_HWTIM11 + TIM11_CONFIG, #endif -#ifdef BSP_USING_HWTMR12 - TMR12_CONFIG, +#ifdef BSP_USING_HWTIM12 + TIM12_CONFIG, #endif -#ifdef BSP_USING_HWTMR13 - TMR13_CONFIG, +#ifdef BSP_USING_HWTIM13 + TIM13_CONFIG, #endif -#ifdef BSP_USING_HWTMR14 - TMR14_CONFIG, +#ifdef BSP_USING_HWTIM14 + TIM14_CONFIG, #endif -#ifdef BSP_USING_HWTMR15 - TMR15_CONFIG, +#ifdef BSP_USING_HWTIM15 + TIM15_CONFIG, #endif }; -static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void n32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) { - RCC_ClockType RCC_ClockStruct; - TMR_TimerBaseInitType TMR_TMReBaseStructure; + RCC_ClocksType RCC_ClockStruct; + TIM_TimeBaseInitType TIM_TimeBaseStructure; NVIC_InitType NVIC_InitStructure; uint32_t prescaler_value = 0; - TMR_Type *tim = RT_NULL; - struct at32_hwtimer *tim_device = RT_NULL; + TIM_Module *tim = RT_NULL; + struct n32_hwtimer *tim_device = RT_NULL; RT_ASSERT(timer != RT_NULL); if (state) { - tim = (TMR_Type *)timer->parent.user_data; - tim_device = (struct at32_hwtimer *)timer; + tim = (TIM_Module *)timer->parent.user_data; + tim_device = (struct n32_hwtimer *)timer; /* timer clock enable */ - at32_msp_hwtmr_init(tim); + n32_msp_hwtim_init(tim); /* timer init */ - RCC_GetClocksFreq(&RCC_ClockStruct); + RCC_GetClocksFreqValue(&RCC_ClockStruct); /* Set timer clock is 1Mhz */ - prescaler_value = (uint32_t)(RCC_ClockStruct.SYSCLK_Freq / 10000) - 1; + prescaler_value = (uint32_t)(RCC_ClockStruct.SysclkFreq / 10000) - 1; - TMR_TMReBaseStructure.TMR_Period = 10000 - 1; - TMR_TMReBaseStructure.TMR_DIV = prescaler_value; - TMR_TMReBaseStructure.TMR_ClockDivision = TMR_CKD_DIV1; - TMR_TMReBaseStructure.TMR_RepetitionCounter = 0; + TIM_TimeBaseStructure.Period = 10000 - 1; + rt_kprintf("Period=[%d]", TIM_TimeBaseStructure.Period); + TIM_TimeBaseStructure.Prescaler = prescaler_value; + rt_kprintf("Prescaler=[%d]", TIM_TimeBaseStructure.Prescaler); + TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1; + TIM_TimeBaseStructure.RepetCnt = 0; if (timer->info->cntmode == HWTIMER_CNTMODE_UP) { - TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Up; + TIM_TimeBaseStructure.CntMode = TIM_CNT_MODE_UP; } else { - TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Down; + TIM_TimeBaseStructure.CntMode = TIM_CNT_MODE_DOWN; } - TMR_TimeBaseInit(tim, &TMR_TMReBaseStructure); + TIM_InitTimeBase(tim, &TIM_TimeBaseStructure); - /* Enable the TMRx global Interrupt */ + /* Enable the TIMx global Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = tim_device->tim_irqn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); - TMR_INTConfig(tim, TMR_INT_Overflow ,ENABLE); - TMR_ClearITPendingBit(tim, TMR_INT_Overflow); + TIM_ConfigInt(tim, TIM_INT_UPDATE ,ENABLE); + TIM_ClrIntPendingBit(tim, TIM_INT_UPDATE); LOG_D("%s init success", tim_device->name); } } -static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t n32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) { rt_err_t result = RT_EOK; - TMR_Type *tim = RT_NULL; + TIM_Module *tim = RT_NULL; RT_ASSERT(timer != RT_NULL); - tim = (TMR_Type *)timer->parent.user_data; + tim = (TIM_Module *)timer->parent.user_data; /* set tim cnt */ - TMR_SetCounter(tim, 0); + TIM_SetCnt(tim, 0); /* set tim arr */ - TMR_SetAutoreload(tim, t - 1); + TIM_SetAutoReload(tim, t - 1); if (opmode == HWTIMER_MODE_ONESHOT) { /* set timer to single mode */ - TMR_SelectOnePulseMode(tim, TMR_OPMode_Once); + TIM_SelectOnePulseMode(tim, TIM_OPMODE_SINGLE); } else { - TMR_SelectOnePulseMode(tim, TMR_OPMode_Repetitive); + TIM_SelectOnePulseMode(tim, TIM_OPMODE_REPET); } /* start timer */ - TMR_Cmd(tim, ENABLE); + TIM_Enable(tim, ENABLE); return result; } -static void at32_timer_stop(rt_hwtimer_t *timer) +static void n32_timer_stop(rt_hwtimer_t *timer) { - TMR_Type *tim = RT_NULL; + TIM_Module *tim = RT_NULL; RT_ASSERT(timer != RT_NULL); - tim = (TMR_Type *)timer->parent.user_data; + tim = (TIM_Module *)timer->parent.user_data; /* stop timer */ - TMR_Cmd(tim, ENABLE); + TIM_Enable(tim, DISABLE); /* set tim cnt */ - TMR_SetCounter(tim, 0); + TIM_SetCnt(tim, 0); } -static rt_uint32_t at32_timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t n32_timer_counter_get(rt_hwtimer_t *timer) { - TMR_Type *tim = RT_NULL; + TIM_Module *tim = RT_NULL; RT_ASSERT(timer != RT_NULL); - tim = (TMR_Type *)timer->parent.user_data; + tim = (TIM_Module *)timer->parent.user_data; return tim->CNT; } -static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t n32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) { - RCC_ClockType RCC_ClockStruct; - TMR_Type *tim = RT_NULL; + RCC_ClocksType RCC_ClockStruct; + TIM_Module *tim = RT_NULL; rt_err_t result = RT_EOK; RT_ASSERT(timer != RT_NULL); RT_ASSERT(arg != RT_NULL); - tim = (TMR_Type *)timer->parent.user_data; + tim = (TIM_Module *)timer->parent.user_data; switch(cmd) { @@ -279,11 +281,11 @@ static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) freq = *((rt_uint32_t *)arg); /* time init */ - RCC_GetClocksFreq(&RCC_ClockStruct); + RCC_GetClocksFreqValue(&RCC_ClockStruct); - val = RCC_ClockStruct.SYSCLK_Freq / freq; + val = RCC_ClockStruct.SysclkFreq / freq; - TMR_DIVConfig(tim, val - 1, TMR_DIVReloadMode_Immediate); + TIM_ConfigPrescaler(tim, val - 1, TIM_PSC_RELOAD_MODE_IMMEDIATE); } break; default: @@ -296,27 +298,27 @@ static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static const struct rt_hwtimer_info _info = TMR_DEV_INFO_CONFIG; +static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; static const struct rt_hwtimer_ops _ops = { - .init = at32_timer_init, - .start = at32_timer_start, - .stop = at32_timer_stop, - .count_get = at32_timer_counter_get, - .control = at32_timer_ctrl, + .init = n32_timer_init, + .start = n32_timer_start, + .stop = n32_timer_stop, + .count_get = n32_timer_counter_get, + .control = n32_timer_ctrl, }; -#ifdef BSP_USING_HWTMR2 -void TMR2_GLOBAL_IRQHandler(void) +#ifdef BSP_USING_HWTIM2 +void TIM2_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - if(TMR_GetINTStatus(TMR2, TMR_INT_Overflow) == SET) + if(TIM_GetIntStatus(TIM2, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR2_INDEX].time_device); - TMR_ClearITPendingBit(TMR2, TMR_INT_Overflow); + rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM2_INDEX].time_device); + TIM_ClrIntPendingBit(TIM2, TIM_INT_UPDATE); } /* leave interrupt */ @@ -324,17 +326,17 @@ void TMR2_GLOBAL_IRQHandler(void) } #endif -#ifdef BSP_USING_HWTMR3 -void TMR3_GLOBAL_IRQHandler(void) +#ifdef BSP_USING_HWTIM3 +void TIM3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - if(TMR_GetINTStatus(TMR3, TMR_INT_Overflow) == SET) + if(TIM_GetIntStatus(TIM3, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR3_INDEX].time_device); - TMR_ClearITPendingBit(TMR3, TMR_INT_Overflow); + rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM3_INDEX].time_device); + TIM_ClrIntPendingBit(TIM3, TIM_INT_UPDATE); } /* leave interrupt */ @@ -342,17 +344,17 @@ void TMR3_GLOBAL_IRQHandler(void) } #endif -#ifdef BSP_USING_HWTMR4 -void TMR4_GLOBAL_IRQHandler(void) +#ifdef BSP_USING_HWTIM4 +void TIM4_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - if(TMR_GetINTStatus(TMR4, TMR_INT_Overflow) == SET) + if(TIM_GetIntStatus(TIM4, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR4_INDEX].time_device); - TMR_ClearITPendingBit(TMR4, TMR_INT_Overflow); + rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM4_INDEX].time_device); + TIM_ClrIntPendingBit(TIM4, TIM_INT_UPDATE); } /* leave interrupt */ @@ -360,17 +362,53 @@ void TMR4_GLOBAL_IRQHandler(void) } #endif -#ifdef BSP_USING_HWTMR5 -void TMR5_GLOBAL_IRQHandler(void) +#ifdef BSP_USING_HWTIM5 +void TIM5_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - if(TMR_GetINTStatus(TMR5, TMR_INT_Overflow) == SET) + if(TIM_GetIntStatus(TIM5, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR5_INDEX].time_device); - TMR_ClearITPendingBit(TMR5, TMR_INT_Overflow); + rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM5_INDEX].time_device); + TIM_ClrIntPendingBit(TIM5, TIM_INT_UPDATE); + + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_HWTIM6 +void TIM6_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if(TIM_GetIntStatus(TIM6, TIM_INT_UPDATE) == SET) + { + + rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM6_INDEX].time_device); + TIM_ClrIntPendingBit(TIM6, TIM_INT_UPDATE); + + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_HWTIM7 +void TIM7_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if(TIM_GetIntStatus(TIM7, TIM_INT_UPDATE) == SET) + { + + rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM7_INDEX].time_device); + TIM_ClrIntPendingBit(TIM7, TIM_INT_UPDATE); } /* leave interrupt */ @@ -383,17 +421,17 @@ static int rt_hw_hwtimer_init(void) int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(at32_hwtimer_obj) / sizeof(at32_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(n32_hwtimer_obj) / sizeof(n32_hwtimer_obj[0]); i++) { - at32_hwtimer_obj[i].time_device.info = &_info; - at32_hwtimer_obj[i].time_device.ops = &_ops; - if (rt_device_hwtimer_register(&at32_hwtimer_obj[i].time_device, at32_hwtimer_obj[i].name, at32_hwtimer_obj[i].tim_handle) == RT_EOK) + n32_hwtimer_obj[i].time_device.info = &_info; + n32_hwtimer_obj[i].time_device.ops = &_ops; + if (rt_device_hwtimer_register(&n32_hwtimer_obj[i].time_device, n32_hwtimer_obj[i].name, n32_hwtimer_obj[i].tim_handle) == RT_EOK) { - LOG_D("%s register success", at32_hwtimer_obj[i].name); + LOG_D("%s register success", n32_hwtimer_obj[i].name); } else { - LOG_E("%s register failed", at32_hwtimer_obj[i].name); + LOG_E("%s register failed", n32_hwtimer_obj[i].name); result = -RT_ERROR; } } diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h index 9acfb8d468..ec2107a86e 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h @@ -5,11 +5,11 @@ * * Change Logs: * Date Author Notes - * 2020-03-16 Leo first version + * 2021-08-20 breo.com first version */ -#ifndef __TMR_CONFIG_H__ -#define __TMR_CONFIG_H__ +#ifndef __TIM_CONFIG_H__ +#define __TIM_CONFIG_H__ #include #include @@ -18,8 +18,8 @@ extern "C" { #endif -#ifndef TMR_DEV_INFO_CONFIG -#define TMR_DEV_INFO_CONFIG \ +#ifndef TIM_DEV_INFO_CONFIG +#define TIM_DEV_INFO_CONFIG \ { \ .maxfreq = 1000000, \ .minfreq = 4000, \ @@ -28,53 +28,76 @@ extern "C" { } #endif /* TIM_DEV_INFO_CONFIG */ -#ifdef BSP_USING_HWTMR2 -#ifndef TMR2_CONFIG -#define TMR2_CONFIG \ +#ifdef BSP_USING_HWTIM2 +#ifndef TIM2_CONFIG +#define TIM2_CONFIG \ { \ - .tim_handle = TMR2, \ - .tim_irqn = TMR2_GLOBAL_IRQn, \ + .tim_handle = TIM2, \ + .tim_irqn = TIM2_IRQn, \ .name = "timer2", \ } -#endif /* TMR2_CONFIG */ -#endif /* BSP_USING_HWTMR2 */ +#endif /* TIM2_CONFIG */ +#endif /* BSP_USING_HWTIM2 */ -#ifdef BSP_USING_HWTMR3 -#ifndef TMR3_CONFIG -#define TMR3_CONFIG \ +#ifdef BSP_USING_HWTIM3 +#ifndef TIM3_CONFIG +#define TIM3_CONFIG \ { \ - .tim_handle = TMR3, \ - .tim_irqn = TMR3_GLOBAL_IRQn, \ + .tim_handle = TIM3, \ + .tim_irqn = TIM3_IRQn, \ .name = "timer3", \ } -#endif /* TMR3_CONFIG */ -#endif /* BSP_USING_HWTMR3 */ +#endif /* TIM3_CONFIG */ +#endif /* BSP_USING_HWTIM3 */ -#ifdef BSP_USING_HWTMR4 -#ifndef TMR4_CONFIG -#define TMR4_CONFIG \ +#ifdef BSP_USING_HWTIM4 +#ifndef TIM4_CONFIG +#define TIM4_CONFIG \ { \ - .tim_handle = TMR4, \ - .tim_irqn = TMR4_GLOBAL_IRQn, \ + .tim_handle = TIM4, \ + .tim_irqn = TIM4_IRQn, \ .name = "timer4", \ } -#endif /* TMR4_CONFIG */ -#endif /* BSP_USING_HWTMR4 */ +#endif /* TIM4_CONFIG */ +#endif /* BSP_USING_HWTIM4 */ -#ifdef BSP_USING_HWTMR5 -#ifndef TMR5_CONFIG -#define TMR5_CONFIG \ +#ifdef BSP_USING_HWTIM5 +#ifndef TIM5_CONFIG +#define TIM5_CONFIG \ { \ - .tim_handle = TMR5, \ - .tim_irqn = TMR5_GLOBAL_IRQn, \ + .tim_handle = TIM5, \ + .tim_irqn = TIM5_IRQn, \ .name = "timer5", \ } -#endif /* TMR5_CONFIG */ -#endif /* BSP_USING_HWTMR5 */ +#endif /* TIM5_CONFIG */ +#endif /* BSP_USING_HWTIM5 */ + +#ifdef BSP_USING_HWTIM6 +#ifndef TIM6_CONFIG +#define TIM6_CONFIG \ + { \ + .tim_handle = TIM6, \ + .tim_irqn = TIM6_IRQn, \ + .name = "timer6", \ + } +#endif /* TIM6_CONFIG */ +#endif /* BSP_USING_HWTIM6 */ + +#ifdef BSP_USING_HWTIM7 +#ifndef TIM7_CONFIG +#define TIM7_CONFIG \ + { \ + .tim_handle = TIM7, \ + .tim_irqn = TIM7_IRQn, \ + .name = "timer7", \ + } +#endif /* TIM7_CONFIG */ +#endif /* BSP_USING_HWTIM7 */ + #ifdef __cplusplus } #endif -#endif /* __TMR_CONFIG_H__ */ +#endif /* __TIM_CONFIG_H__ */ diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c index 7cb401876d..31f014b24b 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c @@ -16,36 +16,17 @@ * 2016-05-13 armink add DMA Rx mode * 2017-01-19 aubr.cool add interrupt Tx mode * 2017-04-13 aubr.cool correct Rx parity err + * 2021-08-20 breo.com first version */ -#include "drv_usart.h" #include #include -#include "n32g45x.h" +#include +#include "drv_usart.h" #define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n)) #define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n)) -/* USART1 */ -#define UART1_GPIO_TX GPIO_PIN_9 -#define UART1_GPIO_RX GPIO_PIN_10 -#define UART1_GPIO GPIOA - -/* USART2 */ -#define UART2_GPIO_TX GPIO_PIN_2 -#define UART2_GPIO_RX GPIO_PIN_3 -#define UART2_GPIO GPIOA - -/* USART3_REMAP[1:0] = 00 */ -#define UART3_GPIO_TX GPIO_PIN_10 -#define UART3_GPIO_RX GPIO_PIN_11 -#define UART3_GPIO GPIOB - -/* USART4 */ -#define UART4_GPIO_TX GPIO_PIN_10 -#define UART4_GPIO_RX GPIO_PIN_11 -#define UART4_GPIO GPIOC - struct n32_uart { USART_Module *uart_device; @@ -77,6 +58,9 @@ static rt_err_t n32_configure(struct rt_serial_device *serial, struct serial_con RT_ASSERT(cfg != RT_NULL); uart = (struct n32_uart *)serial->parent.user_data; + RT_ASSERT(uart != RT_NULL); + RT_ASSERT((uart->uart_device) != RT_NULL); + n32_msp_usart_init(uart->uart_device); USART_InitStructure.BaudRate = cfg->baud_rate; @@ -303,7 +287,7 @@ static const struct rt_uart_ops n32_uart_ops = n32_getc, }; -#if defined(RT_USING_UART1) +#if defined(BSP_USING_UART1) /* UART1 device driver structure */ struct n32_uart uart1 = { @@ -340,9 +324,9 @@ void DMA1_Channel5_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif /* RT_USING_UART1 */ +#endif /* BSP_USING_UART1 */ -#if defined(RT_USING_UART2) +#if defined(BSP_USING_UART2) /* UART2 device driver structure */ struct n32_uart uart2 = { @@ -379,9 +363,9 @@ void DMA1_Channel6_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif /* RT_USING_UART2 */ +#endif /* BSP_USING_UART2 */ -#if defined(RT_USING_UART3) +#if defined(BSP_USING_UART3) /* UART3 device driver structure */ struct n32_uart uart3 = { @@ -418,9 +402,9 @@ void DMA1_Channel3_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif /* RT_USING_UART3 */ +#endif /* BSP_USING_UART3 */ -#if defined(RT_USING_UART4) +#if defined(BSP_USING_UART4) /* UART4 device driver structure */ struct n32_uart uart4 = { @@ -457,89 +441,7 @@ void DMA2_Channel3_IRQHandler(void) /* leave interrupt */ rt_interrupt_leave(); } -#endif /* RT_USING_UART4 */ - -static void RCC_Configuration(void) -{ -#if defined(RT_USING_UART1) - /* Enable UART GPIO clocks */ - RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA | RCC_APB2_PERIPH_AFIO, ENABLE); - /* Enable UART clock */ - RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_USART1, ENABLE); -#endif /* RT_USING_UART1 */ - -#if defined(RT_USING_UART2) - /* Enable UART GPIO clocks */ - RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA | RCC_APB2_PERIPH_AFIO, ENABLE); - /* Enable UART clock */ - RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_USART2, ENABLE); -#endif /* RT_USING_UART2 */ - -#if defined(RT_USING_UART3) - /* Enable UART GPIO clocks */ - RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE); - /* Enable UART clock */ - RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_USART3, ENABLE); -#endif /* RT_USING_UART3 */ - -#if defined(RT_USING_UART4) - /* Enable UART GPIO clocks */ - RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC | RCC_APB2_PERIPH_AFIO, ENABLE); - /* Enable UART clock */ - RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_UART4, ENABLE); -#endif /* RT_USING_UART4 */ -} - -static void GPIO_Configuration(void) -{ - GPIO_InitType GPIO_InitStructure; - - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; - -#if defined(RT_USING_UART1) - /* Configure USART Rx/tx PIN */ - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_InitStructure.Pin = UART1_GPIO_RX; - GPIO_InitPeripheral(UART1_GPIO, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.Pin = UART1_GPIO_TX; - GPIO_InitPeripheral(UART1_GPIO, &GPIO_InitStructure); -#endif /* RT_USING_UART1 */ - -#if defined(RT_USING_UART2) - /* Configure USART Rx/tx PIN */ - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_InitStructure.Pin = UART2_GPIO_RX; - GPIO_InitPeripheral(UART2_GPIO, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.Pin = UART2_GPIO_TX; - GPIO_InitPeripheral(UART2_GPIO, &GPIO_InitStructure); -#endif /* RT_USING_UART2 */ - -#if defined(RT_USING_UART3) - /* Configure USART Rx/tx PIN */ - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_InitStructure.Pin = UART3_GPIO_RX; - GPIO_InitPeripheral(UART3_GPIO, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.Pin = UART3_GPIO_TX; - GPIO_InitPeripheral(UART3_GPIO, &GPIO_InitStructure); -#endif /* RT_USING_UART3 */ - -#if defined(RT_USING_UART4) - /* Configure USART Rx/tx PIN */ - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_InitStructure.Pin = UART4_GPIO_RX; - GPIO_InitPeripheral(UART4_GPIO, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.Pin = UART4_GPIO_TX; - GPIO_InitPeripheral(UART4_GPIO, &GPIO_InitStructure); -#endif /* RT_USING_UART4 */ -} +#endif /* BSP_USING_UART4 */ static void NVIC_Configuration(struct n32_uart* uart) { @@ -601,10 +503,7 @@ int rt_hw_usart_init(void) struct n32_uart* uart; struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; - RCC_Configuration(); - GPIO_Configuration(); - -#if defined(RT_USING_UART1) +#if defined(BSP_USING_UART1) uart = &uart1; config.baud_rate = BAUD_RATE_115200; @@ -618,9 +517,9 @@ int rt_hw_usart_init(void) RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); -#endif /* RT_USING_UART1 */ +#endif /* BSP_USING_UART1 */ -#if defined(RT_USING_UART2) +#if defined(BSP_USING_UART2) uart = &uart2; config.baud_rate = BAUD_RATE_115200; @@ -634,9 +533,9 @@ int rt_hw_usart_init(void) RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); -#endif /* RT_USING_UART2 */ +#endif /* BSP_USING_UART2 */ -#if defined(RT_USING_UART3) +#if defined(BSP_USING_UART3) uart = &uart3; config.baud_rate = BAUD_RATE_115200; @@ -651,9 +550,9 @@ int rt_hw_usart_init(void) RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); -#endif /* RT_USING_UART3 */ +#endif /* BSP_USING_UART3 */ -#if defined(RT_USING_UART4) +#if defined(BSP_USING_UART4) uart = &uart4; config.baud_rate = BAUD_RATE_115200; @@ -668,7 +567,7 @@ int rt_hw_usart_init(void) RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX, uart); -#endif /* RT_USING_UART4 */ +#endif /* BSP_USING_UART4 */ return RT_EOK; } diff --git a/bsp/n32g452xx/n32g452xx-mini-system/.config b/bsp/n32g452xx/n32g452xx-mini-system/.config deleted file mode 100644 index 61e219e308..0000000000 --- a/bsp/n32g452xx/n32g452xx-mini-system/.config +++ /dev/null @@ -1,581 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# RT-Thread Configuration -# - -# -# RT-Thread Kernel -# -CONFIG_RT_NAME_MAX=8 -# CONFIG_RT_USING_ARCH_DATA_TYPE is not set -# CONFIG_RT_USING_SMP is not set -CONFIG_RT_ALIGN_SIZE=4 -# CONFIG_RT_THREAD_PRIORITY_8 is not set -CONFIG_RT_THREAD_PRIORITY_32=y -# CONFIG_RT_THREAD_PRIORITY_256 is not set -CONFIG_RT_THREAD_PRIORITY_MAX=32 -CONFIG_RT_TICK_PER_SECOND=100 -CONFIG_RT_USING_OVERFLOW_CHECK=y -CONFIG_RT_USING_HOOK=y -CONFIG_RT_USING_IDLE_HOOK=y -CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 -CONFIG_IDLE_THREAD_STACK_SIZE=256 -CONFIG_RT_USING_TIMER_SOFT=y -CONFIG_RT_TIMER_THREAD_PRIO=4 -CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 - -# -# kservice optimization -# -# CONFIG_RT_KSERVICE_USING_STDLIB is not set -# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set -# CONFIG_RT_USING_ASM_MEMCPY is not set -CONFIG_RT_DEBUG=y -# CONFIG_RT_DEBUG_COLOR is not set -# CONFIG_RT_DEBUG_INIT_CONFIG is not set -# CONFIG_RT_DEBUG_THREAD_CONFIG is not set -# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set -# CONFIG_RT_DEBUG_IPC_CONFIG is not set -# CONFIG_RT_DEBUG_TIMER_CONFIG is not set -# CONFIG_RT_DEBUG_IRQ_CONFIG is not set -# CONFIG_RT_DEBUG_MEM_CONFIG is not set -# CONFIG_RT_DEBUG_SLAB_CONFIG is not set -# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set -# CONFIG_RT_DEBUG_MODULE_CONFIG is not set - -# -# Inter-Thread communication -# -CONFIG_RT_USING_SEMAPHORE=y -CONFIG_RT_USING_MUTEX=y -CONFIG_RT_USING_EVENT=y -CONFIG_RT_USING_MAILBOX=y -CONFIG_RT_USING_MESSAGEQUEUE=y -# CONFIG_RT_USING_SIGNALS is not set - -# -# Memory Management -# -CONFIG_RT_USING_MEMPOOL=y -# CONFIG_RT_USING_MEMHEAP is not set -# CONFIG_RT_USING_NOHEAP is not set -CONFIG_RT_USING_SMALL_MEM=y -# CONFIG_RT_USING_SLAB is not set -# CONFIG_RT_USING_USERHEAP is not set -# CONFIG_RT_USING_MEMTRACE is not set -CONFIG_RT_USING_HEAP=y - -# -# Kernel Device Object -# -CONFIG_RT_USING_DEVICE=y -# CONFIG_RT_USING_DEVICE_OPS is not set -# CONFIG_RT_USING_INTERRUPT_INFO is not set -CONFIG_RT_USING_CONSOLE=y -CONFIG_RT_CONSOLEBUF_SIZE=128 -CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -# CONFIG_RT_PRINTF_LONGLONG is not set -CONFIG_RT_VER_NUM=0x40004 -# CONFIG_RT_USING_CPU_FFS is not set -# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set - -# -# RT-Thread Components -# -CONFIG_RT_USING_COMPONENTS_INIT=y -CONFIG_RT_USING_USER_MAIN=y -CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 -CONFIG_RT_MAIN_THREAD_PRIORITY=10 - -# -# C++ features -# -# CONFIG_RT_USING_CPLUSPLUS is not set - -# -# Command shell -# -CONFIG_RT_USING_FINSH=y -CONFIG_FINSH_THREAD_NAME="tshell" -CONFIG_FINSH_USING_HISTORY=y -CONFIG_FINSH_HISTORY_LINES=5 -CONFIG_FINSH_USING_SYMTAB=y -CONFIG_FINSH_USING_DESCRIPTION=y -# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set -CONFIG_FINSH_THREAD_PRIORITY=20 -CONFIG_FINSH_THREAD_STACK_SIZE=4096 -CONFIG_FINSH_CMD_SIZE=80 -# CONFIG_FINSH_USING_AUTH is not set -CONFIG_FINSH_USING_MSH=y -CONFIG_FINSH_USING_MSH_DEFAULT=y -# CONFIG_FINSH_USING_MSH_ONLY is not set -CONFIG_FINSH_ARG_MAX=10 - -# -# Device virtual file system -# -# CONFIG_RT_USING_DFS is not set - -# -# Device Drivers -# -CONFIG_RT_USING_DEVICE_IPC=y -CONFIG_RT_PIPE_BUFSZ=512 -# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set -CONFIG_RT_USING_SERIAL=y -CONFIG_RT_USING_SERIAL_V1=y -# CONFIG_RT_USING_SERIAL_V2 is not set -CONFIG_RT_SERIAL_USING_DMA=y -CONFIG_RT_SERIAL_RB_BUFSZ=64 -# CONFIG_RT_USING_CAN is not set -# CONFIG_RT_USING_HWTIMER is not set -# CONFIG_RT_USING_CPUTIME is not set -# CONFIG_RT_USING_I2C is not set -# CONFIG_RT_USING_PHY is not set -CONFIG_RT_USING_PIN=y -# CONFIG_RT_USING_ADC is not set -# CONFIG_RT_USING_DAC is not set -# CONFIG_RT_USING_PWM is not set -# CONFIG_RT_USING_MTD_NOR is not set -# CONFIG_RT_USING_MTD_NAND is not set -# CONFIG_RT_USING_PM is not set -# CONFIG_RT_USING_RTC is not set -# CONFIG_RT_USING_SDIO is not set -# CONFIG_RT_USING_SPI is not set -# CONFIG_RT_USING_WDT is not set -# CONFIG_RT_USING_AUDIO is not set -# CONFIG_RT_USING_SENSOR is not set -# CONFIG_RT_USING_TOUCH is not set -# CONFIG_RT_USING_HWCRYPTO is not set -# CONFIG_RT_USING_PULSE_ENCODER is not set -# CONFIG_RT_USING_INPUT_CAPTURE is not set -# CONFIG_RT_USING_WIFI is not set - -# -# Using USB -# -# CONFIG_RT_USING_USB_HOST is not set -# CONFIG_RT_USING_USB_DEVICE is not set - -# -# POSIX layer and C standard library -# -CONFIG_RT_USING_LIBC=y -# CONFIG_RT_USING_PTHREADS is not set -# CONFIG_RT_USING_MODULE is not set -CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 - -# -# Network -# - -# -# Socket abstraction layer -# -# CONFIG_RT_USING_SAL is not set - -# -# Network interface device -# -# CONFIG_RT_USING_NETDEV is not set - -# -# light weight TCP/IP stack -# -# CONFIG_RT_USING_LWIP is not set - -# -# AT commands -# -# CONFIG_RT_USING_AT is not set - -# -# VBUS(Virtual Software BUS) -# -# CONFIG_RT_USING_VBUS is not set - -# -# Utilities -# -# CONFIG_RT_USING_RYM is not set -# CONFIG_RT_USING_ULOG is not set -# CONFIG_RT_USING_UTEST is not set -# CONFIG_RT_USING_RT_LINK is not set - -# -# RT-Thread Utestcases -# -# CONFIG_RT_USING_UTESTCASES is not set - -# -# RT-Thread online packages -# - -# -# IoT - internet of things -# -# CONFIG_PKG_USING_LORAWAN_DRIVER is not set -# CONFIG_PKG_USING_PAHOMQTT is not set -# CONFIG_PKG_USING_UMQTT is not set -# CONFIG_PKG_USING_WEBCLIENT is not set -# CONFIG_PKG_USING_WEBNET is not set -# CONFIG_PKG_USING_MONGOOSE is not set -# CONFIG_PKG_USING_MYMQTT is not set -# CONFIG_PKG_USING_KAWAII_MQTT is not set -# CONFIG_PKG_USING_BC28_MQTT is not set -# CONFIG_PKG_USING_WEBTERMINAL is not set -# CONFIG_PKG_USING_CJSON is not set -# CONFIG_PKG_USING_JSMN is not set -# CONFIG_PKG_USING_LIBMODBUS is not set -# CONFIG_PKG_USING_FREEMODBUS is not set -# CONFIG_PKG_USING_LJSON is not set -# CONFIG_PKG_USING_EZXML is not set -# CONFIG_PKG_USING_NANOPB is not set - -# -# Wi-Fi -# - -# -# Marvell WiFi -# -# CONFIG_PKG_USING_WLANMARVELL is not set - -# -# Wiced WiFi -# -# CONFIG_PKG_USING_WLAN_WICED is not set -# CONFIG_PKG_USING_RW007 is not set -# CONFIG_PKG_USING_COAP is not set -# CONFIG_PKG_USING_NOPOLL is not set -# CONFIG_PKG_USING_NETUTILS is not set -# CONFIG_PKG_USING_CMUX is not set -# CONFIG_PKG_USING_PPP_DEVICE is not set -# CONFIG_PKG_USING_AT_DEVICE is not set -# CONFIG_PKG_USING_ATSRV_SOCKET is not set -# CONFIG_PKG_USING_WIZNET is not set - -# -# IoT Cloud -# -# CONFIG_PKG_USING_ONENET is not set -# CONFIG_PKG_USING_GAGENT_CLOUD is not set -# CONFIG_PKG_USING_ALI_IOTKIT is not set -# CONFIG_PKG_USING_AZURE is not set -# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set -# CONFIG_PKG_USING_JIOT-C-SDK is not set -# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set -# CONFIG_PKG_USING_JOYLINK is not set -# CONFIG_PKG_USING_NIMBLE is not set -# CONFIG_PKG_USING_OTA_DOWNLOADER is not set -# CONFIG_PKG_USING_IPMSG is not set -# CONFIG_PKG_USING_LSSDP is not set -# CONFIG_PKG_USING_AIRKISS_OPEN is not set -# CONFIG_PKG_USING_LIBRWS is not set -# CONFIG_PKG_USING_TCPSERVER is not set -# CONFIG_PKG_USING_PROTOBUF_C is not set -# CONFIG_PKG_USING_DLT645 is not set -# CONFIG_PKG_USING_QXWZ is not set -# CONFIG_PKG_USING_SMTP_CLIENT is not set -# CONFIG_PKG_USING_ABUP_FOTA is not set -# CONFIG_PKG_USING_LIBCURL2RTT is not set -# CONFIG_PKG_USING_CAPNP is not set -# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set -# CONFIG_PKG_USING_AGILE_TELNET is not set -# CONFIG_PKG_USING_NMEALIB is not set -# CONFIG_PKG_USING_AGILE_JSMN is not set -# CONFIG_PKG_USING_PDULIB is not set -# CONFIG_PKG_USING_BTSTACK is not set -# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set -# CONFIG_PKG_USING_WAYZ_IOTKIT is not set -# CONFIG_PKG_USING_MAVLINK is not set -# CONFIG_PKG_USING_RAPIDJSON is not set -# CONFIG_PKG_USING_BSAL is not set -# CONFIG_PKG_USING_AGILE_MODBUS is not set -# CONFIG_PKG_USING_AGILE_FTP is not set -# CONFIG_PKG_USING_EMBEDDEDPROTO is not set - -# -# security packages -# -# CONFIG_PKG_USING_MBEDTLS is not set -# CONFIG_PKG_USING_libsodium is not set -# CONFIG_PKG_USING_TINYCRYPT is not set -# CONFIG_PKG_USING_TFM is not set -# CONFIG_PKG_USING_YD_CRYPTO is not set - -# -# language packages -# -# CONFIG_PKG_USING_LUA is not set -# CONFIG_PKG_USING_JERRYSCRIPT is not set -# CONFIG_PKG_USING_MICROPYTHON is not set - -# -# multimedia packages -# -# CONFIG_PKG_USING_OPENMV is not set -# CONFIG_PKG_USING_MUPDF is not set -# CONFIG_PKG_USING_STEMWIN is not set -# CONFIG_PKG_USING_WAVPLAYER is not set -# CONFIG_PKG_USING_TJPGD is not set -# CONFIG_PKG_USING_PDFGEN is not set -# CONFIG_PKG_USING_HELIX is not set -# CONFIG_PKG_USING_AZUREGUIX is not set -# CONFIG_PKG_USING_TOUCHGFX2RTT is not set -# CONFIG_PKG_USING_NUEMWIN is not set -# CONFIG_PKG_USING_MP3PLAYER is not set -# CONFIG_PKG_USING_TINYJPEG is not set - -# -# tools packages -# -# CONFIG_PKG_USING_CMBACKTRACE is not set -# CONFIG_PKG_USING_EASYFLASH is not set -# CONFIG_PKG_USING_EASYLOGGER is not set -# CONFIG_PKG_USING_SYSTEMVIEW is not set -# CONFIG_PKG_USING_SEGGER_RTT is not set -# CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_QRCODE is not set -# CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set -# CONFIG_PKG_USING_LOGMGR is not set -# CONFIG_PKG_USING_ADBD is not set -# CONFIG_PKG_USING_COREMARK is not set -# CONFIG_PKG_USING_DHRYSTONE is not set -# CONFIG_PKG_USING_MEMORYPERF is not set -# CONFIG_PKG_USING_NR_MICRO_SHELL is not set -# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set -# CONFIG_PKG_USING_LUNAR_CALENDAR is not set -# CONFIG_PKG_USING_BS8116A is not set -# CONFIG_PKG_USING_GPS_RMC is not set -# CONFIG_PKG_USING_URLENCODE is not set -# CONFIG_PKG_USING_UMCN is not set -# CONFIG_PKG_USING_LWRB2RTT is not set -# CONFIG_PKG_USING_CPU_USAGE is not set -# CONFIG_PKG_USING_GBK2UTF8 is not set -# CONFIG_PKG_USING_VCONSOLE is not set -# CONFIG_PKG_USING_KDB is not set -# CONFIG_PKG_USING_WAMR is not set -# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set -# CONFIG_PKG_USING_LWLOG is not set -# CONFIG_PKG_USING_ANV_TRACE is not set -# CONFIG_PKG_USING_ANV_MEMLEAK is not set -# CONFIG_PKG_USING_ANV_TESTSUIT is not set -# CONFIG_PKG_USING_ANV_BENCH is not set -# CONFIG_PKG_USING_DEVMEM is not set -# CONFIG_PKG_USING_REGEX is not set -# CONFIG_PKG_USING_MEM_SANDBOX is not set -# CONFIG_PKG_USING_SOLAR_TERMS is not set -# CONFIG_PKG_USING_GAN_ZHI is not set - -# -# system packages -# - -# -# acceleration: Assembly language or algorithmic acceleration packages -# -# CONFIG_PKG_USING_RT_MEMCPY_CM is not set -# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set -# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set -# CONFIG_PKG_USING_QFPLIB_M3 is not set - -# -# Micrium: Micrium software products porting for RT-Thread -# -# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set -# CONFIG_PKG_USING_UCOSII_WRAPPER is not set -# CONFIG_PKG_USING_UC_CRC is not set -# CONFIG_PKG_USING_UC_CLK is not set -# CONFIG_PKG_USING_UC_COMMON is not set -# CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_GUIENGINE is not set -# CONFIG_PKG_USING_CAIRO is not set -# CONFIG_PKG_USING_PIXMAN is not set -# CONFIG_PKG_USING_PARTITION is not set -# CONFIG_PKG_USING_FAL is not set -# CONFIG_PKG_USING_FLASHDB is not set -# CONFIG_PKG_USING_SQLITE is not set -# CONFIG_PKG_USING_RTI is not set -# CONFIG_PKG_USING_LITTLEVGL2RTT is not set -# CONFIG_PKG_USING_CMSIS is not set -# CONFIG_PKG_USING_DFS_YAFFS is not set -# CONFIG_PKG_USING_LITTLEFS is not set -# CONFIG_PKG_USING_DFS_JFFS2 is not set -# CONFIG_PKG_USING_DFS_UFFS is not set -# CONFIG_PKG_USING_LWEXT4 is not set -# CONFIG_PKG_USING_THREAD_POOL is not set -# CONFIG_PKG_USING_ROBOTS is not set -# CONFIG_PKG_USING_EV is not set -# CONFIG_PKG_USING_SYSWATCH is not set -# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set -# CONFIG_PKG_USING_PLCCORE is not set -# CONFIG_PKG_USING_RAMDISK is not set -# CONFIG_PKG_USING_MININI is not set -# CONFIG_PKG_USING_QBOOT is not set -# CONFIG_PKG_USING_PPOOL is not set -# CONFIG_PKG_USING_OPENAMP is not set -# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_LPM is not set -# CONFIG_PKG_USING_TLSF is not set -# CONFIG_PKG_USING_EVENT_RECORDER is not set - -# -# peripheral libraries and drivers -# -# CONFIG_PKG_USING_SENSORS_DRIVERS is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set -# CONFIG_PKG_USING_SHT2X is not set -# CONFIG_PKG_USING_SHT3X is not set -# CONFIG_PKG_USING_AS7341 is not set -# CONFIG_PKG_USING_STM32_SDIO is not set -# CONFIG_PKG_USING_ICM20608 is not set -# CONFIG_PKG_USING_U8G2 is not set -# CONFIG_PKG_USING_BUTTON is not set -# CONFIG_PKG_USING_PCF8574 is not set -# CONFIG_PKG_USING_SX12XX is not set -# CONFIG_PKG_USING_SIGNAL_LED is not set -# CONFIG_PKG_USING_LEDBLINK is not set -# CONFIG_PKG_USING_LITTLED is not set -# CONFIG_PKG_USING_LKDGUI is not set -# CONFIG_PKG_USING_NRF5X_SDK is not set -# CONFIG_PKG_USING_NRFX is not set -# CONFIG_PKG_USING_WM_LIBRARIES is not set -# CONFIG_PKG_USING_KENDRYTE_SDK is not set -# CONFIG_PKG_USING_INFRARED is not set -# CONFIG_PKG_USING_AGILE_BUTTON is not set -# CONFIG_PKG_USING_AGILE_LED is not set -# CONFIG_PKG_USING_AT24CXX is not set -# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set -# CONFIG_PKG_USING_PCA9685 is not set -# CONFIG_PKG_USING_I2C_TOOLS is not set -# CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set -# CONFIG_PKG_USING_RPLIDAR is not set -# CONFIG_PKG_USING_AS608 is not set -# CONFIG_PKG_USING_RC522 is not set -# CONFIG_PKG_USING_WS2812B is not set -# CONFIG_PKG_USING_EMBARC_BSP is not set -# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set -# CONFIG_PKG_USING_MULTI_RTIMER is not set -# CONFIG_PKG_USING_MAX7219 is not set -# CONFIG_PKG_USING_BEEP is not set -# CONFIG_PKG_USING_EASYBLINK is not set -# CONFIG_PKG_USING_PMS_SERIES is not set -# CONFIG_PKG_USING_CAN_YMODEM is not set -# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set -# CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set -# CONFIG_PKG_USING_AGILE_CONSOLE is not set -# CONFIG_PKG_USING_LD3320 is not set -# CONFIG_PKG_USING_WK2124 is not set -# CONFIG_PKG_USING_LY68L6400 is not set -# CONFIG_PKG_USING_DM9051 is not set -# CONFIG_PKG_USING_SSD1306 is not set -# CONFIG_PKG_USING_QKEY is not set -# CONFIG_PKG_USING_RS485 is not set -# CONFIG_PKG_USING_NES is not set -# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set -# CONFIG_PKG_USING_VDEVICE is not set -# CONFIG_PKG_USING_SGM706 is not set -# CONFIG_PKG_USING_STM32WB55_SDK is not set -# CONFIG_PKG_USING_RDA58XX is not set -# CONFIG_PKG_USING_LIBNFC is not set -# CONFIG_PKG_USING_MFOC is not set -# CONFIG_PKG_USING_TMC51XX is not set -# CONFIG_PKG_USING_TCA9534 is not set -# CONFIG_PKG_USING_KOBUKI is not set -# CONFIG_PKG_USING_ROSSERIAL is not set -# CONFIG_PKG_USING_MICRO_ROS is not set - -# -# AI packages -# -# CONFIG_PKG_USING_LIBANN is not set -# CONFIG_PKG_USING_NNOM is not set -# CONFIG_PKG_USING_ONNX_BACKEND is not set -# CONFIG_PKG_USING_ONNX_PARSER is not set -# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set -# CONFIG_PKG_USING_ELAPACK is not set -# CONFIG_PKG_USING_ULAPACK is not set -# CONFIG_PKG_USING_QUEST is not set -# CONFIG_PKG_USING_NAXOS is not set - -# -# miscellaneous packages -# -# CONFIG_PKG_USING_LIBCSV is not set -# CONFIG_PKG_USING_OPTPARSE is not set -# CONFIG_PKG_USING_FASTLZ is not set -# CONFIG_PKG_USING_MINILZO is not set -# CONFIG_PKG_USING_QUICKLZ is not set -# CONFIG_PKG_USING_LZMA is not set -# CONFIG_PKG_USING_MULTIBUTTON is not set -# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set -# CONFIG_PKG_USING_CANFESTIVAL is not set -# CONFIG_PKG_USING_ZLIB is not set -# CONFIG_PKG_USING_MINIZIP is not set -# CONFIG_PKG_USING_DSTR is not set -# CONFIG_PKG_USING_TINYFRAME is not set -# CONFIG_PKG_USING_KENDRYTE_DEMO is not set -# CONFIG_PKG_USING_DIGITALCTRL is not set -# CONFIG_PKG_USING_UPACKER is not set -# CONFIG_PKG_USING_UPARAM is not set - -# -# samples: kernel and components samples -# -# CONFIG_PKG_USING_KERNEL_SAMPLES is not set -# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set -# CONFIG_PKG_USING_NETWORK_SAMPLES is not set -# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set -# CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set -# CONFIG_PKG_USING_KI is not set -# CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_VT100 is not set -# CONFIG_PKG_USING_UKAL is not set -# CONFIG_PKG_USING_CRCLIB is not set - -# -# entertainment: terminal games and other interesting software packages -# -# CONFIG_PKG_USING_THREES is not set -# CONFIG_PKG_USING_2048 is not set -# CONFIG_PKG_USING_SNAKE is not set -# CONFIG_PKG_USING_TETRIS is not set -# CONFIG_PKG_USING_DONUT is not set -# CONFIG_PKG_USING_ACLOCK is not set -# CONFIG_PKG_USING_LWGPS is not set -# CONFIG_PKG_USING_STATE_MACHINE is not set -# CONFIG_PKG_USING_MCURSES is not set -# CONFIG_PKG_USING_COWSAY is not set - -# -# Hardware Drivers Config -# -CONFIG_SOC_N32G452XX=y - -# -# Onboard Peripheral Drivers -# - -# -# On-chip Peripheral Drivers -# -CONFIG_RT_USING_GPIO=y -# CONFIG_BSP_USING_ON_CHIP_FLASH is not set -CONFIG_RT_USING_UART=y -CONFIG_RT_USING_UART1=y -# CONFIG_RT_USING_UART2 is not set -# CONFIG_RT_USING_UART3 is not set -# CONFIG_BSP_USING_PWM is not set -# CONFIG_BSP_USING_HWTIMER is not set -# CONFIG_BSP_USING_SPI is not set -# CONFIG_BSP_USING_I2C1 is not set -# CONFIG_BSP_USING_ADC is not set -# CONFIG_BSP_USING_CAN is not set -# CONFIG_BSP_USING_SDIO is not set diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig b/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig index 495a4d537e..5460efce5d 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig @@ -10,8 +10,8 @@ menu "Onboard Peripheral Drivers" config RT_USING_SERIAL bool "Enable USART (uart1)" - select RT_USING_UART - select RT_USING_UART1 + select BSP_USING_UART + select BSP_USING_UART1 default y endmenu @@ -27,20 +27,20 @@ menu "On-chip Peripheral Drivers" bool "Enable on-chip FLASH" default n - menuconfig RT_USING_UART + menuconfig BSP_USING_UART bool "Enable UART" default y select RT_USING_SERIAL - if RT_USING_UART - config RT_USING_UART1 + if BSP_USING_UART + config BSP_USING_UART1 bool "Enable UART1" default y - config RT_USING_UART2 + config BSP_USING_UART2 bool "Enable UART2" default n - config RT_USING_UART3 + config BSP_USING_UART3 bool "Enable UART3" default n endif @@ -90,6 +90,12 @@ menu "On-chip Peripheral Drivers" config BSP_USING_HWTIM5 bool "Enable hardware timer5" default n + config BSP_USING_HWTIM6 + bool "Enable hardware timer6" + default n + config BSP_USING_HWTIM7 + bool "Enable hardware timer7" + default n endif menuconfig BSP_USING_SPI diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/board.h b/bsp/n32g452xx/n32g452xx-mini-system/board/board.h index c27d7cb87d..da15643a5b 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/board.h +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/board.h @@ -5,8 +5,7 @@ * * Change Logs: * Date Author Notes - * 2020-01-15 shelton first version - * 2021-02-09 shelton add flash macros + * 2021-08-20 breo.com first version */ #ifndef __BOARD_H__ diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c index d7c2cae387..77a09f507b 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c @@ -5,11 +5,12 @@ * * Change Logs: * Date Author Notes - * 2021-04-13 shelton first version + * 2021-08-20 breo.com first version */ #include +#include #include "n32g45x.h" #include "n32_msp.h" @@ -63,6 +64,20 @@ void n32_msp_usart_init(void *Instance) GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); } #endif +#ifdef BSP_USING_UART4 + if(UART4 == USARTx) + { + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_UART4, ENABLE); + RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitCtlStruct.Pin = GPIO_PIN_10; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + + GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitCtlStruct.Pin = GPIO_PIN_11; + GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); + } +#endif /* Add others */ } #endif /* BSP_USING_SERIAL */ @@ -141,7 +156,7 @@ void n32_msp_sdio_init(void *Instance) #endif /* BSP_USING_SDIO */ #ifdef BSP_USING_PWM -void n32_msp_tmr_init(void *Instance) +void n32_msp_tim_init(void *Instance) { GPIO_InitType GPIO_InitCtlStructure; GPIO_InitStruct(&GPIO_InitCtlStructure); @@ -196,7 +211,7 @@ void n32_msp_adc_init(void *Instance) RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOC, ENABLE); /* Configure ADC Channel as analog input */ - GPIO_InitCtlStruct.Pin = GPIO_PIN_0; + GPIO_InitCtlStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3; GPIO_InitCtlStruct.GPIO_Speed = GPIO_Speed_2MHz; GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AIN; GPIO_InitPeripheral(GPIOC, &GPIO_InitCtlStruct); @@ -222,7 +237,7 @@ void n32_msp_adc_init(void *Instance) #endif /* BSP_USING_ADC */ #ifdef BSP_USING_HWTIMER -void n32_msp_hwtmr_init(void *Instance) +void n32_msp_hwtim_init(void *Instance) { TIM_Module *TIMx = (TIM_Module *)Instance; @@ -249,6 +264,22 @@ void n32_msp_hwtmr_init(void *Instance) RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM5, ENABLE); } #endif + +#ifdef BSP_USING_HWTIM6 + if(TIMx == TIM6) + { + /* TIM6 clock enable */ + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM6, ENABLE); + } +#endif + +#ifdef BSP_USING_HWTIM7 + if(TIMx == TIM7) + { + /* TIM7 clock enable */ + RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM7, ENABLE); + } +#endif } #endif @@ -280,7 +311,7 @@ void n32_msp_can_init(void *Instance) RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_CAN2, ENABLE); RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE); RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE); -// GPIO_PinsRemapConfig(AFIO_MAP6_CAN2_0001, ENABLE); + // GPIO_PinsRemapConfig(AFIO_MAP6_CAN2_0001, ENABLE); GPIO_InitCtlStruct.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitCtlStruct.Pin = GPIO_PIN_6; GPIO_InitPeripheral(GPIOB, &GPIO_InitCtlStruct); @@ -293,3 +324,142 @@ void n32_msp_can_init(void *Instance) } #endif /* BSP_USING_CAN */ +#ifdef RT_USING_FINSH +#include +#ifdef BSP_USING_UART +static void uart_test_rw(rt_device_t uartx, const char *name) +{ + if (uartx == NULL) + { + uartx = rt_device_find(name); + rt_err_t err = rt_device_open(uartx, RT_DEVICE_FLAG_INT_RX|RT_DEVICE_FLAG_DMA_RX); + RT_ASSERT(err == RT_EOK); + } + rt_device_write(uartx, 0, name, strlen(name)); + rt_device_write(uartx, 0, "\r\n", 2); + uint8_t recv_buf[64] = {0x0}; + int ret = rt_device_read(uartx, 0, recv_buf, sizeof(recv_buf)); + if (ret != 0) + { + for (int i=0; iparent.name); + rt_kprintf("tick is :%d !\n", rt_tick_get()); + + return 0; +} +static int hwtimer_init(const char *name) +{ + rt_err_t ret = RT_EOK; + rt_hwtimerval_t timeout_s; + rt_device_t hw_dev = RT_NULL; + rt_hwtimer_mode_t mode; + hw_dev = rt_device_find(name); + if (hw_dev == RT_NULL) + { + rt_kprintf("hwtimer sample run failed! can't find %s device!\n", name); + return RT_ERROR; + } + ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + if (ret != RT_EOK) + { + rt_kprintf("open %s device failed!\n", name); + return ret; + } + rt_device_set_rx_indicate(hw_dev, timeout_cb); + mode = HWTIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + if (ret != RT_EOK) + { + rt_kprintf("set mode failed! ret is :%d\n", ret); + return ret; + } + timeout_s.sec = 5; + timeout_s.usec = 0; + if (rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)) != sizeof(timeout_s)) + { + rt_kprintf("set timeout value failed\n"); + return RT_ERROR; + } + + rt_thread_mdelay(3500); + + rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); + rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec); + + return ret; +} + +static int hwtimer_sample(int argc, char *argv[]) +{ +#ifdef BSP_USING_HWTIM6 + hwtimer_init("timer6"); +#endif +#ifdef BSP_USING_HWTIM7 + hwtimer_init("timer7"); +#endif + return RT_EOK; +} +MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); +#endif + + +#endif + + diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.h b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.h index 93e923c5a6..27a49e1228 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.h +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.h @@ -13,10 +13,10 @@ void n32_msp_usart_init(void *Instance); void n32_msp_spi_init(void *Instance); -void n32_msp_tmr_init(void *Instance); +void n32_msp_tim_init(void *Instance); void n32_msp_sdio_init(void *Instance); void n32_msp_adc_init(void *Instance); -void n32_msp_hwtmr_init(void *Instance); +void n32_msp_hwtim_init(void *Instance); void n32_msp_can_init(void *Instance); #endif /* __N32_MSP_H__ */ diff --git a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h index bef47acae7..9150b6c085 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h +++ b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h @@ -82,7 +82,9 @@ #define RT_USING_SERIAL_V1 #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_HWTIMER #define RT_USING_PIN +#define RT_USING_ADC /* Using USB */ @@ -175,7 +177,7 @@ /* On-chip Peripheral Drivers */ #define RT_USING_GPIO -#define RT_USING_UART -#define RT_USING_UART1 +#define BSP_USING_UART +#define BSP_USING_UART1 #endif diff --git a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py index 18411f0bd0..4a56028bfb 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py +++ b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py @@ -5,7 +5,7 @@ print(os.path.abspath(__file__)) # toolchains options ARCH='arm' CPU='cortex-m4' -CROSS_TOOL='keil' +CROSS_TOOL='gcc' # bsp lib config BSP_LIBRARY_TYPE = None