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[rt-smart] porting c906 and D1s to mm (#6848) 

* [rv64/bsp] porting to mm

* [mm] report more info for debugging

* [fix] code format

* [libcpu/c906] porting to RTOS

* [fix] using rtdbg api

* [fix] add return

* [fix] report more information for debugging

* [fix] use assert 0 for unrecoverable error
This commit is contained in:
Shell 2023-01-16 08:24:03 +08:00 committed by GitHub
parent fec7404506
commit f0dadcb3c3
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
30 changed files with 1271 additions and 432 deletions
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2
bsp/allwinner/d1s/.config
View File

@ -91,7 +91,7 @@ CONFIG_RT_USING_CACHE=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
# CONFIG_RT_USING_CPU_FFS is not set # CONFIG_RT_USING_CPU_FFS is not set
CONFIG_ARCH_MM_MMU=y CONFIG_ARCH_MM_MMU=y
CONFIG_KERNEL_VADDR_START=0x150000000 CONFIG_KERNEL_VADDR_START=0x40000000
CONFIG_PV_OFFSET=0x0 CONFIG_PV_OFFSET=0x0
CONFIG_ARCH_RISCV=y CONFIG_ARCH_RISCV=y
CONFIG_ARCH_RISCV64=y CONFIG_ARCH_RISCV64=y

25
bsp/allwinner/d1s/board/board.c
View File

@ -43,7 +43,14 @@ rt_region_t init_page_region =
// 内核页表 // 内核页表
extern volatile rt_size_t MMUTable[__SIZE(VPN2_BIT)] __attribute__((aligned(4 * 1024))); extern volatile rt_size_t MMUTable[__SIZE(VPN2_BIT)] __attribute__((aligned(4 * 1024)));
#endif struct mem_desc platform_mem_desc[] = {
{KERNEL_VADDR_START, KERNEL_VADDR_START + 0x4000000 - 1, KERNEL_VADDR_START + PV_OFFSET, NORMAL_MEM},
{0x1000, 0x3ffff000 - 1, 0x1000 + PV_OFFSET, DEVICE_MEM},
};
#define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]))
#endif /* RT_USING_SMART */
// 初始化BSS节区 // 初始化BSS节区
void init_bss(void) void init_bss(void)
@ -69,9 +76,6 @@ void primary_cpu_entry(void)
{ {
extern void entry(void); extern void entry(void);
// 初始化BSS
init_bss();
sbi_init();
// 关中断 // 关中断
rt_hw_interrupt_disable(); rt_hw_interrupt_disable();
rt_assert_set_hook(__rt_assert_handler); rt_assert_set_hook(__rt_assert_handler);
@ -87,20 +91,15 @@ void rt_hw_board_init(void)
#ifdef RT_USING_SMART #ifdef RT_USING_SMART
rt_hw_mmu_map_init(&rt_kernel_space, (void *)(USER_VADDR_START - IOREMAP_SIZE), IOREMAP_SIZE, (rt_size_t *)MMUTable, 0); rt_hw_mmu_map_init(&rt_kernel_space, (void *)(USER_VADDR_START - IOREMAP_SIZE), IOREMAP_SIZE, (rt_size_t *)MMUTable, 0);
rt_page_init(init_page_region); rt_page_init(init_page_region);
rt_hw_mmu_kernel_map_init(&rt_kernel_space, 0x00000000UL, USER_VADDR_START - 1); rt_hw_mmu_setup(&rt_kernel_space, platform_mem_desc, NUM_MEM_DESC);
// 将低1GB MMIO区域设置为无Cache与Strong Order访存模式
MMUTable[0] &= ~PTE_CACHE;
MMUTable[0] &= ~PTE_SHARE;
MMUTable[0] |= PTE_SO;
rt_hw_aspace_switch(&rt_kernel_space);
#endif #endif
/* initalize interrupt */
rt_hw_interrupt_init();
#ifdef RT_USING_HEAP #ifdef RT_USING_HEAP
rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t)RT_HW_HEAP_BEGIN, (rt_ubase_t)RT_HW_HEAP_END);
/* initialize memory system */ /* initialize memory system */
rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END); rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
#endif #endif
/* initalize interrupt */
rt_hw_interrupt_init();
/* init hal hardware */ /* init hal hardware */
hal_clock_init(); hal_clock_init();
hal_gpio_init(); hal_gpio_init();

6
bsp/allwinner/d1s/board/board.h
View File

@ -19,12 +19,12 @@ extern unsigned int __bss_end;
#define RAM_SIZE (64 * 1024 * 1024) #define RAM_SIZE (64 * 1024 * 1024)
#define RAM_BASE (0x40000000) #define RAM_BASE (0x40000000)
#define RAM_END (RAM_BASE + RAM_SIZE) #define RAM_END (RAM_BASE + RAM_SIZE - PV_OFFSET)
#define RT_HW_HEAP_BEGIN ((void *)&__bss_end) #define RT_HW_HEAP_BEGIN ((void *)&__bss_end)
#define RT_HW_HEAP_END ((void *)(((rt_size_t)RT_HW_HEAP_BEGIN) + 16 * 1024 * 1024)) #define RT_HW_HEAP_END ((void *)(((rt_size_t)RT_HW_HEAP_BEGIN) + 16 * 1024 * 1024))
#define RT_HW_PAGE_START RT_HW_HEAP_END #define RT_HW_PAGE_START (RT_HW_HEAP_END)
#define RT_HW_PAGE_END ((void *)(RAM_END)) #define RT_HW_PAGE_END ((void *)RAM_END)
void rt_hw_board_init(void); void rt_hw_board_init(void);
void rt_init_user_mem(struct rt_thread *thread, const char *name, unsigned long *entry); void rt_init_user_mem(struct rt_thread *thread, const char *name, unsigned long *entry);

4
bsp/allwinner/d1s/rtconfig.h
View File

@ -54,7 +54,7 @@
#define ARCH_CPU_64BIT #define ARCH_CPU_64BIT
#define RT_USING_CACHE #define RT_USING_CACHE
#define ARCH_MM_MMU #define ARCH_MM_MMU
#define KERNEL_VADDR_START 0x150000000 #define KERNEL_VADDR_START 0x40000000
#define PV_OFFSET 0x0 #define PV_OFFSET 0x0
#define ARCH_RISCV #define ARCH_RISCV
#define ARCH_RISCV64 #define ARCH_RISCV64
@ -104,7 +104,7 @@
#define FAL_DEBUG_CONFIG #define FAL_DEBUG_CONFIG
#define FAL_DEBUG 1 #define FAL_DEBUG 1
#define FAL_PART_HAS_TABLE_CFG #define FAL_PART_HAS_TABLE_CFG
#define RT_USING_SMART #define RT_USING_LWP
#define RT_LWP_MAX_NR 30 #define RT_LWP_MAX_NR 30
#define LWP_TASK_STACK_SIZE 16384 #define LWP_TASK_STACK_SIZE 16384
#define RT_CH_MSG_MAX_NR 1024 #define RT_CH_MSG_MAX_NR 1024

2
bsp/allwinner/d1s/rtconfig.py
View File

@ -38,7 +38,7 @@ if PLATFORM == 'gcc':
OBJCPY = PREFIX + 'objcopy' OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64' DEVICE = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64'
CFLAGS = DEVICE + ' -Wno-cpp -fvar-tracking -ffreestanding -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields ' CFLAGS = DEVICE + ' -Wno-cpp -fvar-tracking -ffreestanding -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -D_POSIX_SOURCE '
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__' AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + ' -lsupc++ -lgcc -static' LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + ' -lsupc++ -lgcc -static'
CPATH = '' CPATH = ''

2
bsp/allwinner/libraries/libos/src/os.c
View File

@ -5,6 +5,8 @@
#ifdef RT_USING_SMART #ifdef RT_USING_SMART
#include <mmu.h> #include <mmu.h>
#include <lwp_arch.h> #include <lwp_arch.h>
#else
#define PV_OFFSET 0
#endif #endif
#include <cache.h> #include <cache.h>

630
bsp/qemu-virt64-riscv/.config
View File

@ -172,6 +172,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
CONFIG_RT_USING_CPUTIME=y CONFIG_RT_USING_CPUTIME=y
CONFIG_RT_USING_CPUTIME_RISCV=y CONFIG_RT_USING_CPUTIME_RISCV=y
CONFIG_CPUTIME_TIMER_FREQ=300000000
# CONFIG_RT_USING_I2C is not set # CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set # CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y CONFIG_RT_USING_PIN=y
@ -352,6 +353,633 @@ CONFIG_UTEST_THR_PRIORITY=20
# #
# CONFIG_RT_USING_UTESTCASES is not set # CONFIG_RT_USING_UTESTCASES is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LWIP is not set
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
# CONFIG_PKG_USING_ZB_COORDINATOR is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_EZ_IOT_OS is not set
# CONFIG_PKG_USING_IOTSHARP_SDK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
# CONFIG_PKG_USING_MAVLINK is not set
# CONFIG_PKG_USING_BSAL is not set
# CONFIG_PKG_USING_AGILE_MODBUS is not set
# CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set
# CONFIG_PKG_USING_LORA_PKT_FWD is not set
# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
# CONFIG_PKG_USING_HM is not set
# CONFIG_PKG_USING_SMALL_MODBUS is not set
# CONFIG_PKG_USING_NET_SERVER is not set
# CONFIG_PKG_USING_ZFTP is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_LIBSODIUM is not set
# CONFIG_PKG_USING_LIBHYDROGEN is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
#
#
# JSON: JavaScript Object Notation, a lightweight data-interchange format
#
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_RAPIDJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set
#
# XML: Extensible Markup Language
#
# CONFIG_PKG_USING_SIMPLE_XML is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_LUATOS_SOC is not set
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
# CONFIG_PKG_USING_PIKASCRIPT is not set
# CONFIG_PKG_USING_RTT_RUST is not set
#
# multimedia packages
#
#
# LVGL: powerful and easy-to-use embedded GUI library
#
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
#
# u8g2: a monochrome graphic library
#
# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_PDFGEN is not set
# CONFIG_PKG_USING_HELIX is not set
# CONFIG_PKG_USING_AZUREGUIX is not set
# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
# CONFIG_PKG_USING_NUEMWIN is not set
# CONFIG_PKG_USING_MP3PLAYER is not set
# CONFIG_PKG_USING_TINYJPEG is not set
# CONFIG_PKG_USING_UGUI is not set
#
# PainterEngine: A cross-platform graphics application framework written in C language
#
# CONFIG_PKG_USING_PAINTERENGINE is not set
# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_TERMBOX is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_GUIENGINE is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_SEGGER_RTT is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_MEMORYPERF is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
# CONFIG_PKG_USING_LWRB2RTT is not set
# CONFIG_PKG_USING_CPU_USAGE is not set
# CONFIG_PKG_USING_GBK2UTF8 is not set
# CONFIG_PKG_USING_VCONSOLE is not set
# CONFIG_PKG_USING_KDB is not set
# CONFIG_PKG_USING_WAMR is not set
# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
# CONFIG_PKG_USING_LWLOG is not set
# CONFIG_PKG_USING_ANV_TRACE is not set
# CONFIG_PKG_USING_ANV_MEMLEAK is not set
# CONFIG_PKG_USING_ANV_TESTSUIT is not set
# CONFIG_PKG_USING_ANV_BENCH is not set
# CONFIG_PKG_USING_DEVMEM is not set
# CONFIG_PKG_USING_REGEX is not set
# CONFIG_PKG_USING_MEM_SANDBOX is not set
# CONFIG_PKG_USING_SOLAR_TERMS is not set
# CONFIG_PKG_USING_GAN_ZHI is not set
# CONFIG_PKG_USING_FDT is not set
# CONFIG_PKG_USING_CBOX is not set
# CONFIG_PKG_USING_SNOWFLAKE is not set
# CONFIG_PKG_USING_HASH_MATCH is not set
# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
# CONFIG_PKG_USING_VOFA_PLUS is not set
#
# system packages
#
#
# enhanced kernel services
#
# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
#
# acceleration: Assembly language or algorithmic acceleration packages
#
# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
# CONFIG_PKG_USING_QFPLIB_M3 is not set
#
# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
#
# CONFIG_PKG_USING_CMSIS_5 is not set
# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
#
# Micrium: Micrium software products porting for RT-Thread
#
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_UC_MODBUS is not set
# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_PERF_COUNTER is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_DFS_JFFS2 is not set
# CONFIG_PKG_USING_DFS_UFFS is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_PPOOL is not set
# CONFIG_PKG_USING_OPENAMP is not set
# CONFIG_PKG_USING_LPM is not set
# CONFIG_PKG_USING_TLSF is not set
# CONFIG_PKG_USING_EVENT_RECORDER is not set
# CONFIG_PKG_USING_ARM_2D is not set
# CONFIG_PKG_USING_MCUBOOT is not set
# CONFIG_PKG_USING_TINYUSB is not set
# CONFIG_PKG_USING_CHERRYUSB is not set
# CONFIG_PKG_USING_KMULTI_RTIMER is not set
# CONFIG_PKG_USING_TFDB is not set
# CONFIG_PKG_USING_QPC is not set
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_ADT74XX is not set
# CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ESP_IDF is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
# CONFIG_PKG_USING_NRFX is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
#
# Kendryte SDK
#
# CONFIG_PKG_USING_K210_SDK is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_MULTI_INFRARED is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_NUCLEI_SDK is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
# CONFIG_PKG_USING_DM9051 is not set
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_RS232 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
# CONFIG_PKG_USING_SGM706 is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
# CONFIG_PKG_USING_RDA58XX is not set
# CONFIG_PKG_USING_LIBNFC is not set
# CONFIG_PKG_USING_MFOC is not set
# CONFIG_PKG_USING_TMC51XX is not set
# CONFIG_PKG_USING_TCA9534 is not set
# CONFIG_PKG_USING_KOBUKI is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_MICRO_ROS is not set
# CONFIG_PKG_USING_MCP23008 is not set
# CONFIG_PKG_USING_BLUETRUM_SDK is not set
# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
# CONFIG_PKG_USING_BL_MCU_SDK is not set
# CONFIG_PKG_USING_SOFT_SERIAL is not set
# CONFIG_PKG_USING_MB85RS16 is not set
# CONFIG_PKG_USING_CW2015 is not set
# CONFIG_PKG_USING_RFM300 is not set
# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
#
# AI packages
#
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_QUEST is not set
# CONFIG_PKG_USING_NAXOS is not set
#
# miscellaneous packages
#
#
# project laboratory
#
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
#
# entertainment: terminal games and other interesting software packages
#
# CONFIG_PKG_USING_CMATRIX is not set
# CONFIG_PKG_USING_SL is not set
# CONFIG_PKG_USING_CAL is not set
# CONFIG_PKG_USING_ACLOCK is not set
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_SNAKE is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_DONUT is not set
# CONFIG_PKG_USING_COWSAY is not set
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_LZMA is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_MINIZIP is not set
# CONFIG_PKG_USING_HEATSHRINK is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_KI is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
# CONFIG_PKG_USING_CONTROLLER is not set
# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
# CONFIG_PKG_USING_MFBD is not set
# CONFIG_PKG_USING_SLCAN2RTT is not set
# CONFIG_PKG_USING_SOEM is not set
# CONFIG_PKG_USING_QPARAM is not set
#
# Arduino libraries
#
# CONFIG_PKG_USING_RTDUINO is not set
#
# Projects
#
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
#
# Sensors
#
# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set
# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set
# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set
# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set
#
# Display
#
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
#
# Timing
#
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
#
# Data Processing
#
# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
#
# Data Storage
#
#
# Communication
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
#
# Device Control
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set
#
# Other
#
#
# Signal IO
#
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
#
# Uncategorized
#
# #
# RISC-V QEMU virt64 configs # RISC-V QEMU virt64 configs
# #
@ -365,8 +993,6 @@ CONFIG_BSP_USING_VIRTIO_CONSOLE=y
CONFIG_BOARD_QEMU_VIRT_RV64=y CONFIG_BOARD_QEMU_VIRT_RV64=y
CONFIG_ENABLE_FPU=y CONFIG_ENABLE_FPU=y
# CONFIG_ENABLE_VECTOR is not set # CONFIG_ENABLE_VECTOR is not set
# CONFIG_ARCH_VECTOR_VLEN_128 is not set
# CONFIG_ARCH_VECTOR_VLEN_256 is not set
# CONFIG_RT_USING_USERSPACE_32BIT_LIMIT is not set # CONFIG_RT_USING_USERSPACE_32BIT_LIMIT is not set
CONFIG_ARCH_USING_NEW_CTX_SWITCH=y CONFIG_ARCH_USING_NEW_CTX_SWITCH=y
CONFIG___STACKSIZE__=16384 CONFIG___STACKSIZE__=16384

108
bsp/qemu-virt64-riscv/rtconfig.h
View File

@ -116,6 +116,7 @@
#define RT_SERIAL_RB_BUFSZ 64 #define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_CPUTIME #define RT_USING_CPUTIME
#define RT_USING_CPUTIME_RISCV #define RT_USING_CPUTIME_RISCV
#define CPUTIME_TIMER_FREQ 300000000
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_NULL #define RT_USING_NULL
#define RT_USING_ZERO #define RT_USING_ZERO
@ -224,6 +225,113 @@
/* RT-Thread Utestcases */ /* RT-Thread Utestcases */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
/* XML: Extensible Markup Language */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* PainterEngine: A cross-platform graphics application framework written in C language */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* Kendryte SDK */
/* AI packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Arduino libraries */
/* Projects */
/* Sensors */
/* Display */
/* Timing */
/* Data Processing */
/* Data Storage */
/* Communication */
/* Device Control */
/* Other */
/* Signal IO */
/* Uncategorized */
/* RISC-V QEMU virt64 configs */ /* RISC-V QEMU virt64 configs */
#define RISCV_S_MODE #define RISCV_S_MODE

27
components/mm/mm_aspace.c
View File

@ -17,6 +17,10 @@
#include <stddef.h> #include <stddef.h>
#include <stdint.h> #include <stdint.h>
#define DBG_TAG "mm.aspace"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#include "avl_adpt.h" #include "avl_adpt.h"
#include "mm_aspace.h" #include "mm_aspace.h"
#include "mm_fault.h" #include "mm_fault.h"
@ -31,10 +35,6 @@
#define PV_OFFSET 0 #define PV_OFFSET 0
#endif #endif
#define DBG_TAG "mm.aspace"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
static void _aspace_unmap(rt_aspace_t aspace, void *addr, rt_size_t length); static void _aspace_unmap(rt_aspace_t aspace, void *addr, rt_size_t length);
static void *_find_free(rt_aspace_t aspace, void *prefer, rt_size_t req_size, static void *_find_free(rt_aspace_t aspace, void *prefer, rt_size_t req_size,
void *limit_start, rt_size_t limit_size, void *limit_start, rt_size_t limit_size,
@ -138,6 +138,7 @@ void rt_aspace_delete(rt_aspace_t aspace)
static int _do_named_map(rt_aspace_t aspace, void *vaddr, rt_size_t length, static int _do_named_map(rt_aspace_t aspace, void *vaddr, rt_size_t length,
rt_size_t offset, rt_size_t attr) rt_size_t offset, rt_size_t attr)
{ {
LOG_D("%s: va %p length %p", __func__, vaddr, length);
int err = RT_EOK; int err = RT_EOK;
/* it's ensured by caller that (void*)end will not overflow */ /* it's ensured by caller that (void*)end will not overflow */
@ -288,6 +289,7 @@ static int _mm_aspace_map(rt_aspace_t aspace, rt_varea_t varea, rt_size_t attr,
static inline int _not_in_range(void *start, rt_size_t length, static inline int _not_in_range(void *start, rt_size_t length,
void *limit_start, rt_size_t limit_size) void *limit_start, rt_size_t limit_size)
{ {
LOG_D("%s: [%p : %p] [%p : %p]", __func__, start, length, limit_start, limit_size);
/* assuming (base + length) will not overflow except (0) */ /* assuming (base + length) will not overflow except (0) */
return start != ARCH_MAP_FAILED return start != ARCH_MAP_FAILED
? ((length > (0ul - (uintptr_t)start)) || start < limit_start || ? ((length > (0ul - (uintptr_t)start)) || start < limit_start ||
@ -336,6 +338,7 @@ int rt_aspace_map(rt_aspace_t aspace, void **addr, rt_size_t length,
} }
else else
{ {
LOG_W("%s: mm aspace map failed", __func__);
err = -RT_ENOMEM; err = -RT_ENOMEM;
} }
} }
@ -393,14 +396,22 @@ int _mm_aspace_map_phy(rt_aspace_t aspace, rt_varea_t varea,
int err; int err;
void *vaddr; void *vaddr;
if (!aspace || !hint || !hint->limit_range_size || !hint->map_size || if (!aspace || !hint || !hint->limit_range_size || !hint->map_size)
_not_align(hint->prefer, hint->map_size, ARCH_PAGE_MASK) || {
_not_in_range(hint->limit_start, hint->limit_range_size, aspace->start, LOG_W("%s: Invalid input", __func__);
err = -RT_EINVAL;
}
else if (_not_align(hint->prefer, hint->map_size, ARCH_PAGE_MASK))
{
LOG_W("%s: not aligned", __func__);
err = -RT_EINVAL;
}
else if (_not_in_range(hint->limit_start, hint->limit_range_size, aspace->start,
aspace->size) || aspace->size) ||
_not_in_range(hint->prefer, hint->map_size, aspace->start, _not_in_range(hint->prefer, hint->map_size, aspace->start,
aspace->size)) aspace->size))
{ {
LOG_I("%s: Invalid input", __func__); LOG_W("%s: not in range", __func__);
err = -RT_EINVAL; err = -RT_EINVAL;
} }
else else

8
components/mm/mm_fault.c
View File

@ -10,6 +10,10 @@
#include <rtthread.h> #include <rtthread.h>
#ifdef RT_USING_SMART #ifdef RT_USING_SMART
#define DBG_TAG "mm.fault"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#include <lwp.h> #include <lwp.h>
#include <lwp_syscall.h> #include <lwp_syscall.h>
#include "mm_aspace.h" #include "mm_aspace.h"
@ -19,10 +23,6 @@
#include <mmu.h> #include <mmu.h>
#include <tlb.h> #include <tlb.h>
#define DBG_TAG "mm.fault"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#define UNRECOVERABLE 0 #define UNRECOVERABLE 0
#define RECOVERABLE 1 #define RECOVERABLE 1

51
components/mm/mm_page.c
View File

@ -490,6 +490,11 @@ void rt_page_init(rt_region_t reg)
reg.start += ARCH_PAGE_MASK; reg.start += ARCH_PAGE_MASK;
reg.start &= ~ARCH_PAGE_MASK; reg.start &= ~ARCH_PAGE_MASK;
reg.end &= ~ARCH_PAGE_MASK; reg.end &= ~ARCH_PAGE_MASK;
if (reg.end <= reg.start)
{
LOG_E("region end(%p) must greater than start(%p)", reg.start, reg.end);
RT_ASSERT(0);
}
page_nr = ((reg.end - reg.start) >> ARCH_PAGE_SHIFT); page_nr = ((reg.end - reg.start) >> ARCH_PAGE_SHIFT);
shadow.start = reg.start & ~shadow_mask; shadow.start = reg.start & ~shadow_mask;
shadow.end = FLOOR(reg.end, shadow_mask + 1); shadow.end = FLOOR(reg.end, shadow_mask + 1);
@ -512,8 +517,7 @@ void rt_page_init(rt_region_t reg)
if (err != RT_EOK) if (err != RT_EOK)
{ {
LOG_E("MPR map failed with size %lx at %p", rt_mpr_size, rt_mpr_start); LOG_E("MPR map failed with size %lx at %p", rt_mpr_size, rt_mpr_start);
while (1) RT_ASSERT(0);
;
} }
/* calculate footprint */ /* calculate footprint */
@ -583,14 +587,19 @@ void rt_page_init(rt_region_t reg)
pages_alloc_handler = _early_pages_alloc; pages_alloc_handler = _early_pages_alloc;
/* doing the page table bushiness */ /* doing the page table bushiness */
rt_aspace_load_page(&rt_kernel_space, (void *)init_mpr_align_start, if (rt_aspace_load_page(&rt_kernel_space, (void *)init_mpr_align_start, init_mpr_npage))
init_mpr_npage); {
LOG_E("%s: failed to load pages", __func__);
RT_ASSERT(0);
}
if (rt_hw_mmu_tbl_get() == rt_kernel_space.page_table) if (rt_hw_mmu_tbl_get() == rt_kernel_space.page_table)
rt_page_cleanup(); rt_page_cleanup();
} }
static void _load_mpr_area(void *head, void *tail) static int _load_mpr_area(void *head, void *tail)
{ {
int err = 0;
void *iter = (void *)((uintptr_t)head & ~ARCH_PAGE_MASK); void *iter = (void *)((uintptr_t)head & ~ARCH_PAGE_MASK);
tail = (void *)FLOOR(tail, ARCH_PAGE_SIZE); tail = (void *)FLOOR(tail, ARCH_PAGE_SIZE);
@ -599,10 +608,16 @@ static void _load_mpr_area(void *head, void *tail)
void *paddr = rt_kmem_v2p(iter); void *paddr = rt_kmem_v2p(iter);
if (paddr == ARCH_MAP_FAILED) if (paddr == ARCH_MAP_FAILED)
{ {
rt_aspace_load_page(&rt_kernel_space, iter, 1); err = rt_aspace_load_page(&rt_kernel_space, iter, 1);
if (err != RT_EOK)
{
LOG_E("%s: failed to load page", __func__);
break;
}
} }
iter += ARCH_PAGE_SIZE; iter += ARCH_PAGE_SIZE;
} }
return err;
} }
int rt_page_install(rt_region_t region) int rt_page_install(rt_region_t region)
@ -617,22 +632,24 @@ int rt_page_install(rt_region_t region)
page_nr += ((region.end - region.start) >> ARCH_PAGE_SHIFT); page_nr += ((region.end - region.start) >> ARCH_PAGE_SHIFT);
_load_mpr_area(head, tail); err = _load_mpr_area(head, tail);
while (region.start != region.end) if (err == RT_EOK)
{ {
struct rt_page *p; while (region.start != region.end)
int size_bits; {
struct rt_page *p;
int size_bits;
size_bits = RT_PAGE_MAX_ORDER - 1; size_bits = RT_PAGE_MAX_ORDER - 1;
p = addr_to_page(page_start, (void *)region.start); p = addr_to_page(page_start, (void *)region.start);
p->size_bits = ARCH_ADDRESS_WIDTH_BITS; p->size_bits = ARCH_ADDRESS_WIDTH_BITS;
p->ref_cnt = 1; p->ref_cnt = 1;
_pages_free(p, size_bits); _pages_free(p, size_bits);
region.start += (1UL << (size_bits + ARCH_PAGE_SHIFT)); region.start += (1UL << (size_bits + ARCH_PAGE_SHIFT));
}
} }
err = 0;
} }
return err; return err;
} }

1
libcpu/risc-v/t-head/c906/context_gcc.S
View File

@ -10,7 +10,6 @@
* 2021/02/02 lizhirui Add userspace support * 2021/02/02 lizhirui Add userspace support
*/ */
#define __ASSEMBLY__
#include "cpuport.h" #include "cpuport.h"
#include "stackframe.h" #include "stackframe.h"

3
libcpu/risc-v/t-head/c906/cpuport.c
View File

@ -17,8 +17,9 @@
#include "sbi.h" #include "sbi.h"
#include "stack.h" #include "stack.h"
#ifdef RT_USING_SMART
#include <lwp_arch.h> #include <lwp_arch.h>
#endif
/** /**
* @brief from thread used interrupt context switch * @brief from thread used interrupt context switch

7
libcpu/risc-v/t-head/c906/interrupt_gcc.S
View File

@ -11,7 +11,6 @@
* 2021/12/24 JasonHu Add user setting save/restore * 2021/12/24 JasonHu Add user setting save/restore
*/ */
#define __ASSEMBLY__
#include "cpuport.h" #include "cpuport.h"
#include "encoding.h" #include "encoding.h"
#include "stackframe.h" #include "stackframe.h"
@ -31,10 +30,12 @@ trap_entry:
RESTORE_SYS_GP RESTORE_SYS_GP
#ifdef RT_USING_SMART
//check syscall //check syscall
csrr t0, scause csrr t0, scause
li t1, 8//environment call from u-mode li t1, 8//environment call from u-mode
beq t0, t1, syscall_entry beq t0, t1, syscall_entry
#endif
csrr a0, scause csrr a0, scause
csrrc a1, stval, zero csrrc a1, stval, zero
@ -53,21 +54,25 @@ trap_entry:
.global rt_hw_context_switch_interrupt_do .global rt_hw_context_switch_interrupt_do
rt_hw_context_switch_interrupt_do: rt_hw_context_switch_interrupt_do:
#ifdef RT_USING_SMART
//swap to thread kernel stack //swap to thread kernel stack
csrr t0, sstatus csrr t0, sstatus
andi t0, t0, 0x100 andi t0, t0, 0x100
beqz t0, __restore_sp_from_tcb_interrupt beqz t0, __restore_sp_from_tcb_interrupt
#endif
__restore_sp_from_sscratch_interrupt: __restore_sp_from_sscratch_interrupt:
csrr t0, sscratch csrr t0, sscratch
j __move_stack_context_interrupt j __move_stack_context_interrupt
#ifdef RT_USING_SMART
__restore_sp_from_tcb_interrupt: __restore_sp_from_tcb_interrupt:
la s0, rt_interrupt_from_thread la s0, rt_interrupt_from_thread
LOAD a0, 0(s0) LOAD a0, 0(s0)
jal rt_thread_sp_to_thread jal rt_thread_sp_to_thread
jal get_thread_kernel_stack_top jal get_thread_kernel_stack_top
mv t0, a0 mv t0, a0
#endif
__move_stack_context_interrupt: __move_stack_context_interrupt:
mv t1, sp//src mv t1, sp//src

29
libcpu/risc-v/t-head/c906/mmu.c
View File

@ -6,13 +6,17 @@
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2021-01-30 lizhirui first version * 2021-01-30 lizhirui first version
* 2022-12-13 WangXiaoyao Port to new mm
*/ */
#include "rtconfig.h"
#include <rtthread.h> #include <rtthread.h>
#include <stddef.h> #include <stddef.h>
#include <stdint.h> #include <stdint.h>
#define DBG_TAG "hw.mmu"
#define DBG_LVL DBG_WARNING
#include <rtdbg.h>
#include <cache.h> #include <cache.h>
#include <mm_aspace.h> #include <mm_aspace.h>
#include <mm_page.h> #include <mm_page.h>
@ -23,13 +27,8 @@
#ifdef RT_USING_SMART #ifdef RT_USING_SMART
#include <ioremap.h> #include <ioremap.h>
#include <lwp_user_mm.h> #include <lwp_user_mm.h>
#include <tlb.h>
#endif #endif
#define DBG_TAG "MMU"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>
#ifndef RT_USING_SMART #ifndef RT_USING_SMART
#define PV_OFFSET 0 #define PV_OFFSET 0
#define USER_VADDR_START 0 #define USER_VADDR_START 0
@ -37,20 +36,21 @@
static size_t _unmap_area(struct rt_aspace *aspace, void *v_addr, size_t size); static size_t _unmap_area(struct rt_aspace *aspace, void *v_addr, size_t size);
static void *current_mmu_table = RT_NULL;
volatile __attribute__((aligned(4 * 1024)))
rt_ubase_t MMUTable[__SIZE(VPN2_BIT)];
void rt_hw_aspace_switch(rt_aspace_t aspace) void rt_hw_aspace_switch(rt_aspace_t aspace)
{ {
uintptr_t page_table = (uintptr_t)_rt_kmem_v2p(aspace->page_table); uintptr_t page_table = (uintptr_t)_rt_kmem_v2p(aspace->page_table);
current_mmu_table = aspace->page_table;
write_csr(satp, (((size_t)SATP_MODE) << SATP_MODE_OFFSET) | write_csr(satp, (((size_t)SATP_MODE) << SATP_MODE_OFFSET) |
((rt_ubase_t)page_table >> PAGE_OFFSET_BIT)); ((rt_ubase_t)page_table >> PAGE_OFFSET_BIT));
rt_hw_tlb_invalidate_all_local(); rt_hw_tlb_invalidate_all_local();
} }
static void *current_mmu_table = RT_NULL;
volatile __attribute__((aligned(4 * 1024)))
rt_ubase_t MMUTable[__SIZE(VPN2_BIT)];
void *rt_hw_mmu_tbl_get() void *rt_hw_mmu_tbl_get()
{ {
return current_mmu_table; return current_mmu_table;
@ -256,7 +256,7 @@ static inline void _init_region(void *vaddr, size_t size)
rt_ioremap_start = vaddr; rt_ioremap_start = vaddr;
rt_ioremap_size = size; rt_ioremap_size = size;
rt_mpr_start = rt_ioremap_start - rt_mpr_size; rt_mpr_start = rt_ioremap_start - rt_mpr_size;
rt_kprintf("rt_ioremap_start: %p, rt_mpr_start: %p\n", rt_ioremap_start, rt_mpr_start); LOG_D("rt_ioremap_start: %p, rt_mpr_start: %p", rt_ioremap_start, rt_mpr_start);
} }
#else #else
static inline void _init_region(void *vaddr, size_t size) static inline void _init_region(void *vaddr, size_t size)
@ -382,7 +382,8 @@ void *rt_hw_mmu_v2p(struct rt_aspace *aspace, void *vaddr)
} }
else else
{ {
paddr = 0; LOG_I("%s: failed at %p", __func__, vaddr);
paddr = (uintptr_t)ARCH_MAP_FAILED;
} }
return (void *)paddr; return (void *)paddr;
} }
@ -418,7 +419,7 @@ int rt_hw_mmu_control(struct rt_aspace *aspace, void *vaddr, size_t size,
{ {
uintptr_t *pte = _query(aspace, vaddr, &level); uintptr_t *pte = _query(aspace, vaddr, &level);
void *range_end = vaddr + _get_level_size(level); void *range_end = vaddr + _get_level_size(level);
RT_ASSERT(range_end < vend); RT_ASSERT(range_end <= vend);
if (pte) if (pte)
{ {

9
libcpu/risc-v/t-head/c906/mmu.h
View File

@ -50,8 +50,6 @@ struct mem_desc
#define COMBINEPTE(paddr, attr) \ #define COMBINEPTE(paddr, attr) \
((((paddr) >> PAGE_OFFSET_BIT) << PTE_PPN_SHIFT) | (attr)) ((((paddr) >> PAGE_OFFSET_BIT) << PTE_PPN_SHIFT) | (attr))
#define ARCH_ADDRESS_WIDTH_BITS 64
#define MMU_MAP_ERROR_VANOTALIGN -1 #define MMU_MAP_ERROR_VANOTALIGN -1
#define MMU_MAP_ERROR_PANOTALIGN -2 #define MMU_MAP_ERROR_PANOTALIGN -2
#define MMU_MAP_ERROR_NOPAGE -3 #define MMU_MAP_ERROR_NOPAGE -3
@ -82,13 +80,6 @@ static inline void *rt_kmem_v2p(void *vaddr)
return paddr; return paddr;
} }
enum rt_mmu_cntl
{
MMU_CNTL_NONCACHE,
MMU_CNTL_CACHE,
MMU_CNTL_DUMMY_END,
};
int rt_hw_mmu_control(struct rt_aspace *aspace, void *vaddr, size_t size, int rt_hw_mmu_control(struct rt_aspace *aspace, void *vaddr, size_t size,
enum rt_mmu_cntl cmd); enum rt_mmu_cntl cmd);

27
libcpu/risc-v/t-head/c906/plic.c
View File

@ -19,6 +19,7 @@
#include "encoding.h" #include "encoding.h"
static void *c906_plic_regs = RT_NULL; static void *c906_plic_regs = RT_NULL;
extern struct rt_irq_desc isr_table[];
struct plic_handler struct plic_handler
{ {
@ -44,6 +45,32 @@ rt_inline void plic_irq_toggle(int hwirq, int enable)
} }
} }
static void generic_handle_irq(int irq)
{
rt_isr_handler_t isr;
void *param;
if (irq < 0 || irq >= IRQ_MAX_NR)
{
LOG_E("bad irq number %d!\n", irq);
return;
}
if (!irq) // irq = 0 => no irq
{
LOG_W("no irq!\n");
return;
}
isr = isr_table[IRQ_OFFSET + irq].handler;
param = isr_table[IRQ_OFFSET + irq].param;
if (isr != RT_NULL)
{
isr(irq, param);
}
/* complete irq. */
plic_complete(irq);
}
void plic_complete(int irqno) void plic_complete(int irqno)
{ {
int cpu = 0; int cpu = 0;

27
libcpu/risc-v/t-head/c906/riscv_mmu.h
View File

@ -51,20 +51,25 @@
#define PHYSICAL_ADDRESS_WIDTH_BITS 56 #define PHYSICAL_ADDRESS_WIDTH_BITS 56
#define PAGE_ATTR_NEXT_LEVEL (0) #define PAGE_ATTR_NEXT_LEVEL (0)
#define PAGE_ATTR_RWX (PTE_X | PTE_W | PTE_R) #define PAGE_ATTR_RWX (PTE_X | PTE_W | PTE_R)
#define PAGE_ATTR_READONLY (PTE_R) #define PAGE_ATTR_READONLY (PTE_R)
#define PAGE_ATTR_READEXECUTE (PTE_X | PTE_R) #define PAGE_ATTR_XN (PTE_W | PTE_R)
#define PAGE_ATTR_READEXECUTE (PTE_X | PTE_R)
#define PAGE_ATTR_USER (PTE_U) #define PAGE_ATTR_USER (PTE_U)
#define PAGE_ATTR_SYSTEM (0) #define PAGE_ATTR_SYSTEM (0)
#define PAGE_DEFAULT_ATTR_LEAF (PAGE_ATTR_RWX | PAGE_ATTR_USER | PTE_V | PTE_G) #define PAGE_ATTR_CB (PTE_BUF | PTE_CACHE)
#define PAGE_DEFAULT_ATTR_NEXT (PAGE_ATTR_NEXT_LEVEL | PTE_V | PTE_G) #define PAGE_ATTR_DEV (PTE_SO)
#define PAGE_DEFAULT_ATTR_LEAF (PTE_SHARE | PTE_BUF | PTE_CACHE | PTE_A | PTE_D | PTE_G | PTE_U | PAGE_ATTR_RWX | PTE_V)
#define PAGE_DEFAULT_ATTR_NEXT (PTE_SHARE | PTE_BUF | PTE_CACHE | PTE_A | PTE_D | PTE_G | PTE_V)
#define PAGE_IS_LEAF(pte) __MASKVALUE(pte, PAGE_ATTR_RWX) #define PAGE_IS_LEAF(pte) __MASKVALUE(pte, PAGE_ATTR_RWX)
#define PTE_USED(pte) __MASKVALUE(pte, PTE_V) #define PTE_USED(pte) __MASKVALUE(pte, PTE_V)
#define PTE_WRAP(attr) (attr | PTE_A | PTE_D)
/** /**
* encoding of SATP (Supervisor Address Translation and Protection register) * encoding of SATP (Supervisor Address Translation and Protection register)
@ -79,11 +84,11 @@
#define ARCH_VADDR_WIDTH 39 #define ARCH_VADDR_WIDTH 39
#define SATP_MODE SATP_MODE_SV39 #define SATP_MODE SATP_MODE_SV39
#define MMU_MAP_K_DEVICE (PTE_G | PTE_W | PTE_R | PTE_V) #define MMU_MAP_K_DEVICE PTE_WRAP(PAGE_ATTR_DEV | PTE_G | PAGE_ATTR_XN | PTE_V)
#define MMU_MAP_K_RWCB (PTE_G | PTE_X | PTE_W | PTE_R | PTE_V) #define MMU_MAP_K_RWCB PTE_WRAP(PAGE_ATTR_CB | PTE_G | PAGE_ATTR_RWX | PTE_V)
#define MMU_MAP_U_RWCB (PTE_U | PTE_X | PTE_W | PTE_R | PTE_V) #define MMU_MAP_U_RWCB PTE_WRAP(PAGE_ATTR_CB | PTE_U | PAGE_ATTR_RWX | PTE_V)
#define MMU_MAP_U_RWCB_XN (PTE_U | PTE_W | PTE_R | PTE_V) #define MMU_MAP_U_RWCB_XN PTE_WRAP(PAGE_ATTR_CB | PTE_U | PAGE_ATTR_XN | PTE_V)
#define MMU_MAP_U_RW (PTE_U | PTE_X | PTE_W | PTE_R | PTE_V) #define MMU_MAP_U_RW PTE_WRAP(PTE_U | PAGE_ATTR_RWX | PTE_V)
#define PTE_XWR_MASK 0xe #define PTE_XWR_MASK 0xe

2
libcpu/risc-v/t-head/c906/rt_interrupt.h
View File

@ -43,6 +43,4 @@ void rt_hw_interrupt_mask(int vector);
void rt_hw_interrupt_umask(int vector); void rt_hw_interrupt_umask(int vector);
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name); rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name);
void generic_handle_irq(int irq);
#endif #endif

4
libcpu/risc-v/t-head/c906/sbi.c
View File

@ -68,8 +68,8 @@ static struct sbi_ret sbi_get_impl_version(void)
void sbi_print_version(void) void sbi_print_version(void)
{ {
u_int major; unsigned int major;
u_int minor; unsigned int minor;
/* For legacy SBI implementations. */ /* For legacy SBI implementations. */
if (sbi_spec_version == 0) if (sbi_spec_version == 0)

128
libcpu/risc-v/t-head/c906/startup_gcc.S
View File

@ -10,72 +10,84 @@
* 2020/6/12 Xim Port to QEMU and remove SMP support * 2020/6/12 Xim Port to QEMU and remove SMP support
*/ */
#define __ASSEMBLY__ #include <encoding.h>
#define SSTATUS_FS 0x00006000U /* initial state of FPU, clear to disable */
#include <cpuport.h> #include <cpuport.h>
.global _start boot_hartid: .int
.section ".start", "ax" .global boot_hartid
.global _start
.section ".start", "ax"
_start: _start:
j 1f j 1f
.word 0xdeadbeef .word 0xdeadbeef
.align 3 .align 3
.global g_wake_up .global g_wake_up
g_wake_up: g_wake_up:
.dword 1 .dword 1
.dword 0 .dword 0
1: 1:
csrw sie, 0 /* save hartid */
csrw sip, 0 la t0, boot_hartid /* global varible rt_boot_hartid */
la t0, trap_entry mv t1, a0 /* get hartid in S-mode frome a0 register */
csrw stvec, t0 sw t1, (t0) /* store t1 register low 4 bits in memory address which is stored in t0 */
li x1, 0 /* clear Interrupt Registers */
li x2, 0 csrw sie, 0
li x3, 0 csrw sip, 0
li x4, 0 /* set Trap Vector Base Address Register */
li x5, 0 la t0, trap_entry
li x6, 0 csrw stvec, t0
li x7, 0
li x8, 0
li x9, 0
li x10,0
li x11,0
li x12,0
li x13,0
li x14,0
li x15,0
li x16,0
li x17,0
li x18,0
li x19,0
li x20,0
li x21,0
li x22,0
li x23,0
li x24,0
li x25,0
li x26,0
li x27,0
li x28,0
li x29,0
li x30,0
li x31,0
/* set to disable FPU */ li x1, 0
li t0, SSTATUS_FS li x2, 0
csrc sstatus, t0 li x3, 0
li t0, 0x40000 // SUM in sstatus li x4, 0
csrs sstatus, t0 li x5, 0
li x6, 0
li x7, 0
li x8, 0
li x9, 0
li x10,0
li x11,0
li x12,0
li x13,0
li x14,0
li x15,0
li x16,0
li x17,0
li x18,0
li x19,0
li x20,0
li x21,0
li x22,0
li x23,0
li x24,0
li x25,0
li x26,0
li x27,0
li x28,0
li x29,0
li x30,0
li x31,0
/* set to disable FPU */
li t0, SSTATUS_FS
csrc sstatus, t0
li t0, SSTATUS_SUM
csrs sstatus, t0
.option push .option push
.option norelax .option norelax
la gp, __global_pointer$ la gp, __global_pointer$
.option pop .option pop
// removed SMP support here /* removed SMP support here */
la sp, __stack_start__ la sp, __stack_start__
li t0, __STACKSIZE__ li t0, __STACKSIZE__
add sp, sp, t0 add sp, sp, t0
csrw sscratch, sp csrw sscratch, sp
j primary_cpu_entry
call init_bss
call sbi_init
j primary_cpu_entry

4
libcpu/risc-v/t-head/c906/syscall_c.c
View File

@ -12,6 +12,8 @@
#include <rthw.h> #include <rthw.h>
#include <rtthread.h> #include <rtthread.h>
#ifdef RT_USING_SMART
#define DBG_TAG "syscall" #define DBG_TAG "syscall"
#define DBG_LVL DBG_WARNING #define DBG_LVL DBG_WARNING
#include <rtdbg.h> #include <rtdbg.h>
@ -19,7 +21,6 @@
#include <stdint.h> #include <stdint.h>
#include <mmu.h> #include <mmu.h>
#include <page.h> #include <page.h>
#include <lwp_mm_area.h>
#include <lwp_user_mm.h> #include <lwp_user_mm.h>
#include "riscv_mmu.h" #include "riscv_mmu.h"
@ -58,3 +59,4 @@ void syscall_handler(struct rt_hw_stack_frame *regs)
regs->epc += 4; // skip ecall instruction regs->epc += 4; // skip ecall instruction
LOG_I("[0x%lx] %s ret: 0x%lx", rt_thread_self(), syscall_name, regs->a0); LOG_I("[0x%lx] %s ret: 0x%lx", rt_thread_self(), syscall_name, regs->a0);
} }
#endif /* RT_USING_SMART */

12
libcpu/risc-v/t-head/c906/tlb.h
View File

@ -10,17 +10,17 @@
#ifndef __TLB_H__ #ifndef __TLB_H__
#define __TLB_H__ #define __TLB_H__
#include "mm_aspace.h"
#include "riscv_mmu.h"
#include "rtdbg.h"
#include "rtthread.h"
#include <sbi.h>
#include <stddef.h> #include <stddef.h>
#include <stdint.h> #include <stdint.h>
#include <rtthread.h>
#include <mm_aspace.h>
#include "sbi.h"
#include "riscv_mmu.h"
#define HANDLE_FAULT(ret) \ #define HANDLE_FAULT(ret) \
if (__builtin_expect((ret) != SBI_SUCCESS, 0)) \ if (__builtin_expect((ret) != SBI_SUCCESS, 0)) \
LOG_W("%s failed", __FUNCTION__); LOG_W("%s failed\n", __FUNCTION__);
static inline void rt_hw_tlb_invalidate_all(void) static inline void rt_hw_tlb_invalidate_all(void)
{ {

344
libcpu/risc-v/t-head/c906/trap.c
View File

@ -11,115 +11,68 @@
#include <rthw.h> #include <rthw.h>
#include <rtthread.h> #include <rtthread.h>
#define DBG_LVL DBG_LOG #include <stdint.h>
#include <rtdbg.h>
#include "board.h" #include "board.h"
#include "tick.h" #include "tick.h"
#include "drv_uart.h" #include <mm_fault.h>
#include "mmu.h"
#include "encoding.h" #include "encoding.h"
#include "stack.h" #include "stack.h"
#include "sbi.h" #include "sbi.h"
#include "riscv.h" #include "riscv.h"
#include "rt_interrupt.h" #include "rt_interrupt.h"
#include "plic.h" #include "plic.h"
#ifdef RT_USING_SMART #ifdef RT_USING_SMART
#include "riscv_mmu.h" #include <lwp_arch.h>
#include "mmu.h" #else
#include "page.h" #define rt_hw_backtrace(...) (0)
#include "lwp_arch.h"
#endif #endif
#define DBG_TAG "libcpu.trap"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
void dump_regs(struct rt_hw_stack_frame *regs) void dump_regs(struct rt_hw_stack_frame *regs)
{ {
rt_kprintf("--------------Dump Registers-----------------\n"); rt_kprintf("--------------Dump Registers-----------------\n");
rt_kprintf("Function Registers:\n"); rt_kprintf("Function Registers:\n");
rt_kprintf("\tra(x1) = 0x%p(",regs->ra); rt_kprintf("\tra(x1) = 0x%p\tuser_sp = 0x%p\n", regs->ra, regs->user_sp_exc_stack);
rt_kprintf(")\n"); rt_kprintf("\tgp(x3) = 0x%p\ttp(x4) = 0x%p\n", regs->gp, regs->tp);
rt_kprintf("\tuser_sp(x2) = 0x%p(",regs->user_sp_exc_stack);
rt_kprintf(")\n");
rt_kprintf("\tgp(x3) = 0x%p(",regs->gp);
rt_kprintf(")\n");
rt_kprintf("\ttp(x4) = 0x%p(",regs->tp);
rt_kprintf(")\n");
rt_kprintf("Temporary Registers:\n"); rt_kprintf("Temporary Registers:\n");
rt_kprintf("\tt0(x5) = 0x%p(",regs->t0); rt_kprintf("\tt0(x5) = 0x%p\tt1(x6) = 0x%p\n", regs->t0, regs->t1);
rt_kprintf(")\n"); rt_kprintf("\tt2(x7) = 0x%p\n", regs->t2);
rt_kprintf("\tt1(x6) = 0x%p(",regs->t1); rt_kprintf("\tt3(x28) = 0x%p\tt4(x29) = 0x%p\n", regs->t3, regs->t4);
rt_kprintf(")\n"); rt_kprintf("\tt5(x30) = 0x%p\tt6(x31) = 0x%p\n", regs->t5, regs->t6);
rt_kprintf("\tt2(x7) = 0x%p(",regs->t2);
rt_kprintf(")\n");
rt_kprintf("\tt3(x28) = 0x%p(",regs->t3);
rt_kprintf(")\n");
rt_kprintf("\tt4(x29) = 0x%p(",regs->t4);
rt_kprintf(")\n");
rt_kprintf("\tt5(x30) = 0x%p(",regs->t5);
rt_kprintf(")\n");
rt_kprintf("\tt6(x31) = 0x%p(",regs->t6);
rt_kprintf(")\n");
rt_kprintf("Saved Registers:\n"); rt_kprintf("Saved Registers:\n");
rt_kprintf("\ts0/fp(x8) = 0x%p(",regs->s0_fp); rt_kprintf("\ts0/fp(x8) = 0x%p\ts1(x9) = 0x%p\n", regs->s0_fp, regs->s1);
rt_kprintf(")\n"); rt_kprintf("\ts2(x18) = 0x%p\ts3(x19) = 0x%p\n", regs->s2, regs->s3);
rt_kprintf("\ts1(x9) = 0x%p(",regs->s1); rt_kprintf("\ts4(x20) = 0x%p\ts5(x21) = 0x%p\n", regs->s4, regs->s5);
rt_kprintf(")\n"); rt_kprintf("\ts6(x22) = 0x%p\ts7(x23) = 0x%p\n", regs->s6, regs->s7);
rt_kprintf("\ts2(x18) = 0x%p(",regs->s2); rt_kprintf("\ts8(x24) = 0x%p\ts9(x25) = 0x%p\n", regs->s8, regs->s9);
rt_kprintf(")\n"); rt_kprintf("\ts10(x26) = 0x%p\ts11(x27) = 0x%p\n", regs->s10, regs->s11);
rt_kprintf("\ts3(x19) = 0x%p(",regs->s3);
rt_kprintf(")\n");
rt_kprintf("\ts4(x20) = 0x%p(",regs->s4);
rt_kprintf(")\n");
rt_kprintf("\ts5(x21) = 0x%p(",regs->s5);
rt_kprintf(")\n");
rt_kprintf("\ts6(x22) = 0x%p(",regs->s6);
rt_kprintf(")\n");
rt_kprintf("\ts7(x23) = 0x%p(",regs->s7);
rt_kprintf(")\n");
rt_kprintf("\ts8(x24) = 0x%p(",regs->s8);
rt_kprintf(")\n");
rt_kprintf("\ts9(x25) = 0x%p(",regs->s9);
rt_kprintf(")\n");
rt_kprintf("\ts10(x26) = 0x%p(",regs->s10);
rt_kprintf(")\n");
rt_kprintf("\ts11(x27) = 0x%p(",regs->s11);
rt_kprintf(")\n");
rt_kprintf("Function Arguments Registers:\n"); rt_kprintf("Function Arguments Registers:\n");
rt_kprintf("\ta0(x10) = 0x%p(",regs->a0); rt_kprintf("\ta0(x10) = 0x%p\ta1(x11) = 0x%p\n", regs->a0, regs->a1);
rt_kprintf(")\n"); rt_kprintf("\ta2(x12) = 0x%p\ta3(x13) = 0x%p\n", regs->a2, regs->a3);
rt_kprintf("\ta1(x11) = 0x%p(",regs->a1); rt_kprintf("\ta4(x14) = 0x%p\ta5(x15) = 0x%p\n", regs->a4, regs->a5);
rt_kprintf(")\n"); rt_kprintf("\ta6(x16) = 0x%p\ta7(x17) = 0x%p\n", regs->a6, regs->a7);
rt_kprintf("\ta2(x12) = 0x%p(",regs->a2); rt_kprintf("sstatus = 0x%p\n", regs->sstatus);
rt_kprintf(")\n"); rt_kprintf("\t%s\n", (regs->sstatus & SSTATUS_SIE) ? "Supervisor Interrupt Enabled" : "Supervisor Interrupt Disabled");
rt_kprintf("\ta3(x13) = 0x%p(",regs->a3); rt_kprintf("\t%s\n", (regs->sstatus & SSTATUS_SPIE) ? "Last Time Supervisor Interrupt Enabled" : "Last Time Supervisor Interrupt Disabled");
rt_kprintf(")\n"); rt_kprintf("\t%s\n", (regs->sstatus & SSTATUS_SPP) ? "Last Privilege is Supervisor Mode" : "Last Privilege is User Mode");
rt_kprintf("\ta4(x14) = 0x%p(",regs->a4); rt_kprintf("\t%s\n", (regs->sstatus & SSTATUS_SUM) ? "Permit to Access User Page" : "Not Permit to Access User Page");
rt_kprintf(")\n"); rt_kprintf("\t%s\n", (regs->sstatus & (1 << 19)) ? "Permit to Read Executable-only Page" : "Not Permit to Read Executable-only Page");
rt_kprintf("\ta5(x15) = 0x%p(",regs->a5);
rt_kprintf(")\n");
rt_kprintf("\ta6(x16) = 0x%p(",regs->a6);
rt_kprintf(")\n");
rt_kprintf("\ta7(x17) = 0x%p(",regs->a7);
rt_kprintf(")\n");
rt_kprintf("sstatus = 0x%p\n",regs->sstatus);
rt_kprintf("\t%s\n",(regs->sstatus & SSTATUS_SIE) ? "Supervisor Interrupt Enabled" : "Supervisor Interrupt Disabled");
rt_kprintf("\t%s\n",(regs->sstatus & SSTATUS_SPIE) ? "Last Time Supervisor Interrupt Enabled" : "Last Time Supervisor Interrupt Disabled");
rt_kprintf("\t%s\n",(regs->sstatus & SSTATUS_SPP) ? "Last Privilege is Supervisor Mode" : "Last Privilege is User Mode");
rt_kprintf("\t%s\n",(regs->sstatus & SSTATUS_SUM) ? "Permit to Access User Page" : "Not Permit to Access User Page");
rt_kprintf("\t%s\n",(regs->sstatus & (1 << 19)) ? "Permit to Read Executable-only Page" : "Not Permit to Read Executable-only Page");
rt_size_t satp_v = read_csr(satp); rt_size_t satp_v = read_csr(satp);
rt_kprintf("satp = 0x%p\n",satp_v); rt_kprintf("satp = 0x%p\n", satp_v);
rt_kprintf("\tCurrent Page Table(Physical) = 0x%p\n", __MASKVALUE(satp_v, __MASK(44)) << PAGE_OFFSET_BIT);
#ifdef RT_USING_SMART rt_kprintf("\tCurrent ASID = 0x%p\n", __MASKVALUE(satp_v >> 44, __MASK(16)) << PAGE_OFFSET_BIT);
rt_kprintf("\tCurrent Page Table(Physical) = 0x%p\n",__MASKVALUE(satp_v,__MASK(44)) << PAGE_OFFSET_BIT);
rt_kprintf("\tCurrent ASID = 0x%p\n",__MASKVALUE(satp_v >> 44,__MASK(16)) << PAGE_OFFSET_BIT);
#endif
const char *mode_str = "Unknown Address Translation/Protection Mode"; const char *mode_str = "Unknown Address Translation/Protection Mode";
switch(__MASKVALUE(satp_v >> 60,__MASK(4))) switch (__MASKVALUE(satp_v >> 60, __MASK(4)))
{ {
case 0: case 0:
mode_str = "No Address Translation/Protection Mode"; mode_str = "No Address Translation/Protection Mode";
@ -134,73 +87,55 @@ void dump_regs(struct rt_hw_stack_frame *regs)
break; break;
} }
rt_kprintf("\tMode = %s\n",mode_str); rt_kprintf("\tMode = %s\n", mode_str);
rt_kprintf("-----------------Dump OK---------------------\n"); rt_kprintf("-----------------Dump OK---------------------\n");
} }
static const char *Exception_Name[] = static const char *Exception_Name[] =
{ {
"Instruction Address Misaligned", "Instruction Address Misaligned",
"Instruction Access Fault", "Instruction Access Fault",
"Illegal Instruction", "Illegal Instruction",
"Breakpoint", "Breakpoint",
"Load Address Misaligned", "Load Address Misaligned",
"Load Access Fault", "Load Access Fault",
"Store/AMO Address Misaligned", "Store/AMO Address Misaligned",
"Store/AMO Access Fault", "Store/AMO Access Fault",
"Environment call from U-mode", "Environment call from U-mode",
"Environment call from S-mode", "Environment call from S-mode",
"Reserved-10", "Reserved-10",
"Reserved-11", "Reserved-11",
"Instruction Page Fault", "Instruction Page Fault",
"Load Page Fault", "Load Page Fault",
"Reserved-14", "Reserved-14",
"Store/AMO Page Fault" "Store/AMO Page Fault"};
};
static const char *Interrupt_Name[] = static const char *Interrupt_Name[] =
{
"User Software Interrupt",
"Supervisor Software Interrupt",
"Reversed-2",
"Reversed-3",
"User Timer Interrupt",
"Supervisor Timer Interrupt",
"Reversed-6",
"Reversed-7",
"User External Interrupt",
"Supervisor External Interrupt",
"Reserved-10",
"Reserved-11",
};
extern struct rt_irq_desc isr_table[];
void generic_handle_irq(int irq)
{
rt_isr_handler_t isr;
void *param;
if (irq < 0 || irq >= IRQ_MAX_NR)
{ {
LOG_E("bad irq number %d!\n", irq); "User Software Interrupt",
return; "Supervisor Software Interrupt",
} "Reversed-2",
"Reversed-3",
"User Timer Interrupt",
"Supervisor Timer Interrupt",
"Reversed-6",
"Reversed-7",
"User External Interrupt",
"Supervisor External Interrupt",
"Reserved-10",
"Reserved-11",
};
if (!irq) // irq = 0 => no irq #ifndef RT_USING_SMP
{ static volatile int nested = 0;
LOG_W("no irq!\n"); #define ENTER_TRAP \
return; nested += 1
} #define EXIT_TRAP \
isr = isr_table[IRQ_OFFSET + irq].handler; nested -= 1
param = isr_table[IRQ_OFFSET + irq].param; #define CHECK_NESTED_PANIC(cause, tval, epc, eframe) \
if (isr != RT_NULL) if (nested != 1) \
{ handle_nested_trap_panic(cause, tval, epc, eframe)
isr(irq, param); #endif /* RT_USING_SMP */
}
/* complete irq. */
plic_complete(irq);
}
static const char *get_exception_msg(int id) static const char *get_exception_msg(int id)
{ {
@ -216,33 +151,134 @@ static const char *get_exception_msg(int id)
return msg; return msg;
} }
#ifdef RT_USING_SMART
void handle_user(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw_stack_frame *sp) void handle_user(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw_stack_frame *sp)
{ {
rt_size_t id = __MASKVALUE(scause, __MASK(63UL)); rt_size_t id = __MASKVALUE(scause, __MASK(63UL));
#ifdef RT_USING_USERSPACE
/* user page fault */ /* user page fault */
if (id == EP_LOAD_PAGE_FAULT || enum rt_mm_fault_op fault_op;
id == EP_STORE_PAGE_FAULT) enum rt_mm_fault_type fault_type;
switch (id)
{ {
if (arch_expand_user_stack((void *)stval)) case EP_LOAD_PAGE_FAULT:
fault_op = MM_FAULT_OP_READ;
fault_type = MM_FAULT_TYPE_PAGE_FAULT;
break;
case EP_LOAD_ACCESS_FAULT:
fault_op = MM_FAULT_OP_READ;
fault_type = MM_FAULT_TYPE_ACCESS_FAULT;
break;
case EP_LOAD_ADDRESS_MISALIGNED:
fault_op = MM_FAULT_OP_READ;
fault_type = MM_FAULT_TYPE_BUS_ERROR;
break;
case EP_STORE_PAGE_FAULT:
fault_op = MM_FAULT_OP_WRITE;
fault_type = MM_FAULT_TYPE_PAGE_FAULT;
break;
case EP_STORE_ACCESS_FAULT:
fault_op = MM_FAULT_OP_WRITE;
fault_type = MM_FAULT_TYPE_ACCESS_FAULT;
break;
case EP_STORE_ADDRESS_MISALIGNED:
fault_op = MM_FAULT_OP_WRITE;
fault_type = MM_FAULT_TYPE_BUS_ERROR;
break;
case EP_INSTRUCTION_PAGE_FAULT:
fault_op = MM_FAULT_OP_EXECUTE;
fault_type = MM_FAULT_TYPE_PAGE_FAULT;
break;
case EP_INSTRUCTION_ACCESS_FAULT:
fault_op = MM_FAULT_OP_EXECUTE;
fault_type = MM_FAULT_TYPE_ACCESS_FAULT;
break;
case EP_INSTRUCTION_ADDRESS_MISALIGNED:
fault_op = MM_FAULT_OP_EXECUTE;
fault_type = MM_FAULT_TYPE_BUS_ERROR;
break;
default:
fault_op = 0;
}
if (fault_op)
{
struct rt_mm_fault_msg msg = {
.fault_op = fault_op,
.fault_type = fault_type,
.vaddr = (void *)stval,
};
if (rt_mm_fault_try_fix(&msg))
{ {
return; return;
} }
} }
#endif LOG_E("[FATAL ERROR] Exception %ld:%s\n", id, get_exception_msg(id));
LOG_E("[FATAL ERROR] Exception %ld:%s", id, get_exception_msg(id)); LOG_E("scause:0x%p,stval:0x%p,sepc:0x%p\n", scause, stval, sepc);
LOG_E("scause:0x%p,stval:0x%p,sepc:0x%p", scause, stval, sepc);
dump_regs(sp); dump_regs(sp);
rt_hw_backtrace((uint32_t *)sp->s0_fp, sepc); rt_hw_backtrace((uint32_t *)sp->s0_fp, sepc);
LOG_E("User Fault, killing thread: %s", rt_thread_self()->name); LOG_E("User Fault, killing thread: %s", rt_thread_self()->name);
EXIT_TRAP;
sys_exit(-1); sys_exit(-1);
} }
#endif
#ifdef ENABLE_VECTOR
static void vector_enable(struct rt_hw_stack_frame *sp)
{
sp->sstatus |= SSTATUS_VS_INITIAL;
}
/**
* detect V/D support, and do not distinguish V/D instruction
*/
static int illegal_inst_recoverable(rt_ubase_t stval, struct rt_hw_stack_frame *sp)
{
// first 7 bits is opcode
int opcode = stval & 0x7f;
int csr = (stval & 0xFFF00000) >> 20;
// ref riscv-v-spec-1.0, [Vector Instruction Formats]
int width = ((stval & 0x7000) >> 12) - 1;
int flag = 0;
switch (opcode)
{
case 0x57: // V
case 0x27: // scalar FLOAT
case 0x07:
case 0x73: // CSR
flag = 1;
break;
}
if (flag)
{
vector_enable(sp);
}
return flag;
}
#endif
static void handle_nested_trap_panic(
rt_size_t cause,
rt_size_t tval,
rt_size_t epc,
struct rt_hw_stack_frame *eframe)
{
LOG_E("\n-------- [SEVER ERROR] --------");
LOG_E("Nested trap detected");
LOG_E("scause:0x%p,stval:0x%p,sepc:0x%p\n", cause, tval, epc);
dump_regs(eframe);
rt_hw_cpu_shutdown();
}
/* Trap entry */ /* Trap entry */
void handle_trap(rt_size_t scause,rt_size_t stval,rt_size_t sepc,struct rt_hw_stack_frame *sp) void handle_trap(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw_stack_frame *sp)
{ {
rt_size_t id = __MASKVALUE(scause,__MASK(63UL)); rt_size_t id = __MASKVALUE(scause,__MASK(63UL));
const char *msg; const char *msg;
@ -277,13 +313,14 @@ void handle_trap(rt_size_t scause,rt_size_t stval,rt_size_t sepc,struct rt_hw_st
} }
else else
{ {
#ifdef RT_USING_SMART
if (!(sp->sstatus & 0x100)) if (!(sp->sstatus & 0x100))
{ {
handle_user(scause, stval, sepc, sp); handle_user(scause, stval, sepc, sp);
// after handle_user(), return to user space. // if handle_user() return here, jump to u mode then
// otherwise it never returns
return ; return ;
} }
#endif
// handle kernel exception: // handle kernel exception:
rt_kprintf("Unhandled Exception %ld:%s\n", id, get_exception_msg(id)); rt_kprintf("Unhandled Exception %ld:%s\n", id, get_exception_msg(id));
@ -293,7 +330,6 @@ void handle_trap(rt_size_t scause,rt_size_t stval,rt_size_t sepc,struct rt_hw_st
dump_regs(sp); dump_regs(sp);
rt_kprintf("--------------Thread list--------------\n"); rt_kprintf("--------------Thread list--------------\n");
rt_kprintf("current thread: %s\n", rt_thread_self()->name); rt_kprintf("current thread: %s\n", rt_thread_self()->name);
list_process();
extern struct rt_thread *rt_current_thread; extern struct rt_thread *rt_current_thread;
rt_kprintf("--------------Backtrace--------------\n"); rt_kprintf("--------------Backtrace--------------\n");

29
libcpu/risc-v/virt64/interrupt.h
View File

@ -11,19 +11,36 @@
#ifndef INTERRUPT_H__ #ifndef INTERRUPT_H__
#define INTERRUPT_H__ #define INTERRUPT_H__
#define MAX_HANDLERS 128 #define MAX_HANDLERS 128
#include <rthw.h> #include <rthw.h>
#include "stack.h" #include "stack.h"
// int rt_hw_clint_ipi_enable(void); enum
// int rt_hw_clint_ipi_disable(void); {
EP_INSTRUCTION_ADDRESS_MISALIGNED = 0,
EP_INSTRUCTION_ACCESS_FAULT,
EP_ILLEGAL_INSTRUCTION,
EP_BREAKPOINT,
EP_LOAD_ADDRESS_MISALIGNED,
EP_LOAD_ACCESS_FAULT,
EP_STORE_ADDRESS_MISALIGNED,
EP_STORE_ACCESS_FAULT,
EP_ENVIRONMENT_CALL_U_MODE,
EP_ENVIRONMENT_CALL_S_MODE,
EP_RESERVED10,
EP_ENVIRONMENT_CALL_M_MODE,
EP_INSTRUCTION_PAGE_FAULT, /* page attr */
EP_LOAD_PAGE_FAULT, /* read data */
EP_RESERVED14,
EP_STORE_PAGE_FAULT, /* write data */
};
int rt_hw_plic_irq_enable(int irq_number); int rt_hw_plic_irq_enable(int irq_number);
int rt_hw_plic_irq_disable(int irq_number); int rt_hw_plic_irq_disable(int irq_number);
void rt_hw_interrupt_init(void); void rt_hw_interrupt_init(void);
void rt_hw_interrupt_mask(int vector); void rt_hw_interrupt_mask(int vector);
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name);
void *param, const char *name); void handle_trap(rt_size_t xcause, rt_size_t xtval, rt_size_t xepc, struct rt_hw_stack_frame *sp);
void handle_trap(rt_size_t xcause,rt_size_t xtval,rt_size_t xepc,struct rt_hw_stack_frame *sp);
#endif #endif

10
libcpu/risc-v/virt64/mmu.c
View File

@ -13,6 +13,10 @@
#include <stddef.h> #include <stddef.h>
#include <stdint.h> #include <stdint.h>
#define DBG_TAG "hw.mmu"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#include <cache.h> #include <cache.h>
#include <mm_aspace.h> #include <mm_aspace.h>
#include <mm_page.h> #include <mm_page.h>
@ -23,13 +27,8 @@
#ifdef RT_USING_SMART #ifdef RT_USING_SMART
#include <ioremap.h> #include <ioremap.h>
#include <lwp_user_mm.h> #include <lwp_user_mm.h>
#include <tlb.h>
#endif #endif
#define DBG_TAG "hw.mmu"
#define DBG_LVL DBG_LOG
#include <rtdbg.h>
#ifndef RT_USING_SMART #ifndef RT_USING_SMART
#define PV_OFFSET 0 #define PV_OFFSET 0
#define USER_VADDR_START 0 #define USER_VADDR_START 0
@ -257,6 +256,7 @@ static inline void _init_region(void *vaddr, size_t size)
rt_ioremap_start = vaddr; rt_ioremap_start = vaddr;
rt_ioremap_size = size; rt_ioremap_size = size;
rt_mpr_start = rt_ioremap_start - rt_mpr_size; rt_mpr_start = rt_ioremap_start - rt_mpr_size;
LOG_D("rt_ioremap_start: %p, rt_mpr_start: %p", rt_ioremap_start, rt_mpr_start);
} }
#else #else
static inline void _init_region(void *vaddr, size_t size) static inline void _init_region(void *vaddr, size_t size)

2
libcpu/risc-v/virt64/mmu.h
View File

@ -50,8 +50,6 @@ struct mem_desc
#define COMBINEPTE(paddr, attr) \ #define COMBINEPTE(paddr, attr) \
((((paddr) >> PAGE_OFFSET_BIT) << PTE_PPN_SHIFT) | (attr)) ((((paddr) >> PAGE_OFFSET_BIT) << PTE_PPN_SHIFT) | (attr))
#define ARCH_ADDRESS_WIDTH_BITS 64
#define MMU_MAP_ERROR_VANOTALIGN -1 #define MMU_MAP_ERROR_VANOTALIGN -1
#define MMU_MAP_ERROR_PANOTALIGN -2 #define MMU_MAP_ERROR_PANOTALIGN -2
#define MMU_MAP_ERROR_NOPAGE -3 #define MMU_MAP_ERROR_NOPAGE -3

136
libcpu/risc-v/virt64/startup_gcc.S
View File

@ -14,83 +14,83 @@
#include <cpuport.h> #include <cpuport.h>
boot_hartid: .int boot_hartid: .int
.global boot_hartid .global boot_hartid
.global _start .global _start
.section ".start", "ax" .section ".start", "ax"
_start: _start:
j 1f j 1f
.word 0xdeadbeef .word 0xdeadbeef
.align 3 .align 3
.global g_wake_up .global g_wake_up
g_wake_up: g_wake_up:
.dword 1 .dword 1
.dword 0 .dword 0
1: 1:
# save hartid /* save hartid */
la t0, boot_hartid # global varible rt_boot_hartid la t0, boot_hartid /* global varible rt_boot_hartid */
mv t1, a0 # get hartid in S-mode frome a0 register mv t1, a0 /* get hartid in S-mode frome a0 register */
sw t1, (t0) # store t1 register low 4 bits in memory address which is stored in t0 sw t1, (t0) /* store t1 register low 4 bits in memory address which is stored in t0 */
# clear Interrupt Registers /* clear Interrupt Registers */
csrw sie, 0 csrw sie, 0
csrw sip, 0 csrw sip, 0
# set Trap Vector Base Address Register /* set Trap Vector Base Address Register */
la t0, trap_entry la t0, trap_entry
csrw stvec, t0 csrw stvec, t0
li x1, 0 li x1, 0
li x2, 0 li x2, 0
li x3, 0 li x3, 0
li x4, 0 li x4, 0
li x5, 0 li x5, 0
li x6, 0 li x6, 0
li x7, 0 li x7, 0
li x8, 0 li x8, 0
li x9, 0 li x9, 0
li x10,0 li x10,0
li x11,0 li x11,0
li x12,0 li x12,0
li x13,0 li x13,0
li x14,0 li x14,0
li x15,0 li x15,0
li x16,0 li x16,0
li x17,0 li x17,0
li x18,0 li x18,0
li x19,0 li x19,0
li x20,0 li x20,0
li x21,0 li x21,0
li x22,0 li x22,0
li x23,0 li x23,0
li x24,0 li x24,0
li x25,0 li x25,0
li x26,0 li x26,0
li x27,0 li x27,0
li x28,0 li x28,0
li x29,0 li x29,0
li x30,0 li x30,0
li x31,0 li x31,0
/* set to disable FPU */ /* set to disable FPU */
li t0, SSTATUS_FS + SSTATUS_VS li t0, SSTATUS_FS + SSTATUS_VS
csrc sstatus, t0 csrc sstatus, t0
li t0, 0x40000 // SUM in sstatus li t0, SSTATUS_SUM
csrs sstatus, t0 csrs sstatus, t0
.option push .option push
.option norelax .option norelax
la gp, __global_pointer$ la gp, __global_pointer$
.option pop .option pop
// removed SMP support here /* removed SMP support here */
la sp, __stack_start__ la sp, __stack_start__
li t0, __STACKSIZE__ li t0, __STACKSIZE__
add sp, sp, t0 add sp, sp, t0
/** /**
* sscratch is always zero on kernel mode * sscratch is always zero on kernel mode
*/ */
csrw sscratch, zero csrw sscratch, zero
call init_bss call init_bss
call sbi_init call sbi_init
j primary_cpu_entry j primary_cpu_entry

10
libcpu/risc-v/virt64/tlb.h
View File

@ -10,14 +10,14 @@
#ifndef __TLB_H__ #ifndef __TLB_H__
#define __TLB_H__ #define __TLB_H__
#include "mm_aspace.h"
#include "riscv_mmu.h"
#include "rtdbg.h"
#include "rtthread.h"
#include <sbi.h>
#include <stddef.h> #include <stddef.h>
#include <stdint.h> #include <stdint.h>
#include <rtthread.h>
#include <mm_aspace.h>
#include "sbi.h"
#include "riscv_mmu.h"
#define HANDLE_FAULT(ret) \ #define HANDLE_FAULT(ret) \
if (__builtin_expect((ret) != SBI_SUCCESS, 0)) \ if (__builtin_expect((ret) != SBI_SUCCESS, 0)) \
LOG_W("%s failed", __FUNCTION__); LOG_W("%s failed", __FUNCTION__);

54
libcpu/risc-v/virt64/trap.c
View File

@ -11,14 +11,15 @@
#include <rtthread.h> #include <rtthread.h>
#include <stdint.h> #include <stdint.h>
#include <mm_fault.h>
#include "mmu.h"
#include "encoding.h" #include "encoding.h"
#include "mm_fault.h"
#include "stack.h" #include "stack.h"
#include "sbi.h" #include "sbi.h"
#include "riscv.h" #include "riscv.h"
#include "tick.h" #include "interrupt.h"
#include "plic.h" #include "plic.h"
#include "riscv_mmu.h" #include "tick.h"
#ifdef RT_USING_SMART #ifdef RT_USING_SMART
#include <lwp_arch.h> #include <lwp_arch.h>
@ -26,6 +27,10 @@
#define rt_hw_backtrace(...) (0) #define rt_hw_backtrace(...) (0)
#endif #endif
#define DBG_TAG "libcpu.trap"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
void dump_regs(struct rt_hw_stack_frame *regs) void dump_regs(struct rt_hw_stack_frame *regs)
{ {
rt_kprintf("--------------Dump Registers-----------------\n"); rt_kprintf("--------------Dump Registers-----------------\n");
@ -64,17 +69,17 @@ void dump_regs(struct rt_hw_stack_frame *regs)
switch (__MASKVALUE(satp_v >> 60, __MASK(4))) switch (__MASKVALUE(satp_v >> 60, __MASK(4)))
{ {
case 0: case 0:
mode_str = "No Address Translation/Protection Mode"; mode_str = "No Address Translation/Protection Mode";
break; break;
case 8: case 8:
mode_str = "Page-based 39-bit Virtual Addressing Mode"; mode_str = "Page-based 39-bit Virtual Addressing Mode";
break; break;
case 9: case 9:
mode_str = "Page-based 48-bit Virtual Addressing Mode"; mode_str = "Page-based 48-bit Virtual Addressing Mode";
break; break;
} }
rt_kprintf("\tMode = %s\n", mode_str); rt_kprintf("\tMode = %s\n", mode_str);
@ -116,31 +121,8 @@ static const char *Interrupt_Name[] =
"Reserved-11", "Reserved-11",
}; };
enum
{
EP_INSTRUCTION_ADDRESS_MISALIGNED = 0,
EP_INSTRUCTION_ACCESS_FAULT,
EP_ILLEGAL_INSTRUCTION,
EP_BREAKPOINT,
EP_LOAD_ADDRESS_MISALIGNED,
EP_LOAD_ACCESS_FAULT,
EP_STORE_ADDRESS_MISALIGNED,
EP_STORE_ACCESS_FAULT,
EP_ENVIRONMENT_CALL_U_MODE,
EP_ENVIRONMENT_CALL_S_MODE,
EP_RESERVED10,
EP_ENVIRONMENT_CALL_M_MODE,
EP_INSTRUCTION_PAGE_FAULT, /* page attr */
EP_LOAD_PAGE_FAULT, /* read data */
EP_RESERVED14,
EP_STORE_PAGE_FAULT, /* write data */
};
extern struct rt_irq_desc irq_desc[]; extern struct rt_irq_desc irq_desc[];
#include "rtdbg.h"
#include "encoding.h"
#ifndef RT_USING_SMP #ifndef RT_USING_SMP
static volatile int nested = 0; static volatile int nested = 0;
#define ENTER_TRAP \ #define ENTER_TRAP \
@ -242,6 +224,7 @@ void handle_user(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw
} }
#endif #endif
#ifdef ENABLE_VECTOR
static void vector_enable(struct rt_hw_stack_frame *sp) static void vector_enable(struct rt_hw_stack_frame *sp)
{ {
sp->sstatus |= SSTATUS_VS_INITIAL; sp->sstatus |= SSTATUS_VS_INITIAL;
@ -276,6 +259,7 @@ static int illegal_inst_recoverable(rt_ubase_t stval, struct rt_hw_stack_frame *
return flag; return flag;
} }
#endif
static void handle_nested_trap_panic( static void handle_nested_trap_panic(
rt_size_t cause, rt_size_t cause,