Merge pull request #3463 from sheltonyu/develop

1. modify at32_msp default configuration 2. add hwtimer driver and fi…
This commit is contained in:
Bernard Xiong 2020-03-17 23:23:53 +08:00 committed by GitHub
commit ed0637fef4
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GPG Key ID: 4AEE18F83AFDEB23
13 changed files with 1778 additions and 325 deletions

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@ -21,6 +21,9 @@ if GetDepend(['BSP_USING_SERIAL']):
if GetDepend(['BSP_USING_PWM']):
src += ['drv_pwm.c']
if GetDepend(['BSP_USING_HWTIMER']):
src += ['drv_hwtimer.c']
if GetDepend(['BSP_USING_SPI']):
src += ['drv_spi.c']

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@ -0,0 +1,412 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-03-16 Leo first version
*/
#include <board.h>
#include "drv_hwtimer.h"
#define DRV_DEBUG
#define LOG_TAG "drv.hwtimer"
#include <drv_log.h>
#ifdef BSP_USING_HWTIMER
enum
{
#ifdef BSP_USING_HWTMR1
TMR1_INDEX,
#endif
#ifdef BSP_USING_HWTMR2
TMR2_INDEX,
#endif
#ifdef BSP_USING_HWTMR3
TMR3_INDEX,
#endif
#ifdef BSP_USING_HWTMR4
TMR4_INDEX,
#endif
#ifdef BSP_USING_HWTMR5
TMR5_INDEX,
#endif
#ifdef BSP_USING_HWTMR6
TMR6_INDEX,
#endif
#ifdef BSP_USING_HWTMR7
TMR7_INDEX,
#endif
#ifdef BSP_USING_HW_TMR8
TMR8_INDEX,
#endif
#ifdef BSP_USING_HWTMR9
TMR9_INDEX,
#endif
#ifdef BSP_USING_HWTMR10
TMR10_INDEX,
#endif
#ifdef BSP_USING_HWTMR11
TMR11_INDEX,
#endif
#ifdef BSP_USING_HWTMR12
TMR12_INDEX,
#endif
#ifdef BSP_USING_HWTMR13
TMR13_INDEX,
#endif
#ifdef BSP_USING_HWTMR14
TMR14_INDEX,
#endif
#ifdef BSP_USING_HWTMR15
TMR15_INDEX,
#endif
};
struct at32_hwtimer
{
rt_hwtimer_t time_device;
TMR_Type* tim_handle;
IRQn_Type tim_irqn;
char *name;
};
static struct at32_hwtimer at32_hwtimer_obj[] =
{
#ifdef BSP_USING_HWTMR1
TMR1_CONFIG,
#endif
#ifdef BSP_USING_HWTMR2
TMR2_CONFIG,
#endif
#ifdef BSP_USING_HWTMR3
TMR3_CONFIG,
#endif
#ifdef BSP_USING_HWTMR4
TMR4_CONFIG,
#endif
#ifdef BSP_USING_HWTMR5
TMR5_CONFIG,
#endif
#ifdef BSP_USING_HWTMR6
TMR6_CONFIG,
#endif
#ifdef BSP_USING_HWTMR7
TMR7_CONFIG,
#endif
#ifdef BSP_USING_HWTMR8
TMR8_CONFIG,
#endif
#ifdef BSP_USING_HWTMR9
TMR9_CONFIG,
#endif
#ifdef BSP_USING_HWTMR10
TMR10_CONFIG,
#endif
#ifdef BSP_USING_HWTMR11
TMR11_CONFIG,
#endif
#ifdef BSP_USING_HWTMR12
TMR12_CONFIG,
#endif
#ifdef BSP_USING_HWTMR13
TMR13_CONFIG,
#endif
#ifdef BSP_USING_HWTMR14
TMR14_CONFIG,
#endif
#ifdef BSP_USING_HWTMR15
TMR15_CONFIG,
#endif
};
static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
{
RCC_ClockType RCC_ClockStruct;
TMR_TimerBaseInitType TMR_TMReBaseStructure;
NVIC_InitType NVIC_InitStructure;
uint32_t prescaler_value = 0;
TMR_Type *tim = RT_NULL;
struct at32_hwtimer *tim_device = RT_NULL;
RT_ASSERT(timer != RT_NULL);
if (state)
{
tim = (TMR_Type *)timer->parent.user_data;
tim_device = (struct at32_hwtimer *)timer;
/* timer clock enable */
at32_msp_hwtmr_init(tim);
/* timer init */
RCC_GetClocksFreq(&RCC_ClockStruct);
/* Set timer clock is 1Mhz */
prescaler_value = (uint32_t)(RCC_ClockStruct.SYSCLK_Freq / 10000) - 1;
TMR_TMReBaseStructure.TMR_Period = 10000 - 1;
TMR_TMReBaseStructure.TMR_DIV = prescaler_value;
TMR_TMReBaseStructure.TMR_ClockDivision = TMR_CKD_DIV1;
TMR_TMReBaseStructure.TMR_RepetitionCounter = 0;
if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
{
TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Up;
}
else
{
TMR_TMReBaseStructure.TMR_CounterMode = TMR_CounterDIR_Down;
}
TMR_TimeBaseInit(tim, &TMR_TMReBaseStructure);
/* Enable the TMRx global Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = tim_device->tim_irqn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
TMR_INTConfig(tim, TMR_INT_Overflow ,ENABLE);
TMR_ClearITPendingBit(tim, TMR_INT_Overflow);
LOG_D("%s init success", tim_device->name);
}
}
static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
{
rt_err_t result = RT_EOK;
TMR_Type *tim = RT_NULL;
RT_ASSERT(timer != RT_NULL);
tim = (TMR_Type *)timer->parent.user_data;
/* set tim cnt */
TMR_SetCounter(tim, 0);
/* set tim arr */
TMR_SetAutoreload(tim, t - 1);
if (opmode == HWTIMER_MODE_ONESHOT)
{
/* set timer to single mode */
TMR_SelectOnePulseMode(tim, TMR_OPMode_Once);
}
else
{
TMR_SelectOnePulseMode(tim, TMR_OPMode_Repetitive);
}
/* start timer */
TMR_Cmd(tim, ENABLE);
return result;
}
static void at32_timer_stop(rt_hwtimer_t *timer)
{
TMR_Type *tim = RT_NULL;
RT_ASSERT(timer != RT_NULL);
tim = (TMR_Type *)timer->parent.user_data;
/* stop timer */
TMR_Cmd(tim, ENABLE);
/* set tim cnt */
TMR_SetCounter(tim, 0);
}
static rt_uint32_t at32_timer_counter_get(rt_hwtimer_t *timer)
{
TMR_Type *tim = RT_NULL;
RT_ASSERT(timer != RT_NULL);
tim = (TMR_Type *)timer->parent.user_data;
return tim->CNT;
}
static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
{
RCC_ClockType RCC_ClockStruct;
TMR_Type *tim = RT_NULL;
rt_err_t result = RT_EOK;
RT_ASSERT(timer != RT_NULL);
RT_ASSERT(arg != RT_NULL);
tim = (TMR_Type *)timer->parent.user_data;
switch(cmd)
{
case HWTIMER_CTRL_FREQ_SET:
{
rt_uint32_t freq;
rt_uint16_t val;
/* set timer frequence */
freq = *((rt_uint32_t *)arg);
/* time init */
RCC_GetClocksFreq(&RCC_ClockStruct);
val = RCC_ClockStruct.SYSCLK_Freq / freq;
TMR_DIVConfig(tim, val - 1, TMR_DIVReloadMode_Immediate);
}
break;
default:
{
result = -RT_ENOSYS;
}
break;
}
return result;
}
static const struct rt_hwtimer_info _info = TMR_DEV_INFO_CONFIG;
static const struct rt_hwtimer_ops _ops =
{
.init = at32_timer_init,
.start = at32_timer_start,
.stop = at32_timer_stop,
.count_get = at32_timer_counter_get,
.control = at32_timer_ctrl,
};
#ifdef BSP_USING_HWTMR2
void TMR2_GLOBAL_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if(TMR_GetINTStatus(TMR2, TMR_INT_Overflow) == SET)
{
rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR2_INDEX].time_device);
TMR_ClearITPendingBit(TMR2, TMR_INT_Overflow);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_HWTMR3
void TMR3_GLOBAL_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if(TMR_GetINTStatus(TMR3, TMR_INT_Overflow) == SET)
{
rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR3_INDEX].time_device);
TMR_ClearITPendingBit(TMR3, TMR_INT_Overflow);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_HWTMR4
void TMR4_GLOBAL_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if(TMR_GetINTStatus(TMR4, TMR_INT_Overflow) == SET)
{
rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR4_INDEX].time_device);
TMR_ClearITPendingBit(TMR4, TMR_INT_Overflow);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_HWTMR5
void TMR5_GLOBAL_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
if(TMR_GetINTStatus(TMR5, TMR_INT_Overflow) == SET)
{
rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR5_INDEX].time_device);
TMR_ClearITPendingBit(TMR5, TMR_INT_Overflow);
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
static int rt_hw_hwtimer_init(void)
{
int i = 0;
int result = RT_EOK;
for (i = 0; i < sizeof(at32_hwtimer_obj) / sizeof(at32_hwtimer_obj[0]); i++)
{
at32_hwtimer_obj[i].time_device.info = &_info;
at32_hwtimer_obj[i].time_device.ops = &_ops;
if (rt_device_hwtimer_register(&at32_hwtimer_obj[i].time_device, at32_hwtimer_obj[i].name, at32_hwtimer_obj[i].tim_handle) == RT_EOK)
{
LOG_D("%s register success", at32_hwtimer_obj[i].name);
}
else
{
LOG_E("%s register failed", at32_hwtimer_obj[i].name);
result = -RT_ERROR;
}
}
return result;
}
INIT_BOARD_EXPORT(rt_hw_hwtimer_init);
#endif /* BSP_USING_HWTIMER */

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@ -0,0 +1,80 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-03-16 Leo first version
*/
#ifndef __TMR_CONFIG_H__
#define __TMR_CONFIG_H__
#include <rtthread.h>
#include <drivers/hwtimer.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifndef TMR_DEV_INFO_CONFIG
#define TMR_DEV_INFO_CONFIG \
{ \
.maxfreq = 1000000, \
.minfreq = 4000, \
.maxcnt = 0xFFFF, \
.cntmode = HWTIMER_CNTMODE_UP, \
}
#endif /* TIM_DEV_INFO_CONFIG */
#ifdef BSP_USING_HWTMR2
#ifndef TMR2_CONFIG
#define TMR2_CONFIG \
{ \
.tim_handle = TMR2, \
.tim_irqn = TMR2_GLOBAL_IRQn, \
.name = "timer2", \
}
#endif /* TMR2_CONFIG */
#endif /* BSP_USING_HWTMR2 */
#ifdef BSP_USING_HWTMR3
#ifndef TMR3_CONFIG
#define TMR3_CONFIG \
{ \
.tim_handle = TMR3, \
.tim_irqn = TMR3_GLOBAL_IRQn, \
.name = "timer3", \
}
#endif /* TMR3_CONFIG */
#endif /* BSP_USING_HWTMR3 */
#ifdef BSP_USING_HWTMR4
#ifndef TMR4_CONFIG
#define TMR4_CONFIG \
{ \
.tim_handle = TMR4, \
.tim_irqn = TMR4_GLOBAL_IRQn, \
.name = "timer4", \
}
#endif /* TMR4_CONFIG */
#endif /* BSP_USING_HWTMR4 */
#ifdef BSP_USING_HWTMR5
#ifndef TMR5_CONFIG
#define TMR5_CONFIG \
{ \
.tim_handle = TMR5, \
.tim_irqn = TMR5_GLOBAL_IRQn, \
.name = "timer5", \
}
#endif /* TMR5_CONFIG */
#endif /* BSP_USING_HWTMR5 */
#ifdef __cplusplus
}
#endif
#endif /* __TMR_CONFIG_H__ */

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@ -14,9 +14,9 @@
#ifdef RT_USING_PWM
#if !defined(BSP_USING_TMR1_CH1) && !defined(BSP_USING_TMR1_CH2) && \
!defined(BSP_USING_TMR1_CH3) && !defined(BSP_USING_TMR1_CH4) && \
!defined(BSP_USING_TMR2_CH1) && !defined(BSP_USING_TMR2_CH4) && \
!defined(BSP_USING_TMR2_CH3) && !defined(BSP_USING_TMR3_CH2) && \
!defined(BSP_USING_TMR3_CH1) && !defined(BSP_USING_TMR1_CH4) && \
!defined(BSP_USING_TMR2_CH1) && !defined(BSP_USING_TMR2_CH2) && \
!defined(BSP_USING_TMR2_CH3) && !defined(BSP_USING_TMR2_CH4) && \
!defined(BSP_USING_TMR3_CH1) && !defined(BSP_USING_TMR3_CH2) && \
!defined(BSP_USING_TMR3_CH3) && !defined(BSP_USING_TMR3_CH4)
#error "Please define at least one BSP_USING_TMRx_CHx"
#endif

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@ -12,7 +12,8 @@
#include "drv_usart.h"
#ifdef RT_USING_SERIAL
#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2)
#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \
!defined(BSP_USING_UART3)
#error "Please define at least one BSP_USING_UARTx"
/* this driver can be disabled at menuconfig ¡ú RT-Thread Components ¡ú Device Drivers */
#endif
@ -31,6 +32,9 @@ enum {
#ifdef BSP_USING_UART2
USART2_INDEX,
#endif
#ifdef BSP_USING_UART3
USART3_INDEX,
#endif
};
static struct at32_usart usart_config[] = {
@ -44,6 +48,11 @@ static struct at32_usart usart_config[] = {
USART2,
USART2_IRQn, },
#endif
#ifdef BSP_USING_UART3
{ "uart3",
USART3,
USART3_IRQn, },
#endif
};
static rt_err_t at32_configure(struct rt_serial_device *serial,
@ -222,6 +231,15 @@ void USART2_IRQHandler(void) {
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_UART3
void USART3_IRQHandler(void) {
rt_interrupt_enter();
usart_isr(&usart_config[USART3_INDEX].serial);
rt_interrupt_leave();
}
#endif
int rt_hw_usart_init(void) {
rt_size_t obj_num;

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@ -234,6 +234,8 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
@ -260,6 +262,7 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
@ -272,6 +275,8 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
@ -282,6 +287,14 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
#
# security packages
@ -289,6 +302,7 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
#
# language packages
@ -317,6 +331,12 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
#
# system packages
@ -336,6 +356,10 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
#
# peripheral libraries and drivers
@ -343,6 +367,7 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
@ -351,10 +376,13 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
@ -362,8 +390,12 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_LCD_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
#
# miscellaneous packages
@ -398,6 +430,8 @@ CONFIG_RT_USING_POSIX=y
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
CONFIG_SOC_FAMILY_AT32=y
CONFIG_SOC_SERIES_AT32F403A=y
@ -420,6 +454,7 @@ CONFIG_BSP_USING_UART1=y
CONFIG_BSP_USING_UART2=y
CONFIG_BSP_USING_UART3=y
# CONFIG_BSP_USING_PWM is not set
# CONFIG_BSP_USING_HWTIMER is not set
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_I2C1 is not set
# CONFIG_BSP_USING_ADC is not set

View File

@ -38,12 +38,13 @@ AT32F403A-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器
| 驱动 | 支持情况 | 备注 |
| --------- | -------- | :------------------------: |
| UART | 支持 | USART1/2 |
| UART | 支持 | USART1/2/3 |
| GPIO | 支持 | PA0...PF7 |
| IIC | 支持 | GPIO模拟I2C |
| SPI | 支持 | SPI1/2/3/4 |
| ADC | 支持 | ADC1/2/3 |
| PWM | 支持 | TMR1/2/3 |
| SPI | 支持 | SPI1/2 |
| ADC | 支持 | ADC1/2 |
| PWM | 支持 | TMR1/2 |
| HWTIMER | 支持 | TMR3/4/5 |
| SDIO | 支持 | SDIO1 |
| WDT | 支持 | |
@ -56,6 +57,36 @@ AT32F403A-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器
| PD15 | LED4 |
| PA9 | USART1_TX |
| PA10 | USART1_RX |
| PA2 | USART2_TX |
| PA3 | USART2_RX |
| PB10 | USART3_TX |
| PB11 | USART3_RX |
| PA4 | SPI1_NSS |
| PA5 | SPI1_SCK |
| PA6 | SPI1_MISO |
| PA7 | SPI1_MOSI |
| PB12 | SPI2_NSS |
| PB13 | SPI2_SCK |
| PB14 | SPI2_MISO |
| PB15 | SPI2_MOSI |
| PB6 | I2C1_SCL |
| PB7 | I2C1_SDA |
| PC8 | SDIO1_D0 |
| PC9 | SDIO1_D1 |
| PC10 | SDIO1_D2 |
| PC11 | SDIO1_D3 |
| PC12 | SDIO1_CK |
| PD2 | SDIO1_CMD |
| PA8 | PWM_TMR1_CH1 |
| PA11 | PWM_TMR1_CH4 |
| PA0 | PWM_TMR2_CH1 |
| PA1 | PWM_TMR2_CH2 |
| PC0 | ADC1/2_IN10 |
| PC1 | ADC1/2_IN11 |
| PC2 | ADC1/2_IN12 |
| PC3 | ADC1/2_IN13 |
| PC4 | ADC1/2_IN14 |
| PC5 | ADC1/2_IN15 |
## 使用说明

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@ -12,7 +12,6 @@
#include <rtdevice.h>
#include "board.h"
#include "drv_gpio.h"
#include "drv_spi.h"
/* defined the LED2 pin: PD13 */
#define LED2_PIN GET_PIN(D, 13)

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@ -55,10 +55,38 @@ menu "On-chip Peripheral Drivers"
bool "Enable TMR1 channel1 PWM"
default n
config BSP_USING_TMR1_CH2
bool "Enable TMR1 channel2 PWM"
config BSP_USING_TMR1_CH4
bool "Enable TMR1 channel4 PWM"
default n
endif
menuconfig BSP_USING_TMR2
bool "Enable timer2 output PWM"
default n
if BSP_USING_TMR2
config BSP_USING_TMR2_CH1
bool "Enable TMR2 channel1 PWM"
default n
config BSP_USING_TMR2_CH2
bool "Enable TMR2 channel2 PWM"
default n
endif
endif
menuconfig BSP_USING_HWTIMER
bool "Enable HWTIMER"
default n
select RT_USING_HWTIMER
if BSP_USING_HWTIMER
config BSP_USING_HWTMR3
bool "Enable hardware timer3"
default n
config BSP_USING_HWTMR4
bool "Enable hardware timer4"
default n
config BSP_USING_HWTMR5
bool "Enable hardware timer5"
default n
endif
menuconfig BSP_USING_SPI
@ -100,6 +128,9 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_ADC1
bool "Enable ADC1"
default n
config BSP_USING_ADC2
bool "Enable ADC2"
default n
endif
menuconfig BSP_USING_SDIO
@ -111,13 +142,6 @@ menu "On-chip Peripheral Drivers"
bool "Enable SDIO1"
default n
endif
config BSP_USING_SRAM
bool "Enable SRAM"
depends on (SOC_SERIES_AT32F403)
default n
endmenu
endmenu

View File

@ -58,6 +58,20 @@ void at32_msp_usart_init(void *Instance)
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_3;
GPIO_Init(GPIOA, &GPIO_InitStruct);
}
#endif
#ifdef BSP_USING_UART3
if(USART3 == USARTx)
{
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_USART3, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOB, ENABLE);
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_10;
GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_11;
GPIO_Init(GPIOB, &GPIO_InitStruct);
}
#endif
/* Add others */
}
@ -149,7 +163,7 @@ void at32_msp_tmr_init(void *Instance)
/* GPIOA clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
/* GPIOA Configuration:TMR1 Channel1 as alternate function push-pull */
/* GPIOA Configuration:TMR1 Channel1 and Channel4 as alternate function push-pull */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_8 | GPIO_Pins_11;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
@ -164,90 +178,17 @@ void at32_msp_tmr_init(void *Instance)
/* GPIOA clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA, ENABLE);
/* GPIOA Configuration:TMR1 Channel1 as alternate function push-pull */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
}
if(TMRx == TMR3)
{
/* TMR3 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
/* GPIOA clock enable */
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB, ENABLE);
/* TMR1 Channel1, 2, 3 and 4 as alternate function push-pull */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_6 | GPIO_Pins_7;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* GPIOA Configuration:TMR2 Channel1 and Channel2 as alternate function push-pull */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_Init(GPIOA, &GPIO_InitStructure);
}
/* Add others */
}
#endif /* BSP_USING_PWM */
#if defined (BSP_USING_SRAM)
void at32_msp_xmc_init(void *Instance)
{
XMC_Bank1_Type *XMC = (XMC_Bank1_Type *)Instance;
GPIO_InitType GPIO_InitStructure;
(void)XMC;
/* Enable the XMC Clock */
RCC_AHBPeriphClockCmd(RCC_AHBPERIPH_XMC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOD | RCC_APB2PERIPH_GPIOG | RCC_APB2PERIPH_GPIOE |
RCC_APB2PERIPH_GPIOF, ENABLE);
/*-- GPIO Configuration ------------------------------------------------------*/
/*!< SRAM Data lines configuration */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_8 | GPIO_Pins_9 |
GPIO_Pins_10 | GPIO_Pins_14 | GPIO_Pins_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
GPIO_InitStructure.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_7 | GPIO_Pins_8 | GPIO_Pins_9 | GPIO_Pins_10 |
GPIO_Pins_11 | GPIO_Pins_12 | GPIO_Pins_13 | GPIO_Pins_14 |
GPIO_Pins_15;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/*!< SRAM Address lines configuration */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 |
GPIO_Pins_4 | GPIO_Pins_5 | GPIO_Pins_12 | GPIO_Pins_13 |
GPIO_Pins_14 | GPIO_Pins_15;
GPIO_Init(GPIOF, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 |
GPIO_Pins_4 | GPIO_Pins_5;
GPIO_Init(GPIOG, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_11 | GPIO_Pins_12 | GPIO_Pins_13;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/*!< NOE and NWE configuration */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_4 |GPIO_Pins_5;
GPIO_Init(GPIOD, &GPIO_InitStructure);
/*!< NE3 configuration */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_10;
GPIO_Init(GPIOG, &GPIO_InitStructure);
/*!< NBL0, NBL1 configuration */
GPIO_InitStructure.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1;
GPIO_Init(GPIOE, &GPIO_InitStructure);
}
#endif /* BSP_USING_SRAM */
#ifdef BSP_USING_ADC
void at32_msp_adc_init(void *Instance)
{
@ -261,16 +202,6 @@ void at32_msp_adc_init(void *Instance)
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC1 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
/* Configure ADC Channel as analog input */
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5 | GPIO_Pins_6 | GPIO_Pins_7;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
@ -286,28 +217,42 @@ void at32_msp_adc_init(void *Instance)
RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_ADC2 | RCC_APB2PERIPH_GPIOA | RCC_APB2PERIPH_GPIOB | RCC_APB2PERIPH_GPIOC,ENABLE);
/* Configure ADC Channel as analog input */
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5 | GPIO_Pins_6 | GPIO_Pins_7;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_StructInit(&GPIO_InitStruct);
GPIO_InitStruct.GPIO_Pins = GPIO_Pins_0 | GPIO_Pins_1 | GPIO_Pins_2 | GPIO_Pins_3 | GPIO_Pins_4 | GPIO_Pins_5;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN_ANALOG;
GPIO_Init(GPIOC, &GPIO_InitStruct);
}
#endif
}
#endif /* BSP_USING_ADC */
#ifdef BSP_USING_ADC3
if(ADCx == ADC3)
#ifdef BSP_USING_HWTIMER
void at32_msp_hwtmr_init(void *Instance)
{
/* Add others */
TMR_Type *TMRx = (TMR_Type *)Instance;
#ifdef BSP_USING_HWTMR3
if(TMRx == TMR3)
{
/* TMR3 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR3, ENABLE);
}
#endif
#ifdef BSP_USING_HWTMR4
if(TMRx == TMR4)
{
/* TMR4 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR4, ENABLE);
}
#endif
#ifdef BSP_USING_HWTMR5
if(TMRx == TMR5)
{
/* TMR5 clock enable */
RCC_APB1PeriphClockCmd(RCC_APB1PERIPH_TMR5, ENABLE);
}
#endif
}
#endif /* BSP_USING_ADC */
#endif

View File

@ -27,7 +27,7 @@ void at32_msp_spi_init(void *Instance);
void at32_msp_tmr_init(void *Instance);
void at32_msp_i2c_init(void *Instance);
void at32_msp_sdio_init(void *Instance);
void at32_msp_xmc_init(void *Instance);
void at32_msp_adc_init(void *Instance);
void at32_msp_hwtmr_init(void *Instance);
#endif /* __AT32_MSP_H__ */

File diff suppressed because it is too large Load Diff

View File

@ -1,41 +1,45 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
<SchemaVersion>2.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rt-thread</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
<uAC6>0</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>AT32F403AVGT7</Device>
<Vendor>ArteryTek</Vendor>
<PackID>Keil.AT32F4xx_DFP.1.3.1</PackID>
<Cpu>IRAM(0x20000000,0x38000) IROM(0x08000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
<FlashUtilSpec />
<StartupFile />
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0AT32F403A_1024 -FS08000000 -FL0100000 -FP0($$Device:AT32F403AVGT7$Flash\AT32F403A_1024.FLM))</FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:AT32F403AVGT7$Device\Include\at32f4xx.h</RegisterFile>
<MemoryEnv />
<Cmp />
<Asm />
<Linker />
<OHString />
<InfinionOptionDll />
<SLE66CMisc />
<SLE66AMisc />
<SLE66LinkerMisc />
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:AT32F403AVGT7$SVD\AT32F403Axx.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath />
<IncludePath />
<LibPath />
<RegisterFilePath />
<DBRegisterFilePath />
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
@ -57,8 +61,8 @@
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
@ -67,8 +71,8 @@
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
@ -78,14 +82,14 @@
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
<UserProg2Name />
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopA1X>0</nStopA1X>
<nStopA2X>0</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString />
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
@ -99,8 +103,8 @@
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument />
<IncludeLibraryModules />
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>1</ComprImg>
</CommonProperty>
<DllOption>
@ -109,7 +113,7 @@
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments />
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOption>
@ -133,11 +137,11 @@
</Flash1>
<bUseTDR>1</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3 />
<Flash4 />
<pFcarmOut />
<pFcarmGrp />
<pFcArmRoot />
<Flash3></Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>0</FcArmLst>
</Utilities>
<TargetArmAds>
@ -170,7 +174,7 @@
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M4"</AdsCpuType>
<RvctDeviceName />
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
@ -179,6 +183,7 @@
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>2</RvdsVP>
<RvdsMve>0</RvdsMve>
<hadIRAM2>0</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
@ -302,7 +307,7 @@
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector />
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
@ -319,6 +324,7 @@
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>1</uC99>
<uGnu>0</uGnu>
<useXO>0</useXO>
<v6Lang>1</v6Lang>
<v6LangP>1</v6LangP>
@ -328,9 +334,9 @@
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls />
<MiscControls></MiscControls>
<Define>USE_STDPERIPH_DRIVER, AT32F403AVGT7, RT_USING_ARM_LIBC</Define>
<Undefine />
<Undefine></Undefine>
<IncludePath>.;..\..\..\include;applications;.;board;board\msp;..\Libraries\rt_drivers;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\dfs\include;..\..\..\components\dfs\filesystems\devfs;..\..\..\components\dfs\filesystems\elmfat;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\armlibc;..\..\..\components\libc\compilers\common;..\Libraries\AT32_Std_Driver\CMSIS\AT32\AT32F4xx\inc;..\Libraries\AT32_Std_Driver\CMSIS;..\Libraries\AT32_Std_Driver\AT32F4xx_StdPeriph_Driver\inc</IncludePath>
</VariousControls>
</Cads>
@ -346,10 +352,10 @@
<useXO>0</useXO>
<uClangAs>0</uClangAs>
<VariousControls>
<MiscControls />
<Define />
<Undefine />
<IncludePath />
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -361,13 +367,13 @@
<useFile>0</useFile>
<TextAddressRange>0x08000000</TextAddressRange>
<DataAddressRange>0x20000000</DataAddressRange>
<pXoBase />
<pXoBase></pXoBase>
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
<IncludeLibs />
<IncludeLibsPath />
<Misc />
<LinkerInputFile />
<DisabledWarnings />
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc></Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
@ -380,99 +386,71 @@
<FileType>1</FileType>
<FilePath>..\..\..\src\clock.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\components.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\device.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\idle.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\ipc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\irq.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\kservice.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>memheap.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\memheap.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\mempool.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\object.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\scheduler.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>signal.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\signal.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\src\thread.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
@ -498,36 +476,26 @@
<FileType>1</FileType>
<FilePath>board\board.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>at32_msp.c</FileName>
<FileType>1</FileType>
<FilePath>board\msp\at32_msp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>system_at32f4xx.c</FileName>
<FileType>1</FileType>
<FilePath>board\msp\system_at32f4xx.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>startup_at32f403avgt7.s</FileName>
<FileType>2</FileType>
<FilePath>..\Libraries\AT32_Std_Driver\CMSIS\AT32\AT32F4xx\src\mdk\startup_at32f403avgt7.s</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>drv_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>..\Libraries\rt_drivers\drv_gpio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>drv_usart.c</FileName>
<FileType>1</FileType>
@ -543,29 +511,21 @@
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cpuport.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
@ -581,64 +541,46 @@
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\src\dfs.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_file.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\src\dfs_file.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dfs_fs.c</FileName>
<FileType>1</FileType>
<FilePath>..\..\..\components\dfs\src\dfs_fs.c</FilePath>
</File>
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