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Merge pull request #475 from toasun/master 

CME_M7 eth driver update
This commit is contained in:
Bernard Xiong 2015-05-13 10:31:49 +08:00
parent 2313424f81 b25e602afb
commit ec55dd2f9f
18 changed files with 2069 additions and 386 deletions
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111
bsp/CME_M7/StdPeriph_Driver/inc/cmem7.h
View File

@ -1,12 +1,12 @@
/****************************************************************************************************//**
* @file CMEM7.h
* @file cmem7.h
*
* @brief CMSIS Cortex-M3 Peripheral Access Layer Header File for
* CMEM7 from <unknown Vendor>.
* cmem7 from <unknown Vendor>.
*
* @version V1.0
* @date 5. June 2014
* @date 5. January 2015
*
* @note Generated with SVDConv V2.75
* from CMSIS SVD File 'SVDConv_CME_M7.svd' Version 1.0,
@ -18,7 +18,7 @@
* @{
*/
/** @addtogroup CMEM7
/** @addtogroup cmem7
* @{
*/
@ -46,7 +46,7 @@ typedef enum {
DebugMonitor_IRQn = -4, /*!< 12 Debug Monitor */
PendSV_IRQn = -2, /*!< 14 Pendable request for system service */
SysTick_IRQn = -1, /*!< 15 System Tick Timer */
/* ---------------------- CMEM7 Specific Interrupt Numbers ---------------------- */
/* ---------------------- cmem7 Specific Interrupt Numbers ---------------------- */
ETH_INT_IRQn = 0, /*!< 0 ETH_INT */
USB_INT_IRQn = 1, /*!< 1 USB_INT */
DMA_INT_IRQn = 2, /*!< 2 DMA_INT */
@ -105,7 +105,7 @@ typedef enum {
/** @} */ /* End of group Configuration_of_CMSIS */
#include <core_cm3.h> /*!< Cortex-M3 processor and core peripherals */
#include "system_cmem7.h" /*!< CMEM7 System */
#include "system_cmem7.h" /*!< cmem7 System */
/* ================================================================================ */
@ -789,17 +789,17 @@ typedef struct { /*!< RTC Structure
struct {
__IO uint32_t SECOND : 1; /*!< 1s interrupt, write 1 clear 0 */
__IO uint32_t MICROSECOND: 1; /*!< 1ms interrupt, write 1 clear 0 */
__IO uint32_t MILLSECOND : 1; /*!< 1ms interrupt, write 1 clear 0 */
} INT_STATUS_b; /*!< BitSize */
};
__IO uint32_t SECOND; /*!< current seconds of system time */
union {
__IO uint16_t MICROSECOND; /*!< current micro seconds of system time */
__IO uint16_t MILLSECOND; /*!< current millseconds of system time */
struct {
__IO uint16_t MS : 10; /*!< micro seconds */
} MICROSECOND_b; /*!< BitSize */
} MILLSECOND_b; /*!< BitSize */
};
} RTC_Type;
@ -2884,9 +2884,35 @@ typedef struct { /*!< ETH Structure
are used to index the content */
} VLAN_TAG_b; /*!< BitSize */
};
__I uint32_t RESERVED0[8];
__I uint32_t RESERVED0[2];
__IO uint32_t RWUFFR; /*!< Remote Wake-Up Frame Filter Register */
union {
__IO uint32_t PMTCSR; /*!< PMT Control and Status Register */
struct {
__IO uint32_t PWRDWN : 1; /*!< Power Down */
__IO uint32_t MGKPKTEN : 1; /*!< Magic Packet Enable */
__IO uint32_t RWKPKTEN : 1; /*!< Remote Wake-Up Frame Enable */
uint32_t : 2;
__IO uint32_t MGKPRCVD : 1; /*!< the power management event is generated because of the reception
of a magic packet */
__IO uint32_t RWKPRCVD : 1; /*!< When set, this bit indicates the power management event is generated
because of the reception of a remote wake-up frame */
uint32_t : 2;
__IO uint32_t GLBLUCAST : 1; /*!< When set, enables any unicast packet filtered by the MAC (DAF)address
recognition to be a remote wake-up frame. */
uint32_t : 14;
__IO uint32_t RWKPTR : 3; /*!< Remote Wake-up FIFO Pointer */
uint32_t : 4;
__IO uint32_t RWKFILTRST : 1; /*!< Remote Wake-Up Frame Filter Register Pointer Reset. */
} PMTCSR_b; /*!< BitSize */
};
__I uint32_t RESERVED1[2];
__IO uint32_t MACISR; /*!< Interrupt Status Register */
__IO uint32_t MACIMR; /*!< Interrupt Mask Register */
__IO uint16_t ADDR0_HIGH; /*!< MAC Address0 High Register */
__I uint16_t RESERVED1;
__I uint16_t RESERVED2;
__IO uint32_t ADDR0_LOW; /*!< MAC Address0 LOW Register */
union {
@ -2901,10 +2927,51 @@ typedef struct { /*!< ETH Structure
} ADDR1_HIGH_b; /*!< BitSize */
};
__IO uint32_t ADDR1_LOW; /*!< MAC Address1 LOW Register */
__I uint32_t RESERVED2[47];
__IO uint32_t MMC_RX_MASK; /*!< MMC Receive interrupt mask */
__IO uint32_t MMC_TX_MASK; /*!< MMC Transmit Interrupt Mask */
__I uint32_t RESERVED3[955];
__I uint32_t RESERVED3[44];
union {
__IO uint32_t MMCCR; /*!< MMC Control Register */
struct {
__IO uint32_t CNTRST : 1; /*!< Counters Reset */
__IO uint32_t CNTSTOPRO : 1; /*!< Counter Stop Rollover */
__IO uint32_t RSTONRD : 1; /*!< Reset on Read */
__IO uint32_t CNTFREEZ : 1; /*!< MMC Counter Freeze */
__IO uint32_t CNTPRST : 1; /*!< Counters Preset */
__IO uint32_t CNTPRSTLVL : 1; /*!< Counters Preset */
uint32_t : 2;
__IO uint32_t UCDBC : 1; /*!< Update MMC Counters for Dropped Broadcast Frames */
} MMCCR_b; /*!< BitSize */
};
__IO uint32_t MMCRIR; /*!< MMC Receive Interrupt Register */
__IO uint32_t MMCTIR; /*!< MMC Transmit Interrupt Register */
__IO uint32_t MMCRIMR; /*!< MMC Receive interrupt mask */
__IO uint32_t MMCTIMR; /*!< MMC Transmit Interrupt Mask */
__I uint32_t RESERVED4[59];
__IO uint32_t MMCIRCOIM; /*!< MMC IPC Receive Checksum Offload Interrupt Mask */
__I uint32_t RESERVED5[319];
union {
__IO uint32_t PTPTSCR; /*!< Timestamp Control Register */
struct {
__IO uint32_t TSENA : 1; /*!< Timestamp Enable */
__IO uint32_t TSCFUPDT : 1; /*!< Timestamp Fine or Coarse Update */
__IO uint32_t TSINIT : 1; /*!< Timestamp Initialize */
__IO uint32_t TSUPDT : 1; /*!< Timestamp Update */
__IO uint32_t TSTRIG : 1; /*!< Timestamp Interrupt Trigger Enable */
__IO uint32_t TSADDREG : 1; /*!< Addend Reg Update */
} PTPTSCR_b; /*!< BitSize */
};
__IO uint32_t PTPSSIR; /*!< Sub-Second Increment Register */
__IO uint32_t PTPTSHR; /*!< System Time Seconds Register */
__IO uint32_t PTPTSLR; /*!< System Time Nanoseconds Register */
__IO uint32_t PTPTSHUR; /*!< System Time Seconds Update Register */
__IO uint32_t PTPTSLUR; /*!< System Time Nanoseconds Update Register */
__IO uint32_t PTPTSAR; /*!< Timestamp Addend Register */
__IO uint32_t PTPTTHR; /*!< Target Time Seconds Register */
__IO uint32_t PTPTTLR; /*!< Target Time Nanoseconds Register */
__I uint32_t RESERVED6[567];
union {
__IO uint32_t BUS_MODE; /*!< Flow Control Register */
@ -3019,7 +3086,7 @@ typedef struct { /*!< ETH Structure
__IO uint32_t NIE : 1; /*!< Normal Interrupt Summary Enable */
} INT_EN_b; /*!< BitSize */
};
__I uint32_t RESERVED4[3];
__I uint32_t RESERVED7[3];
union {
__IO uint32_t AHB_STATUS; /*!< AHB Status Register */
@ -3029,7 +3096,7 @@ typedef struct { /*!< ETH Structure
in the non-idle state */
} AHB_STATUS_b; /*!< BitSize */
};
__I uint32_t RESERVED5[6];
__I uint32_t RESERVED8[6];
__I uint32_t CURTDESAPTR; /*!< Current Host Transmit Descriptor Register */
__I uint32_t CURRDESAPTR; /*!< Current Host Receive Descriptor Register */
__I uint32_t CURTBUFAPTR; /*!< Current Host Transmit Buffer Address Register */
@ -7227,7 +7294,7 @@ typedef struct { /*!< GLOBAL_CTRL Structure
struct {
__IO uint32_t SECOND : 1; /*!< 1s interrupt enable */
__IO uint32_t MICROSECOND: 1; /*!< 1ms interrupt enable */
__IO uint32_t MILLSECOND : 1; /*!< 1ms interrupt enable */
} RTC_INT_EN_b; /*!< BitSize */
};
__I uint32_t RESERVED1;
@ -7315,7 +7382,9 @@ typedef struct { /*!< DDRC Structure
__IO uint32_t MODE : 6; /*!< DDRC Mode */
uint32_t : 2;
__IO uint32_t LANE : 1; /*!< LANE synchronization logic bypass */
uint32_t : 7;
uint32_t : 3;
__IO uint32_t ADEC : 1; /*!< address decoder mapping */
uint32_t : 3;
__IO uint32_t B16 : 2; /*!< Active 16 bit DQ position when the unmber of DQ IO is 16 */
uint32_t : 6;
__IO uint32_t CLKPOL : 2; /*!< DQS clkpol set by user on the PHY */
@ -7933,7 +8002,7 @@ typedef struct { /*!< SOFT_RESET Structure
/** @} */ /* End of group Device_Peripheral_Registers */
/** @} */ /* End of group CMEM7 */
/** @} */ /* End of group cmem7 */
/** @} */ /* End of group (null) */
#ifdef __cplusplus
@ -7941,5 +8010,5 @@ typedef struct { /*!< SOFT_RESET Structure
#endif
#endif /* CMEM7_H */
#endif /* cmem7_H */

9
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_conf.h
View File

@ -45,6 +45,11 @@
#define _USB
#define _WDG
//#define _MARVELL
//#define _IP1826D
#define _M7NORFLASH
#define _ME_6095_F
#define USE_FULL_ASSERT 1
#ifdef USE_FULL_ASSERT
@ -71,7 +76,9 @@ typedef enum _BOOL {FALSE = 0, TRUE = 1} BOOL;
/**
* System clock frequency, unit is Hz.
*/
#define SYSTEM_CLOCK_FREQ 200000000
#define SYSTEM_CLOCK_FREQ 300000000
//250000000
//300000000
/**
* @brief usecond delay

65
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_eth.h
View File

@ -86,7 +86,6 @@
/**
* @}
*/
/**
* @brief EFUSE receive filter structure
*/
@ -105,15 +104,15 @@ typedef struct
*/
typedef struct
{
BOOL ETH_LinkUp; /*!< If ETH is linked up and it can be retrieved from PHY */
BOOL ETH_LinkUp; /*!< If ETH is linked up and it can be retrieved from PHY */
uint8_t ETH_Speed; /*!< speed of ETH, refer as @ref ETH_SPEED */
uint8_t ETH_Duplex; /*!< duplex mode of ETH, refer as @ref ETH_DUPLEX */
uint8_t ETH_Duplex; /*!< duplex mode of ETH, refer as @ref ETH_DUPLEX */
BOOL ETH_RxEn; /*!< Rx enable */
BOOL ETH_TxEn; /*!< Tx enable */
BOOL ETH_ChecksumOffload; /*!< Checksum offload enable */
BOOL ETH_JumboFrame; /*!< Jumbo Frame Enable */
uint8_t ETH_MacAddr[6]; /*!< MAC address */
ETH_FrameFilter *ETH_Filter; /*!< Received frame address filter, receive all if null */
ETH_FrameFilter *ETH_Filter; /*!< Received frame address filter, receive all if null */
} ETH_InitTypeDef;
/**
@ -173,14 +172,14 @@ typedef struct {
uint32_t CRC_ERR : 1; /*!< [OUT] CRC error while last segment */
uint32_t : 5;
uint32_t TTSE : 1; /*!< timestamp available while last segment */
uint32_t LS : 1; /*!< last segment flag */
uint32_t FS : 1; /*!< first segment flag */
uint32_t LS : 1; /*!< [OUT] last segment flag */
uint32_t FS : 1; /*!< [OUT] first segment flag */
uint32_t : 1;
uint32_t OVERFLOW_ERR : 1; /*!< [OUT] FIFO overflow while last segment */
uint32_t LENGTH_ERR : 1; /*!< [OUT] length error while last segment */
uint32_t : 2;
uint32_t ERR_SUM : 1; /*!< [OUT] Error summary while last segment */
uint32_t FL : 14; /*!< frame length while last segment */
uint32_t FL : 14; /*!< [OUT] frame length while last segment */
uint32_t : 2;
} RX0_b;
} RX_0;
@ -216,7 +215,13 @@ uint32_t ETH_PhyRead(uint32_t phyAddr, uint32_t phyReg);
* @retval None
*/
void ETH_PhyWrite(uint32_t phyAddr, uint32_t phyReg, uint32_t data);
/**
* @brief Fills each ETH_InitStruct member with its default value.
* @param ETH_InitStruct: pointer to a ETH_InitTypeDef structure
* which will be initialized.
* @retval : None
*/
void ETH_StructInit(ETH_InitTypeDef* init);
/**
* @brief Ethernet initialization
* @note This function should be called at first before any other interfaces.
@ -231,21 +236,21 @@ BOOL ETH_Init(ETH_InitTypeDef *init);
* @param[in] Enable The bit indicates if specific interrupts are enable or not
* @retval None
*/
void ETH_EnableInt(uint32_t Int, BOOL enable);
void ETH_ITConfig(uint32_t Int, BOOL enable);
/**
* @brief Check specific interrupts are set or not
* @param[in] Int interrupt mask bits, which can be the combination of @ref ETH_INT
* @retval BOOL The bit indicates if specific interrupts are set or not
*/
BOOL ETH_GetIntStatus(uint32_t Int);
BOOL ETH_GetITStatus(uint32_t Int);
/**
* @brief Clear specific interrupts
* @param[in] Int interrupt mask bits, which can be the combination of @ref ETH_INT
* @retval None
*/
void ETH_ClearInt(uint32_t Int);
void ETH_ClearITPendingBit(uint32_t Int);
/**
* @brief Get ethernte MAC address
@ -299,7 +304,7 @@ ETH_TX_DESC *ETH_AcquireFreeTxDesc(void);
/**
* @brief Check if a transmission descriptor is free or not
* @param desc A pointer of a transmission descriptor
* @param[in] desc A pointer of a transmission descriptor
* @retval BOOL True if the transmission descriptor is free, or flase.
*/
BOOL ETH_IsFreeTxDesc(ETH_TX_DESC *desc);
@ -309,11 +314,26 @@ BOOL ETH_IsFreeTxDesc(ETH_TX_DESC *desc);
* After users prepared data in the buffer of a free descriptor,
* They must call this function to change ownership of the
* descriptor to hardware.
* @param desc A pointer of a transmission descriptor
* @param[in] desc A pointer of a transmission descriptor
* @retval None
*/
void ETH_ReleaseTxDesc(ETH_TX_DESC *desc);
/**
* @brief Set buffer address of the specific TX descriptor
* @param[in] desc A pointer of a transmission descriptor
* @param[in] bufAddr buffer address to be sent
* @retval None
*/
void ETH_SetTxDescBufAddr(ETH_TX_DESC *desc, uint32_t bufAddr);
/**
* @brief Get buffer address of the specific TX descriptor
* @param[in] desc A pointer of a transmission descriptor
* @retval uint32_t buffer address to be gotten
*/
uint32_t ETH_GetTxDescBufAddr(ETH_TX_DESC *desc);
/**
* @brief Set ethernet receive descriptor ring
* @note Make sure that memory occupied by descriptors should be in physical
@ -359,7 +379,7 @@ ETH_RX_DESC *ETH_AcquireFreeRxDesc(void);
/**
* @brief Check if a receive descriptor is free or not
* @param desc A pointer of a receive descriptor
* @param[in] desc A pointer of a receive descriptor
* @retval BOOL True if the receive descriptor is free, or flase.
*/
BOOL ETH_IsFreeRxDesc(ETH_RX_DESC *desc);
@ -369,11 +389,26 @@ BOOL ETH_IsFreeRxDesc(ETH_RX_DESC *desc);
* After users handled data in the buffer of a free descriptor,
* They must call this function to change ownership of the
* descriptor to hardware.
* @param desc A pointer of a transmission descriptor
* @param[in] desc A pointer of a transmission descriptor
* @retval None
*/
void ETH_ReleaseRxDesc(ETH_RX_DESC *desc);
/**
* @brief Set buffer address of the specific RX descriptor
* @param[in] desc A pointer of a receive descriptor
* @param[in] bufAddr buffer address to be received
* @retval None
*/
void ETH_SetRxDescBufAddr(ETH_RX_DESC *desc, uint32_t bufAddr);
/**
* @brief Get buffer address of the specific RX descriptor
* @param[in] desc A pointer of a receive descriptor
* @retval uint32_t buffer address to be gotten
*/
uint32_t ETH_GetRxDescBufAddr(ETH_RX_DESC *desc);
#ifdef __cplusplus
}
#endif

8
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_flash.h
View File

@ -202,6 +202,14 @@ void FLASH_Read(uint8_t ReadMode, uint32_t addr, uint16_t size, uint8_t* data);
*/
void FLASH_Write(uint32_t addr, uint16_t size, uint8_t* data);
void flash_WaitInWritting(void) ;
void flash_WaitReadFifoNotEmpty(void);
uint16_t flash_ReadFifo(uint16_t size, uint8_t* data) ;
#ifdef __cplusplus
}
#endif

11
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_gpio.h
View File

@ -140,6 +140,17 @@ void GPIO_InitPwm(uint8_t Channel, uint32_t HighLevelNanoSecond, uint32_t LowLev
*/
void GPIO_EnablePwm(uint8_t Channel, BOOL Enable);
/**
xjf 20150324
**/
void GPIO_SetBits(uint32_t mask);
void GPIO_clrBits(uint32_t mask);
uint32_t GPIO_getBits(uint32_t mask);
#ifdef __cplusplus
}
#endif

10
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_includes.h
View File

@ -102,6 +102,16 @@
#include "cmem7_wdg.h"
#endif
#ifdef _MARVELL
#include <marvel_98dx242.h>
#include <s24g_i2c.h>
#endif
#ifdef _IP1826D
#include <ip1826d_v00.h>
#endif
#ifdef __cplusplus
}
#endif

42
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_misc.h
View File

@ -87,9 +87,11 @@ typedef struct
* @{
*/
#define NVIC_VectTab_CME_CODE ((uint32_t)0x00000000)
#define NVIC_VectTab_RAM ((uint32_t)0x20000000)
#define NVIC_VectTab_FLASH ((uint32_t)0x08000000)
#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_CME_CODE) || \
((VECTTAB) == NVIC_VectTab_RAM) || \
((VECTTAB) == NVIC_VectTab_FLASH))
/**
* @}
@ -197,6 +199,20 @@ void NVIC_SystemLPConfig(uint8_t LowPowerMode, BOOL NewState);
*/
void GLB_MMAP(uint32_t from, uint32_t to, BOOL isIcacheOn);
/**
* @brief Convert the mapping destination address to source address
* @param[in] to address to be mapped to
* @retval uint32_t address to be mapped from
*/
uint32_t GLB_ConvertToMappingFromAddr(uint32_t to);
/**
* @brief Convert the mapping source address to destination address
* @param[in] from address to be mapped from
* @retval uint32_t address to be mapped to
*/
uint32_t GLB_ConvertToMappingToAddr(uint32_t from);
/**
* @brief Set NMI irq number, it should be one of @ref IRQn_Type.
* @Note You can assign any valid IRQn_Type to NMI. After that, you will enter NMI
@ -228,6 +244,30 @@ void GLB_SetNmiIrqNum(uint32_t irq);
*/
void GLB_SelectSysClkSource(uint8_t source);
/**
* @brief Simulate instruction 'STRB' or 'STRH' with 'BFI'
* @Note In M7, you have to write a register in 32-bit alignment,
* not in 8-bit or 16-bit.
* @param[in] addr register address to be written
* @param[in] value value to be written
* @param[in] lsb LSB in register to be written
* @param[in] len bit length to be written
* @retval None
*/
//#define aaaa(len) __asm("LDR len, 11")
#define CMEM7_BFI(addr, value, lsb, len) \
do { \
unsigned long tmp; \
unsigned long tmp1 = (unsigned long)addr; \
\
__asm("LDR tmp, [tmp1]\n" \
"BFI tmp, "#value", "#lsb", "#len" \n" \
"STR tmp, [tmp1]\n"); \
} while (0)
#ifdef __cplusplus
}
#endif

16
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_rtc.h
View File

@ -38,34 +38,34 @@
* @{
*/
#define RTC_Int_Second ((uint32_t)0x00000001)
#define RTC_Int_Microsecond ((uint32_t)0x00000002)
#define RTC_Int_Millsecond ((uint32_t)0x00000002)
#define RTC_Int_All ((uint32_t)0x00000003)
#define IS_RTC_INT(INT) (((INT) != 0) && (((INT) & ~RTC_Int_All) == 0))
/**
* @}
*/
/**
* @brief Enable or disable RTC interrupt.
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @param[in] Enable The bit indicates if specific interrupts are enable or not
* @retval None
*/
void RTC_EnableInt(uint32_t Int, BOOL Enable);
void RTC_ITConfig(uint32_t Int, BOOL Enable);
/**
* @brief Check specific interrupts are set or not
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @retval BOOL The bit indicates if specific interrupts are set or not
*/
BOOL RTC_GetIntStatus(uint32_t Int);
BOOL RTC_GetITStatus(uint32_t Int);
/**
* @brief Clear specific interrupts
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @retval None
*/
void RTC_ClearInt(uint32_t Int);
void RTC_ClearITPendingBit(uint32_t Int);
/**
* @brief Get seconds since power up
@ -75,11 +75,11 @@ void RTC_ClearInt(uint32_t Int);
uint32_t RTC_GetSecond(void);
/**
* @brief Get current micro-seconds
* @brief Get current millseconds
* @param None
* @retval uint32_t Current micro-seconds
* @retval uint32_t Current millseconds
*/
uint16_t RTC_GetMicroSecond(void);
uint16_t RTC_GetMillSecond(void);
#ifdef __cplusplus
}

19
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_wdg.h
View File

@ -56,14 +56,21 @@
* @}
*/
/**
* @brief Deinitializes the Watchdog peripheral registers to their default reset values.
* @param[in] None
* @retval None
*/
void WDG_DeInit(void);
/**
* @brief Watchdog initialization
* @note This function should be called at first before any other interfaces.
* @param[in] trigger Watchdog interrupt trigger mode, which is a value of @ref WDG_TRIGGER_MODE
* @param[in] ResetMicroSecond MicroSeconds lasts before global reset
* @param[in] ResetMillSecond MillSeconds lasts before global reset
* @retval None
*/
void WDG_Init(uint8_t trigger, uint16_t ResetMicroSecond);
void WDG_Init(uint8_t trigger, uint16_t ResetMillSecond);
/**
* @brief Enable or disable watchdog interrupt.
@ -71,28 +78,28 @@ void WDG_Init(uint8_t trigger, uint16_t ResetMicroSecond);
* @param[in] Enable The bit indicates if the specific interrupt are enable or not
* @retval None
*/
void WDG_EnableInt(uint8_t Int, BOOL Enable);
void WDG_ITConfig(uint8_t Int, BOOL Enable);
/**
* @brief Check the specific interrupt are set or not
* @param None
* @retval BOOL The bit indicates if the specific interrupt are set or not
*/
BOOL WDG_GetIntStatus(void);
BOOL WDG_GetITStatus(void);
/**
* @brief Clear the specific interrupt
* @param None
* @retval None
*/
void WDG_ClearInt(void);
void WDG_ClearITPendingBit(void);
/**
* @brief Enable or disable watchdog.
* @param[in] Enable The bit indicates if watchdog is enable or not
* @retval None
*/
void WDG_Enable(BOOL Enable);
void WDG_Cmd(BOOL Enable);
#ifdef __cplusplus

137
bsp/CME_M7/StdPeriph_Driver/src/cmem7_eth.c
View File

@ -5,8 +5,8 @@
* @brief CMEM7 ethernet source file
*
*
* @version V1.0
* @date 3. September 2013
* @version V2.0
* @date 3. September 2014
*
* @note
*
@ -25,7 +25,7 @@
*/
#include "cmem7_eth.h"
#include "cmem7_misc.h"
typedef struct {
union {
@ -49,7 +49,7 @@ typedef struct {
uint32_t TCH : 1; /*!< Second Address Chained */
uint32_t : 4;
uint32_t TTSE : 1; /*!< enables IEEE1588 hardware timestamping in first segment */
uint32_t : 2;
uint32_t : 2;
uint32_t FS : 1; /*!< first segment flag */
uint32_t LS : 1; /*!< last segment flag */
uint32_t IC : 1; /*!< Interrupt on Completion */
@ -190,8 +190,9 @@ static void mac_SetConfig(ETH_InitTypeDef *init) {
ETH->CONFIG_b.IPC = init->ETH_ChecksumOffload;
ETH->CONFIG_b.DM = init->ETH_Duplex;
ETH->CONFIG_b.LM = FALSE;
ETH->MMC_RX_MASK = 0xFFFFFFFF;
ETH->MMC_TX_MASK = 0xFFFFFFFF;
ETH->MMCRIMR = 0xFFFFFFFF;
ETH->MMCTIMR = 0xFFFFFFFF;
ETH->MMCIRCOIM = 0xFFFFFFFF;
if (init->ETH_Speed == ETH_SPEED_10M) {
ETH->CONFIG_b.FES = ETH_EXACT_SPEED_10M_BPS;
@ -209,7 +210,7 @@ static void mac_SetConfig(ETH_InitTypeDef *init) {
ETH->CONFIG_b.JD = TRUE;
ETH->CONFIG_b.WD = TRUE;
ETH->CONFIG_b.TC = FALSE;
ETH->CONFIG_b.CST = FALSE;
ETH->CONFIG_b.CST = TRUE;
ETH->CONFIG_b.TWOKPE = FALSE;
ETH->CONFIG_b.SARC = ETH_SOURCE_ADDR_REPLACE;
}
@ -318,7 +319,7 @@ static void mac_SetFrameFilter(ETH_FrameFilter *filter) {
ETH->FF_b.VTFE = FALSE;
ETH->FF_b.IPFE = FALSE;
ETH->FF_b.DNTU = FALSE;
ETH->FF_b.RA = TRUE;
ETH->FF_b.RA = FALSE;//TRUE
// receive all
if (!filter) {
@ -339,14 +340,20 @@ static void mac_SetFrameFilter(ETH_FrameFilter *filter) {
// SA
if (filter->ETH_SourceFilterEnable) {
ETH->FF_b.RA = FALSE;
uint32_t value;
ETH->FF_b.RA = FALSE;
ETH->FF_b.SAF = TRUE;
ETH->FF_b.SAIF = filter->ETH_SourceDrop;
ETH->ADDR1_HIGH_b.AE = TRUE;
ETH->ADDR1_HIGH_b.SA = TRUE;
ETH->ADDR1_HIGH_b.ADDR =
ETH->ADDR1_HIGH_b.SA = TRUE;
ETH->ADDR1_HIGH_b.ADDR =
(filter->ETH_SourceMacAddr[5] << 8) | filter->ETH_SourceMacAddr[4];
ETH->ADDR1_LOW = (filter->ETH_SourceMacAddr[3] << 24) |
// value = (filter->ETH_SourceMacAddr[5] << 8) | filter->ETH_SourceMacAddr[4];
// CMEM7_BFI(&(ETH->ADDR1_HIGH), value, 0, 16);
ETH->ADDR1_LOW = (filter->ETH_SourceMacAddr[3] << 24) |
(filter->ETH_SourceMacAddr[2] << 16) |
(filter->ETH_SourceMacAddr[1] << 8) |
filter->ETH_SourceMacAddr[0];
@ -355,9 +362,9 @@ static void mac_SetFrameFilter(ETH_FrameFilter *filter) {
static void mac_setFlowControl(void) {
ETH->FC_b.FCB = FALSE;
ETH->FC_b.TFE = TRUE;
ETH->FC_b.RFE = TRUE;
ETH->FC_b.UP = TRUE;
ETH->FC_b.TFE = FALSE;//TRUE
ETH->FC_b.RFE = FALSE;//TRUE
ETH->FC_b.UP = FALSE;//TRUE
}
uint32_t ETH_PhyRead(uint32_t phyAddr, uint32_t phyReg) {
@ -381,27 +388,44 @@ void ETH_PhyWrite(uint32_t phyAddr, uint32_t phyReg, uint32_t data) {
while (ETH->GMII_ADDR_b.BUSY) ;
}
void ETH_StructInit(ETH_InitTypeDef* init)
{
init->ETH_Speed = ETH_SPEED_10M;
init->ETH_Duplex = ETH_DUPLEX_FULL;
init->ETH_JumboFrame = FALSE;
init->ETH_LinkUp = FALSE;
init->ETH_RxEn = TRUE;
init->ETH_TxEn = TRUE;
init->ETH_ChecksumOffload = FALSE;
init->ETH_Filter = 0;
init->ETH_MacAddr[0] = 0;
init->ETH_MacAddr[1] = 0;
init->ETH_MacAddr[2] = 0;
init->ETH_MacAddr[3] = 0;
init->ETH_MacAddr[4] = 0;
init->ETH_MacAddr[5] = 0;
}
BOOL ETH_Init(ETH_InitTypeDef *init) {
assert_param(init);
assert_param(IS_ETH_SPEED(init->ETH_Speed));
assert_param(IS_ETH_DUPLEX(init->ETH_Duplex));
assert_param(init);
assert_param(IS_ETH_SPEED(init->ETH_Speed));
assert_param(IS_ETH_DUPLEX(init->ETH_Duplex));
mac_SwReset();
mac_SetConfig(init);
mac_SetMacAddr(init->ETH_MacAddr);
mac_SwReset();
mac_SetConfig(init);
mac_SetMacAddr(init->ETH_MacAddr);
mac_SetBurst(ETH_BURST_MODE_MIXED, 3, 4);
mac_SetPriority(TRUE, 0);
mac_SetDescMode(TRUE, 0);
mac_SetOpertionMode();
mac_SetFrameFilter(init->ETH_Filter);
mac_setFlowControl();
mac_SetBurst(ETH_BURST_MODE_MIXED, 3, 4);
mac_SetPriority(TRUE, 0);
mac_SetDescMode(TRUE, 0);
mac_SetOpertionMode();
mac_SetFrameFilter(init->ETH_Filter);
mac_setFlowControl();
return TRUE;
return TRUE;
}
void ETH_EnableInt(uint32_t Int, BOOL enable) {
void ETH_ITConfig(uint32_t Int, BOOL enable) {
assert_param(IS_ETH_INT(Int));
if (enable) {
@ -426,7 +450,7 @@ void ETH_EnableInt(uint32_t Int, BOOL enable) {
}
}
}
BOOL ETH_GetIntStatus(uint32_t Int) {
BOOL ETH_GetITStatus(uint32_t Int) {
assert_param(IS_ETH_INT(Int));
Int &= ETH->INT_EN;
@ -436,8 +460,7 @@ BOOL ETH_GetIntStatus(uint32_t Int) {
return FALSE;
}
void ETH_ClearInt(uint32_t Int) {
void ETH_ClearITPendingBit(uint32_t Int) {
uint32_t sta;
assert_param(IS_ETH_INT(Int));
@ -450,15 +473,15 @@ void ETH_ClearInt(uint32_t Int) {
if (IS_ETH_INT_NORMAL(Int)) {
if (!IS_ETH_INT_NORMAL(sta)) {
// write 1 clear
ETH->STATUS_b.NIS = 1;
// write 1 clear NIS
ETH->STATUS = ETH_INT_NORMAL_SUMMARY;
}
}
if (IS_ETH_INT_ABNORMAL(Int)) {
if (!IS_ETH_INT_ABNORMAL(sta)) {
// write 1 clear
ETH->STATUS_b.AIS = 1;
// write 1 clear AIS
ETH->STATUS = ETH_INT_ABNORMAL_SUMMARY;
}
}
}
@ -491,12 +514,25 @@ BOOL ETH_SetTxDescRing(ETH_TX_DESC *ring) {
return FALSE;
}
/* If code mapping */
ring = (ETH_TX_DESC *)GLB_ConvertToMappingFromAddr((uint32_t)ring);
buf = ring;
do {
INNER_ETH_TX_DESC *desc = (INNER_ETH_TX_DESC *)buf;
uint8_t first = desc->TX_0.TX0_b.FS;
uint8_t last = desc->TX_0.TX0_b.LS;
// clear all bits
desc->TX_0.TX0 = 0;
desc->TX_0.TX0_b.FS = first;
desc->TX_0.TX0_b.LS = last;
desc->TX_0.TX0_b.TCH = TRUE;
desc->TX_0.TX0_b.IC = TRUE;
desc->TX_0.TX0_b.OWN = ETH_DESC_OWN_BY_SELF;
buf->bufAddr = GLB_ConvertToMappingFromAddr(buf->bufAddr);
buf->nextDescAddr = GLB_ConvertToMappingFromAddr(buf->nextDescAddr);
buf = (ETH_TX_DESC *)buf->nextDescAddr;
} while (buf != ring);
@ -553,6 +589,16 @@ void ETH_ReleaseTxDesc(ETH_TX_DESC *desc) {
inner->TX_0.TX0_b.OWN = ETH_DESC_OWN_BY_HW;
}
void ETH_SetTxDescBufAddr(ETH_TX_DESC *desc, uint32_t bufAddr) {
if (desc) {
desc->bufAddr = GLB_ConvertToMappingFromAddr(bufAddr);;
}
}
uint32_t ETH_GetTxDescBufAddr(ETH_TX_DESC *desc) {
return (desc ? GLB_ConvertToMappingToAddr(desc->bufAddr) : 0);
}
BOOL ETH_SetRxDescRing(ETH_RX_DESC *ring) {
ETH_RX_DESC *buf = ring;
@ -564,12 +610,17 @@ BOOL ETH_SetRxDescRing(ETH_RX_DESC *ring) {
return FALSE;
}
/* If code mapping */
ring = (ETH_RX_DESC *)GLB_ConvertToMappingFromAddr((uint32_t)ring);
buf = ring;
do {
INNER_ETH_RX_DESC *desc = (INNER_ETH_RX_DESC *)buf;
desc->RX_1.RX1_b.RCH = TRUE;
desc->RX_1.RX1_b.DIC = FALSE;
desc->RX_0.RX0_b.OWN = ETH_DESC_OWN_BY_HW;
buf->bufAddr = GLB_ConvertToMappingFromAddr(buf->bufAddr);
buf->nextDescAddr = GLB_ConvertToMappingFromAddr(buf->nextDescAddr);
buf = (ETH_RX_DESC *)buf->nextDescAddr;
} while (buf != ring);
@ -627,3 +678,15 @@ void ETH_ReleaseRxDesc(ETH_RX_DESC *desc) {
}
void ETH_SetRxDescBufAddr(ETH_RX_DESC *desc, uint32_t bufAddr) {
if (desc) {
desc->bufAddr = GLB_ConvertToMappingFromAddr(bufAddr);;
}
}
uint32_t ETH_GetRxDescBufAddr(ETH_RX_DESC *desc) {
return (desc ? GLB_ConvertToMappingToAddr(desc->bufAddr) : 0);
}

9
bsp/CME_M7/StdPeriph_Driver/src/cmem7_flash.c
View File

@ -108,7 +108,8 @@ static uint8_t flash_ReadInnerStatusHigh() {
return (uint8_t)NOR_FLASH->DATA;
}
static void flash_WaitInWritting() {
//static void flash_WaitInWritting() {
void flash_WaitInWritting(void) {
FLASH_INNER_STATUS s;
while (NOR_FLASH->STATUS_b.BUSY);
@ -173,7 +174,8 @@ static void flash_RwReq(uint8_t cmd, uint32_t addr, uint16_t size) {
NOR_FLASH->TRIGGER_b.OP_START = TRUE;
}
static void flash_WaitReadFifoNotEmpty() {
//static void flash_WaitReadFifoNotEmpty() {
void flash_WaitReadFifoNotEmpty(void) {
while (NOR_FLASH->STATUS_b.RD_FIFO_EMPTY) {
if (wait) {
(*wait)();
@ -181,7 +183,8 @@ static void flash_WaitReadFifoNotEmpty() {
}
}
static uint16_t flash_ReadFifo(uint16_t size, uint8_t* data) {
//static uint16_t flash_ReadFifo(uint16_t size, uint8_t* data) {
uint16_t flash_ReadFifo(uint16_t size, uint8_t* data) {
uint16_t count = 0;
while (!NOR_FLASH->STATUS_b.RD_FIFO_EMPTY && size != 0) {

75
bsp/CME_M7/StdPeriph_Driver/src/cmem7_gpio.c
View File

@ -179,3 +179,78 @@ void GPIO_EnablePwm(uint8_t Channel, BOOL Enable) {
}
}
/**
xjf 20150324
**/
void GPIO_SetBits(uint32_t mask)
{
static uint32_t g_GPIO_OUT_UNMASK;
static uint32_t g_GPIO_OUT_DATA;
static uint32_t g_GPIO_OE;
g_GPIO_OUT_UNMASK = GPIO->GPIO_OUT_UNMASK ;
g_GPIO_OUT_DATA = GPIO->GPIO_OUT_DATA ;
g_GPIO_OE = GPIO->GPIO_OE ;
g_GPIO_OUT_UNMASK |=mask;
g_GPIO_OE |=mask;
g_GPIO_OUT_DATA |=mask;
GPIO->GPIO_OUT_UNMASK =g_GPIO_OUT_UNMASK ;
GPIO->GPIO_OUT_DATA =g_GPIO_OUT_DATA ;
GPIO->GPIO_OE =g_GPIO_OE ;
}
void GPIO_clrBits(uint32_t mask)
{
static uint32_t g_GPIO_OUT_UNMASK;
static uint32_t g_GPIO_OUT_DATA;
static uint32_t g_GPIO_OE;
g_GPIO_OUT_UNMASK = GPIO->GPIO_OUT_UNMASK ;
g_GPIO_OUT_DATA = GPIO->GPIO_OUT_DATA ;
g_GPIO_OE = GPIO->GPIO_OE ;
g_GPIO_OUT_UNMASK |=mask;
g_GPIO_OE |=mask;
g_GPIO_OUT_DATA &=(~ mask);
GPIO->GPIO_OUT_UNMASK =g_GPIO_OUT_UNMASK ;
GPIO->GPIO_OUT_DATA =g_GPIO_OUT_DATA ;
GPIO->GPIO_OE =g_GPIO_OE ;
}
uint32_t GPIO_getBits(uint32_t mask)
{
static uint32_t g_GPIO_OUT_UNMASK;
//static uint32_t g_GPIO_OUT_DATA;
static uint32_t g_GPIO_OE;
uint32_t get_delay = 0;
uint32_t saved_mask;
saved_mask=mask;
g_GPIO_OUT_UNMASK = GPIO->GPIO_OUT_UNMASK ;
g_GPIO_OE = GPIO->GPIO_OE ;
g_GPIO_OUT_UNMASK &=(~mask);
g_GPIO_OE &=(~mask);
GPIO->GPIO_OUT_UNMASK =g_GPIO_OUT_UNMASK ;
GPIO->GPIO_OE =g_GPIO_OE ;
for(get_delay=0;get_delay<100;get_delay++)
{
}
//get_delay=(GPIO->GPIO_IN)&saved_mask;
if(((GPIO->GPIO_IN)&saved_mask)==saved_mask)
{
return(1);
}
else
{
return(0);
}
}
/**
xjf 20150324
**/

46
bsp/CME_M7/StdPeriph_Driver/src/cmem7_misc.c
View File

@ -92,8 +92,20 @@ void NVIC_SystemLPConfig(uint8_t LowPowerMode, BOOL NewState)
}
}
#define DEF_IBUS_OFFSET 0x1FFE0000
#define DEF_EXT_ADDR 0x08020000
static BOOL isMappingOn() {
/* If default values aren't changed */
if ((GLOBAL_CTRL->IBUSOFF == DEF_IBUS_OFFSET) &&
(GLOBAL_CTRL->EXTADDR == DEF_EXT_ADDR)) {
return FALSE;
}
return TRUE;
}
void GLB_MMAP(uint32_t from, uint32_t to, BOOL isIcacheOn) {
int n;
volatile int n;
GLOBAL_CTRL->IBUSOFF = GLOBAL_CTRL->DBUSOFF = (from - to);
GLOBAL_CTRL->EXTADDR = to;
@ -104,6 +116,38 @@ void GLB_MMAP(uint32_t from, uint32_t to, BOOL isIcacheOn) {
for (n = 0; n < 100; n++);
}
/*
* ------------------------------------------------------------------
* | 0 - 0x20000 | --> 0x20000000 | -> 0x40000000 | -> 0xFFFFFFFF |
* | code SRAM | map to region | data SRAM | map from region |
* ------------------------------------------------------------------
*/
#define MAPPING_FROM_REGION_START 0x40000000
#define MAPPING_TO_REGION_END 0x20000000
uint32_t GLB_ConvertToMappingFromAddr(uint32_t to) {
if (!isMappingOn()) {
return to;
}
if ((to > MAPPING_TO_REGION_END) || (to < GLOBAL_CTRL->EXTADDR)) {
return to;
}
return (to + GLOBAL_CTRL->IBUSOFF);
}
uint32_t GLB_ConvertToMappingToAddr(uint32_t from) {
if (!isMappingOn()) {
return from;
}
if (from < MAPPING_FROM_REGION_START) {
return from;
}
return (from - GLOBAL_CTRL->IBUSOFF);
}
void GLB_SetNmiIrqNum(uint32_t irq) {
GLOBAL_CTRL->NMI_SEL_b.NMI = irq;
}

10
bsp/CME_M7/StdPeriph_Driver/src/cmem7_rtc.c
View File

@ -28,7 +28,7 @@
#define SECONDS_IN_A_DAY (86400)
void RTC_EnableInt(uint32_t Int, BOOL Enable) {
void RTC_ITConfig(uint32_t Int, BOOL Enable) {
assert_param(IS_RTC_INT(Int));
if (Enable) {
@ -38,7 +38,7 @@ void RTC_EnableInt(uint32_t Int, BOOL Enable) {
}
}
BOOL RTC_GetIntStatus(uint32_t Int) {
BOOL RTC_GetITStatus(uint32_t Int) {
assert_param(IS_RTC_INT(Int));
if (0 != (RTC->INT_STATUS & Int)) {
@ -48,7 +48,7 @@ BOOL RTC_GetIntStatus(uint32_t Int) {
return FALSE;
}
void RTC_ClearInt(uint32_t Int) {
void RTC_ClearITPendingBit(uint32_t Int) {
assert_param(IS_RTC_INT(Int));
RTC->INT_STATUS = Int;
@ -58,6 +58,6 @@ uint32_t RTC_GetSecond() {
return RTC->SECOND;
}
uint16_t RTC_GetMicroSecond() {
return RTC->MICROSECOND_b.MS;
uint16_t RTC_GetMillSecond() {
return RTC->MILLSECOND_b.MS;
}

17
bsp/CME_M7/StdPeriph_Driver/src/cmem7_wdg.c
View File

@ -30,29 +30,34 @@ static uint32_t wdg_GetClock() {
return SYSTEM_CLOCK_FREQ / (1 << (GLOBAL_CTRL->CLK_SEL_0_b.WDG_CLK + 1));
}
void WDG_Init(uint8_t trigger, uint16_t ResetMicroSecond) {
void WDG_DeInit(void){
SOFT_RESET->SOFTRST_b.WDT_n = 0;
SOFT_RESET->SOFTRST_b.WDT_n = 1;
}
void WDG_Init(uint8_t trigger, uint16_t ResetMillSecond) {
assert_param(IS_WDG_TRIGGER_MODE(trigger));
WDG->INT_CTRL_b.TRIGGER_MODE = trigger;
WDG->LEN = ((uint64_t)wdg_GetClock()) * ResetMicroSecond / 1000;
WDG->LEN = ((uint64_t)wdg_GetClock()) * ResetMillSecond / 1000;
}
void WDG_EnableInt(uint8_t Int, BOOL Enable) {
void WDG_ITConfig(uint8_t Int, BOOL Enable) {
assert_param(IS_WDG_INT(Int));
WDG->CTRL_b.INT_LEN = Int;
WDG->INT_CTRL_b.MASK = !Enable;
}
BOOL WDG_GetIntStatus() {
BOOL WDG_GetITStatus() {
return (WDG->INT_STA_b.STA == 1) ? TRUE : FALSE;
}
void WDG_ClearInt() {
void WDG_ClearITPendingBit() {
WDG->INT_STA_b.STA = 1;
}
void WDG_Enable(BOOL Enable) {
void WDG_Cmd(BOOL Enable) {
WDG->CTRL_b.EN = Enable;
}

34
bsp/CME_M7/drivers/emac.c
View File

@ -205,14 +205,14 @@ static rt_err_t rt_cme_eth_init(rt_device_t dev)
RxDescChainInit();
TxDescChainInit();
ETH_EnableInt(ETH_INT_BUS_FATAL_ERROR, TRUE);
ETH_ITConfig(ETH_INT_BUS_FATAL_ERROR, TRUE);
ETH_EnableInt(ETH_INT_RX_COMPLETE_FRAME, TRUE);
ETH_EnableInt(ETH_INT_RX_BUF_UNAVAI, TRUE);
ETH_EnableInt(ETH_INT_RX_STOP, TRUE);
ETH_ITConfig(ETH_INT_RX_COMPLETE_FRAME, TRUE);
ETH_ITConfig(ETH_INT_RX_BUF_UNAVAI, TRUE);
ETH_ITConfig(ETH_INT_RX_STOP, TRUE);
ETH_StartRx();
ETH_EnableInt(ETH_INT_TX_COMPLETE_FRAME, TRUE);
ETH_ITConfig(ETH_INT_TX_COMPLETE_FRAME, TRUE);
ETH_StartTx();
return RT_EOK;
@ -318,8 +318,8 @@ struct pbuf *rt_cme_eth_rx(rt_device_t dev)
desc = ETH_AcquireFreeRxDesc();
if(desc == RT_NULL)
{
ETH_EnableInt(ETH_INT_RX_COMPLETE_FRAME, TRUE);
ETH_EnableInt(ETH_INT_RX_BUF_UNAVAI, TRUE);
ETH_ITConfig(ETH_INT_RX_COMPLETE_FRAME, TRUE);
ETH_ITConfig(ETH_INT_RX_BUF_UNAVAI, TRUE);
ETH_ResumeRx();
goto _exit;
}
@ -414,28 +414,28 @@ void ETH_IRQHandler(void)
/* enter interrupt */
rt_interrupt_enter();
if (ETH_GetIntStatus(ETH_INT_TX_COMPLETE_FRAME))
if (ETH_GetITStatus(ETH_INT_TX_COMPLETE_FRAME))
{
rt_sem_release(&cme_eth_device.tx_buf_free);
ETH_ClearInt(ETH_INT_TX_COMPLETE_FRAME);
ETH_ClearITPendingBit(ETH_INT_TX_COMPLETE_FRAME);
}
if (ETH_GetIntStatus(ETH_INT_RX_STOP))
if (ETH_GetITStatus(ETH_INT_RX_STOP))
{
CME_ETH_PRINTF("ETH_INT_RX_STOP\n");
ETH_ClearInt(ETH_INT_RX_STOP);
ETH_ClearITPendingBit(ETH_INT_RX_STOP);
}
if ((ETH_GetIntStatus(ETH_INT_RX_BUF_UNAVAI)) ||
(ETH_GetIntStatus(ETH_INT_RX_COMPLETE_FRAME)))
if ((ETH_GetITStatus(ETH_INT_RX_BUF_UNAVAI)) ||
(ETH_GetITStatus(ETH_INT_RX_COMPLETE_FRAME)))
{
/* a frame has been received */
eth_device_ready(&(cme_eth_device.parent));
ETH_EnableInt(ETH_INT_RX_COMPLETE_FRAME, FALSE);
ETH_EnableInt(ETH_INT_RX_BUF_UNAVAI, FALSE);
ETH_ClearInt(ETH_INT_RX_BUF_UNAVAI);
ETH_ClearInt(ETH_INT_RX_COMPLETE_FRAME);
ETH_ITConfig(ETH_INT_RX_COMPLETE_FRAME, FALSE);
ETH_ITConfig(ETH_INT_RX_BUF_UNAVAI, FALSE);
ETH_ClearITPendingBit(ETH_INT_RX_BUF_UNAVAI);
ETH_ClearITPendingBit(ETH_INT_RX_COMPLETE_FRAME);
}
/* leave interrupt */

1527
bsp/CME_M7/project.uvopt
View File

File diff suppressed because it is too large Load Diff

309
bsp/CME_M7/project.uvproj
View File

@ -1,7 +1,10 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.1</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Targets>
<Target>
<TargetName>rtthread</TargetName>
@ -11,31 +14,28 @@
<TargetCommonOption>
<Device>ARMCM3</Device>
<Vendor>ARM</Vendor>
<PackID>ARM.CMSIS.4.1.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>CPUTYPE("Cortex-M3") CLOCK(10000000) ESEL ELITTLE</Cpu>
<FlashUtilSpec />
<StartupFile />
<FlashDriverDll />
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll></FlashDriverDll>
<DeviceId>0</DeviceId>
<RegisterFile>$$Device:ARMCM3$Device\ARM\ARMCM3\Include\ARMCM3.h</RegisterFile>
<MemoryEnv />
<Cmp />
<Asm />
<Linker />
<OHString />
<InfinionOptionDll />
<SLE66CMisc />
<SLE66AMisc />
<SLE66LinkerMisc />
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:ARMCM3$Device\ARM\SVD\ARMCM3.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath />
<IncludePath />
<LibPath />
<RegisterFilePath />
<DBRegisterFilePath />
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
@ -57,8 +57,8 @@
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
@ -67,23 +67,21 @@
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name />
<UserProg2Name />
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopB1X>0</nStopB1X>
<nStopB2X>0</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
<UserProg2Name />
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString />
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
@ -97,9 +95,8 @@
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument />
<IncludeLibraryModules />
<ComprImg>1</ComprImg>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
@ -107,7 +104,7 @@
<SimDlgDll>DCM.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM3</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments />
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TCM.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
</DllOption>
@ -129,7 +126,6 @@
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
<RestoreSysVw>1</RestoreSysVw>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
@ -140,25 +136,22 @@
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<RestoreTracepoints>1</RestoreTracepoints>
<RestoreSysVw>1</RestoreSysVw>
<UsePdscDebugDescription>1</UsePdscDebugDescription>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>17</TargetSelection>
<TargetSelection>15</TargetSelection>
<SimDlls>
<CpuDll />
<CpuDllArguments />
<PeripheralDll />
<PeripheralDllArguments />
<InitializationFile />
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll />
<CpuDllArguments />
<PeripheralDll />
<PeripheralDllArguments />
<InitializationFile />
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
<Driver>CapitalMicro\BIN\cmagdi.dll</Driver>
</TargetDlls>
</DebugOption>
@ -171,14 +164,9 @@
<Capability>1</Capability>
<DriverSelection>4097</DriverSelection>
</Flash1>
<bUseTDR>0</bUseTDR>
<Flash2>BIN\UL2CM3.DLL</Flash2>
<Flash3>"" ()</Flash3>
<Flash4 />
<pFcarmOut />
<pFcarmGrp />
<pFcArmRoot />
<FcArmLst>0</FcArmLst>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
@ -210,7 +198,7 @@
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M3"</AdsCpuType>
<RvctDeviceName />
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
@ -341,7 +329,7 @@
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector />
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
@ -357,12 +345,10 @@
<wLevel>2</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<uC99>0</uC99>
<useXO>0</useXO>
<VariousControls>
<MiscControls />
<MiscControls></MiscControls>
<Define>RT_USING_ARM_LIBC</Define>
<Undefine />
<Undefine></Undefine>
<IncludePath>StdPeriph_Driver/inc;applications;.;drivers;CMSIS/CME_M7;../../components/CMSIS/Include;../../include;../../libcpu/arm/cortex-m3;../../libcpu/arm/common;../../components/libc/armlibc;../../components/drivers/include;../../components/drivers/include;../../components/finsh;../../components/net/lwip-1.4.1/src;../../components/net/lwip-1.4.1/src/include;../../components/net/lwip-1.4.1/src/include/ipv4;../../components/net/lwip-1.4.1/src/arch/include;../../components/net/lwip-1.4.1/src/include/netif</IncludePath>
</VariousControls>
</Cads>
@ -375,12 +361,11 @@
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<useXO>0</useXO>
<VariousControls>
<MiscControls />
<Define />
<Undefine />
<IncludePath />
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
@ -392,13 +377,12 @@
<useFile>0</useFile>
<TextAddressRange>0x00000000</TextAddressRange>
<DataAddressRange>0x00000000</DataAddressRange>
<pXoBase />
<ScatterFile>CME_M7.sct</ScatterFile>
<IncludeLibs />
<IncludeLibsPath />
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc> --keep *.o(.rti_fn.*) --keep *.o(FSymTab) --keep *.o(VSymTab) </Misc>
<LinkerInputFile />
<DisabledWarnings />
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
@ -411,113 +395,81 @@
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_adc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_aes.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_aes.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_can.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_can.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_ddr.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_ddr.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_dma.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_dma.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_efuse.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_efuse.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_eth.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_eth.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_flash.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_flash.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_gpio.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_gpio.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_i2c.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_i2c.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_misc.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_misc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_rtc.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_rtc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_spi.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_spi.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_tim.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_tim.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_uart.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_uart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_usb.c</FileName>
<FileType>1</FileType>
<FilePath>StdPeriph_Driver/src/cmem7_usb.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmem7_wdg.c</FileName>
<FileType>1</FileType>
@ -533,15 +485,11 @@
<FileType>1</FileType>
<FilePath>applications/application.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>led.c</FileName>
<FileType>1</FileType>
<FilePath>applications/led.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>startup.c</FileName>
<FileType>1</FileType>
@ -557,22 +505,16 @@
<FileType>1</FileType>
<FilePath>drivers/board.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>uart.c</FileName>
<FileType>1</FileType>
<FilePath>drivers/uart.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>emac.c</FileName>
<FileType>1</FileType>
<FilePath>drivers/emac.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>app_phy.c</FileName>
<FileType>1</FileType>
@ -588,8 +530,6 @@
<FileType>1</FileType>
<FilePath>CMSIS/CME_M7/system_cmem7.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>startup_cmem7.s</FileName>
<FileType>2</FileType>
@ -605,85 +545,61 @@
<FileType>1</FileType>
<FilePath>../../src/clock.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>components.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/components.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>device.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/device.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>idle.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/idle.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ipc.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/ipc.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>irq.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/irq.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>kservice.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/kservice.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mem.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/mem.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>mempool.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/mempool.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>object.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/object.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>scheduler.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/scheduler.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>thread.c</FileName>
<FileType>1</FileType>
<FilePath>../../src/thread.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timer.c</FileName>
<FileType>1</FileType>
@ -699,29 +615,21 @@
<FileType>1</FileType>
<FilePath>../../libcpu/arm/cortex-m3/cpuport.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>context_rvds.S</FileName>
<FileType>2</FileType>
<FilePath>../../libcpu/arm/cortex-m3/context_rvds.S</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>backtrace.c</FileName>
<FileType>1</FileType>
<FilePath>../../libcpu/arm/common/backtrace.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>div0.c</FileName>
<FileType>1</FileType>
<FilePath>../../libcpu/arm/common/div0.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>showmem.c</FileName>
<FileType>1</FileType>
@ -737,8 +645,6 @@
<FileType>1</FileType>
<FilePath>../../components/libc/armlibc/mem_std.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stubs.c</FileName>
<FileType>1</FileType>
@ -754,43 +660,31 @@
<FileType>1</FileType>
<FilePath>../../components/drivers/serial/serial.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>completion.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/completion.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dataqueue.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/dataqueue.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pipe.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/pipe.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>portal.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/portal.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ringbuffer.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/drivers/src/ringbuffer.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>workqueue.c</FileName>
<FileType>1</FileType>
@ -806,99 +700,71 @@
<FileType>1</FileType>
<FilePath>../../components/finsh/shell.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>symbol.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/symbol.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>cmd.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/cmd.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh_cmd.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/msh_cmd.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>msh.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/msh.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_compiler.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_compiler.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_error.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_error.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_heap.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_heap.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_init.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_init.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_node.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_node.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_ops.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_ops.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_parser.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_parser.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_var.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_var.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_vm.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/finsh/finsh_vm.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>finsh_token.c</FileName>
<FileType>1</FileType>
@ -914,239 +780,171 @@
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/api_lib.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>api_msg.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/api_msg.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>err.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/err.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>netbuf.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/netbuf.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>netdb.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/netdb.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>netifapi.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/netifapi.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>sockets.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/sockets.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>tcpip.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/api/tcpip.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>sys_arch.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/arch/sys_arch.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>def.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/def.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dhcp.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/dhcp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>dns.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/dns.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>init.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/init.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>memp.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/memp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>netif.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/netif.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>pbuf.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/pbuf.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>raw.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/raw.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>stats.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/stats.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>sys.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/sys.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>tcp.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/tcp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>tcp_in.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/tcp_in.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>tcp_out.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/tcp_out.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>timers.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/timers.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>udp.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/udp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>autoip.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/autoip.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>icmp.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/icmp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>igmp.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/igmp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>inet.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/inet.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>inet_chksum.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/inet_chksum.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ip.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ip_addr.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip_addr.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ip_frag.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/core/ipv4/ip_frag.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>etharp.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/netif/etharp.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>ethernetif.c</FileName>
<FileType>1</FileType>
<FilePath>../../components/net/lwip-1.4.1/src/netif/ethernetif.c</FilePath>
</File>
</Files>
<Files>
<File>
<FileName>slipif.c</FileName>
<FileType>1</FileType>
@ -1157,4 +955,5 @@
</Groups>
</Target>
</Targets>
</Project>