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Merge pull request #2645 from zhouchuanfu/stm32_uart_tx_dma

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[bsp][stm32] 增加uart的DMA发送功能
This commit is contained in:
Bernard Xiong 2019-05-23 23:20:40 +08:00 committed by GitHub
commit e8a10c4df0
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GPG Key ID: 4AEE18F83AFDEB23
7 changed files with 607 additions and 169 deletions
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28
bsp/stm32/libraries/HAL_Drivers/config/f1/dma_config.h
View File

@ -25,6 +25,11 @@ extern "C" {
#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN #define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define SPI1_RX_DMA_INSTANCE DMA1_Channel2 #define SPI1_RX_DMA_INSTANCE DMA1_Channel2
#define SPI1_RX_DMA_IRQ DMA1_Channel2_IRQn #define SPI1_RX_DMA_IRQ DMA1_Channel2_IRQn
#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_INSTANCE)
#define UART3_DMA_TX_IRQHandler DMA1_Channel2_IRQHandler
#define UART3_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART3_TX_DMA_INSTANCE DMA1_Channel2
#define UART3_TX_DMA_IRQ DMA1_Channel2_IRQn
#endif #endif
/* DMA1 channel3 */ /* DMA1 channel3 */
@ -46,6 +51,11 @@ extern "C" {
#define SPI2_RX_DMA_RCC RCC_AHBENR_DMA1EN #define SPI2_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define SPI2_RX_DMA_INSTANCE DMA1_Channel4 #define SPI2_RX_DMA_INSTANCE DMA1_Channel4
#define SPI2_RX_DMA_IRQ DMA1_Channel4_IRQn #define SPI2_RX_DMA_IRQ DMA1_Channel4_IRQn
#elif defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE)
#define UART1_DMA_TX_IRQHandler DMA1_Channel4_IRQHandler
#define UART1_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART1_TX_DMA_INSTANCE DMA1_Channel4
#define UART1_TX_DMA_IRQ DMA1_Channel4_IRQn
#endif #endif
/* DMA1 channel5 */ /* DMA1 channel5 */
@ -71,6 +81,12 @@ extern "C" {
#endif #endif
/* DMA1 channel7 */ /* DMA1 channel7 */
#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_INSTANCE)
#define UART2_DMA_TX_IRQHandler DMA1_Channel7_IRQHandler
#define UART2_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART2_TX_DMA_INSTANCE DMA1_Channel7
#define UART2_TX_DMA_IRQ DMA1_Channel7_IRQn
#endif
/* DMA2 channel1 */ /* DMA2 channel1 */
#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE) #if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE)
@ -89,8 +105,20 @@ extern "C" {
#endif #endif
/* DMA2 channel3 */ /* DMA2 channel3 */
#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE)
#define UART4_DMA_RX_IRQHandler DMA2_Channel3_IRQHandler
#define UART4_RX_DMA_RCC RCC_AHBENR_DMA2EN
#define UART4_RX_DMA_INSTANCE DMA2_Channel3
#define UART4_RX_DMA_IRQ DMA2_Channel3_IRQn
#endif
/* DMA2 channel4 */ /* DMA2 channel4 */
/* DMA2 channel5 */ /* DMA2 channel5 */
#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
#define UART4_DMA_TX_IRQHandler DMA2_Channel4_5_IRQHandler
#define UART4_TX_DMA_RCC RCC_AHBENR_DMA2EN
#define UART4_TX_DMA_INSTANCE DMA2_Channel5
#define UART4_TX_DMA_IRQ DMA2_Channel4_5_IRQn
#endif
#ifdef __cplusplus #ifdef __cplusplus
} }

76
bsp/stm32/libraries/HAL_Drivers/config/f1/uart_config.h
View File

@ -28,19 +28,30 @@ extern "C" {
.irq_type = USART1_IRQn, \ .irq_type = USART1_IRQn, \
} }
#endif /* UART1_CONFIG */ #endif /* UART1_CONFIG */
#endif /* BSP_USING_UART1 */
#if defined(BSP_UART1_RX_USING_DMA) #if defined(BSP_UART1_RX_USING_DMA)
#ifndef UART1_DMA_CONFIG #ifndef UART1_DMA_RX_CONFIG
#define UART1_DMA_CONFIG \ #define UART1_DMA_RX_CONFIG \
{ \ { \
.Instance = UART1_RX_DMA_INSTANCE, \ .Instance = UART1_RX_DMA_INSTANCE, \
.dma_rcc = UART1_RX_DMA_RCC, \ .dma_rcc = UART1_RX_DMA_RCC, \
.dma_irq = UART1_RX_DMA_IRQ, \ .dma_irq = UART1_RX_DMA_IRQ, \
} }
#endif /* UART1_DMA_CONFIG */ #endif /* UART1_DMA_RX_CONFIG */
#endif /* BSP_UART1_RX_USING_DMA */ #endif /* BSP_UART1_RX_USING_DMA */
#if defined(BSP_UART1_TX_USING_DMA)
#ifndef UART1_DMA_TX_CONFIG
#define UART1_DMA_TX_CONFIG \
{ \
.Instance = UART1_TX_DMA_INSTANCE, \
.dma_rcc = UART1_TX_DMA_RCC, \
.dma_irq = UART1_TX_DMA_IRQ, \
}
#endif /* UART1_DMA_TX_CONFIG */
#endif /* BSP_UART1_TX_USING_DMA */
#endif /* BSP_USING_UART1 */
#if defined(BSP_USING_UART2) #if defined(BSP_USING_UART2)
#ifndef UART2_CONFIG #ifndef UART2_CONFIG
#define UART2_CONFIG \ #define UART2_CONFIG \
@ -50,19 +61,30 @@ extern "C" {
.irq_type = USART2_IRQn, \ .irq_type = USART2_IRQn, \
} }
#endif /* UART2_CONFIG */ #endif /* UART2_CONFIG */
#endif /* BSP_USING_UART2 */
#if defined(BSP_UART2_RX_USING_DMA) #if defined(BSP_UART2_RX_USING_DMA)
#ifndef UART2_DMA_CONFIG #ifndef UART2_DMA_RX_CONFIG
#define UART2_DMA_CONFIG \ #define UART2_DMA_RX_CONFIG \
{ \ { \
.Instance = UART2_RX_DMA_INSTANCE, \ .Instance = UART2_RX_DMA_INSTANCE, \
.dma_rcc = UART2_RX_DMA_RCC, \ .dma_rcc = UART2_RX_DMA_RCC, \
.dma_irq = UART2_RX_DMA_IRQ, \ .dma_irq = UART2_RX_DMA_IRQ, \
} }
#endif /* UART2_DMA_CONFIG */ #endif /* UART2_DMA_RX_CONFIG */
#endif /* BSP_UART2_RX_USING_DMA */ #endif /* BSP_UART2_RX_USING_DMA */
#if defined(BSP_UART2_TX_USING_DMA)
#ifndef UART2_DMA_TX_CONFIG
#define UART2_DMA_TX_CONFIG \
{ \
.Instance = UART2_TX_DMA_INSTANCE, \
.dma_rcc = UART2_TX_DMA_RCC, \
.dma_irq = UART2_TX_DMA_IRQ, \
}
#endif /* UART2_DMA_TX_CONFIG */
#endif /* BSP_UART2_TX_USING_DMA */
#endif /* BSP_USING_UART2 */
#if defined(BSP_USING_UART3) #if defined(BSP_USING_UART3)
#ifndef UART3_CONFIG #ifndef UART3_CONFIG
#define UART3_CONFIG \ #define UART3_CONFIG \
@ -72,19 +94,30 @@ extern "C" {
.irq_type = USART3_IRQn, \ .irq_type = USART3_IRQn, \
} }
#endif /* UART3_CONFIG */ #endif /* UART3_CONFIG */
#endif /* BSP_USING_UART3 */
#if defined(BSP_UART3_RX_USING_DMA) #if defined(BSP_UART3_RX_USING_DMA)
#ifndef UART3_DMA_CONFIG #ifndef UART3_DMA_RX_CONFIG
#define UART3_DMA_CONFIG \ #define UART3_DMA_RX_CONFIG \
{ \ { \
.Instance = UART3_RX_DMA_INSTANCE, \ .Instance = UART3_RX_DMA_INSTANCE, \
.dma_rcc = UART3_RX_DMA_RCC, \ .dma_rcc = UART3_RX_DMA_RCC, \
.dma_irq = UART3_RX_DMA_IRQ, \ .dma_irq = UART3_RX_DMA_IRQ, \
} }
#endif /* UART3_DMA_CONFIG */ #endif /* UART3_DMA_RX_CONFIG */
#endif /* BSP_UART3_RX_USING_DMA */ #endif /* BSP_UART3_RX_USING_DMA */
#if defined(BSP_UART3_TX_USING_DMA)
#ifndef UART3_DMA_TX_CONFIG
#define UART3_DMA_TX_CONFIG \
{ \
.Instance = UART3_TX_DMA_INSTANCE, \
.dma_rcc = UART3_TX_DMA_RCC, \
.dma_irq = UART3_TX_DMA_IRQ, \
}
#endif /* UART3_DMA_TX_CONFIG */
#endif /* BSP_UART3_TX_USING_DMA */
#endif /* BSP_USING_UART3 */
#if defined(BSP_USING_UART4) #if defined(BSP_USING_UART4)
#ifndef UART4_CONFIG #ifndef UART4_CONFIG
#define UART4_CONFIG \ #define UART4_CONFIG \
@ -94,19 +127,30 @@ extern "C" {
.irq_type = UART4_IRQn, \ .irq_type = UART4_IRQn, \
} }
#endif /* UART4_CONFIG */ #endif /* UART4_CONFIG */
#endif /* BSP_USING_UART4 */
#if defined(BSP_UART4_RX_USING_DMA) #if defined(BSP_UART4_RX_USING_DMA)
#ifndef UART4_DMA_CONFIG #ifndef UART4_DMA_RX_CONFIG
#define UART4_DMA_CONFIG \ #define UART4_DMA_RX_CONFIG \
{ \ { \
.Instance = UART4_RX_DMA_INSTANCE, \ .Instance = UART4_RX_DMA_INSTANCE, \
.dma_rcc = UART4_RX_DMA_RCC, \ .dma_rcc = UART4_RX_DMA_RCC, \
.dma_irq = UART4_RX_DMA_IRQ, \ .dma_irq = UART4_RX_DMA_IRQ, \
} }
#endif /* UART4_DMA_CONFIG */ #endif /* UART4_DMA_RX_CONFIG */
#endif /* BSP_UART4_RX_USING_DMA */ #endif /* BSP_UART4_RX_USING_DMA */
#if defined(BSP_UART4_TX_USING_DMA)
#ifndef UART4_DMA_TX_CONFIG
#define UART4_DMA_TX_CONFIG \
{ \
.Instance = UART4_TX_DMA_INSTANCE, \
.dma_rcc = UART4_TX_DMA_RCC, \
.dma_irq = UART4_TX_DMA_IRQ, \
}
#endif /* UART4_DMA_TX_CONFIG */
#endif /* BSP_UART4_TX_USING_DMA */
#endif /* BSP_USING_UART4 */
#if defined(BSP_USING_UART5) #if defined(BSP_USING_UART5)
#ifndef UART5_CONFIG #ifndef UART5_CONFIG
#define UART5_CONFIG \ #define UART5_CONFIG \

39
bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h
View File

@ -64,6 +64,12 @@ extern "C" {
#define SPI2_RX_DMA_INSTANCE DMA1_Stream3 #define SPI2_RX_DMA_INSTANCE DMA1_Stream3
#define SPI2_RX_DMA_CHANNEL DMA_CHANNEL_0 #define SPI2_RX_DMA_CHANNEL DMA_CHANNEL_0
#define SPI2_RX_DMA_IRQ DMA1_Stream3_IRQn #define SPI2_RX_DMA_IRQ DMA1_Stream3_IRQn
#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_INSTANCE)
#define UART3_DMA_TX_IRQHandler DMA1_Stream3_IRQHandler
#define UART3_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
#define UART3_TX_DMA_INSTANCE DMA1_Stream3
#define UART3_TX_DMA_CHANNEL DMA_CHANNEL_4
#define UART3_TX_DMA_IRQ DMA1_Stream3_IRQn
#endif #endif
/* DMA1 stream4 */ /* DMA1 stream4 */
@ -73,6 +79,12 @@ extern "C" {
#define SPI2_TX_DMA_INSTANCE DMA1_Stream4 #define SPI2_TX_DMA_INSTANCE DMA1_Stream4
#define SPI2_TX_DMA_CHANNEL DMA_CHANNEL_0 #define SPI2_TX_DMA_CHANNEL DMA_CHANNEL_0
#define SPI2_TX_DMA_IRQ DMA1_Stream4_IRQn #define SPI2_TX_DMA_IRQ DMA1_Stream4_IRQn
#elif defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
#define UART4_DMA_TX_IRQHandler DMA1_Stream4_IRQHandler
#define UART4_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
#define UART4_TX_DMA_INSTANCE DMA1_Stream4
#define UART4_TX_DMA_CHANNEL DMA_CHANNEL_4
#define UART4_TX_DMA_IRQ DMA1_Stream4_IRQn
#endif #endif
/* DMA1 stream5 */ /* DMA1 stream5 */
@ -91,6 +103,13 @@ extern "C" {
#endif #endif
/* DMA1 stream6 */ /* DMA1 stream6 */
#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_INSTANCE)
#define UART2_DMA_TX_IRQHandler DMA1_Stream6_IRQHandler
#define UART2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
#define UART2_TX_DMA_INSTANCE DMA1_Stream6
#define UART2_TX_DMA_CHANNEL DMA_CHANNEL_4
#define UART2_TX_DMA_IRQ DMA1_Stream6_IRQn
#endif
/* DMA1 stream7 */ /* DMA1 stream7 */
#if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_INSTANCE) #if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_INSTANCE)
@ -99,6 +118,12 @@ extern "C" {
#define SPI3_TX_DMA_INSTANCE DMA1_Stream7 #define SPI3_TX_DMA_INSTANCE DMA1_Stream7
#define SPI3_TX_DMA_CHANNEL DMA_CHANNEL_0 #define SPI3_TX_DMA_CHANNEL DMA_CHANNEL_0
#define SPI3_TX_DMA_IRQ DMA1_Stream7_IRQn #define SPI3_TX_DMA_IRQ DMA1_Stream7_IRQn
#elif defined(BSP_UART5_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE)
#define UART5_DMA_TX_IRQHandler DMA1_Stream7_IRQHandler
#define UART5_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
#define UART5_TX_DMA_INSTANCE DMA1_Stream7
#define UART5_TX_DMA_CHANNEL DMA_CHANNEL_4
#define UART5_TX_DMA_IRQ DMA1_Stream7_IRQn
#endif #endif
/* DMA2 stream0 */ /* DMA2 stream0 */
@ -148,7 +173,6 @@ extern "C" {
/* DMA2 stream3 */ /* DMA2 stream3 */
#if defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE) #if defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
#define SPI5_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler #define SPI5_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler
#define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN #define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define SPI5_RX_DMA_INSTANCE DMA2_Stream3 #define SPI5_RX_DMA_INSTANCE DMA2_Stream3
@ -211,9 +235,22 @@ extern "C" {
#define SPI5_TX_DMA_INSTANCE DMA2_Stream6 #define SPI5_TX_DMA_INSTANCE DMA2_Stream6
#define SPI5_TX_DMA_CHANNEL DMA_CHANNEL_7 #define SPI5_TX_DMA_CHANNEL DMA_CHANNEL_7
#define SPI5_TX_DMA_IRQ DMA2_Stream6_IRQn #define SPI5_TX_DMA_IRQ DMA2_Stream6_IRQn
#elif defined(BSP_UART6_TX_USING_DMA) && !defined(UART6_TX_DMA_INSTANCE)
#define UART6_DMA_TX_IRQHandler DMA2_Stream6_IRQHandler
#define UART6_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART6_TX_DMA_INSTANCE DMA2_Stream6
#define UART6_TX_DMA_CHANNEL DMA_CHANNEL_5
#define UART6_TX_DMA_IRQ DMA2_Stream6_IRQn
#endif #endif
/* DMA2 stream7 */ /* DMA2 stream7 */
#if defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE)
#define UART1_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler
#define UART1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
#define UART1_TX_DMA_INSTANCE DMA2_Stream7
#define UART1_TX_DMA_CHANNEL DMA_CHANNEL_4
#define UART1_TX_DMA_IRQ DMA2_Stream7_IRQn
#endif
#ifdef __cplusplus #ifdef __cplusplus
} }

180
bsp/stm32/libraries/HAL_Drivers/config/f4/uart_config.h
View File

@ -27,20 +27,32 @@ extern "C" {
.irq_type = USART1_IRQn, \ .irq_type = USART1_IRQn, \
} }
#endif /* UART1_CONFIG */ #endif /* UART1_CONFIG */
#endif /* BSP_USING_UART1 */
#if defined(BSP_UART1_RX_USING_DMA) #if defined(BSP_UART1_RX_USING_DMA)
#ifndef UART1_DMA_CONFIG #ifndef UART1_DMA_RX_CONFIG
#define UART1_DMA_CONFIG \ #define UART1_DMA_RX_CONFIG \
{ \ { \
.Instance = UART1_RX_DMA_INSTANCE, \ .Instance = UART1_RX_DMA_INSTANCE, \
.channel = UART1_RX_DMA_CHANNEL, \ .channel = UART1_RX_DMA_CHANNEL, \
.dma_rcc = UART1_RX_DMA_RCC, \ .dma_rcc = UART1_RX_DMA_RCC, \
.dma_irq = UART1_RX_DMA_IRQ, \ .dma_irq = UART1_RX_DMA_IRQ, \
} }
#endif /* UART1_DMA_CONFIG */ #endif /* UART1_DMA_RX_CONFIG */
#endif /* BSP_UART1_RX_USING_DMA */ #endif /* BSP_UART1_RX_USING_DMA */
#if defined(BSP_UART1_TX_USING_DMA)
#ifndef UART1_DMA_TX_CONFIG
#define UART1_DMA_TX_CONFIG \
{ \
.Instance = UART1_TX_DMA_INSTANCE, \
.channel = UART1_TX_DMA_CHANNEL, \
.dma_rcc = UART1_TX_DMA_RCC, \
.dma_irq = UART1_TX_DMA_IRQ, \
}
#endif /* UART1_DMA_TX_CONFIG */
#endif /* BSP_UART1_TX_USING_DMA */
#endif /* BSP_USING_UART1 */
#if defined(BSP_USING_UART2) #if defined(BSP_USING_UART2)
#ifndef UART2_CONFIG #ifndef UART2_CONFIG
#define UART2_CONFIG \ #define UART2_CONFIG \
@ -50,20 +62,32 @@ extern "C" {
.irq_type = USART2_IRQn, \ .irq_type = USART2_IRQn, \
} }
#endif /* UART2_CONFIG */ #endif /* UART2_CONFIG */
#endif /* BSP_USING_UART2 */
#if defined(BSP_UART2_RX_USING_DMA) #if defined(BSP_UART2_RX_USING_DMA)
#ifndef UART2_DMA_CONFIG #ifndef UART2_DMA_RX_CONFIG
#define UART2_DMA_CONFIG \ #define UART2_DMA_RX_CONFIG \
{ \ { \
.Instance = UART2_RX_DMA_INSTANCE, \ .Instance = UART2_RX_DMA_INSTANCE, \
.channel = UART2_RX_DMA_CHANNEL, \ .channel = UART2_RX_DMA_CHANNEL, \
.dma_rcc = UART2_RX_DMA_RCC, \ .dma_rcc = UART2_RX_DMA_RCC, \
.dma_irq = UART2_RX_DMA_IRQ, \ .dma_irq = UART2_RX_DMA_IRQ, \
} }
#endif /* UART2_DMA_CONFIG */ #endif /* UART2_DMA_RX_CONFIG */
#endif /* BSP_UART2_RX_USING_DMA */ #endif /* BSP_UART2_RX_USING_DMA */
#if defined(BSP_UART2_TX_USING_DMA)
#ifndef UART2_DMA_TX_CONFIG
#define UART2_DMA_TX_CONFIG \
{ \
.Instance = UART2_TX_DMA_INSTANCE, \
.channel = UART2_TX_DMA_CHANNEL, \
.dma_rcc = UART2_TX_DMA_RCC, \
.dma_irq = UART2_TX_DMA_IRQ, \
}
#endif /* UART2_DMA_TX_CONFIG */
#endif /* BSP_UART2_TX_USING_DMA */
#endif /* BSP_USING_UART2 */
#if defined(BSP_USING_UART3) #if defined(BSP_USING_UART3)
#ifndef UART3_CONFIG #ifndef UART3_CONFIG
#define UART3_CONFIG \ #define UART3_CONFIG \
@ -73,20 +97,32 @@ extern "C" {
.irq_type = USART3_IRQn, \ .irq_type = USART3_IRQn, \
} }
#endif /* UART3_CONFIG */ #endif /* UART3_CONFIG */
#endif /* BSP_USING_UART3 */
#if defined(BSP_UART3_RX_USING_DMA) #if defined(BSP_UART3_RX_USING_DMA)
#ifndef UART3_DMA_CONFIG #ifndef UART3_DMA_RX_CONFIG
#define UART3_DMA_CONFIG \ #define UART3_DMA_RX_CONFIG \
{ \ { \
.Instance = UART3_RX_DMA_INSTANCE, \ .Instance = UART3_RX_DMA_INSTANCE, \
.channel = UART3_RX_DMA_CHANNEL, \ .channel = UART3_RX_DMA_CHANNEL, \
.dma_rcc = UART3_RX_DMA_RCC, \ .dma_rcc = UART3_RX_DMA_RCC, \
.dma_irq = UART3_RX_DMA_IRQ, \ .dma_irq = UART3_RX_DMA_IRQ, \
} }
#endif /* UART3_DMA_CONFIG */ #endif /* UART3_DMA_RX_CONFIG */
#endif /* BSP_UART3_RX_USING_DMA */ #endif /* BSP_UART3_RX_USING_DMA */
#if defined(BSP_UART3_TX_USING_DMA)
#ifndef UART3_DMA_TX_CONFIG
#define UART3_DMA_TX_CONFIG \
{ \
.Instance = UART3_TX_DMA_INSTANCE, \
.channel = UART3_TX_DMA_CHANNEL, \
.dma_rcc = UART3_TX_DMA_RCC, \
.dma_irq = UART3_TX_DMA_IRQ, \
}
#endif /* UART3_DMA_TX_CONFIG */
#endif /* BSP_UART3_TX_USING_DMA */
#endif /* BSP_USING_UART3 */
#if defined(BSP_USING_UART4) #if defined(BSP_USING_UART4)
#ifndef UART4_CONFIG #ifndef UART4_CONFIG
#define UART4_CONFIG \ #define UART4_CONFIG \
@ -96,20 +132,32 @@ extern "C" {
.irq_type = UART4_IRQn, \ .irq_type = UART4_IRQn, \
} }
#endif /* UART4_CONFIG */ #endif /* UART4_CONFIG */
#endif /* BSP_USING_UART4 */
#if defined(BSP_UART4_RX_USING_DMA) #if defined(BSP_UART4_RX_USING_DMA)
#ifndef UART4_DMA_CONFIG #ifndef UART4_DMA_RX_CONFIG
#define UART4_DMA_CONFIG \ #define UART4_DMA_RX_CONFIG \
{ \ { \
.Instance = UART4_RX_DMA_INSTANCE, \ .Instance = UART4_RX_DMA_INSTANCE, \
.channel = UART4_RX_DMA_CHANNEL, \ .channel = UART4_RX_DMA_CHANNEL, \
.dma_rcc = UART4_RX_DMA_RCC, \ .dma_rcc = UART4_RX_DMA_RCC, \
.dma_irq = UART4_RX_DMA_IRQ, \ .dma_irq = UART4_RX_DMA_IRQ, \
} }
#endif /* UART4_DMA_CONFIG */ #endif /* UART4_DMA_RX_CONFIG */
#endif /* BSP_UART4_RX_USING_DMA */ #endif /* BSP_UART4_RX_USING_DMA */
#if defined(BSP_UART4_TX_USING_DMA)
#ifndef UART4_DMA_TX_CONFIG
#define UART4_DMA_TX_CONFIG \
{ \
.Instance = UART4_TX_DMA_INSTANCE, \
.channel = UART4_TX_DMA_CHANNEL, \
.dma_rcc = UART4_TX_DMA_RCC, \
.dma_irq = UART4_TX_DMA_IRQ, \
}
#endif /* UART4_DMA_TX_CONFIG */
#endif /* BSP_UART4_RX_USING_DMA */
#endif /* BSP_USING_UART4 */
#if defined(BSP_USING_UART5) #if defined(BSP_USING_UART5)
#ifndef UART5_CONFIG #ifndef UART5_CONFIG
#define UART5_CONFIG \ #define UART5_CONFIG \
@ -119,20 +167,32 @@ extern "C" {
.irq_type = UART5_IRQn, \ .irq_type = UART5_IRQn, \
} }
#endif /* UART5_CONFIG */ #endif /* UART5_CONFIG */
#endif /* BSP_USING_UART5 */
#if defined(BSP_UART5_RX_USING_DMA) #if defined(BSP_UART5_RX_USING_DMA)
#ifndef UART5_DMA_CONFIG #ifndef UART5_DMA_RX_CONFIG
#define UART5_DMA_CONFIG \ #define UART5_DMA_RX_CONFIG \
{ \ { \
.Instance = UART5_RX_DMA_INSTANCE, \ .Instance = UART5_RX_DMA_INSTANCE, \
.channel = UART5_RX_DMA_CHANNEL, \ .channel = UART5_RX_DMA_CHANNEL, \
.dma_rcc = UART5_RX_DMA_RCC, \ .dma_rcc = UART5_RX_DMA_RCC, \
.dma_irq = UART5_RX_DMA_IRQ, \ .dma_irq = UART5_RX_DMA_IRQ, \
} }
#endif /* UART5_DMA_CONFIG */ #endif /* UART5_DMA_RX_CONFIG */
#endif /* BSP_UART5_RX_USING_DMA */ #endif /* BSP_UART5_RX_USING_DMA */
#if defined(BSP_UART5_TX_USING_DMA)
#ifndef UART5_DMA_TX_CONFIG
#define UART5_DMA_TX_CONFIG \
{ \
.Instance = UART5_TX_DMA_INSTANCE, \
.channel = UART5_TX_DMA_CHANNEL, \
.dma_rcc = UART5_TX_DMA_RCC, \
.dma_irq = UART5_TX_DMA_IRQ, \
}
#endif /* UART5_DMA_TX_CONFIG */
#endif /* BSP_UART5_TX_USING_DMA */
#endif /* BSP_USING_UART5 */
#if defined(BSP_USING_UART6) #if defined(BSP_USING_UART6)
#ifndef UART6_CONFIG #ifndef UART6_CONFIG
#define UART6_CONFIG \ #define UART6_CONFIG \
@ -142,20 +202,32 @@ extern "C" {
.irq_type = USART6_IRQn, \ .irq_type = USART6_IRQn, \
} }
#endif /* UART6_CONFIG */ #endif /* UART6_CONFIG */
#endif /* BSP_USING_UART6 */
#if defined(BSP_UART6_RX_USING_DMA) #if defined(BSP_UART6_RX_USING_DMA)
#ifndef UART6_DMA_CONFIG #ifndef UART6_DMA_RX_CONFIG
#define UART6_DMA_CONFIG \ #define UART6_DMA_RX_CONFIG \
{ \ { \
.Instance = UART6_RX_DMA_INSTANCE, \ .Instance = UART6_RX_DMA_INSTANCE, \
.channel = UART6_RX_DMA_CHANNEL, \ .channel = UART6_RX_DMA_CHANNEL, \
.dma_rcc = UART6_RX_DMA_RCC, \ .dma_rcc = UART6_RX_DMA_RCC, \
.dma_irq = UART6_RX_DMA_IRQ, \ .dma_irq = UART6_RX_DMA_IRQ, \
} }
#endif /* UART6_DMA_CONFIG */ #endif /* UART6_DMA_RX_CONFIG */
#endif /* BSP_UART6_RX_USING_DMA */ #endif /* BSP_UART6_RX_USING_DMA */
#if defined(BSP_UART6_TX_USING_DMA)
#ifndef UART6_DMA_TX_CONFIG
#define UART6_DMA_TX_CONFIG \
{ \
.Instance = UART6_TX_DMA_INSTANCE, \
.channel = UART6_TX_DMA_CHANNEL, \
.dma_rcc = UART6_TX_DMA_RCC, \
.dma_irq = UART6_TX_DMA_IRQ, \
}
#endif /* UART6_DMA_TX_CONFIG */
#endif /* BSP_UART6_TX_USING_DMA */
#endif /* BSP_USING_UART6 */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

374
bsp/stm32/libraries/HAL_Drivers/drv_usart.c
View File

@ -25,7 +25,7 @@
#endif #endif
#ifdef RT_SERIAL_USING_DMA #ifdef RT_SERIAL_USING_DMA
static void stm32_dma_config(struct rt_serial_device *serial); static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
#endif #endif
enum enum
@ -171,10 +171,7 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar
#ifdef RT_SERIAL_USING_DMA #ifdef RT_SERIAL_USING_DMA
case RT_DEVICE_CTRL_CONFIG: case RT_DEVICE_CTRL_CONFIG:
if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) stm32_dma_config(serial, ctrl_arg);
{
stm32_dma_config(serial);
}
break; break;
#endif #endif
} }
@ -219,12 +216,39 @@ static int stm32_getc(struct rt_serial_device *serial)
return ch; return ch;
} }
static rt_size_t stm32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
{
struct stm32_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)(serial->parent.user_data);
RT_ASSERT(uart != RT_NULL);
if (size == 0)
{
return 0;
}
if (RT_SERIAL_DMA_TX == direction)
{
if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK)
{
return size;
}
else
{
return 0;
}
}
return 0;
}
static const struct rt_uart_ops stm32_uart_ops = static const struct rt_uart_ops stm32_uart_ops =
{ {
.configure = stm32_configure, .configure = stm32_configure,
.control = stm32_control, .control = stm32_control,
.putc = stm32_putc, .putc = stm32_putc,
.getc = stm32_getc, .getc = stm32_getc,
.dma_transmit = stm32_dma_transmit
}; };
/** /**
@ -252,13 +276,13 @@ static void uart_isr(struct rt_serial_device *serial)
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
} }
#ifdef RT_SERIAL_USING_DMA #ifdef RT_SERIAL_USING_DMA
else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) && else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
(__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET)) && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
{ {
level = rt_hw_interrupt_disable(); level = rt_hw_interrupt_disable();
recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle)); recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
recv_len = recv_total_index - uart->dma.last_index; recv_len = recv_total_index - uart->dma_rx.last_index;
uart->dma.last_index = recv_total_index; uart->dma_rx.last_index = recv_total_index;
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
if (recv_len) if (recv_len)
@ -267,6 +291,17 @@ static void uart_isr(struct rt_serial_device *serial)
} }
__HAL_UART_CLEAR_IDLEFLAG(&uart->handle); __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
} }
else if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
{
if ((serial->parent.open_flag & RT_DEVICE_FLAG_DMA_TX) != 0)
{
HAL_UART_IRQHandler(&(uart->handle));
}
else
{
UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
}
}
#endif #endif
else else
{ {
@ -324,20 +359,20 @@ static void dma_isr(struct rt_serial_device *serial)
uart = (struct stm32_uart *) serial->parent.user_data; uart = (struct stm32_uart *) serial->parent.user_data;
RT_ASSERT(uart != RT_NULL); RT_ASSERT(uart != RT_NULL);
if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma.handle), DMA_IT_TC) != RESET) || if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_TC) != RESET) ||
(__HAL_DMA_GET_IT_SOURCE(&(uart->dma.handle), DMA_IT_HT) != RESET)) (__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_HT) != RESET))
{ {
level = rt_hw_interrupt_disable(); level = rt_hw_interrupt_disable();
recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle)); recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
if (recv_total_index == 0) if (recv_total_index == 0)
{ {
recv_len = serial->config.bufsz - uart->dma.last_index; recv_len = serial->config.bufsz - uart->dma_rx.last_index;
} }
else else
{ {
recv_len = recv_total_index - uart->dma.last_index; recv_len = recv_total_index - uart->dma_rx.last_index;
} }
uart->dma.last_index = recv_total_index; uart->dma_rx.last_index = recv_total_index;
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
if (recv_len) if (recv_len)
@ -365,12 +400,24 @@ void UART1_DMA_RX_IRQHandler(void)
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma.handle); HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_rx.handle);
/* leave interrupt */ /* leave interrupt */
rt_interrupt_leave(); rt_interrupt_leave();
} }
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */ #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
void UART1_DMA_TX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_tx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
#endif /* BSP_USING_UART1 */ #endif /* BSP_USING_UART1 */
#if defined(BSP_USING_UART2) #if defined(BSP_USING_UART2)
@ -390,12 +437,24 @@ void UART2_DMA_RX_IRQHandler(void)
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma.handle); HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_rx.handle);
/* leave interrupt */ /* leave interrupt */
rt_interrupt_leave(); rt_interrupt_leave();
} }
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */ #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
void UART2_DMA_TX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_tx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
#endif /* BSP_USING_UART2 */ #endif /* BSP_USING_UART2 */
#if defined(BSP_USING_UART3) #if defined(BSP_USING_UART3)
@ -415,12 +474,24 @@ void UART3_DMA_RX_IRQHandler(void)
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma.handle); HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_rx.handle);
/* leave interrupt */ /* leave interrupt */
rt_interrupt_leave(); rt_interrupt_leave();
} }
#endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */ #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
void UART3_DMA_TX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_tx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART3_TX_USING_DMA) */
#endif /* BSP_USING_UART3*/ #endif /* BSP_USING_UART3*/
#if defined(BSP_USING_UART4) #if defined(BSP_USING_UART4)
@ -440,12 +511,25 @@ void UART4_DMA_RX_IRQHandler(void)
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma.handle); HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_rx.handle);
/* leave interrupt */ /* leave interrupt */
rt_interrupt_leave(); rt_interrupt_leave();
} }
#endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */ #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
void UART4_DMA_TX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_tx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART4_TX_USING_DMA) */
#endif /* BSP_USING_UART4*/ #endif /* BSP_USING_UART4*/
#if defined(BSP_USING_UART5) #if defined(BSP_USING_UART5)
@ -465,12 +549,24 @@ void UART5_DMA_RX_IRQHandler(void)
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma.handle); HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_rx.handle);
/* leave interrupt */ /* leave interrupt */
rt_interrupt_leave(); rt_interrupt_leave();
} }
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */ #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
void UART5_DMA_TX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_tx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
#endif /* BSP_USING_UART5*/ #endif /* BSP_USING_UART5*/
#if defined(BSP_USING_UART6) #if defined(BSP_USING_UART6)
@ -490,12 +586,24 @@ void UART6_DMA_RX_IRQHandler(void)
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma.handle); HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_rx.handle);
/* leave interrupt */ /* leave interrupt */
rt_interrupt_leave(); rt_interrupt_leave();
} }
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */ #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
void UART6_DMA_TX_IRQHandler(void)
{
/* enter interrupt */
rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_tx.handle);
/* leave interrupt */
rt_interrupt_leave();
}
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
#endif /* BSP_USING_UART6*/ #endif /* BSP_USING_UART6*/
#if defined(BSP_USING_LPUART1) #if defined(BSP_USING_LPUART1)
@ -515,7 +623,7 @@ void LPUART1_DMA_RX_IRQHandler(void)
/* enter interrupt */ /* enter interrupt */
rt_interrupt_enter(); rt_interrupt_enter();
HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle); HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma_rx.handle);
/* leave interrupt */ /* leave interrupt */
rt_interrupt_leave(); rt_interrupt_leave();
@ -524,13 +632,27 @@ void LPUART1_DMA_RX_IRQHandler(void)
#endif /* BSP_USING_LPUART1*/ #endif /* BSP_USING_LPUART1*/
#ifdef RT_SERIAL_USING_DMA #ifdef RT_SERIAL_USING_DMA
static void stm32_dma_config(struct rt_serial_device *serial) static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
{ {
RT_ASSERT(serial != RT_NULL);
struct stm32_uart *uart = (struct stm32_uart *)serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
struct rt_serial_rx_fifo *rx_fifo; struct rt_serial_rx_fifo *rx_fifo;
DMA_HandleTypeDef *DMA_Handle;
struct dma_config *dma_config;
struct stm32_uart *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct stm32_uart *)serial->parent.user_data;
RT_ASSERT(uart != RT_NULL);
if (RT_DEVICE_FLAG_DMA_RX == flag)
{
DMA_Handle = &uart->dma_rx.handle;
dma_config = uart->config->dma_rx;
}
else if (RT_DEVICE_FLAG_DMA_TX == flag)
{
DMA_Handle = &uart->dma_tx.handle;
dma_config = uart->config->dma_tx;
}
LOG_D("%s dma config start", uart->config->name); LOG_D("%s dma config start", uart->config->name);
{ {
@ -538,67 +660,86 @@ static void stm32_dma_config(struct rt_serial_device *serial)
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \ #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32L0)
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/ /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc); SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/ /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
SET_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc); SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc); tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
#endif #endif
UNUSED(tmpreg); /* To avoid compiler warnings */ UNUSED(tmpreg); /* To avoid compiler warnings */
} }
__HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle); if (RT_DEVICE_FLAG_DMA_RX == flag)
{
__HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma_rx.handle);
}
else if (RT_DEVICE_FLAG_DMA_TX == flag)
{
__HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
}
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0) #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
uart->dma.handle.Instance = uart->config->dma_rx->Instance; DMA_Handle->Instance = dma_config->Instance;
#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
uart->dma.handle.Instance = uart->config->dma_rx->Instance; DMA_Handle->Instance = dma_config->Instance;
uart->dma.handle.Init.Channel = uart->config->dma_rx->channel; DMA_Handle->Init.Channel = dma_config->channel;
#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
uart->dma.handle.Instance = uart->config->dma_rx->Instance; DMA_Handle->Instance = dma_config->Instance;
uart->dma.handle.Init.Request = uart->config->dma_rx->request; DMA_Handle->Init.Request = dma_config->request;
#endif #endif
uart->dma.handle.Init.Direction = DMA_PERIPH_TO_MEMORY; DMA_Handle->Init.PeriphInc = DMA_PINC_DISABLE;
uart->dma.handle.Init.PeriphInc = DMA_PINC_DISABLE; DMA_Handle->Init.MemInc = DMA_MINC_ENABLE;
uart->dma.handle.Init.MemInc = DMA_MINC_ENABLE; DMA_Handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
uart->dma.handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; DMA_Handle->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
uart->dma.handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
uart->dma.handle.Init.Mode = DMA_CIRCULAR; if (RT_DEVICE_FLAG_DMA_RX == flag)
uart->dma.handle.Init.Priority = DMA_PRIORITY_MEDIUM; {
DMA_Handle->Init.Direction = DMA_PERIPH_TO_MEMORY;
DMA_Handle->Init.Mode = DMA_CIRCULAR;
}
else if (RT_DEVICE_FLAG_DMA_TX == flag)
{
DMA_Handle->Init.Direction = DMA_MEMORY_TO_PERIPH;
DMA_Handle->Init.Mode = DMA_NORMAL;
}
DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM;
#if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
uart->dma.handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE; DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
#endif #endif
if (HAL_DMA_DeInit(&(uart->dma.handle)) != HAL_OK) if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK)
{ {
RT_ASSERT(0); RT_ASSERT(0);
} }
if (HAL_DMA_Init(&(uart->dma.handle)) != HAL_OK) if (HAL_DMA_Init(DMA_Handle) != HAL_OK)
{ {
RT_ASSERT(0); RT_ASSERT(0);
} }
rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
/* Start DMA transfer */
if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
{
/* Transfer error in reception process */
RT_ASSERT(0);
}
/* enable interrupt */ /* enable interrupt */
__HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE); if (flag == RT_DEVICE_FLAG_DMA_RX)
{
rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
/* Start DMA transfer */
if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
{
/* Transfer error in reception process */
RT_ASSERT(0);
}
CLEAR_BIT(uart->handle.Instance->CR3, USART_CR3_EIE);
__HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
}
/* enable rx irq */ /* enable irq */
HAL_NVIC_SetPriority(uart->config->dma_rx->dma_irq, 0, 0); HAL_NVIC_SetPriority(dma_config->dma_irq, 0, 0);
HAL_NVIC_EnableIRQ(uart->config->dma_rx->dma_irq); HAL_NVIC_EnableIRQ(dma_config->dma_irq);
HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0); HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
HAL_NVIC_EnableIRQ(uart->config->irq_type); HAL_NVIC_EnableIRQ(uart->config->irq_type);
LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance); LOG_D("%s dma %s instance: %x", uart->config->name, flag == RT_DEVICE_FLAG_DMA_RX ? "RX" : "TX", DMA_Handle->Instance);
LOG_D("%s dma config done", uart->config->name); LOG_D("%s dma config done", uart->config->name);
} }
@ -646,44 +787,99 @@ void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
uart = (struct stm32_uart *)huart; uart = (struct stm32_uart *)huart;
dma_isr(&uart->serial); dma_isr(&uart->serial);
} }
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
{
struct stm32_uart *uart;
RT_ASSERT(huart != NULL);
uart = (struct stm32_uart *)huart;
rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
}
#endif /* RT_SERIAL_USING_DMA */ #endif /* RT_SERIAL_USING_DMA */
static void stm32_uart_get_dma_config(void) static void stm32_uart_get_dma_config(void)
{ {
#ifdef BSP_USING_UART1
uart_obj[UART1_INDEX].uart_dma_flag = 0;
#ifdef BSP_UART1_RX_USING_DMA #ifdef BSP_UART1_RX_USING_DMA
uart_obj[UART1_INDEX].uart_dma_flag = 1; uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
static struct dma_config uart1_dma_rx = UART1_DMA_CONFIG; static struct dma_config uart1_dma_rx = UART1_DMA_RX_CONFIG;
uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx; uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
#endif #endif
#ifdef BSP_UART1_TX_USING_DMA
uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
static struct dma_config uart1_dma_tx = UART1_DMA_TX_CONFIG;
uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
#endif
#endif
#ifdef BSP_USING_UART2
uart_obj[UART2_INDEX].uart_dma_flag = 0;
#ifdef BSP_UART2_RX_USING_DMA #ifdef BSP_UART2_RX_USING_DMA
uart_obj[UART2_INDEX].uart_dma_flag = 1; uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
static struct dma_config uart2_dma_rx = UART2_DMA_CONFIG; static struct dma_config uart2_dma_rx = UART2_DMA_RX_CONFIG;
uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx; uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
#endif #endif
#ifdef BSP_UART2_TX_USING_DMA
uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
static struct dma_config uart2_dma_tx = UART2_DMA_TX_CONFIG;
uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
#endif
#endif
#ifdef BSP_USING_UART3
uart_obj[UART3_INDEX].uart_dma_flag = 0;
#ifdef BSP_UART3_RX_USING_DMA #ifdef BSP_UART3_RX_USING_DMA
uart_obj[UART3_INDEX].uart_dma_flag = 1; uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
static struct dma_config uart3_dma_rx = UART3_DMA_CONFIG; static struct dma_config uart3_dma_rx = UART3_DMA_RX_CONFIG;
uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx; uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
#endif #endif
#ifdef BSP_UART3_TX_USING_DMA
uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
static struct dma_config uart3_dma_tx = UART3_DMA_TX_CONFIG;
uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
#endif
#endif
#ifdef BSP_USING_UART4
uart_obj[UART4_INDEX].uart_dma_flag = 0;
#ifdef BSP_UART4_RX_USING_DMA #ifdef BSP_UART4_RX_USING_DMA
uart_obj[UART4_INDEX].uart_dma_flag = 1; uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
static struct dma_config uart4_dma_rx = UART4_DMA_CONFIG; static struct dma_config uart4_dma_rx = UART4_DMA_RX_CONFIG;
uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx; uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
#endif #endif
#ifdef BSP_UART4_TX_USING_DMA
uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
#endif
#endif
#ifdef BSP_USING_UART5
uart_obj[UART5_INDEX].uart_dma_flag = 0;
#ifdef BSP_UART5_RX_USING_DMA #ifdef BSP_UART5_RX_USING_DMA
uart_obj[UART5_INDEX].uart_dma_flag = 1; uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG; static struct dma_config uart5_dma_rx = UART5_DMA_RX_CONFIG;
uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx; uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
#endif #endif
#ifdef BSP_UART5_TX_USING_DMA
uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
static struct dma_config uart5_dma_tx = UART5_DMA_TX_CONFIG;
uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
#endif
#endif
#ifdef BSP_USING_UART6
uart_obj[UART6_INDEX].uart_dma_flag = 0;
#ifdef BSP_UART6_RX_USING_DMA #ifdef BSP_UART6_RX_USING_DMA
uart_obj[UART6_INDEX].uart_dma_flag = 1; uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
static struct dma_config uart6_dma_rx = UART6_DMA_CONFIG; static struct dma_config uart6_dma_rx = UART6_DMA_RX_CONFIG;
uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx; uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
#endif #endif
#ifdef BSP_LPUART1_RX_USING_DMA #ifdef BSP_UART6_TX_USING_DMA
uart_obj[LPUART1_INDEX].uart_dma_flag = 1; uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
static struct dma_config lpuart1_dma_rx = LPUART1_DMA_CONFIG; static struct dma_config uart6_dma_tx = UART6_DMA_TX_CONFIG;
uart_config[LPUART1_INDEX].dma_rx = &lpuart1_dma_rx; uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
#endif
#endif #endif
} }
@ -700,23 +896,13 @@ int rt_hw_usart_init(void)
uart_obj[i].config = &uart_config[i]; uart_obj[i].config = &uart_config[i];
uart_obj[i].serial.ops = &stm32_uart_ops; uart_obj[i].serial.ops = &stm32_uart_ops;
uart_obj[i].serial.config = config; uart_obj[i].serial.config = config;
/* register UART device */
#if defined(RT_SERIAL_USING_DMA) result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
if (uart_obj[i].uart_dma_flag) RT_DEVICE_FLAG_RDWR
{ | RT_DEVICE_FLAG_INT_RX
/* register UART device */ | RT_DEVICE_FLAG_INT_TX
result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name, | uart_obj[i].uart_dma_flag
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX , &uart_obj[i]);
, &uart_obj[i]);
}
else
#endif
{
/* register UART device */
result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
, &uart_obj[i]);
}
RT_ASSERT(result == RT_EOK); RT_ASSERT(result == RT_EOK);
} }

9
bsp/stm32/libraries/HAL_Drivers/drv_usart.h
View File

@ -41,6 +41,7 @@ struct stm32_uart_config
USART_TypeDef *Instance; USART_TypeDef *Instance;
IRQn_Type irq_type; IRQn_Type irq_type;
struct dma_config *dma_rx; struct dma_config *dma_rx;
struct dma_config *dma_tx;
}; };
/* stm32 uart dirver class */ /* stm32 uart dirver class */
@ -54,9 +55,13 @@ struct stm32_uart
{ {
DMA_HandleTypeDef handle; DMA_HandleTypeDef handle;
rt_size_t last_index; rt_size_t last_index;
} dma; } dma_rx;
struct
{
DMA_HandleTypeDef handle;
} dma_tx;
#endif #endif
rt_uint8_t uart_dma_flag; rt_uint16_t uart_dma_flag;
struct rt_serial_device serial; struct rt_serial_device serial;
}; };

66
bsp/stm32/stm32f407-atk-explorer/board/Kconfig
View File

@ -83,6 +83,25 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
default n default n
config BSP_UART1_TX_USING_DMA
bool "Enable UART1 TX DMA"
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART2
bool "Enable UART2"
default n
config BSP_UART2_RX_USING_DMA
bool "Enable UART2 RX DMA"
depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
default n
config BSP_UART2_TX_USING_DMA
bool "Enable UART2 TX DMA"
depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART3 config BSP_USING_UART3
bool "Enable UART3" bool "Enable UART3"
default n default n
@ -91,6 +110,53 @@ menu "On-chip Peripheral Drivers"
bool "Enable UART3 RX DMA" bool "Enable UART3 RX DMA"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n default n
config BSP_UART3_TX_USING_DMA
bool "Enable UART3 TX DMA"
depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART4
bool "Enable UART4"
default n
config BSP_UART4_RX_USING_DMA
bool "Enable UART4 RX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_UART4_TX_USING_DMA
bool "Enable UART4 TX DMA"
depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART5
bool "Enable UART5"
default n
config BSP_UART5_RX_USING_DMA
bool "Enable UART5 RX DMA"
depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA
default n
config BSP_UART5_TX_USING_DMA
bool "Enable UART5 TX DMA"
depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA
default n
config BSP_USING_UART6
bool "Enable UART6"
default n
config BSP_UART6_RX_USING_DMA
bool "Enable UART6 RX DMA"
depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA
default n
config BSP_UART6_TX_USING_DMA
bool "Enable UART6 TX DMA"
depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA
default n
endif endif
menuconfig BSP_USING_TIM menuconfig BSP_USING_TIM