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Merge pull request #2652 from yangjie11/yj_fix_branch 

[bsp]support AC6 for some bsp and stm32 bsp templates.
This commit is contained in:
Bernard Xiong 2019-05-07 17:01:33 +08:00 committed by GitHub
parent bdd2b2b5a2 ad3cbf6ed9
commit e88e4eb99c
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
23 changed files with 24 additions and 24 deletions
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2
bsp/es32f0334/drivers/board.h
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@ -17,7 +17,7 @@
#define ES32F0_SRAM_SIZE 0x8000 #define ES32F0_SRAM_SIZE 0x8000
#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE) #define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/es32f0654/drivers/board.h
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@ -17,7 +17,7 @@
#define ES32F0_SRAM_SIZE 0x8000 #define ES32F0_SRAM_SIZE 0x8000
#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE) #define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/gd32e230k-start/drivers/board.h
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@ -25,7 +25,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) #define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif #endif
#ifdef __ARMCC_VERSION #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/mm32l07x/drivers/board.h
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@ -16,7 +16,7 @@
#define SRAM_SIZE 0x2000 #define SRAM_SIZE 0x2000
#define SRAM_END (SRAM_BASE + SRAM_SIZE) #define SRAM_END (SRAM_BASE + SRAM_SIZE)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/nuvoton_m451/applications/startup.c
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@ -29,7 +29,7 @@ extern int finsh_system_init(void);
extern void finsh_set_device(const char* device); extern void finsh_set_device(const char* device);
#endif #endif
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define M451_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) #define M451_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

4
bsp/samd21/applications/startup.c
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@ -29,7 +29,7 @@ extern void finsh_system_init(void);
extern void finsh_set_device(const char* device); extern void finsh_set_device(const char* device);
#endif #endif
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__ #elif __ICCARM__
#pragma section="HEAP" #pragma section="HEAP"
@ -78,7 +78,7 @@ void rtthread_startup(void)
rt_system_timer_init(); rt_system_timer_init();
#ifdef RT_USING_HEAP #ifdef RT_USING_HEAP
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END); rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END);
#elif __ICCARM__ #elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END); rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END);

2
bsp/stm32/libraries/templates/stm32f0xx/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32f10x/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/libraries/templates/stm32l4xx/board/board.h
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@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000) #define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024) #define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f091-st-nucleo/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 32 #define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-atk-nano/board/board.h
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@ -27,7 +27,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-atk-warshipv3/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-dofly-M3S/board/board.h
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@ -29,7 +29,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-dofly-lyc8/board/board.h
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@ -23,7 +23,7 @@
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-fire-arbitrary/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_FLASH_SIZE (512 * 1024) #define STM32_FLASH_SIZE (512 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-hw100k-ibox/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f103-mini-system/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 20 #define STM32_SRAM_SIZE 20
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f107-uc-eval/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 64 #define STM32_SRAM_SIZE 64
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32f407-atk-explorer/board/board.h
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@ -27,7 +27,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32g071-st-nucleo/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 36 #define STM32_SRAM_SIZE 36
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32l053-st-nucleo/board/board.h
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@ -28,7 +28,7 @@ extern "C" {
#define STM32_SRAM_SIZE 8 #define STM32_SRAM_SIZE 8
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/stm32/stm32l496-ali-developer/board/board.h
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@ -39,7 +39,7 @@ extern "C" {
#define STM32_FLASH_SIZE (1024 * 1024) #define STM32_FLASH_SIZE (1024 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__

2
bsp/swm320-lq100/drivers/board.h
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@ -24,7 +24,7 @@
#endif #endif
#define SRAM_END (SRAM_BASE + SRAM_SIZE) #define SRAM_END (SRAM_BASE + SRAM_SIZE)
#ifdef __CC_ARM #if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit; extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__ #elif __ICCARM__