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support DBGU,UART0~UART3 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1587 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
luohui2320@gmail.com 2011-07-03 15:16:06 +00:00
parent dd2a4924ae
commit e5f52327ff
3 changed files with 184 additions and 48 deletions
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192
bsp/at91sam9260/board.c
View File

@ -33,23 +33,60 @@ extern void rt_hw_set_clock(rt_uint8_t sdiv, rt_uint8_t pdiv, rt_uint8_t mdiv);
/*set debug serial port*/ /*set debug serial port*/
//#define USE_UART1 //#define USE_UART1
//#define USE_UART3 //#define USE_UART3
#define USE_DBGU //#define USE_DBGU
#define DBGU ((struct uartport *)0xfffff200) #define DBGU ((struct uartport *)0xfffff200)
#define UART0 ((struct uartport *)AT91SAM9260_BASE_US0)
#define UART1 ((struct uartport *)AT91SAM9260_BASE_US1) #define UART1 ((struct uartport *)AT91SAM9260_BASE_US1)
#define UART2 ((struct uartport *)AT91SAM9260_BASE_US2)
#define UART3 ((struct uartport *)AT91SAM9260_BASE_US3) #define UART3 ((struct uartport *)AT91SAM9260_BASE_US3)
#define UART4 ((struct uartport *)AT91SAM9260_BASE_US4)
#define UART5 ((struct uartport *)AT91SAM9260_BASE_US5)
struct serial_int_rx uart0_int_rx; struct serial_int_rx uart0_int_rx;
struct serial_device uart0 = struct serial_device uart0 =
{ {
//UART0,
DBGU, DBGU,
//UART1,
//UART3,
&uart0_int_rx, &uart0_int_rx,
RT_NULL RT_NULL
}; };
struct rt_device uart0_device; struct rt_device uart0_device;
struct serial_int_rx uart1_int_rx;
struct serial_device uart1 =
{
UART0,
&uart1_int_rx,
RT_NULL
};
struct rt_device uart1_device;
struct serial_int_rx uart2_int_rx;
struct serial_device uart2 =
{
UART1,
&uart2_int_rx,
RT_NULL
};
struct rt_device uart2_device;
struct serial_int_rx uart3_int_rx;
struct serial_device uart3 =
{
UART2,
&uart3_int_rx,
RT_NULL
};
struct rt_device uart3_device;
struct serial_int_rx uart4_int_rx;
struct serial_device uart4 =
{
UART3,
&uart4_int_rx,
RT_NULL
};
struct rt_device uart4_device;
/** /**
@ -57,19 +94,72 @@ struct rt_device uart0_device;
*/ */
void rt_serial_handler(int vector) void rt_serial_handler(int vector)
{ {
#ifdef USE_UART1
int status; int status;
status = readl(AT91SAM9260_BASE_US1+AT91_US_CSR);
if (!(status & readl(AT91SAM9260_BASE_US1+AT91_US_IMR)))
{
return;
}
#endif
#ifdef USE_UART3
at91_sys_read(AT91_USART3+AT91_US_CSR);
#endif
rt_hw_serial_isr(&uart0_device);
switch (vector)
{
#ifdef RT_USING_UART0
case AT91SAM9260_ID_US0:
status = readl(AT91SAM9260_BASE_US0+AT91_US_CSR);
if (!(status & readl(AT91SAM9260_BASE_US0+AT91_US_IMR)))
{
return;
}
rt_hw_serial_isr(&uart1_device);
break;
#endif
#ifdef RT_USING_UART1
case AT91SAM9260_ID_US1:
status = readl(AT91SAM9260_BASE_US1+AT91_US_CSR);
if (!(status & readl(AT91SAM9260_BASE_US1+AT91_US_IMR)))
{
return;
}
rt_hw_serial_isr(&uart2_device);
break;
#endif
#ifdef RT_USING_UART2
case AT91SAM9260_ID_US2:
status = readl(AT91SAM9260_BASE_US2+AT91_US_CSR);
if (!(status & readl(AT91SAM9260_BASE_US2+AT91_US_IMR)))
{
return;
}
rt_hw_serial_isr(&uart3_device);
break;
#endif
#ifdef RT_USING_UART3
case AT91SAM9260_ID_US3:
status = readl(AT91SAM9260_BASE_US3+AT91_US_CSR);
if (!(status & readl(AT91SAM9260_BASE_US3+AT91_US_IMR)))
{
return;
}
rt_hw_serial_isr(&uart4_device);
break;
#endif
default: break;
}
}
void uart_port_init(rt_uint32_t base)
{
#define BAUDRATE 115200
rt_uint32_t cd;
writel(AT91_US_RSTTX | AT91_US_RSTRX |
AT91_US_RXDIS | AT91_US_TXDIS,
base + AT91_US_CR);
writel( AT91_US_USMODE_NORMAL | AT91_US_USCLKS_MCK |
AT91_US_CHRL_8 | AT91_US_PAR_NONE |
AT91_US_NBSTOP_1 | AT91_US_CHMODE_NORMAL,
base + AT91_US_MR);
cd = (clk_get_rate(clk_get("mck")) / 16 + BAUDRATE/2) / BAUDRATE;
writel(cd, base + AT91_US_BRGR);
writel(AT91_US_RXEN | AT91_US_TXEN, base + AT91_US_CR);
writel(0x1, base + AT91_US_IER);
} }
/** /**
@ -77,50 +167,58 @@ void rt_serial_handler(int vector)
*/ */
void rt_hw_uart_init(void) void rt_hw_uart_init(void)
{ {
rt_uint32_t cd; #ifdef RT_USING_UART0
#ifdef USE_UART1 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0);
#define BAUDRATE 115200 at91_sys_write(AT91_PIOB + PIO_IDR, (1<<4)|(1<<5));
//rt_uint32_t uart_rate; at91_sys_write(AT91_PIOB + PIO_PUER, (1<<4));
//at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOB); at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<5));
at91_sys_write(AT91_PIOB + PIO_ASR, (1<<4)|(1<<5));
at91_sys_write(AT91_PIOB + PIO_PDR, (1<<4)|(1<<5));
uart_port_init(AT91SAM9260_BASE_US0);
/* install interrupt handler */
rt_hw_interrupt_install(AT91SAM9260_ID_US0, rt_serial_handler, RT_NULL);
rt_hw_interrupt_umask(AT91SAM9260_ID_US0);
#endif
#ifdef RT_USING_UART1
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1); at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1);
at91_sys_write(AT91_PIOB + PIO_IDR, (1<<6)|(1<<7)); at91_sys_write(AT91_PIOB + PIO_IDR, (1<<6)|(1<<7));
at91_sys_write(AT91_PIOB + PIO_PUER, (1<<6)); at91_sys_write(AT91_PIOB + PIO_PUER, (1<<6));
at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<7)); at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<7));
at91_sys_write(AT91_PIOB + PIO_ASR, (1<<6)|(1<<7)); at91_sys_write(AT91_PIOB + PIO_ASR, (1<<6)|(1<<7));
at91_sys_write(AT91_PIOB + PIO_PDR, (1<<6)|(1<<7)); at91_sys_write(AT91_PIOB + PIO_PDR, (1<<6)|(1<<7));
writel(AT91_US_RSTTX | AT91_US_RSTRX | AT91_US_RXDIS | AT91_US_TXDIS, AT91SAM9260_BASE_US1 + AT91_US_CR); uart_port_init(AT91SAM9260_BASE_US1);
writel( AT91_US_USMODE_NORMAL | AT91_US_USCLKS_MCK | AT91_US_CHRL_8 | AT91_US_PAR_NONE | AT91_US_NBSTOP_1 | AT91_US_CHMODE_NORMAL, AT91SAM9260_BASE_US1 + AT91_US_MR);//0x100108c0
//at91_sys_write(AT91_USART1 + AT91_US_MR, 0x000008c0);//0x100108c0
cd = (clk_get_rate(clk_get("mck")) / 16 + BAUDRATE/2) / BAUDRATE;
writel(cd, AT91SAM9260_BASE_US1 + AT91_US_BRGR);
writel(AT91_US_RXEN | AT91_US_TXEN, AT91SAM9260_BASE_US1 + AT91_US_CR);
writel(0x1, AT91SAM9260_BASE_US1 + AT91_US_IER);
/* install interrupt handler */ /* install interrupt handler */
rt_hw_interrupt_install(AT91SAM9260_ID_US1, rt_serial_handler, RT_NULL); rt_hw_interrupt_install(AT91SAM9260_ID_US1, rt_serial_handler, RT_NULL);
rt_hw_interrupt_umask(AT91SAM9260_ID_US1); rt_hw_interrupt_umask(AT91SAM9260_ID_US1);
#endif #endif
#ifdef USE_UART3 #ifdef RT_USING_UART2
#define BAUDRATE 115200 at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2);
//rt_uint32_t uart_rate; at91_sys_write(AT91_PIOB + PIO_IDR, (1<<8)|(1<<9));
at91_sys_write(AT91_PIOB + PIO_PUER, (1<<8));
at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<9));
at91_sys_write(AT91_PIOB + PIO_ASR, (1<<8)|(1<<9));
at91_sys_write(AT91_PIOB + PIO_PDR, (1<<8)|(1<<9));
uart_port_init(AT91SAM9260_BASE_US2);
/* install interrupt handler */
rt_hw_interrupt_install(AT91SAM9260_ID_US2, rt_serial_handler, RT_NULL);
rt_hw_interrupt_umask(AT91SAM9260_ID_US2);
#endif
#ifdef RT_USING_UART3
at91_sys_write(AT91_PMC_PCER, 1<<AT91SAM9260_ID_US3); at91_sys_write(AT91_PMC_PCER, 1<<AT91SAM9260_ID_US3);
at91_sys_write(AT91_PIOB+0x04, (1<<10)|(1<<11)); at91_sys_write(AT91_PIOB + PIO_IDR, (1<<10)|(1<<11));
at91_sys_write(AT91_PIOB+0x70, (1<<10)|(1<<11)); at91_sys_write(AT91_PIOB + PIO_PUER, (1<<10));
writel(AT91_US_RSTTX | AT91_US_RSTRX | AT91_US_RXDIS | AT91_US_TXDIS, AT91SAM9260_BASE_US1 + AT91_US_CR); at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<11));
writel( AT91_US_USMODE_NORMAL | AT91_US_USCLKS_MCK | AT91_US_CHRL_8 | AT91_US_PAR_NONE | AT91_US_NBSTOP_1 | AT91_US_CHMODE_NORMAL, AT91SAM9260_BASE_US3 + AT91_US_MR); at91_sys_write(AT91_PIOB + PIO_ASR, (1<<10)|(1<<11));
cd = (clk_get_rate(clk_get("mck")) / 16 + BAUDRATE/2) / BAUDRATE; at91_sys_write(AT91_PIOB + PIO_PDR, (1<<10)|(1<<11));
writel(cd, AT91SAM9260_BASE_US3 + AT91_US_BRGR); uart_port_init(AT91SAM9260_BASE_US3);
writel(AT91_US_RXEN | AT91_US_TXEN, AT91SAM9260_BASE_US3 + AT91_US_CR);
writel(0x1, AT91SAM9260_BASE_US3 + AT91_US_IER);
/* install interrupt handler */ /* install interrupt handler */
rt_hw_interrupt_install(AT91SAM9260_ID_US3, rt_serial_handler, RT_NULL); rt_hw_interrupt_install(AT91SAM9260_ID_US3, rt_serial_handler, RT_NULL);
rt_hw_interrupt_umask(AT91SAM9260_ID_US3); rt_hw_interrupt_umask(AT91SAM9260_ID_US3);
#endif #endif
#ifdef USE_DBGU #ifdef RT_USING_DBGU
#define BAUDRATE 115200 #define BAUDRATE 115200
//rt_uint32_t cd; rt_uint32_t cd;
at91_sys_write(AT91_PIOB + PIO_IDR, (1<<14)|(1<<15)); at91_sys_write(AT91_PIOB + PIO_IDR, (1<<14)|(1<<15));
//at91_sys_write(AT91_PIOB + PIO_PUER, (1<<6)); //at91_sys_write(AT91_PIOB + PIO_PUER, (1<<6));
at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<14)|(1<<15)); at91_sys_write(AT91_PIOB + PIO_PUDR, (1<<14)|(1<<15));
@ -136,7 +234,7 @@ void rt_hw_uart_init(void)
at91_sys_read(AT91_DBGU + AT91_US_CSR); //read for clearing interrupt at91_sys_read(AT91_DBGU + AT91_US_CSR); //read for clearing interrupt
at91_sys_write(AT91_DBGU + AT91_US_IER, 0x1); at91_sys_write(AT91_DBGU + AT91_US_IER, 0x1);
#endif #endif
} }
#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV) #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
@ -150,10 +248,10 @@ static rt_uint32_t pit_cnt; /* access only w/system irq blocked */
*/ */
void rt_timer_handler(int vector) void rt_timer_handler(int vector)
{ {
#ifdef USE_DBGU #ifdef RT_USING_DBGU
if (at91_sys_read(AT91_DBGU + AT91_US_CSR) & 0x1) { if (at91_sys_read(AT91_DBGU + AT91_US_CSR) & 0x1) {
//rt_kprintf("DBGU interrupt occur\n"); //rt_kprintf("DBGU interrupt occur\n");
rt_serial_handler(1); rt_hw_serial_isr(&uart0_device);
} }
#endif #endif
if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) {

6
bsp/at91sam9260/rtconfig.h
View File

@ -118,6 +118,12 @@
//#define RT_USING_LED //#define RT_USING_LED
#define RT_USING_DBGU
/* #define RT_USING_UART0 */
/* #define RT_USING_UART1 */
/* #define RT_USING_UART2 */
/* #define RT_USING_UART3 */
/* SECTION: lwip, a lightweight TCP/IP protocol stack */ /* SECTION: lwip, a lightweight TCP/IP protocol stack */
/* Using lightweight TCP/IP protocol stack */ /* Using lightweight TCP/IP protocol stack */
#define RT_USING_LWIP #define RT_USING_LWIP

34
bsp/at91sam9260/startup.c
View File

@ -105,10 +105,40 @@ void rtthread_startup(void)
rt_system_scheduler_init(); rt_system_scheduler_init();
#ifdef RT_USING_DEVICE #ifdef RT_USING_DEVICE
/* register uart1 */ #ifdef RT_USING_DBGU
/* register dbgu */
rt_hw_serial_register(&uart0_device, "uart0", rt_hw_serial_register(&uart0_device, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX,
&uart0); &uart0);
#endif
#ifdef RT_USING_UART0
/* register uart0 */
rt_hw_serial_register(&uart1_device, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX,
&uart1);
#endif
#ifdef RT_USING_UART1
/* register uart1 */
rt_hw_serial_register(&uart2_device, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX,
&uart2);
#endif
#ifdef RT_USING_UART2
/* register uart2 */
rt_hw_serial_register(&uart3_device, "uart3",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX,
&uart3);
#endif
#ifdef RT_USING_UART3
/* register uart3 */
rt_hw_serial_register(&uart4_device, "uart4",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_INT_RX,
&uart4);
#endif
#ifdef RT_USING_DFS #ifdef RT_USING_DFS
//rt_hw_sdcard_init(); //rt_hw_sdcard_init();
@ -134,8 +164,10 @@ void rtthread_startup(void)
/* initialize finsh */ /* initialize finsh */
finsh_system_init(); finsh_system_init();
#ifdef RT_USING_DEVICE #ifdef RT_USING_DEVICE
#ifdef RT_USING_DBGU
finsh_set_device("uart0"); finsh_set_device("uart0");
#endif #endif
#endif
#endif #endif
/* initialize system timer thread */ /* initialize system timer thread */