BSP support menuconfig for lm3s9b9x
This commit is contained in:
dejavudwh
Man, Jianting (Meco)
parent
bf4594870e
commit
e4fdf23cef
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,37 @@
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mainmenu "RT-Thread Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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config ENV_DIR
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string
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option env="ENV_ROOT"
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default "/"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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config SOC_LM3S9B9X
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bool
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select ARCH_ARM_CORTEX_M3
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default y
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config RT_LWIP_ETH_PAD_SIZE
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int
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default 2
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config RT_USING_UART1
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bool
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default y
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@ -18,19 +18,19 @@
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#include "lwipopts.h"
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#include "luminaryif.h"
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#define MAX_ADDR_LEN 6
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#define MAX_ADDR_LEN 6
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struct net_device
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{
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/* inherit from ethernet device */
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struct eth_device parent;
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/* inherit from ethernet device */
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struct eth_device parent;
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/* interface address info. */
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rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
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/* interface address info. */
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rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
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};
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static struct net_device luminaryif_dev_entry;
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static struct net_device *luminaryif_dev =&luminaryif_dev_entry;
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static struct net_device luminaryif_dev_entry;
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static struct net_device *luminaryif_dev = &luminaryif_dev_entry;
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static struct rt_semaphore tx_sem;
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//*****************************************************************************
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@ -115,7 +115,7 @@ void luminaryif_isr(void)
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//
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// Check to see if an RX Interrupt has occured.
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//
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if(ulTemp & ETH_INT_RX)
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if (ulTemp & ETH_INT_RX)
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{
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//
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// Indicate that a packet has been received.
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@ -123,65 +123,67 @@ void luminaryif_isr(void)
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rt_err_t result;
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/* a frame has been received */
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result = eth_device_ready((struct eth_device*)&(luminaryif_dev->parent));
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result = eth_device_ready((struct eth_device *)&(luminaryif_dev->parent));
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if(result != RT_EOK) rt_set_errno(-RT_ERROR);
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if (result != RT_EOK)
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rt_set_errno(-RT_ERROR);
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//
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// Disable Ethernet RX Interrupt.
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//
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EthernetIntDisable(ETH_BASE, ETH_INT_RX);
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}
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if(ulTemp & ETH_INT_TX)
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if (ulTemp & ETH_INT_TX)
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{
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/* A frame has been transmitted. */
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rt_sem_release(&tx_sem);
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}
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}
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/* control the interface */
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rt_err_t luminaryif_control(rt_device_t dev, int cmd, void *args)
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{
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switch(cmd)
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{
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case NIOCTL_GADDR:
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/* get mac address */
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if(args) rt_memcpy(args, luminaryif_dev_entry.dev_addr, 6);
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else return -RT_ERROR;
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break;
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switch (cmd)
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{
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case NIOCTL_GADDR:
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/* get mac address */
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if (args)
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rt_memcpy(args, luminaryif_dev_entry.dev_addr, 6);
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else
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return -RT_ERROR;
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break;
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default :
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break;
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}
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default:
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break;
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}
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return RT_EOK;
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return RT_EOK;
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}
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/* Open the ethernet interface */
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rt_err_t luminaryif_open(rt_device_t dev, rt_uint16_t oflag)
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{
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return RT_EOK;
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return RT_EOK;
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}
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/* Close the interface */
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rt_err_t luminaryif_close(rt_device_t dev)
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{
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return RT_EOK;
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return RT_EOK;
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}
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/* Read */
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rt_size_t luminaryif_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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rt_size_t luminaryif_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
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{
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rt_set_errno(-RT_ENOSYS);
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return 0;
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rt_set_errno(-RT_ENOSYS);
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return 0;
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}
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/* Write */
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rt_size_t luminaryif_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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rt_size_t luminaryif_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
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{
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rt_set_errno(-RT_ENOSYS);
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return 0;
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rt_set_errno(-RT_ENOSYS);
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return 0;
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}
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//****************************************************************************
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@ -208,11 +210,11 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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//
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// Wait for space available in the TX FIFO.
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//
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while(!EthernetSpaceAvail(ETH_BASE))
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while (!EthernetSpaceAvail(ETH_BASE))
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{
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}
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//
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//
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// Fill in the first two bytes of the payload data (configured as padding
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// with ETH_PAD_SIZE = 2) with the total length of the payload data
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// (minus the Ethernet MAC layer header).
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@ -229,7 +231,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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//
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// Copy data from the pbuf(s) into the TX Fifo.
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//
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for(q = p; q != NULL; q = q->next)
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for (q = p; q != NULL; q = q->next)
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{
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//
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// Intialize a char pointer and index to the pbuf payload data.
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@ -241,7 +243,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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// If the gather buffer has leftover data from a previous pbuf
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// in the chain, fill it up and write it to the Tx FIFO.
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//
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while((iBuf < q->len) && (iGather != 0))
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while ((iBuf < q->len) && (iGather != 0))
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{
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//
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// Copy a byte from the pbuf into the gather buffer.
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@ -258,7 +260,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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// If the gather index is 0 and the pbuf index is non-zero,
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// we have a gather buffer to write into the Tx FIFO.
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//
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if((iGather == 0) && (iBuf != 0))
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if ((iGather == 0) && (iBuf != 0))
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{
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HWREG(ETH_BASE + MAC_O_DATA) = ulGather;
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ulGather = 0;
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@ -268,12 +270,12 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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// Copy words of pbuf data into the Tx FIFO, but don't go past
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// the end of the pbuf.
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//
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if((iBuf % 4) != 0)
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if ((iBuf % 4) != 0)
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{
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while((iBuf + 4) <= q->len)
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while ((iBuf + 4) <= q->len)
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{
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ulTemp = (pucBuf[iBuf++] << 0);
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ulTemp |= (pucBuf[iBuf++] << 8);
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ulTemp = (pucBuf[iBuf++] << 0);
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ulTemp |= (pucBuf[iBuf++] << 8);
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ulTemp |= (pucBuf[iBuf++] << 16);
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ulTemp |= (pucBuf[iBuf++] << 24);
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HWREG(ETH_BASE + MAC_O_DATA) = ulTemp;
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@ -286,7 +288,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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//
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pulBuf = (unsigned long *)&pucBuf[iBuf];
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while((iBuf + 4) <= q->len)
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while ((iBuf + 4) <= q->len)
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{
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HWREG(ETH_BASE + MAC_O_DATA) = *pulBuf++;
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iBuf += 4;
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@ -296,7 +298,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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// Check if leftover data in the pbuf and save it in the gather
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// buffer for the next time.
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//
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while(iBuf < q->len)
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while (iBuf < q->len)
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{
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//
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// Copy a byte from the pbuf into the gather buffer.
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@ -324,7 +326,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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lwip_stats.link.xmit++;
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#endif
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return(ERR_OK);
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return (ERR_OK);
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}
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//*****************************************************************************
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@ -333,7 +335,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
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// of the incoming packet from the interface into the pbuf.
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//
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//*****************************************************************************
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struct pbuf * luminaryif_rx(rt_device_t dev)
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struct pbuf *luminaryif_rx(rt_device_t dev)
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{
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struct pbuf *p, *q;
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u16_t len;
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@ -341,14 +343,14 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
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int i;
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unsigned long *ptr;
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if(!EthernetPacketAvail(ETH_BASE))
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if (!EthernetPacketAvail(ETH_BASE))
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{
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//
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// Enable Ethernet RX Interrupt.
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//
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EthernetIntEnable(ETH_BASE, ETH_INT_RX);
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return(NULL);
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return (NULL);
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}
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//
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@ -364,7 +366,7 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
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//
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p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
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if(p != NULL)
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if (p != NULL)
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{
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//
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// Place the first word into the first pbuf location.
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@ -377,7 +379,7 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
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// Process all but the last buffer in the pbuf chain.
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//
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q = p;
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while(q != NULL)
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while (q != NULL)
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{
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//
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// Setup a byte pointer into the payload section of the pbuf.
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@ -388,7 +390,7 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
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// Read data from FIFO into the current pbuf
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// (assume pbuf length is modulo 4)
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//
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for(i = 0; i < q->len; i += 4)
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for (i = 0; i < q->len; i += 4)
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{
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*ptr++ = HWREG(ETH_BASE + MAC_O_DATA);
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}
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@ -414,7 +416,7 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
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//
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// Just read all of the remaining data from the FIFO and dump it.
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//
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for(i = 4; i < len; i+=4)
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for (i = 4; i < len; i += 4)
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{
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ulTemp = HWREG(ETH_BASE + MAC_O_DATA);
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}
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@ -423,72 +425,71 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
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lwip_stats.link.memerr++;
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lwip_stats.link.drop++;
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#endif
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//
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// Enable Ethernet RX Interrupt.
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//
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EthernetIntEnable(ETH_BASE, ETH_INT_RX);
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//
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// Enable Ethernet RX Interrupt.
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//
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EthernetIntEnable(ETH_BASE, ETH_INT_RX);
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}
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return(p);
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return (p);
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}
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int rt_hw_luminaryif_init(void)
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{
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rt_err_t result;
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unsigned long ulUser0, ulUser1;
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rt_err_t result;
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unsigned long ulUser0, ulUser1;
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/* Enable and Reset the Ethernet Controller. */
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SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
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SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
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/* Enable and Reset the Ethernet Controller. */
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SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
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SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
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/*
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Enable Port F for Ethernet LEDs.
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LED0 Bit 3 Output
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LED1 Bit 2 Output
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*/
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SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
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/*
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Enable Port F for Ethernet LEDs.
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LED0 Bit 3 Output
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LED1 Bit 2 Output
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*/
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SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
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/* GPIODirModeSet and GPIOPadConfigSet */
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GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3);
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GPIOPinConfigure(GPIO_PF2_LED1);
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GPIOPinConfigure(GPIO_PF3_LED0);
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FlashUserSet(0x00371200, 0x00563412); /* OUI:00-12-37 (hex) Texas Instruments, only for test */
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/* Configure the hardware MAC address */
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FlashUserGet(&ulUser0, &ulUser1);
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if((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
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{
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rt_kprintf("Fatal error in geting MAC address\n");
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}
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FlashUserSet(0x00371200, 0x00563412); /* OUI:00-12-37 (hex) Texas Instruments, only for test */
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/* Configure the hardware MAC address */
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FlashUserGet(&ulUser0, &ulUser1);
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if ((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
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{
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rt_kprintf("Fatal error in geting MAC address\n");
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}
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/* init rt-thread device interface */
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luminaryif_dev_entry.parent.parent.init = luminaryif_init;
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luminaryif_dev_entry.parent.parent.open = luminaryif_open;
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luminaryif_dev_entry.parent.parent.close = luminaryif_close;
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luminaryif_dev_entry.parent.parent.read = luminaryif_read;
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luminaryif_dev_entry.parent.parent.write = luminaryif_write;
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luminaryif_dev_entry.parent.parent.control = luminaryif_control;
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luminaryif_dev_entry.parent.eth_rx = luminaryif_rx;
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luminaryif_dev_entry.parent.eth_tx = luminaryif_tx;
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/* init rt-thread device interface */
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luminaryif_dev_entry.parent.parent.init = luminaryif_init;
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luminaryif_dev_entry.parent.parent.open = luminaryif_open;
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luminaryif_dev_entry.parent.parent.close = luminaryif_close;
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luminaryif_dev_entry.parent.parent.read = luminaryif_read;
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luminaryif_dev_entry.parent.parent.write = luminaryif_write;
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luminaryif_dev_entry.parent.parent.control = luminaryif_control;
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luminaryif_dev_entry.parent.eth_rx = luminaryif_rx;
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luminaryif_dev_entry.parent.eth_tx = luminaryif_tx;
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/*
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Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
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address needed to program the hardware registers, then program the MAC
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address into the Ethernet Controller registers.
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*/
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luminaryif_dev_entry.dev_addr[0] = ((ulUser0 >> 0) & 0xff);
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luminaryif_dev_entry.dev_addr[1] = ((ulUser0 >> 8) & 0xff);
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luminaryif_dev_entry.dev_addr[2] = ((ulUser0 >> 16) & 0xff);
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luminaryif_dev_entry.dev_addr[3] = ((ulUser1 >> 0) & 0xff);
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luminaryif_dev_entry.dev_addr[4] = ((ulUser1 >> 8) & 0xff);
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luminaryif_dev_entry.dev_addr[5] = ((ulUser1 >> 16) & 0xff);
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/*
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Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
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address needed to program the hardware registers, then program the MAC
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address into the Ethernet Controller registers.
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*/
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luminaryif_dev_entry.dev_addr[0] = ((ulUser0 >> 0) & 0xff);
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luminaryif_dev_entry.dev_addr[1] = ((ulUser0 >> 8) & 0xff);
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luminaryif_dev_entry.dev_addr[2] = ((ulUser0 >> 16) & 0xff);
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luminaryif_dev_entry.dev_addr[3] = ((ulUser1 >> 0) & 0xff);
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luminaryif_dev_entry.dev_addr[4] = ((ulUser1 >> 8) & 0xff);
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luminaryif_dev_entry.dev_addr[5] = ((ulUser1 >> 16) & 0xff);
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/* Program the hardware with it's MAC address (for filtering). */
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EthernetMACAddrSet(ETH_BASE, luminaryif_dev_entry.dev_addr);
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/* Program the hardware with it's MAC address (for filtering). */
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EthernetMACAddrSet(ETH_BASE, luminaryif_dev_entry.dev_addr);
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rt_sem_init(&tx_sem, "emac", 1, RT_IPC_FLAG_FIFO);
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rt_sem_init(&tx_sem, "emac", 1, RT_IPC_FLAG_FIFO);
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result = eth_device_init(&(luminaryif_dev->parent), "E0");
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result = eth_device_init(&(luminaryif_dev->parent), "E0");
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return result;
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return result;
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}
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@ -1,151 +1,294 @@
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/* RT-Thread config file */
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#ifndef __RTTHREAD_CFG_H__
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#define __RTTHREAD_CFG_H__
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#ifndef RT_CONFIG_H__
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#define RT_CONFIG_H__
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/* RT_NAME_MAX*/
|
||||
#define RT_NAME_MAX 8
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Project Configuration */
|
||||
|
||||
/* RT_ALIGN_SIZE*/
|
||||
#define RT_ALIGN_SIZE 8
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
/* PRIORITY_MAX*/
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
|
||||
/* Tick per Second*/
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
|
||||
/* SECTION: RT_DEBUG */
|
||||
/* Thread Debug*/
|
||||
/* #define RT_DEBUG */
|
||||
/* #define RT_THREAD_DEBUG */
|
||||
|
||||
/* Using Hook*/
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 256
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_KSERVICE_USING_STDLIB
|
||||
#define RT_DEBUG
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
/* SECTION: IPC */
|
||||
/* Using Semaphore*/
|
||||
#define RT_USING_SEMAPHORE
|
||||
|
||||
/* Using Mutex*/
|
||||
#define RT_USING_MUTEX
|
||||
|
||||
/* Using Event*/
|
||||
#define RT_USING_EVENT
|
||||
|
||||
/* Using Faset Event*/
|
||||
/* #define RT_USING_FASTEVENT */
|
||||
|
||||
/* Using MailBox*/
|
||||
#define RT_USING_MAILBOX
|
||||
|
||||
/* Using Message Queue*/
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* SECTION: Memory Management */
|
||||
/* Using Memory Pool Management*/
|
||||
#define RT_USING_MEMPOOL
|
||||
/* Memory Management */
|
||||
|
||||
/* Using Dynamic Heap Management*/
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Using Small MM*/
|
||||
#define RT_USING_SMALL_MEM
|
||||
/* Kernel Device Object */
|
||||
|
||||
/* Using SLAB Allocator*/
|
||||
/* #define RT_USING_SLAB */
|
||||
|
||||
/* SECTION: Device System */
|
||||
/* Using Device System*/
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_DEVICE_IPC
|
||||
|
||||
#define RT_USING_UART1
|
||||
// #define RT_USING_UART2
|
||||
// #define RT_USING_UART3
|
||||
|
||||
/* SECTION: Console options */
|
||||
#define RT_USING_CONSOLE
|
||||
/* the buffer size of console*/
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart"
|
||||
#define RT_VER_NUM 0x50001
|
||||
#define RT_USING_HW_ATOMIC
|
||||
#define RT_USING_CPU_FFS
|
||||
#define ARCH_ARM
|
||||
#define ARCH_ARM_CORTEX_M
|
||||
#define ARCH_ARM_CORTEX_M3
|
||||
|
||||
/* SECTION: FinSH shell options */
|
||||
/* Using FinSH as Shell*/
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
/* Using symbol table */
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
//#define RT_USING_DFS
|
||||
/* SECTION: DFS options */
|
||||
/* DFS: device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_POSIX
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FD_MAX 4
|
||||
#define RT_USING_DFS_V1
|
||||
#define DFS_FILESYSTEMS_MAX 1
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 4
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
|
||||
/* elm-chan's FatFs, Generic FAT Filesystem Module */
|
||||
|
||||
#define RT_DFS_ELM_CODE_PAGE 437
|
||||
#define RT_DFS_ELM_WORD_ACCESS
|
||||
#define RT_DFS_ELM_USE_LFN_3
|
||||
#define RT_DFS_ELM_USE_LFN 3
|
||||
#define RT_DFS_ELM_LFN_UNICODE_0
|
||||
#define RT_DFS_ELM_LFN_UNICODE 0
|
||||
#define RT_DFS_ELM_MAX_LFN 255
|
||||
#define RT_DFS_ELM_DRIVES 2
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* the max number of mounted filesystem */
|
||||
#define DFS_FILESYSTEMS_MAX 1
|
||||
/* the max number of opened files */
|
||||
#define DFS_FD_MAX 4
|
||||
/* the max number of cached sector */
|
||||
#define DFS_CACHE_MAX_NUM 4
|
||||
/* Device Drivers */
|
||||
|
||||
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
|
||||
/* Using lighweight TCP/IP protocol stack*/
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
#define NETDEV_USING_PING
|
||||
#define RT_USING_LWIP
|
||||
#define RT_USING_LWIP203
|
||||
|
||||
/* Trace LwIP protocol*/
|
||||
/* #define RT_LWIP_DEBUG */
|
||||
|
||||
/* Enable ICMP protocol*/
|
||||
#define RT_LWIP_ICMP
|
||||
|
||||
/* Enable IGMP protocol*/
|
||||
#define RT_USING_LWIP_VER_NUM 0x20003
|
||||
#define RT_LWIP_MEM_ALIGNMENT 4
|
||||
#define RT_LWIP_IGMP
|
||||
|
||||
/* Enable UDP protocol*/
|
||||
#define RT_LWIP_UDP
|
||||
|
||||
/* Enable TCP protocol*/
|
||||
#define RT_LWIP_TCP
|
||||
|
||||
/* the number of simulatenously active TCP connections*/
|
||||
#define RT_LWIP_TCP_PCB_NUM 5
|
||||
|
||||
/* Ethernet padding size */
|
||||
#define RT_LWIP_ETH_PAD_SIZE 2
|
||||
|
||||
/* Enable SNMP protocol*/
|
||||
//#define RT_LWIP_SNMP
|
||||
|
||||
/* Using DHCP*/
|
||||
/* #define RT_LWIP_DHCP */
|
||||
|
||||
#define RT_LWIP_ICMP
|
||||
#define RT_LWIP_DNS
|
||||
#define RT_LWIP_DHCP
|
||||
#define IP_SOF_BROADCAST 1
|
||||
#define IP_SOF_BROADCAST_RECV 1
|
||||
|
||||
/* Static IPv4 Address */
|
||||
|
||||
/* ip address of target */
|
||||
#define RT_LWIP_IPADDR "192.168.1.30"
|
||||
#define RT_LWIP_GWADDR "192.168.1.1"
|
||||
#define RT_LWIP_MSKADDR "255.255.255.0"
|
||||
#define RT_LWIP_UDP
|
||||
#define RT_LWIP_TCP
|
||||
#define RT_LWIP_RAW
|
||||
#define RT_MEMP_NUM_NETCONN 8
|
||||
#define RT_LWIP_PBUF_NUM 16
|
||||
#define RT_LWIP_RAW_PCB_NUM 4
|
||||
#define RT_LWIP_UDP_PCB_NUM 4
|
||||
#define RT_LWIP_TCP_PCB_NUM 5
|
||||
#define RT_LWIP_TCP_SEG_NUM 40
|
||||
#define RT_LWIP_TCP_SND_BUF 8192
|
||||
#define RT_LWIP_TCP_WND 8192
|
||||
#define RT_LWIP_TCPTHREAD_PRIORITY 12
|
||||
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
|
||||
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
|
||||
#define RT_LWIP_ETHTHREAD_PRIORITY 15
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
|
||||
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
|
||||
#define LWIP_NETIF_STATUS_CALLBACK 1
|
||||
#define LWIP_NETIF_LINK_CALLBACK 1
|
||||
#define SO_REUSE 1
|
||||
#define LWIP_SO_RCVTIMEO 1
|
||||
#define LWIP_SO_SNDTIMEO 1
|
||||
#define LWIP_SO_RCVBUF 1
|
||||
#define LWIP_SO_LINGER 0
|
||||
#define LWIP_NETIF_LOOPBACK 0
|
||||
#define RT_LWIP_USING_PING
|
||||
|
||||
/* gateway address of target */
|
||||
#define RT_LWIP_GWADDR "192.168.1.1"
|
||||
/* Utilities */
|
||||
|
||||
/* mask address of target */
|
||||
#define RT_LWIP_MSKADDR "255.255.255.0"
|
||||
|
||||
/* tcp thread options */
|
||||
#define RT_LWIP_TCPTHREAD_PRIORITY 12
|
||||
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
|
||||
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
/* ethernet if thread options */
|
||||
#define RT_LWIP_ETHTHREAD_PRIORITY 15
|
||||
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
|
||||
|
||||
/* TCP sender buffer space */
|
||||
#define RT_LWIP_TCP_SND_BUF 8192
|
||||
/* TCP receive window. */
|
||||
#define RT_LWIP_TCP_WND 8192
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* the size of each pbuf in the pbuf pool. */
|
||||
#define RT_LWIP_PBUF_POOL_BUFSIZE 1500
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects */
|
||||
|
||||
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
#define SOC_LM3S9B9X
|
||||
#define RT_LWIP_ETH_PAD_SIZE 2
|
||||
#define RT_USING_UART1
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue