[HUST CSE IoTS&P Lab][bsp] add missing UL suffix to BIT macro to prevent undefined behavior (#7153)
* [bsp] add missing UL suffix to BIT macro to prevent undefined behavior. * [bsp] add UL suffix to BIT macro for consistency and readability. * fix toUppercase. * fix the abnormal character. * format the file.
This commit is contained in:
shandianchengzi
GitHub
parent
3a9c5690b1
commit
e49140b513
|
|
@ -41,7 +41,7 @@
|
|||
#define SET_HCDMA_DESC_ADDR(a) (((uint32_t)(a)) >> 9)
|
||||
#define MIN(a, b) (((a) <= (b)) ? (a) : (b))
|
||||
#define MAX(a, b) (((a) >= (b)) ? (a) : (b))
|
||||
#define BIT(b) (0x1u << (b))
|
||||
#define BIT(b) (0x1U << (b))
|
||||
|
||||
/** @defgroup USB_HOST_PID
|
||||
* @{
|
||||
|
|
@ -212,7 +212,7 @@ void USB_EnableInt(BOOL enable);
|
|||
|
||||
/**
|
||||
* @brief Flush TX/RX FIFO
|
||||
* @param[in] num Flush FIFO£¬0: non-periodic TX FIFO (HOST Mode) or FIFO 0 (DEVICE Mode); 1: Periodic TX FIFO (HOST Mode) or FIFO 1 (DEVICE Mode); 2-15: FIFO n in DEVICE Mode; 16: Flush All TX FIFO; otherwise: Flush RX FIFO
|
||||
* @param[in] num Flush FIFO, 0: non-periodic TX FIFO (HOST Mode) or FIFO 0 (DEVICE Mode); 1: Periodic TX FIFO (HOST Mode) or FIFO 1 (DEVICE Mode); 2-15: FIFO n in DEVICE Mode; 16: Flush All TX FIFO; otherwise: Flush RX FIFO
|
||||
* @retval void
|
||||
*/
|
||||
void USB_FlushFIFO(uint32_t num);
|
||||
|
|
@ -233,7 +233,7 @@ BOOL USB_roleIsHost(void);
|
|||
/**
|
||||
* @brief Control and get VBus Status (Only for HOST Mode)
|
||||
* @param[in] opt Bit1: Set VBus using Bit0; Bit0: Turn VBus On or Off
|
||||
* @retval BOOL TRUE: VBus is on; FALSE£ºVBus is off
|
||||
* @retval BOOL TRUE: VBus is on; FALSE: VBus is off
|
||||
* @note It cannot control VBus actually due to HW problem
|
||||
*/
|
||||
BOOL USB_hostVBus(uint32_t opt);
|
||||
|
|
@ -363,13 +363,13 @@ BOOL USB_hostINT_isPCD(void);
|
|||
void USB_hostINT_clrPCD(void);
|
||||
|
||||
/**
|
||||
* @brief Port Enable/Disable Change£¨PEDC£©Interrupt Asserted (Only for HOST Mode)
|
||||
* @brief Port Enable/Disable Change (PEDC) Interrupt Asserted (Only for HOST Mode)
|
||||
* @retval BOOL TRUE: Interrupt Asserted; FALSE: Interrupt is NOT asserted
|
||||
*/
|
||||
BOOL USB_hostINT_isPEDC(void);
|
||||
|
||||
/**
|
||||
* @brief Clear Port Enable/Disable Change£¨PEDC£©Interrupt Flag (Only for HOST Mode)
|
||||
* @brief Clear Port Enable/Disable Change (PEDC) Interrupt Flag (Only for HOST Mode)
|
||||
* @retval void
|
||||
*/
|
||||
void USB_hostINT_clrPEDC(void);
|
||||
|
|
@ -520,7 +520,7 @@ void USB_devINT_enDone(uint32_t ep, BOOL in, BOOL en);
|
|||
* @brief Transaction Done Interrupt Asserted (Only for DEVICE Mode)
|
||||
* @param[in] ep Endpoint
|
||||
* @param[in] in Endpoint Direction, TRUE: IN; FALSE: OUT
|
||||
* @retval uint32_t Result, Bit0: Done; Bit1£ºBuffer Not Available Error; Bit2: SETUP Phase Done
|
||||
* @retval uint32_t Result, Bit0: Done; Bit1: Buffer Not Available Error; Bit2: SETUP Phase Done
|
||||
*/
|
||||
uint32_t USB_devINT_isDone(uint32_t ep, BOOL in);
|
||||
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@ struct clk_core;
|
|||
struct clk_ops;
|
||||
|
||||
#undef BIT
|
||||
#define BIT(x) (1 << (x))
|
||||
#define BIT(x) (1UL << (x))
|
||||
|
||||
#define BITS_PER_LONGS 32
|
||||
#define GENMASK(h, l) \
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ typedef unsigned long long int u64;
|
|||
#define true 1
|
||||
#define false 0
|
||||
|
||||
#define BIT(nr) (1 << (nr))
|
||||
#define BIT(nr) (1UL << (nr))
|
||||
|
||||
/* Compute the number of elements in the given array */
|
||||
#define ARRAY_SIZE(a) \
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
#define SPINOR_INFO(fmt, arg...) hal_log_info(SPINOR_FMT(fmt), ##arg)
|
||||
|
||||
#ifndef BIT
|
||||
#define BIT(x) (1 << x)
|
||||
#define BIT(x) (1UL << (x))
|
||||
#endif
|
||||
|
||||
#ifndef MIN
|
||||
|
|
|
|||
|
|
@ -63,7 +63,7 @@ typedef struct tina_mmc *tina_mmc_t;
|
|||
#define MMC1 ((tina_mmc_t)MMC1_BASE_ADDR)
|
||||
|
||||
|
||||
#define BIT(x) (1<<(x))
|
||||
#define BIT(x) (1UL<<(x))
|
||||
/* Struct for Intrrrupt Information */
|
||||
#define SDXC_RespErr BIT(1) //0x2
|
||||
#define SDXC_CmdDone BIT(2) //0x4
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
#define UINT_MAX 0xffffffff
|
||||
#endif // UINT_MAX
|
||||
|
||||
#define BIT(n) (1ul << (n))
|
||||
#define BIT(n) (1UL << (n))
|
||||
|
||||
#define AT(x) __attribute__((section(#x)))
|
||||
#define ALIGNED(n) __attribute__((aligned(n)))
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
#define GPIOMIS 0x418
|
||||
#define GPIOIC 0x41c
|
||||
|
||||
#define BIT(x) (1 << (x))
|
||||
#define BIT(x) (1UL << (x))
|
||||
|
||||
#define PL061_GPIO_NR 8
|
||||
|
||||
|
|
|
|||
|
|
@ -325,7 +325,7 @@ nvm_rank_ldo5:
|
|||
#define OTP_OUTPUT_LDO5 ((NVM_SECTOR3_REGISTER_6 & 0x03)) // nvm_output_ldo5
|
||||
|
||||
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
|
||||
#define BIT(_x) (1<<(_x))
|
||||
#define BIT(_x) (1UL << (_x))
|
||||
#define STM32_PMIC_NUM_IRQ_REGS 4
|
||||
|
||||
#define TURN_ON_REG 0x1
|
||||
|
|
|
|||
|
|
@ -325,7 +325,7 @@ nvm_rank_ldo5:
|
|||
#define OTP_OUTPUT_LDO5 ((NVM_SECTOR3_REGISTER_6 & 0x03)) // nvm_output_ldo5
|
||||
|
||||
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
|
||||
#define BIT(_x) (1<<(_x))
|
||||
#define BIT(_x) (1UL << (_x))
|
||||
#define STM32_PMIC_NUM_IRQ_REGS 4
|
||||
|
||||
#define TURN_ON_REG 0x1
|
||||
|
|
|
|||
Loading…
Reference in New Issue