增加对lcd和sd驱动的支持
This commit is contained in:
Hao Zhu
parent
1acb6418f6
commit
e489c75347
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@ -104,6 +104,10 @@ CONFIG_FINSH_ARG_MAX=10
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# Device virtual file system
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#
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# CONFIG_RT_USING_DFS is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
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# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
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#
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# Device Drivers
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@ -338,7 +342,10 @@ CONFIG_BSP_USING_USB_TO_USART=y
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# CONFIG_BSP_USING_RS232 is not set
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# CONFIG_BSP_USING_SDRAM is not set
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# CONFIG_BSP_USING_QSPI_FLASH is not set
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# CONFIG_BSP_USING_LCD is not set
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# CONFIG_BSP_USING_MPU6050 is not set
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# CONFIG_BSP_USING_POT is not set
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# CONFIG_BSP_USING_SDCARD is not set
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#
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# On-chip Peripheral Drivers
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@ -355,6 +362,9 @@ CONFIG_BSP_USING_UART1=y
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# CONFIG_BSP_USING_I2C1 is not set
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# CONFIG_BSP_USING_ONCHIP_RTC is not set
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# CONFIG_BSP_USING_WDT is not set
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# CONFIG_BSP_USING_SDIO is not set
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# CONFIG_BSP_USING_FMC is not set
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# CONFIG_BSP_USING_LTDC is not set
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#
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# Board extended module Drivers
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@ -38,7 +38,7 @@
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本 BSP 目前对外设的支持情况如下：
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| **板载外设** | **支持情况** | **备注** |
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| :----------------- | :----------: | :------------------------------------- |
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| :---------------- | :----------: | :------------------------------------------------------ |
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| USB 转串口 | 支持 | |
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| RS232 | 支持 | 与以太网有引脚冲突 |
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| QSPI Flash | 支持 | |
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@ -46,7 +46,8 @@
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| 以太网 | 暂不支持 | 移植中 |
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| MPU6050六轴传感器 | 支持 | |
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| SDRAM | 支持 | |
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| SD卡 | 即将支持 | |
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| LCD | 支持 | |
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| SD卡 | 支持 | |
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| CAN | 即将支持 | |
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| EMW1062 | 暂不支持 | |
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| **片上外设** | **支持情况** | **备注** |
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@ -58,7 +59,7 @@
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| RTC | 支持 | |
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| WDT | 支持 | |
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| FLASH | 支持 | 已适配 [FAL](https://github.com/RT-Thread-packages/fal) |
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| SDIO | 暂不支持 | 即将支持 |
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| SDIO | 支持 | |
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| PWM | 暂不支持 | 即将支持 |
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| USB Device | 暂不支持 | 即将支持 |
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| USB Host | 暂不支持 | 即将支持 |
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File diff suppressed because one or more lines are too long
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@ -1,27 +1,123 @@
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#MicroXplorer Configuration settings - do not modify
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ETH.IPParameters=MediaInterface
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ETH.MediaInterface=ETH_MEDIA_INTERFACE_RMII
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File.Version=6
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KeepUserPlacement=false
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Mcu.Family=STM32F7
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Mcu.IP0=CORTEX_M7
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Mcu.IP1=NVIC
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Mcu.IP2=RCC
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Mcu.IP3=SYS
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Mcu.IP4=USART1
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Mcu.IPNb=5
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Mcu.IP1=DMA2D
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Mcu.IP10=USART1
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Mcu.IP2=ETH
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Mcu.IP3=FMC
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Mcu.IP4=LTDC
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Mcu.IP5=NVIC
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Mcu.IP6=QUADSPI
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Mcu.IP7=RCC
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Mcu.IP8=SDMMC1
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Mcu.IP9=SYS
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Mcu.IPNb=11
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Mcu.Name=STM32F767I(G-I)Tx
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Mcu.Package=LQFP176
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Mcu.Pin0=PH0/OSC_IN
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Mcu.Pin1=PH1/OSC_OUT
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Mcu.Pin2=PH10
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Mcu.Pin3=PA9
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Mcu.Pin4=PA10
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Mcu.Pin5=VP_SYS_VS_Systick
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Mcu.PinsNb=6
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Mcu.Pin0=PE4
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Mcu.Pin1=PE5
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Mcu.Pin10=PF5
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Mcu.Pin11=PF6
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Mcu.Pin12=PF7
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Mcu.Pin13=PF8
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Mcu.Pin14=PF9
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Mcu.Pin15=PF10
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Mcu.Pin16=PH0/OSC_IN
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Mcu.Pin17=PH1/OSC_OUT
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Mcu.Pin18=PC0
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Mcu.Pin19=PC1
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Mcu.Pin2=PE6
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Mcu.Pin20=PA1
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Mcu.Pin21=PA2
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Mcu.Pin22=PH2
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Mcu.Pin23=PH3
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Mcu.Pin24=PA3
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Mcu.Pin25=PA7
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Mcu.Pin26=PC4
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Mcu.Pin27=PC5
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Mcu.Pin28=PB0
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Mcu.Pin29=PB1
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Mcu.Pin3=PI9
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Mcu.Pin30=PB2
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Mcu.Pin31=PF11
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Mcu.Pin32=PF12
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Mcu.Pin33=PF13
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Mcu.Pin34=PF14
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Mcu.Pin35=PF15
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Mcu.Pin36=PG0
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Mcu.Pin37=PG1
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Mcu.Pin38=PE7
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Mcu.Pin39=PE8
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Mcu.Pin4=PI10
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Mcu.Pin40=PE9
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Mcu.Pin41=PE10
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Mcu.Pin42=PE11
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Mcu.Pin43=PE12
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Mcu.Pin44=PE13
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Mcu.Pin45=PE14
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Mcu.Pin46=PE15
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Mcu.Pin47=PB11
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Mcu.Pin48=PH6
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Mcu.Pin49=PH7
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Mcu.Pin5=PF0
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Mcu.Pin50=PH8
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Mcu.Pin51=PH10
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Mcu.Pin52=PB12
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Mcu.Pin53=PB13
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Mcu.Pin54=PD8
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Mcu.Pin55=PD9
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Mcu.Pin56=PD10
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Mcu.Pin57=PD14
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Mcu.Pin58=PD15
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Mcu.Pin59=PG4
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Mcu.Pin6=PF1
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Mcu.Pin60=PG5
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Mcu.Pin61=PG6
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Mcu.Pin62=PG7
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Mcu.Pin63=PG8
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Mcu.Pin64=PC7
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Mcu.Pin65=PC8
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Mcu.Pin66=PC9
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Mcu.Pin67=PA9
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Mcu.Pin68=PA10
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Mcu.Pin69=PA11
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Mcu.Pin7=PF2
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Mcu.Pin70=PA12
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Mcu.Pin71=PH13
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Mcu.Pin72=PH15
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Mcu.Pin73=PI0
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Mcu.Pin74=PI2
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Mcu.Pin75=PC10
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Mcu.Pin76=PC11
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Mcu.Pin77=PC12
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Mcu.Pin78=PD0
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Mcu.Pin79=PD1
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Mcu.Pin8=PF3
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Mcu.Pin80=PD2
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Mcu.Pin81=PD6
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Mcu.Pin82=PG10
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Mcu.Pin83=PG11
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Mcu.Pin84=PG12
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Mcu.Pin85=PG15
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Mcu.Pin86=PB6
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Mcu.Pin87=PB8
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Mcu.Pin88=PB9
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Mcu.Pin89=PE0
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Mcu.Pin9=PF4
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Mcu.Pin90=PE1
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Mcu.Pin91=PI4
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Mcu.Pin92=VP_DMA2D_VS_DMA2D
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Mcu.Pin93=VP_SYS_VS_Systick
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Mcu.PinsNb=94
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Mcu.ThirdPartyNb=0
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Mcu.UserConstants=
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Mcu.UserName=STM32F767IGTx
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MxCube.Version=5.0.0
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MxDb.Version=DB.5.0.0
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MxCube.Version=5.0.1
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MxDb.Version=DB.5.0.1
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NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false
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NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false
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NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false
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@ -32,12 +128,81 @@ NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
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NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false
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NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false
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NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false
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PA1.Mode=RMII
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PA1.Signal=ETH_REF_CLK
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PA10.Locked=true
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PA10.Mode=Asynchronous
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PA10.Signal=USART1_RX
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PA11.GPIOParameters=GPIO_Speed
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PA11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PA11.Locked=true
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PA11.Mode=RGB888
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PA11.Signal=LTDC_R4
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PA12.GPIOParameters=GPIO_Speed
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PA12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PA12.Locked=true
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PA12.Mode=RGB888
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PA12.Signal=LTDC_R5
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PA2.Mode=RMII
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PA2.Signal=ETH_MDIO
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PA3.GPIOParameters=GPIO_Speed
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PA3.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PA3.Mode=RGB888
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PA3.Signal=LTDC_B5
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PA7.Mode=RMII
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PA7.Signal=ETH_CRS_DV
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PA9.Locked=true
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PA9.Mode=Asynchronous
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PA9.Signal=USART1_TX
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PB0.GPIOParameters=GPIO_Speed
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PB0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PB0.Mode=RGB888
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PB0.Signal=LTDC_R3
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PB1.GPIOParameters=GPIO_Speed
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PB1.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PB1.Mode=RGB888
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PB1.Signal=LTDC_R6
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PB11.Mode=RMII
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PB11.Signal=ETH_TX_EN
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PB12.Mode=RMII
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PB12.Signal=ETH_TXD0
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PB13.Mode=RMII
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PB13.Signal=ETH_TXD1
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PB2.Mode=Single Bank 1
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PB2.Signal=QUADSPI_CLK
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PB6.Locked=true
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PB6.Mode=Single Bank 1
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PB6.Signal=QUADSPI_BK1_NCS
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PB8.GPIOParameters=GPIO_Speed
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PB8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PB8.Mode=RGB888
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PB8.Signal=LTDC_B6
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PB9.GPIOParameters=GPIO_Speed
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PB9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PB9.Mode=RGB888
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PB9.Signal=LTDC_B7
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PC0.Signal=FMC_SDNWE
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PC1.Mode=RMII
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PC1.Signal=ETH_MDC
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PC10.Mode=SD_4_bits_Wide_bus
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PC10.Signal=SDMMC1_D2
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PC11.Mode=SD_4_bits_Wide_bus
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PC11.Signal=SDMMC1_D3
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PC12.Mode=SD_4_bits_Wide_bus
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PC12.Signal=SDMMC1_CK
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PC4.Mode=RMII
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PC4.Signal=ETH_RXD0
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PC5.Mode=RMII
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PC5.Signal=ETH_RXD1
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PC7.GPIOParameters=GPIO_Speed
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PC7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PC7.Locked=true
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PC7.Mode=RGB888
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PC7.Signal=LTDC_G6
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PC8.Mode=SD_4_bits_Wide_bus
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PC8.Signal=SDMMC1_D0
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PC9.Mode=SD_4_bits_Wide_bus
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PC9.Signal=SDMMC1_D1
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PCC.Checker=false
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PCC.Line=STM32F7x7
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PCC.MCU=STM32F767I(G-I)Tx
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@ -46,12 +211,124 @@ PCC.Seq0=0
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PCC.Series=STM32F7
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PCC.Temperature=25
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PCC.Vdd=3.3
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PD0.Signal=FMC_D2_DA2
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PD1.Signal=FMC_D3_DA3
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PD10.Signal=FMC_D15_DA15
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PD14.Signal=FMC_D0_DA0
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PD15.Signal=FMC_D1_DA1
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PD2.Mode=SD_4_bits_Wide_bus
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PD2.Signal=SDMMC1_CMD
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PD6.GPIOParameters=GPIO_Speed
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PD6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PD6.Mode=RGB888
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PD6.Signal=LTDC_B2
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PD8.Signal=FMC_D13_DA13
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PD9.Signal=FMC_D14_DA14
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PE0.Signal=FMC_NBL0
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PE1.Signal=FMC_NBL1
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PE10.Signal=FMC_D7_DA7
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PE11.Signal=FMC_D8_DA8
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PE12.Signal=FMC_D9_DA9
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PE13.Signal=FMC_D10_DA10
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PE14.Signal=FMC_D11_DA11
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PE15.Signal=FMC_D12_DA12
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PE4.GPIOParameters=GPIO_Speed
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PE4.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PE4.Mode=RGB888
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PE4.Signal=LTDC_B0
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PE5.GPIOParameters=GPIO_Speed
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PE5.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PE5.Mode=RGB888
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PE5.Signal=LTDC_G0
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PE6.GPIOParameters=GPIO_Speed
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PE6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PE6.Mode=RGB888
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PE6.Signal=LTDC_G1
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PE7.Signal=FMC_D4_DA4
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PE8.Signal=FMC_D5_DA5
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PE9.Signal=FMC_D6_DA6
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PF0.Signal=FMC_A0
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PF1.Signal=FMC_A1
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PF10.GPIOParameters=GPIO_Speed
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PF10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PF10.Mode=RGB888
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PF10.Signal=LTDC_DE
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PF11.Signal=FMC_SDNRAS
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PF12.Signal=FMC_A6
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PF13.Signal=FMC_A7
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PF14.Signal=FMC_A8
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PF15.Signal=FMC_A9
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PF2.Signal=FMC_A2
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PF3.Signal=FMC_A3
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PF4.Signal=FMC_A4
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PF5.Signal=FMC_A5
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PF6.Mode=Single Bank 1
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PF6.Signal=QUADSPI_BK1_IO3
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PF7.Locked=true
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PF7.Mode=Single Bank 1
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PF7.Signal=QUADSPI_BK1_IO2
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PF8.Mode=Single Bank 1
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PF8.Signal=QUADSPI_BK1_IO0
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PF9.Mode=Single Bank 1
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PF9.Signal=QUADSPI_BK1_IO1
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PG0.Signal=FMC_A10
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PG1.Signal=FMC_A11
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PG10.GPIOParameters=GPIO_Speed
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PG10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PG10.Locked=true
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PG10.Mode=RGB888
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PG10.Signal=LTDC_G3
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PG11.GPIOParameters=GPIO_Speed
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PG11.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PG11.Locked=true
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PG11.Mode=RGB888
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PG11.Signal=LTDC_B3
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PG12.Mode=RGB888
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PG12.Signal=LTDC_B1
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PG15.Signal=FMC_SDNCAS
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PG4.Signal=FMC_A14_BA0
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PG5.Signal=FMC_A15_BA1
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PG6.GPIOParameters=GPIO_Speed
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PG6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PG6.Mode=RGB888
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PG6.Signal=LTDC_R7
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PG7.GPIOParameters=GPIO_Speed
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PG7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
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PG7.Mode=RGB888
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PG7.Signal=LTDC_CLK
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PG8.Signal=FMC_SDCLK
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PH0/OSC_IN.Mode=HSE-External-Oscillator
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PH0/OSC_IN.Signal=RCC_OSC_IN
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PH1/OSC_OUT.Mode=HSE-External-Oscillator
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PH1/OSC_OUT.Signal=RCC_OSC_OUT
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PH10.Locked=true
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PH10.Signal=GPIO_Output
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PH13.Locked=true
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PH13.Mode=RGB888
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PH13.Signal=LTDC_G2
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PH15.Mode=RGB888
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PH15.Signal=LTDC_G4
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PH2.Mode=RGB888
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PH2.Signal=LTDC_R0
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PH3.Mode=RGB888
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PH3.Signal=LTDC_R1
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PH6.Mode=SdramChipSelect2_1
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PH6.Signal=FMC_SDNE1
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PH7.Mode=SdramChipSelect2_1
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PH7.Signal=FMC_SDCKE1
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PH8.Mode=RGB888
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PH8.Signal=LTDC_R2
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PI0.Locked=true
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PI0.Mode=RGB888
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PI0.Signal=LTDC_G5
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PI10.Mode=RGB888
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PI10.Signal=LTDC_HSYNC
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PI2.Mode=RGB888
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PI2.Signal=LTDC_G7
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PI4.Mode=RGB888
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PI4.Signal=LTDC_B4
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PI9.Mode=RGB888
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PI9.Signal=LTDC_VSYNC
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PinOutPanel.RotationAngle=0
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ProjectManager.AskForMigrate=true
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ProjectManager.BackupPrevious=false
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@ -79,7 +356,7 @@ ProjectManager.StackSize=0x400
|
|||
ProjectManager.TargetToolchain=MDK-ARM V5
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UnderRoot=false
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true
|
||||
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_ETH_Init-ETH-false-HAL-true,6-MX_FMC_Init-FMC-false-HAL-true,7-MX_QUADSPI_Init-QUADSPI-false-HAL-true,8-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,9-MX_DMA2D_Init-DMA2D-false-HAL-true,10-MX_LTDC_Init-LTDC-false-HAL-true
|
||||
RCC.AHBFreq_Value=216000000
|
||||
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
||||
RCC.APB1Freq_Value=54000000
|
||||
|
|
@ -102,8 +379,8 @@ RCC.I2C2Freq_Value=54000000
|
|||
RCC.I2C3Freq_Value=54000000
|
||||
RCC.I2C4Freq_Value=54000000
|
||||
RCC.I2SFreq_Value=96000000
|
||||
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
|
||||
RCC.LCDTFTFreq_Value=48000000
|
||||
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LSE_VALUE,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIR,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCClockSelection,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
|
||||
RCC.LCDTFTFreq_Value=32000000
|
||||
RCC.LPTIM1Freq_Value=54000000
|
||||
RCC.LSE_VALUE=32768
|
||||
RCC.LSI_VALUE=32000
|
||||
|
|
@ -115,19 +392,22 @@ RCC.PLLI2SRCLKFreq_Value=96000000
|
|||
RCC.PLLI2SRoutputFreq_Value=96000000
|
||||
RCC.PLLM=25
|
||||
RCC.PLLN=432
|
||||
RCC.PLLQCLKFreq_Value=216000000
|
||||
RCC.PLLQoutputFreq_Value=216000000
|
||||
RCC.PLLQ=9
|
||||
RCC.PLLQCLKFreq_Value=48000000
|
||||
RCC.PLLQoutputFreq_Value=48000000
|
||||
RCC.PLLRFreq_Value=216000000
|
||||
RCC.PLLSAIPCLKFreq_Value=96000000
|
||||
RCC.PLLSAIQCLKFreq_Value=96000000
|
||||
RCC.PLLSAIRCLKFreq_Value=96000000
|
||||
RCC.PLLSAIR=3
|
||||
RCC.PLLSAIRCLKFreq_Value=64000000
|
||||
RCC.PLLSAIoutputFreq_Value=96000000
|
||||
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
|
||||
RCC.RNGFreq_Value=216000000
|
||||
RCC.RNGFreq_Value=48000000
|
||||
RCC.SAI1Freq_Value=96000000
|
||||
RCC.SAI2Freq_Value=96000000
|
||||
RCC.SDMMC2Freq_Value=216000000
|
||||
RCC.SDMMCFreq_Value=216000000
|
||||
RCC.SDMMCClockSelection=RCC_SDMMC1CLKSOURCE_CLK48
|
||||
RCC.SDMMCFreq_Value=48000000
|
||||
RCC.SPDIFRXFreq_Value=96000000
|
||||
RCC.SYSCLKFreq_VALUE=216000000
|
||||
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||
|
|
@ -139,13 +419,87 @@ RCC.USART1Freq_Value=108000000
|
|||
RCC.USART2Freq_Value=54000000
|
||||
RCC.USART3Freq_Value=54000000
|
||||
RCC.USART6Freq_Value=108000000
|
||||
RCC.USBFreq_Value=216000000
|
||||
RCC.USBFreq_Value=48000000
|
||||
RCC.VCOI2SOutputFreq_Value=192000000
|
||||
RCC.VCOInputFreq_Value=1000000
|
||||
RCC.VCOOutputFreq_Value=432000000
|
||||
RCC.VCOSAIOutputFreq_Value=192000000
|
||||
SH.FMC_A0.0=FMC_A0,12b-sda1
|
||||
SH.FMC_A0.ConfNb=1
|
||||
SH.FMC_A1.0=FMC_A1,12b-sda1
|
||||
SH.FMC_A1.ConfNb=1
|
||||
SH.FMC_A10.0=FMC_A10,12b-sda1
|
||||
SH.FMC_A10.ConfNb=1
|
||||
SH.FMC_A11.0=FMC_A11,12b-sda1
|
||||
SH.FMC_A11.ConfNb=1
|
||||
SH.FMC_A14_BA0.0=FMC_BA0,FourSdramBanks1
|
||||
SH.FMC_A14_BA0.ConfNb=1
|
||||
SH.FMC_A15_BA1.0=FMC_BA1,FourSdramBanks1
|
||||
SH.FMC_A15_BA1.ConfNb=1
|
||||
SH.FMC_A2.0=FMC_A2,12b-sda1
|
||||
SH.FMC_A2.ConfNb=1
|
||||
SH.FMC_A3.0=FMC_A3,12b-sda1
|
||||
SH.FMC_A3.ConfNb=1
|
||||
SH.FMC_A4.0=FMC_A4,12b-sda1
|
||||
SH.FMC_A4.ConfNb=1
|
||||
SH.FMC_A5.0=FMC_A5,12b-sda1
|
||||
SH.FMC_A5.ConfNb=1
|
||||
SH.FMC_A6.0=FMC_A6,12b-sda1
|
||||
SH.FMC_A6.ConfNb=1
|
||||
SH.FMC_A7.0=FMC_A7,12b-sda1
|
||||
SH.FMC_A7.ConfNb=1
|
||||
SH.FMC_A8.0=FMC_A8,12b-sda1
|
||||
SH.FMC_A8.ConfNb=1
|
||||
SH.FMC_A9.0=FMC_A9,12b-sda1
|
||||
SH.FMC_A9.ConfNb=1
|
||||
SH.FMC_D0_DA0.0=FMC_D0,sd-16b-d1
|
||||
SH.FMC_D0_DA0.ConfNb=1
|
||||
SH.FMC_D10_DA10.0=FMC_D10,sd-16b-d1
|
||||
SH.FMC_D10_DA10.ConfNb=1
|
||||
SH.FMC_D11_DA11.0=FMC_D11,sd-16b-d1
|
||||
SH.FMC_D11_DA11.ConfNb=1
|
||||
SH.FMC_D12_DA12.0=FMC_D12,sd-16b-d1
|
||||
SH.FMC_D12_DA12.ConfNb=1
|
||||
SH.FMC_D13_DA13.0=FMC_D13,sd-16b-d1
|
||||
SH.FMC_D13_DA13.ConfNb=1
|
||||
SH.FMC_D14_DA14.0=FMC_D14,sd-16b-d1
|
||||
SH.FMC_D14_DA14.ConfNb=1
|
||||
SH.FMC_D15_DA15.0=FMC_D15,sd-16b-d1
|
||||
SH.FMC_D15_DA15.ConfNb=1
|
||||
SH.FMC_D1_DA1.0=FMC_D1,sd-16b-d1
|
||||
SH.FMC_D1_DA1.ConfNb=1
|
||||
SH.FMC_D2_DA2.0=FMC_D2,sd-16b-d1
|
||||
SH.FMC_D2_DA2.ConfNb=1
|
||||
SH.FMC_D3_DA3.0=FMC_D3,sd-16b-d1
|
||||
SH.FMC_D3_DA3.ConfNb=1
|
||||
SH.FMC_D4_DA4.0=FMC_D4,sd-16b-d1
|
||||
SH.FMC_D4_DA4.ConfNb=1
|
||||
SH.FMC_D5_DA5.0=FMC_D5,sd-16b-d1
|
||||
SH.FMC_D5_DA5.ConfNb=1
|
||||
SH.FMC_D6_DA6.0=FMC_D6,sd-16b-d1
|
||||
SH.FMC_D6_DA6.ConfNb=1
|
||||
SH.FMC_D7_DA7.0=FMC_D7,sd-16b-d1
|
||||
SH.FMC_D7_DA7.ConfNb=1
|
||||
SH.FMC_D8_DA8.0=FMC_D8,sd-16b-d1
|
||||
SH.FMC_D8_DA8.ConfNb=1
|
||||
SH.FMC_D9_DA9.0=FMC_D9,sd-16b-d1
|
||||
SH.FMC_D9_DA9.ConfNb=1
|
||||
SH.FMC_NBL0.0=FMC_NBL0,Sd2ByteEnable1
|
||||
SH.FMC_NBL0.ConfNb=1
|
||||
SH.FMC_NBL1.0=FMC_NBL1,Sd2ByteEnable1
|
||||
SH.FMC_NBL1.ConfNb=1
|
||||
SH.FMC_SDCLK.0=FMC_SDCLK,12b-sda1
|
||||
SH.FMC_SDCLK.ConfNb=1
|
||||
SH.FMC_SDNCAS.0=FMC_SDNCAS,12b-sda1
|
||||
SH.FMC_SDNCAS.ConfNb=1
|
||||
SH.FMC_SDNRAS.0=FMC_SDNRAS,12b-sda1
|
||||
SH.FMC_SDNRAS.ConfNb=1
|
||||
SH.FMC_SDNWE.0=FMC_SDNWE,12b-sda1
|
||||
SH.FMC_SDNWE.ConfNb=1
|
||||
USART1.IPParameters=VirtualMode-Asynchronous
|
||||
USART1.VirtualMode-Asynchronous=VM_ASYNC
|
||||
VP_DMA2D_VS_DMA2D.Mode=DMA2D_Activate
|
||||
VP_DMA2D_VS_DMA2D.Signal=DMA2D_VS_DMA2D
|
||||
VP_SYS_VS_Systick.Mode=SysTick
|
||||
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||
board=custom
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
|
||||
* <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
|
|
@ -57,22 +57,22 @@
|
|||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
/* #define HAL_ETH_MODULE_ENABLED */
|
||||
#define HAL_DMA2D_MODULE_ENABLED
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
#define HAL_SDRAM_MODULE_ENABLED
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
#define HAL_LTDC_MODULE_ENABLED
|
||||
#define HAL_QSPI_MODULE_ENABLED
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
/* #define HAL_RTC_MODULE_ENABLED */
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
/* #define HAL_SPI_MODULE_ENABLED */
|
||||
|
|
@ -190,8 +190,8 @@
|
|||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848_PHY_ADDRESS Address*/
|
||||
#define DP83848_PHY_ADDRESS 0x01U
|
||||
/* LAN8742A_PHY_ADDRESS Address*/
|
||||
#define LAN8742A_PHY_ADDRESS 1
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
|
||||
/* PHY Configuration delay */
|
||||
|
|
@ -202,8 +202,8 @@
|
|||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
|
||||
#define PHY_BCR ((uint16_t)0x00U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x01U) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
|
||||
|
|
@ -226,6 +226,9 @@
|
|||
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||
|
||||
#define PHY_ISFR ((uint16_t)0x000BU) /*!< PHY Interrupt Source Flag register Offset */
|
||||
#define PHY_ISFR_INT4 ((uint16_t)0x000BU) /*!< PHY Link down inturrupt */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
|
|
|
|||
|
|
@ -0,0 +1,133 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
<Target>
|
||||
<TargetName>CubeMX_Config</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>216000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>0</RunSim>
|
||||
<RunTarget>1</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath />
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
<CCode>0</CCode>
|
||||
<CListInc>0</CListInc>
|
||||
<CSymb>0</CSymb>
|
||||
<LinkerCodeListing>0</LinkerCodeListing>
|
||||
</ListingPage>
|
||||
<OPTXL>
|
||||
<LMap>1</LMap>
|
||||
<LComments>1</LComments>
|
||||
<LGenerateSymbols>1</LGenerateSymbols>
|
||||
<LLibSym>1</LLibSym>
|
||||
<LLines>1</LLines>
|
||||
<LLocSym>1</LLocSym>
|
||||
<LPubSym>1</LPubSym>
|
||||
<LXref>0</LXref>
|
||||
<LExpSel>0</LExpSel>
|
||||
</OPTXL>
|
||||
<OPTFL>
|
||||
<tvExp>0</tvExp>
|
||||
<tvExpOptDlg>0</tvExpOptDlg>
|
||||
<IsCurrentTarget>1</IsCurrentTarget>
|
||||
</OPTFL>
|
||||
<CpuCode>0</CpuCode>
|
||||
<DebugOpt>
|
||||
<uSim>0</uSim>
|
||||
<uTrg>1</uTrg>
|
||||
<sLdApp>1</sLdApp>
|
||||
<sGomain>1</sGomain>
|
||||
<sRbreak>1</sRbreak>
|
||||
<sRwatch>1</sRwatch>
|
||||
<sRmem>1</sRmem>
|
||||
<sRfunc>1</sRfunc>
|
||||
<sRbox>1</sRbox>
|
||||
<tLdApp>1</tLdApp>
|
||||
<tGomain>1</tGomain>
|
||||
<tRbreak>1</tRbreak>
|
||||
<tRwatch>1</tRwatch>
|
||||
<tRmem>1</tRmem>
|
||||
<tRfunc>1</tRfunc>
|
||||
<tRbox>1</tRbox>
|
||||
<sRunDeb>0</sRunDeb>
|
||||
<sLrtime>0</sLrtime>
|
||||
<nTsel>13</nTsel>
|
||||
<sDll />
|
||||
<sDllPa />
|
||||
<sDlgDll />
|
||||
<sDlgPa />
|
||||
<sIfile />
|
||||
<tDll />
|
||||
<tDllPa />
|
||||
<tDlgDll />
|
||||
<tDlgPa />
|
||||
<tIfile />
|
||||
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||
<Name>-U-O142 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F7x_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F767IG$Flash\STM32F7x_1024.FLM) -FF1STM32F7x_TCM -FS1200000 -FL1100000 -FP1($$Device:STM32F767IG$Flash\STM32F7x_TCM.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
<Key />
|
||||
<Name>-U-O142 -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(5BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32F7x_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F767IG$Flash\STM32F7x_1024.FLM) -FF1STM32F7x_TCM -FS1200000 -FL1100000 -FP1($$Device:STM32F767IG$Flash\STM32F7x_TCM.FLM)</Name>
|
||||
</SetRegEntry>
|
||||
</TargetDriverDllRegistry>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>1</periodic>
|
||||
<aLwin>0</aLwin>
|
||||
<aCover>0</aCover>
|
||||
<aSer1>0</aSer1>
|
||||
<aSer2>0</aSer2>
|
||||
<aPa>0</aPa>
|
||||
<viewmode>0</viewmode>
|
||||
<vrSel>0</vrSel>
|
||||
<aSym>0</aSym>
|
||||
<aTbox>0</aTbox>
|
||||
<AscS1>0</AscS1>
|
||||
<AscS2>0</AscS2>
|
||||
<AscS3>0</AscS3>
|
||||
<aSer3>0</aSer3>
|
||||
<eProf>0</eProf>
|
||||
<aLa>0</aLa>
|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable />
|
||||
<LintConfigFile />
|
||||
</TargetOption>
|
||||
</Target>
|
||||
</ProjectOpt>
|
||||
|
|
@ -0,0 +1,435 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>CubeMX_Config</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>STM32F767IGTx</Device>
|
||||
<Vendor>STMicroelectronics</Vendor>
|
||||
<Cpu>IRAM(0x20000000-0x2007FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(12000000) FPU3(DFPU) CPUTYPE("Cortex-M7") ELITTLE</Cpu>
|
||||
<FlashUtilSpec />
|
||||
<StartupFile />
|
||||
<FlashDriverDll />
|
||||
<DeviceId />
|
||||
<RegisterFile />
|
||||
<MemoryEnv />
|
||||
<Cmp />
|
||||
<Asm />
|
||||
<Linker />
|
||||
<OHString />
|
||||
<InfinionOptionDll />
|
||||
<SLE66CMisc />
|
||||
<SLE66AMisc />
|
||||
<SLE66LinkerMisc />
|
||||
<SFDFile />
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath />
|
||||
<IncludePath />
|
||||
<LibPath />
|
||||
<RegisterFilePath />
|
||||
<DBRegisterFilePath />
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>CubeMX_Config\</OutputDirectory>
|
||||
<OutputName>CubeMX_Config</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>1</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>./CubeMX_Config/</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name />
|
||||
<UserProg2Name />
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString />
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument />
|
||||
<IncludeLibraryModules />
|
||||
<ComprImg />
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
|
||||
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM7</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
<Simulator>
|
||||
<UseSimulator>0</UseSimulator>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>1</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Simulator>
|
||||
<Target>
|
||||
<UseTarget>1</UseTarget>
|
||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
||||
<RunToMain>1</RunToMain>
|
||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
||||
<RestoreFunctions>0</RestoreFunctions>
|
||||
<RestoreToolbox>1</RestoreToolbox>
|
||||
<RestoreTracepoints>1</RestoreTracepoints>
|
||||
<RestoreSysVw>1</RestoreSysVw>
|
||||
</Target>
|
||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
||||
<TargetSelection>13</TargetSelection>
|
||||
<SimDlls>
|
||||
<CpuDll />
|
||||
<CpuDllArguments />
|
||||
<PeripheralDll />
|
||||
<PeripheralDllArguments />
|
||||
<InitializationFile />
|
||||
</SimDlls>
|
||||
<TargetDlls>
|
||||
<CpuDll />
|
||||
<CpuDllArguments />
|
||||
<PeripheralDll />
|
||||
<PeripheralDllArguments />
|
||||
<InitializationFile />
|
||||
<Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
|
||||
</TargetDlls>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4107</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
||||
<Flash3 />
|
||||
<Flash4 />
|
||||
<pFcarmOut />
|
||||
<pFcarmGrp />
|
||||
<pFcArmRoot />
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M7"</AdsCpuType>
|
||||
<RvctDeviceName />
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>3</RvdsVP>
|
||||
<hadIRAM2>0</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>1</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress />
|
||||
<Size />
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress />
|
||||
<Size />
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress />
|
||||
<Size />
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress />
|
||||
<Size />
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector />
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>4</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<useXO>0</useXO>
|
||||
<VariousControls>
|
||||
<MiscControls />
|
||||
<Define>USE_HAL_DRIVER,STM32F767xx</Define>
|
||||
<Undefine />
|
||||
<IncludePath>../Inc; ../Drivers/STM32F7xx_HAL_Driver/Inc; ../Drivers/STM32F7xx_HAL_Driver/Inc/Legacy; ../Drivers/CMSIS/Device/ST/STM32F7xx/Include; ../Drivers/CMSIS/Include</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<VariousControls>
|
||||
<MiscControls />
|
||||
<Define />
|
||||
<Undefine />
|
||||
<IncludePath />
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>1</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x08000000</TextAddressRange>
|
||||
<DataAddressRange>0x20000000</DataAddressRange>
|
||||
<pXoBase />
|
||||
<ScatterFile />
|
||||
<IncludeLibs />
|
||||
<IncludeLibsPath />
|
||||
<Misc />
|
||||
<LinkerInputFile />
|
||||
<DisabledWarnings />
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Application/MDK-ARM</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_stm32f767xx.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>startup_stm32f767xx.s</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
|
||||
<Group>
|
||||
<GroupName>::CMSIS</GroupName>
|
||||
</Group>
|
||||
<Group><GroupName>Application/User</GroupName><Files><File><FileName>main.c</FileName><FileType>1</FileType><FilePath>../Src/main.c</FilePath></File><File><FileName>stm32f7xx_it.c</FileName><FileType>1</FileType><FilePath>../Src/stm32f7xx_it.c</FilePath></File><File><FileName>stm32f7xx_hal_msp.c</FileName><FileType>1</FileType><FilePath>../Src/stm32f7xx_hal_msp.c</FilePath></File></Files></Group>
|
||||
<Group><GroupName>Drivers/STM32F7xx_HAL_Driver</GroupName><Files><File><FileName>stm32f7xx_hal_cortex.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c</FilePath></File><File><FileName>stm32f7xx_hal_dma2d.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma2d.c</FilePath></File><File><FileName>stm32f7xx_hal_eth.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c</FilePath></File><File><FileName>stm32f7xx_ll_fmc.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_fmc.c</FilePath></File><File><FileName>stm32f7xx_hal_sdram.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sdram.c</FilePath></File><File><FileName>stm32f7xx_hal_ltdc.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc.c</FilePath></File><File><FileName>stm32f7xx_hal_ltdc_ex.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_ltdc_ex.c</FilePath></File><File><FileName>stm32f7xx_hal_dsi.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dsi.c</FilePath></File><File><FileName>stm32f7xx_hal_qspi.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_qspi.c</FilePath></File><File><FileName>stm32f7xx_ll_sdmmc.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c</FilePath></File><File><FileName>stm32f7xx_hal_sd.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c</FilePath></File><File><FileName>stm32f7xx_hal_tim.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c</FilePath></File><File><FileName>stm32f7xx_hal_tim_ex.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c</FilePath></File><File><FileName>stm32f7xx_hal_uart.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c</FilePath></File><File><FileName>stm32f7xx_hal_rcc.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c</FilePath></File><File><FileName>stm32f7xx_hal_rcc_ex.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c</FilePath></File><File><FileName>stm32f7xx_hal_flash.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c</FilePath></File><File><FileName>stm32f7xx_hal_flash_ex.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c</FilePath></File><File><FileName>stm32f7xx_hal_gpio.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c</FilePath></File><File><FileName>stm32f7xx_hal_dma.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c</FilePath></File><File><FileName>stm32f7xx_hal_dma_ex.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c</FilePath></File><File><FileName>stm32f7xx_hal_pwr.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c</FilePath></File><File><FileName>stm32f7xx_hal_pwr_ex.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c</FilePath></File><File><FileName>stm32f7xx_hal.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c</FilePath></File><File><FileName>stm32f7xx_hal_i2c.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c</FilePath></File><File><FileName>stm32f7xx_hal_i2c_ex.c</FileName><FileType>1</FileType><FilePath>../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c</FilePath></File></Files></Group>
|
||||
<Group><GroupName>Drivers/CMSIS</GroupName><Files><File><FileName>system_stm32f7xx.c</FileName><FileType>1</FileType><FilePath>../Src/system_stm32f7xx.c</FilePath></File></Files></Group>
|
||||
</Groups>
|
||||
|
||||
</Target>
|
||||
</Targets>
|
||||
<RTE>
|
||||
<apis />
|
||||
<components>
|
||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0" />
|
||||
<targetInfos>
|
||||
<targetInfo name="CubeMX_Config" />
|
||||
</targetInfos>
|
||||
</component>
|
||||
</components>
|
||||
<files />
|
||||
</RTE>
|
||||
</Project>
|
||||
|
|
@ -0,0 +1,517 @@
|
|||
;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
|
||||
;* File Name : startup_stm32f767xx.s
|
||||
;* Author : MCD Application Team
|
||||
;* Description : STM32F767xx devices vector table for MDK-ARM toolchain.
|
||||
;* This module performs:
|
||||
;* - Set the initial SP
|
||||
;* - Set the initial PC == Reset_Handler
|
||||
;* - Set the vector table entries with the exceptions ISR address
|
||||
;* - Branches to __main in the C library (which eventually
|
||||
;* calls main()).
|
||||
;* After Reset the CortexM7 processor is in Thread mode,
|
||||
;* priority is Privileged, and the Stack is set to Main.
|
||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
||||
;*******************************************************************************
|
||||
;
|
||||
;* Redistribution and use in source and binary forms, with or without modification,
|
||||
;* are permitted provided that the following conditions are met:
|
||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer.
|
||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
;* this list of conditions and the following disclaimer in the documentation
|
||||
;* and/or other materials provided with the distribution.
|
||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
;* may be used to endorse or promote products derived from this software
|
||||
;* without specific prior written permission.
|
||||
;*
|
||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
EXPORT __Vectors_End
|
||||
EXPORT __Vectors_Size
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WWDG_IRQHandler ; Window WatchDog
|
||||
DCD PVD_IRQHandler ; PVD through EXTI Line detection
|
||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
||||
DCD FLASH_IRQHandler ; FLASH
|
||||
DCD RCC_IRQHandler ; RCC
|
||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
||||
DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
|
||||
DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
|
||||
DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
|
||||
DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
|
||||
DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
|
||||
DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
|
||||
DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
|
||||
DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
|
||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
||||
DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
|
||||
DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
|
||||
DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
|
||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
||||
DCD TIM2_IRQHandler ; TIM2
|
||||
DCD TIM3_IRQHandler ; TIM3
|
||||
DCD TIM4_IRQHandler ; TIM4
|
||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
||||
DCD SPI1_IRQHandler ; SPI1
|
||||
DCD SPI2_IRQHandler ; SPI2
|
||||
DCD USART1_IRQHandler ; USART1
|
||||
DCD USART2_IRQHandler ; USART2
|
||||
DCD USART3_IRQHandler ; USART3
|
||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]s
|
||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
||||
DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
|
||||
DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
|
||||
DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
|
||||
DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
|
||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
|
||||
DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
|
||||
DCD FMC_IRQHandler ; FMC
|
||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
||||
DCD TIM5_IRQHandler ; TIM5
|
||||
DCD SPI3_IRQHandler ; SPI3
|
||||
DCD UART4_IRQHandler ; UART4
|
||||
DCD UART5_IRQHandler ; UART5
|
||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
||||
DCD TIM7_IRQHandler ; TIM7
|
||||
DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
|
||||
DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
|
||||
DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
|
||||
DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
|
||||
DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
|
||||
DCD ETH_IRQHandler ; Ethernet
|
||||
DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
|
||||
DCD CAN2_TX_IRQHandler ; CAN2 TX
|
||||
DCD CAN2_RX0_IRQHandler ; CAN2 RX0
|
||||
DCD CAN2_RX1_IRQHandler ; CAN2 RX1
|
||||
DCD CAN2_SCE_IRQHandler ; CAN2 SCE
|
||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
||||
DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
|
||||
DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
|
||||
DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
|
||||
DCD USART6_IRQHandler ; USART6
|
||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
||||
DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
|
||||
DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
|
||||
DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
|
||||
DCD OTG_HS_IRQHandler ; USB OTG HS
|
||||
DCD DCMI_IRQHandler ; DCMI
|
||||
DCD 0 ; Reserved
|
||||
DCD RNG_IRQHandler ; Rng
|
||||
DCD FPU_IRQHandler ; FPU
|
||||
DCD UART7_IRQHandler ; UART7
|
||||
DCD UART8_IRQHandler ; UART8
|
||||
DCD SPI4_IRQHandler ; SPI4
|
||||
DCD SPI5_IRQHandler ; SPI5
|
||||
DCD SPI6_IRQHandler ; SPI6
|
||||
DCD SAI1_IRQHandler ; SAI1
|
||||
DCD LTDC_IRQHandler ; LTDC
|
||||
DCD LTDC_ER_IRQHandler ; LTDC error
|
||||
DCD DMA2D_IRQHandler ; DMA2D
|
||||
DCD SAI2_IRQHandler ; SAI2
|
||||
DCD QUADSPI_IRQHandler ; QUADSPI
|
||||
DCD LPTIM1_IRQHandler ; LPTIM1
|
||||
DCD CEC_IRQHandler ; HDMI_CEC
|
||||
DCD I2C4_EV_IRQHandler ; I2C4 Event
|
||||
DCD I2C4_ER_IRQHandler ; I2C4 Error
|
||||
DCD SPDIF_RX_IRQHandler ; SPDIF_RX
|
||||
DCD 0 ; Reserved
|
||||
DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt
|
||||
DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt
|
||||
DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt
|
||||
DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt
|
||||
DCD SDMMC2_IRQHandler ; SDMMC2
|
||||
DCD CAN3_TX_IRQHandler ; CAN3 TX
|
||||
DCD CAN3_RX0_IRQHandler ; CAN3 RX0
|
||||
DCD CAN3_RX1_IRQHandler ; CAN3 RX1
|
||||
DCD CAN3_SCE_IRQHandler ; CAN3 SCE
|
||||
DCD JPEG_IRQHandler ; JPEG
|
||||
DCD MDIOS_IRQHandler ; MDIOS
|
||||
__Vectors_End
|
||||
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
; Reset handler
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
NMI_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
|
||||
EXPORT WWDG_IRQHandler [WEAK]
|
||||
EXPORT PVD_IRQHandler [WEAK]
|
||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
||||
EXPORT FLASH_IRQHandler [WEAK]
|
||||
EXPORT RCC_IRQHandler [WEAK]
|
||||
EXPORT EXTI0_IRQHandler [WEAK]
|
||||
EXPORT EXTI1_IRQHandler [WEAK]
|
||||
EXPORT EXTI2_IRQHandler [WEAK]
|
||||
EXPORT EXTI3_IRQHandler [WEAK]
|
||||
EXPORT EXTI4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream4_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream6_IRQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
||||
EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
|
||||
EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
|
||||
EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
|
||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
||||
EXPORT TIM2_IRQHandler [WEAK]
|
||||
EXPORT TIM3_IRQHandler [WEAK]
|
||||
EXPORT TIM4_IRQHandler [WEAK]
|
||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
||||
EXPORT SPI1_IRQHandler [WEAK]
|
||||
EXPORT SPI2_IRQHandler [WEAK]
|
||||
EXPORT USART1_IRQHandler [WEAK]
|
||||
EXPORT USART2_IRQHandler [WEAK]
|
||||
EXPORT USART3_IRQHandler [WEAK]
|
||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
|
||||
EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
|
||||
EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
|
||||
EXPORT TIM8_CC_IRQHandler [WEAK]
|
||||
EXPORT DMA1_Stream7_IRQHandler [WEAK]
|
||||
EXPORT FMC_IRQHandler [WEAK]
|
||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
||||
EXPORT TIM5_IRQHandler [WEAK]
|
||||
EXPORT SPI3_IRQHandler [WEAK]
|
||||
EXPORT UART4_IRQHandler [WEAK]
|
||||
EXPORT UART5_IRQHandler [WEAK]
|
||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
||||
EXPORT TIM7_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream0_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream1_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream2_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream3_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream4_IRQHandler [WEAK]
|
||||
EXPORT ETH_IRQHandler [WEAK]
|
||||
EXPORT ETH_WKUP_IRQHandler [WEAK]
|
||||
EXPORT CAN2_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN2_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN2_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN2_SCE_IRQHandler [WEAK]
|
||||
EXPORT OTG_FS_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream5_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream6_IRQHandler [WEAK]
|
||||
EXPORT DMA2_Stream7_IRQHandler [WEAK]
|
||||
EXPORT USART6_IRQHandler [WEAK]
|
||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
|
||||
EXPORT OTG_HS_IRQHandler [WEAK]
|
||||
EXPORT DCMI_IRQHandler [WEAK]
|
||||
EXPORT RNG_IRQHandler [WEAK]
|
||||
EXPORT FPU_IRQHandler [WEAK]
|
||||
EXPORT UART7_IRQHandler [WEAK]
|
||||
EXPORT UART8_IRQHandler [WEAK]
|
||||
EXPORT SPI4_IRQHandler [WEAK]
|
||||
EXPORT SPI5_IRQHandler [WEAK]
|
||||
EXPORT SPI6_IRQHandler [WEAK]
|
||||
EXPORT SAI1_IRQHandler [WEAK]
|
||||
EXPORT LTDC_IRQHandler [WEAK]
|
||||
EXPORT LTDC_ER_IRQHandler [WEAK]
|
||||
EXPORT DMA2D_IRQHandler [WEAK]
|
||||
EXPORT SAI2_IRQHandler [WEAK]
|
||||
EXPORT QUADSPI_IRQHandler [WEAK]
|
||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
||||
EXPORT CEC_IRQHandler [WEAK]
|
||||
EXPORT I2C4_EV_IRQHandler [WEAK]
|
||||
EXPORT I2C4_ER_IRQHandler [WEAK]
|
||||
EXPORT SPDIF_RX_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
|
||||
EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
|
||||
EXPORT SDMMC2_IRQHandler [WEAK]
|
||||
EXPORT CAN3_TX_IRQHandler [WEAK]
|
||||
EXPORT CAN3_RX0_IRQHandler [WEAK]
|
||||
EXPORT CAN3_RX1_IRQHandler [WEAK]
|
||||
EXPORT CAN3_SCE_IRQHandler [WEAK]
|
||||
EXPORT JPEG_IRQHandler [WEAK]
|
||||
EXPORT MDIOS_IRQHandler [WEAK]
|
||||
|
||||
WWDG_IRQHandler
|
||||
PVD_IRQHandler
|
||||
TAMP_STAMP_IRQHandler
|
||||
RTC_WKUP_IRQHandler
|
||||
FLASH_IRQHandler
|
||||
RCC_IRQHandler
|
||||
EXTI0_IRQHandler
|
||||
EXTI1_IRQHandler
|
||||
EXTI2_IRQHandler
|
||||
EXTI3_IRQHandler
|
||||
EXTI4_IRQHandler
|
||||
DMA1_Stream0_IRQHandler
|
||||
DMA1_Stream1_IRQHandler
|
||||
DMA1_Stream2_IRQHandler
|
||||
DMA1_Stream3_IRQHandler
|
||||
DMA1_Stream4_IRQHandler
|
||||
DMA1_Stream5_IRQHandler
|
||||
DMA1_Stream6_IRQHandler
|
||||
ADC_IRQHandler
|
||||
CAN1_TX_IRQHandler
|
||||
CAN1_RX0_IRQHandler
|
||||
CAN1_RX1_IRQHandler
|
||||
CAN1_SCE_IRQHandler
|
||||
EXTI9_5_IRQHandler
|
||||
TIM1_BRK_TIM9_IRQHandler
|
||||
TIM1_UP_TIM10_IRQHandler
|
||||
TIM1_TRG_COM_TIM11_IRQHandler
|
||||
TIM1_CC_IRQHandler
|
||||
TIM2_IRQHandler
|
||||
TIM3_IRQHandler
|
||||
TIM4_IRQHandler
|
||||
I2C1_EV_IRQHandler
|
||||
I2C1_ER_IRQHandler
|
||||
I2C2_EV_IRQHandler
|
||||
I2C2_ER_IRQHandler
|
||||
SPI1_IRQHandler
|
||||
SPI2_IRQHandler
|
||||
USART1_IRQHandler
|
||||
USART2_IRQHandler
|
||||
USART3_IRQHandler
|
||||
EXTI15_10_IRQHandler
|
||||
RTC_Alarm_IRQHandler
|
||||
OTG_FS_WKUP_IRQHandler
|
||||
TIM8_BRK_TIM12_IRQHandler
|
||||
TIM8_UP_TIM13_IRQHandler
|
||||
TIM8_TRG_COM_TIM14_IRQHandler
|
||||
TIM8_CC_IRQHandler
|
||||
DMA1_Stream7_IRQHandler
|
||||
FMC_IRQHandler
|
||||
SDMMC1_IRQHandler
|
||||
TIM5_IRQHandler
|
||||
SPI3_IRQHandler
|
||||
UART4_IRQHandler
|
||||
UART5_IRQHandler
|
||||
TIM6_DAC_IRQHandler
|
||||
TIM7_IRQHandler
|
||||
DMA2_Stream0_IRQHandler
|
||||
DMA2_Stream1_IRQHandler
|
||||
DMA2_Stream2_IRQHandler
|
||||
DMA2_Stream3_IRQHandler
|
||||
DMA2_Stream4_IRQHandler
|
||||
ETH_IRQHandler
|
||||
ETH_WKUP_IRQHandler
|
||||
CAN2_TX_IRQHandler
|
||||
CAN2_RX0_IRQHandler
|
||||
CAN2_RX1_IRQHandler
|
||||
CAN2_SCE_IRQHandler
|
||||
OTG_FS_IRQHandler
|
||||
DMA2_Stream5_IRQHandler
|
||||
DMA2_Stream6_IRQHandler
|
||||
DMA2_Stream7_IRQHandler
|
||||
USART6_IRQHandler
|
||||
I2C3_EV_IRQHandler
|
||||
I2C3_ER_IRQHandler
|
||||
OTG_HS_EP1_OUT_IRQHandler
|
||||
OTG_HS_EP1_IN_IRQHandler
|
||||
OTG_HS_WKUP_IRQHandler
|
||||
OTG_HS_IRQHandler
|
||||
DCMI_IRQHandler
|
||||
RNG_IRQHandler
|
||||
FPU_IRQHandler
|
||||
UART7_IRQHandler
|
||||
UART8_IRQHandler
|
||||
SPI4_IRQHandler
|
||||
SPI5_IRQHandler
|
||||
SPI6_IRQHandler
|
||||
SAI1_IRQHandler
|
||||
LTDC_IRQHandler
|
||||
LTDC_ER_IRQHandler
|
||||
DMA2D_IRQHandler
|
||||
SAI2_IRQHandler
|
||||
QUADSPI_IRQHandler
|
||||
LPTIM1_IRQHandler
|
||||
CEC_IRQHandler
|
||||
I2C4_EV_IRQHandler
|
||||
I2C4_ER_IRQHandler
|
||||
SPDIF_RX_IRQHandler
|
||||
DFSDM1_FLT0_IRQHandler
|
||||
DFSDM1_FLT1_IRQHandler
|
||||
DFSDM1_FLT2_IRQHandler
|
||||
DFSDM1_FLT3_IRQHandler
|
||||
SDMMC2_IRQHandler
|
||||
CAN3_TX_IRQHandler
|
||||
CAN3_RX0_IRQHandler
|
||||
CAN3_RX1_IRQHandler
|
||||
CAN3_SCE_IRQHandler
|
||||
JPEG_IRQHandler
|
||||
MDIOS_IRQHandler
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
;*******************************************************************************
|
||||
; User Stack and Heap initialization
|
||||
;*******************************************************************************
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
|
|
@ -63,8 +63,20 @@
|
|||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
DMA2D_HandleTypeDef hdma2d;
|
||||
|
||||
ETH_HandleTypeDef heth;
|
||||
|
||||
LTDC_HandleTypeDef hltdc;
|
||||
|
||||
QSPI_HandleTypeDef hqspi;
|
||||
|
||||
SD_HandleTypeDef hsd1;
|
||||
|
||||
UART_HandleTypeDef huart1;
|
||||
|
||||
SDRAM_HandleTypeDef hsdram1;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
|
@ -73,6 +85,12 @@ UART_HandleTypeDef huart1;
|
|||
void SystemClock_Config(void);
|
||||
static void MX_GPIO_Init(void);
|
||||
static void MX_USART1_UART_Init(void);
|
||||
static void MX_ETH_Init(void);
|
||||
static void MX_FMC_Init(void);
|
||||
static void MX_QUADSPI_Init(void);
|
||||
static void MX_SDMMC1_SD_Init(void);
|
||||
static void MX_DMA2D_Init(void);
|
||||
static void MX_LTDC_Init(void);
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
|
@ -111,6 +129,12 @@ int main(void)
|
|||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_USART1_UART_Init();
|
||||
MX_ETH_Init();
|
||||
MX_FMC_Init();
|
||||
MX_QUADSPI_Init();
|
||||
MX_SDMMC1_SD_Init();
|
||||
MX_DMA2D_Init();
|
||||
MX_LTDC_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
|
@ -149,7 +173,7 @@ void SystemClock_Config(void)
|
|||
RCC_OscInitStruct.PLL.PLLM = 25;
|
||||
RCC_OscInitStruct.PLL.PLLN = 432;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 9;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
|
|
@ -173,14 +197,260 @@ void SystemClock_Config(void)
|
|||
{
|
||||
Error_Handler();
|
||||
}
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_USART1
|
||||
|RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIR = 3;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
|
||||
PeriphClkInitStruct.PLLSAIDivQ = 1;
|
||||
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
|
||||
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
|
||||
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
|
||||
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA2D Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_DMA2D_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN DMA2D_Init 0 */
|
||||
|
||||
/* USER CODE END DMA2D_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN DMA2D_Init 1 */
|
||||
|
||||
/* USER CODE END DMA2D_Init 1 */
|
||||
hdma2d.Instance = DMA2D;
|
||||
hdma2d.Init.Mode = DMA2D_M2M;
|
||||
hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
|
||||
hdma2d.Init.OutputOffset = 0;
|
||||
hdma2d.LayerCfg[1].InputOffset = 0;
|
||||
hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
|
||||
hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
|
||||
hdma2d.LayerCfg[1].InputAlpha = 0;
|
||||
hdma2d.LayerCfg[1].AlphaInverted = DMA2D_REGULAR_ALPHA;
|
||||
hdma2d.LayerCfg[1].RedBlueSwap = DMA2D_RB_REGULAR;
|
||||
if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN DMA2D_Init 2 */
|
||||
|
||||
/* USER CODE END DMA2D_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ETH Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_ETH_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN ETH_Init 0 */
|
||||
|
||||
/* USER CODE END ETH_Init 0 */
|
||||
|
||||
uint8_t MACAddr[6] ;
|
||||
|
||||
/* USER CODE BEGIN ETH_Init 1 */
|
||||
|
||||
/* USER CODE END ETH_Init 1 */
|
||||
heth.Instance = ETH;
|
||||
heth.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE;
|
||||
heth.Init.PhyAddress = LAN8742A_PHY_ADDRESS;
|
||||
MACAddr[0] = 0x00;
|
||||
MACAddr[1] = 0x80;
|
||||
MACAddr[2] = 0xE1;
|
||||
MACAddr[3] = 0x00;
|
||||
MACAddr[4] = 0x00;
|
||||
MACAddr[5] = 0x00;
|
||||
heth.Init.MACAddr = &MACAddr[0];
|
||||
heth.Init.RxMode = ETH_RXPOLLING_MODE;
|
||||
heth.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
|
||||
heth.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII;
|
||||
|
||||
/* USER CODE BEGIN MACADDRESS */
|
||||
|
||||
/* USER CODE END MACADDRESS */
|
||||
|
||||
if (HAL_ETH_Init(&heth) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN ETH_Init 2 */
|
||||
|
||||
/* USER CODE END ETH_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LTDC Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_LTDC_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN LTDC_Init 0 */
|
||||
|
||||
/* USER CODE END LTDC_Init 0 */
|
||||
|
||||
LTDC_LayerCfgTypeDef pLayerCfg = {0};
|
||||
LTDC_LayerCfgTypeDef pLayerCfg1 = {0};
|
||||
|
||||
/* USER CODE BEGIN LTDC_Init 1 */
|
||||
|
||||
/* USER CODE END LTDC_Init 1 */
|
||||
hltdc.Instance = LTDC;
|
||||
hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
|
||||
hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
|
||||
hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
|
||||
hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
|
||||
hltdc.Init.HorizontalSync = 7;
|
||||
hltdc.Init.VerticalSync = 3;
|
||||
hltdc.Init.AccumulatedHBP = 14;
|
||||
hltdc.Init.AccumulatedVBP = 5;
|
||||
hltdc.Init.AccumulatedActiveW = 654;
|
||||
hltdc.Init.AccumulatedActiveH = 485;
|
||||
hltdc.Init.TotalWidth = 660;
|
||||
hltdc.Init.TotalHeigh = 487;
|
||||
hltdc.Init.Backcolor.Blue = 0;
|
||||
hltdc.Init.Backcolor.Green = 0;
|
||||
hltdc.Init.Backcolor.Red = 0;
|
||||
if (HAL_LTDC_Init(&hltdc) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
pLayerCfg.WindowX0 = 0;
|
||||
pLayerCfg.WindowX1 = 0;
|
||||
pLayerCfg.WindowY0 = 0;
|
||||
pLayerCfg.WindowY1 = 0;
|
||||
pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
|
||||
pLayerCfg.Alpha = 0;
|
||||
pLayerCfg.Alpha0 = 0;
|
||||
pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
|
||||
pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
|
||||
pLayerCfg.FBStartAdress = 0;
|
||||
pLayerCfg.ImageWidth = 0;
|
||||
pLayerCfg.ImageHeight = 0;
|
||||
pLayerCfg.Backcolor.Blue = 0;
|
||||
pLayerCfg.Backcolor.Green = 0;
|
||||
pLayerCfg.Backcolor.Red = 0;
|
||||
if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
pLayerCfg1.WindowX0 = 0;
|
||||
pLayerCfg1.WindowX1 = 0;
|
||||
pLayerCfg1.WindowY0 = 0;
|
||||
pLayerCfg1.WindowY1 = 0;
|
||||
pLayerCfg1.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
|
||||
pLayerCfg1.Alpha = 0;
|
||||
pLayerCfg1.Alpha0 = 0;
|
||||
pLayerCfg1.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
|
||||
pLayerCfg1.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
|
||||
pLayerCfg1.FBStartAdress = 0;
|
||||
pLayerCfg1.ImageWidth = 0;
|
||||
pLayerCfg1.ImageHeight = 0;
|
||||
pLayerCfg1.Backcolor.Blue = 0;
|
||||
pLayerCfg1.Backcolor.Green = 0;
|
||||
pLayerCfg1.Backcolor.Red = 0;
|
||||
if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg1, 1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN LTDC_Init 2 */
|
||||
|
||||
/* USER CODE END LTDC_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QUADSPI Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_QUADSPI_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_Init 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_Init 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 1 */
|
||||
/* QUADSPI parameter configuration*/
|
||||
hqspi.Instance = QUADSPI;
|
||||
hqspi.Init.ClockPrescaler = 255;
|
||||
hqspi.Init.FifoThreshold = 1;
|
||||
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
|
||||
hqspi.Init.FlashSize = 1;
|
||||
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
|
||||
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
|
||||
hqspi.Init.FlashID = QSPI_FLASH_ID_1;
|
||||
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
|
||||
if (HAL_QSPI_Init(&hqspi) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN QUADSPI_Init 2 */
|
||||
|
||||
/* USER CODE END QUADSPI_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SDMMC1 Initialization Function
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void MX_SDMMC1_SD_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN SDMMC1_Init 0 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN SDMMC1_Init 1 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 1 */
|
||||
hsd1.Instance = SDMMC1;
|
||||
hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
|
||||
hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
|
||||
hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
|
||||
hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B;
|
||||
hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
|
||||
hsd1.Init.ClockDiv = 0;
|
||||
if (HAL_SD_Init(&hsd1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_SD_ConfigWideBusOperation(&hsd1, SDMMC_BUS_WIDE_4B) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN SDMMC1_Init 2 */
|
||||
|
||||
/* USER CODE END SDMMC1_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief USART1 Initialization Function
|
||||
* @param None
|
||||
|
|
@ -216,6 +486,41 @@ static void MX_USART1_UART_Init(void)
|
|||
|
||||
}
|
||||
|
||||
/* FMC initialization function */
|
||||
static void MX_FMC_Init(void)
|
||||
{
|
||||
FMC_SDRAM_TimingTypeDef SdramTiming;
|
||||
|
||||
/** Perform the SDRAM1 memory initialization sequence
|
||||
*/
|
||||
hsdram1.Instance = FMC_SDRAM_DEVICE;
|
||||
/* hsdram1.Init */
|
||||
hsdram1.Init.SDBank = FMC_SDRAM_BANK2;
|
||||
hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
|
||||
hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
|
||||
hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
|
||||
hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
|
||||
hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_1;
|
||||
hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
|
||||
hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_DISABLE;
|
||||
hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
|
||||
hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
|
||||
/* SdramTiming */
|
||||
SdramTiming.LoadToActiveDelay = 16;
|
||||
SdramTiming.ExitSelfRefreshDelay = 16;
|
||||
SdramTiming.SelfRefreshTime = 16;
|
||||
SdramTiming.RowCycleDelay = 16;
|
||||
SdramTiming.WriteRecoveryTime = 16;
|
||||
SdramTiming.RPDelay = 16;
|
||||
SdramTiming.RCDDelay = 16;
|
||||
|
||||
if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
|
||||
{
|
||||
Error_Handler( );
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief GPIO Initialization Function
|
||||
* @param None
|
||||
|
|
@ -226,8 +531,15 @@ static void MX_GPIO_Init(void)
|
|||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
|
||||
/*Configure GPIO pin Output Level */
|
||||
HAL_GPIO_WritePin(GPIOH, GPIO_PIN_10, GPIO_PIN_RESET);
|
||||
|
|
|
|||
|
|
@ -97,6 +97,569 @@ void HAL_MspInit(void)
|
|||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA2D MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hdma2d: DMA2D handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
|
||||
{
|
||||
|
||||
if(hdma2d->Instance==DMA2D)
|
||||
{
|
||||
/* USER CODE BEGIN DMA2D_MspInit 0 */
|
||||
|
||||
/* USER CODE END DMA2D_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_DMA2D_CLK_ENABLE();
|
||||
/* USER CODE BEGIN DMA2D_MspInit 1 */
|
||||
|
||||
/* USER CODE END DMA2D_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief DMA2D MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hdma2d: DMA2D handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
|
||||
{
|
||||
|
||||
if(hdma2d->Instance==DMA2D)
|
||||
{
|
||||
/* USER CODE BEGIN DMA2D_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END DMA2D_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_DMA2D_CLK_DISABLE();
|
||||
/* USER CODE BEGIN DMA2D_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END DMA2D_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ETH MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param heth: ETH handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(heth->Instance==ETH)
|
||||
{
|
||||
/* USER CODE BEGIN ETH_MspInit 0 */
|
||||
|
||||
/* USER CODE END ETH_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_ETH_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**ETH GPIO Configuration
|
||||
PC1 ------> ETH_MDC
|
||||
PA1 ------> ETH_REF_CLK
|
||||
PA2 ------> ETH_MDIO
|
||||
PA7 ------> ETH_CRS_DV
|
||||
PC4 ------> ETH_RXD0
|
||||
PC5 ------> ETH_RXD1
|
||||
PB11 ------> ETH_TX_EN
|
||||
PB12 ------> ETH_TXD0
|
||||
PB13 ------> ETH_TXD1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN ETH_MspInit 1 */
|
||||
|
||||
/* USER CODE END ETH_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ETH MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param heth: ETH handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
|
||||
{
|
||||
|
||||
if(heth->Instance==ETH)
|
||||
{
|
||||
/* USER CODE BEGIN ETH_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END ETH_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_ETH_CLK_DISABLE();
|
||||
|
||||
/**ETH GPIO Configuration
|
||||
PC1 ------> ETH_MDC
|
||||
PA1 ------> ETH_REF_CLK
|
||||
PA2 ------> ETH_MDIO
|
||||
PA7 ------> ETH_CRS_DV
|
||||
PC4 ------> ETH_RXD0
|
||||
PC5 ------> ETH_RXD1
|
||||
PB11 ------> ETH_TX_EN
|
||||
PB12 ------> ETH_TXD0
|
||||
PB13 ------> ETH_TXD1
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_7);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13);
|
||||
|
||||
/* USER CODE BEGIN ETH_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END ETH_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LTDC MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hltdc: LTDC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hltdc->Instance==LTDC)
|
||||
{
|
||||
/* USER CODE BEGIN LTDC_MspInit 0 */
|
||||
|
||||
/* USER CODE END LTDC_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_LTDC_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOI_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
/**LTDC GPIO Configuration
|
||||
PE4 ------> LTDC_B0
|
||||
PE5 ------> LTDC_G0
|
||||
PE6 ------> LTDC_G1
|
||||
PI9 ------> LTDC_VSYNC
|
||||
PI10 ------> LTDC_HSYNC
|
||||
PF10 ------> LTDC_DE
|
||||
PH2 ------> LTDC_R0
|
||||
PH3 ------> LTDC_R1
|
||||
PA3 ------> LTDC_B5
|
||||
PB0 ------> LTDC_R3
|
||||
PB1 ------> LTDC_R6
|
||||
PH8 ------> LTDC_R2
|
||||
PG6 ------> LTDC_R7
|
||||
PG7 ------> LTDC_CLK
|
||||
PC7 ------> LTDC_G6
|
||||
PA11 ------> LTDC_R4
|
||||
PA12 ------> LTDC_R5
|
||||
PH13 ------> LTDC_G2
|
||||
PH15 ------> LTDC_G4
|
||||
PI0 ------> LTDC_G5
|
||||
PI2 ------> LTDC_G7
|
||||
PD6 ------> LTDC_B2
|
||||
PG10 ------> LTDC_G3
|
||||
PG11 ------> LTDC_B3
|
||||
PG12 ------> LTDC_B1
|
||||
PB8 ------> LTDC_B6
|
||||
PB9 ------> LTDC_B7
|
||||
PI4 ------> LTDC_B4
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_2
|
||||
|GPIO_PIN_4;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_8|GPIO_PIN_13
|
||||
|GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_11|GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_11;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_10;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN LTDC_MspInit 1 */
|
||||
|
||||
/* USER CODE END LTDC_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief LTDC MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hltdc: LTDC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
|
||||
{
|
||||
|
||||
if(hltdc->Instance==LTDC)
|
||||
{
|
||||
/* USER CODE BEGIN LTDC_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END LTDC_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_LTDC_CLK_DISABLE();
|
||||
|
||||
/**LTDC GPIO Configuration
|
||||
PE4 ------> LTDC_B0
|
||||
PE5 ------> LTDC_G0
|
||||
PE6 ------> LTDC_G1
|
||||
PI9 ------> LTDC_VSYNC
|
||||
PI10 ------> LTDC_HSYNC
|
||||
PF10 ------> LTDC_DE
|
||||
PH2 ------> LTDC_R0
|
||||
PH3 ------> LTDC_R1
|
||||
PA3 ------> LTDC_B5
|
||||
PB0 ------> LTDC_R3
|
||||
PB1 ------> LTDC_R6
|
||||
PH8 ------> LTDC_R2
|
||||
PG6 ------> LTDC_R7
|
||||
PG7 ------> LTDC_CLK
|
||||
PC7 ------> LTDC_G6
|
||||
PA11 ------> LTDC_R4
|
||||
PA12 ------> LTDC_R5
|
||||
PH13 ------> LTDC_G2
|
||||
PH15 ------> LTDC_G4
|
||||
PI0 ------> LTDC_G5
|
||||
PI2 ------> LTDC_G7
|
||||
PD6 ------> LTDC_B2
|
||||
PG10 ------> LTDC_G3
|
||||
PG11 ------> LTDC_B3
|
||||
PG12 ------> LTDC_B1
|
||||
PB8 ------> LTDC_B6
|
||||
PB9 ------> LTDC_B7
|
||||
PI4 ------> LTDC_B4
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_2
|
||||
|GPIO_PIN_4);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_10);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOH, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_8|GPIO_PIN_13
|
||||
|GPIO_PIN_15);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3|GPIO_PIN_11|GPIO_PIN_12);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_8|GPIO_PIN_9);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_10|GPIO_PIN_11
|
||||
|GPIO_PIN_12);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_7);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6);
|
||||
|
||||
/* USER CODE BEGIN LTDC_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END LTDC_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QSPI MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hqspi: QSPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hqspi->Instance==QUADSPI)
|
||||
{
|
||||
/* USER CODE BEGIN QUADSPI_MspInit 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_QSPI_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**QUADSPI GPIO Configuration
|
||||
PF6 ------> QUADSPI_BK1_IO3
|
||||
PF7 ------> QUADSPI_BK1_IO2
|
||||
PF8 ------> QUADSPI_BK1_IO0
|
||||
PF9 ------> QUADSPI_BK1_IO1
|
||||
PB2 ------> QUADSPI_CLK
|
||||
PB6 ------> QUADSPI_BK1_NCS
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_MspInit 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief QSPI MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hqspi: QSPI handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
|
||||
{
|
||||
|
||||
if(hqspi->Instance==QUADSPI)
|
||||
{
|
||||
/* USER CODE BEGIN QUADSPI_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_QSPI_CLK_DISABLE();
|
||||
|
||||
/**QUADSPI GPIO Configuration
|
||||
PF6 ------> QUADSPI_BK1_IO3
|
||||
PF7 ------> QUADSPI_BK1_IO2
|
||||
PF8 ------> QUADSPI_BK1_IO0
|
||||
PF9 ------> QUADSPI_BK1_IO1
|
||||
PB2 ------> QUADSPI_CLK
|
||||
PB6 ------> QUADSPI_BK1_NCS
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2|GPIO_PIN_6);
|
||||
|
||||
/* USER CODE BEGIN QUADSPI_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END QUADSPI_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SD MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hsd: SD handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(hsd->Instance==SDMMC1)
|
||||
{
|
||||
/* USER CODE BEGIN SDMMC1_MspInit 0 */
|
||||
|
||||
/* USER CODE END SDMMC1_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_SDMMC1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
/**SDMMC1 GPIO Configuration
|
||||
PC8 ------> SDMMC1_D0
|
||||
PC9 ------> SDMMC1_D1
|
||||
PC10 ------> SDMMC1_D2
|
||||
PC11 ------> SDMMC1_D3
|
||||
PC12 ------> SDMMC1_CK
|
||||
PD2 ------> SDMMC1_CMD
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
||||
|GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN SDMMC1_MspInit 1 */
|
||||
|
||||
/* USER CODE END SDMMC1_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SD MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hsd: SD handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
|
||||
{
|
||||
|
||||
if(hsd->Instance==SDMMC1)
|
||||
{
|
||||
/* USER CODE BEGIN SDMMC1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SDMMC1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_SDMMC1_CLK_DISABLE();
|
||||
|
||||
/**SDMMC1 GPIO Configuration
|
||||
PC8 ------> SDMMC1_D0
|
||||
PC9 ------> SDMMC1_D1
|
||||
PC10 ------> SDMMC1_D2
|
||||
PC11 ------> SDMMC1_D3
|
||||
PC12 ------> SDMMC1_CK
|
||||
PD2 ------> SDMMC1_CMD
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|
||||
|GPIO_PIN_12);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
|
||||
|
||||
/* USER CODE BEGIN SDMMC1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SDMMC1_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
|
|
@ -165,6 +728,209 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
|||
|
||||
}
|
||||
|
||||
static uint32_t FMC_Initialized = 0;
|
||||
|
||||
static void HAL_FMC_MspInit(void){
|
||||
/* USER CODE BEGIN FMC_MspInit 0 */
|
||||
|
||||
/* USER CODE END FMC_MspInit 0 */
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
if (FMC_Initialized) {
|
||||
return;
|
||||
}
|
||||
FMC_Initialized = 1;
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_FMC_CLK_ENABLE();
|
||||
|
||||
/** FMC GPIO Configuration
|
||||
PF0 ------> FMC_A0
|
||||
PF1 ------> FMC_A1
|
||||
PF2 ------> FMC_A2
|
||||
PF3 ------> FMC_A3
|
||||
PF4 ------> FMC_A4
|
||||
PF5 ------> FMC_A5
|
||||
PC0 ------> FMC_SDNWE
|
||||
PF11 ------> FMC_SDNRAS
|
||||
PF12 ------> FMC_A6
|
||||
PF13 ------> FMC_A7
|
||||
PF14 ------> FMC_A8
|
||||
PF15 ------> FMC_A9
|
||||
PG0 ------> FMC_A10
|
||||
PG1 ------> FMC_A11
|
||||
PE7 ------> FMC_D4
|
||||
PE8 ------> FMC_D5
|
||||
PE9 ------> FMC_D6
|
||||
PE10 ------> FMC_D7
|
||||
PE11 ------> FMC_D8
|
||||
PE12 ------> FMC_D9
|
||||
PE13 ------> FMC_D10
|
||||
PE14 ------> FMC_D11
|
||||
PE15 ------> FMC_D12
|
||||
PH6 ------> FMC_SDNE1
|
||||
PH7 ------> FMC_SDCKE1
|
||||
PD8 ------> FMC_D13
|
||||
PD9 ------> FMC_D14
|
||||
PD10 ------> FMC_D15
|
||||
PD14 ------> FMC_D0
|
||||
PD15 ------> FMC_D1
|
||||
PG4 ------> FMC_BA0
|
||||
PG5 ------> FMC_BA1
|
||||
PG8 ------> FMC_SDCLK
|
||||
PD0 ------> FMC_D2
|
||||
PD1 ------> FMC_D3
|
||||
PG15 ------> FMC_SDNCAS
|
||||
PE0 ------> FMC_NBL0
|
||||
PE1 ------> FMC_NBL1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
|
||||
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
|
||||
|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
|
||||
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
|
||||
|GPIO_PIN_8|GPIO_PIN_15;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
|
||||
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||||
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
|
||||
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
|
||||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
|
||||
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN FMC_MspInit 1 */
|
||||
|
||||
/* USER CODE END FMC_MspInit 1 */
|
||||
}
|
||||
|
||||
void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
|
||||
/* USER CODE BEGIN SDRAM_MspInit 0 */
|
||||
|
||||
/* USER CODE END SDRAM_MspInit 0 */
|
||||
HAL_FMC_MspInit();
|
||||
/* USER CODE BEGIN SDRAM_MspInit 1 */
|
||||
|
||||
/* USER CODE END SDRAM_MspInit 1 */
|
||||
}
|
||||
|
||||
static uint32_t FMC_DeInitialized = 0;
|
||||
|
||||
static void HAL_FMC_MspDeInit(void){
|
||||
/* USER CODE BEGIN FMC_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END FMC_MspDeInit 0 */
|
||||
if (FMC_DeInitialized) {
|
||||
return;
|
||||
}
|
||||
FMC_DeInitialized = 1;
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_FMC_CLK_DISABLE();
|
||||
|
||||
/** FMC GPIO Configuration
|
||||
PF0 ------> FMC_A0
|
||||
PF1 ------> FMC_A1
|
||||
PF2 ------> FMC_A2
|
||||
PF3 ------> FMC_A3
|
||||
PF4 ------> FMC_A4
|
||||
PF5 ------> FMC_A5
|
||||
PC0 ------> FMC_SDNWE
|
||||
PF11 ------> FMC_SDNRAS
|
||||
PF12 ------> FMC_A6
|
||||
PF13 ------> FMC_A7
|
||||
PF14 ------> FMC_A8
|
||||
PF15 ------> FMC_A9
|
||||
PG0 ------> FMC_A10
|
||||
PG1 ------> FMC_A11
|
||||
PE7 ------> FMC_D4
|
||||
PE8 ------> FMC_D5
|
||||
PE9 ------> FMC_D6
|
||||
PE10 ------> FMC_D7
|
||||
PE11 ------> FMC_D8
|
||||
PE12 ------> FMC_D9
|
||||
PE13 ------> FMC_D10
|
||||
PE14 ------> FMC_D11
|
||||
PE15 ------> FMC_D12
|
||||
PH6 ------> FMC_SDNE1
|
||||
PH7 ------> FMC_SDCKE1
|
||||
PD8 ------> FMC_D13
|
||||
PD9 ------> FMC_D14
|
||||
PD10 ------> FMC_D15
|
||||
PD14 ------> FMC_D0
|
||||
PD15 ------> FMC_D1
|
||||
PG4 ------> FMC_BA0
|
||||
PG5 ------> FMC_BA1
|
||||
PG8 ------> FMC_SDCLK
|
||||
PD0 ------> FMC_D2
|
||||
PD1 ------> FMC_D3
|
||||
PG15 ------> FMC_SDNCAS
|
||||
PE0 ------> FMC_NBL0
|
||||
PE1 ------> FMC_NBL1
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
|
||||
|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12
|
||||
|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
|
||||
|GPIO_PIN_8|GPIO_PIN_15);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10
|
||||
|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
|
||||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOH, GPIO_PIN_6|GPIO_PIN_7);
|
||||
|
||||
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14
|
||||
|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
|
||||
|
||||
/* USER CODE BEGIN FMC_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END FMC_MspDeInit 1 */
|
||||
}
|
||||
|
||||
void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){
|
||||
/* USER CODE BEGIN SDRAM_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END SDRAM_MspDeInit 0 */
|
||||
HAL_FMC_MspDeInit();
|
||||
/* USER CODE BEGIN SDRAM_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END SDRAM_MspDeInit 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ menu "Onboard Peripheral Drivers"
|
|||
|
||||
config BSP_USING_SDRAM
|
||||
bool "Enable SDRAM"
|
||||
select BSP_USING_FMC
|
||||
default n
|
||||
|
||||
config BSP_USING_QSPI_FLASH
|
||||
|
|
@ -30,12 +31,32 @@ menu "Onboard Peripheral Drivers"
|
|||
select RT_SFUD_USING_QSPI
|
||||
default n
|
||||
|
||||
config BSP_USING_LCD
|
||||
bool "Enable LCD"
|
||||
select BSP_USING_LTDC
|
||||
select BSP_USING_SDRAM
|
||||
default n
|
||||
|
||||
config BSP_USING_MPU6050
|
||||
bool "Enable MPU6050 (i2c4)"
|
||||
select BSP_USING_I2C4
|
||||
select PKG_USING_MPU6XXX
|
||||
default n
|
||||
|
||||
config BSP_USING_POT
|
||||
bool "Enable potentiometer"
|
||||
select BSP_USING_ADC
|
||||
select BSP_USING_ADC1
|
||||
default n
|
||||
|
||||
config BSP_USING_SDCARD
|
||||
bool "Enable SDCARD (sdio)"
|
||||
select BSP_USING_SDIO
|
||||
select RT_USING_DFS
|
||||
select RT_USING_DFS_ELMFAT
|
||||
select RT_USING_PIN
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
|
@ -178,6 +199,20 @@ menuconfig BSP_USING_SPI
|
|||
select RT_USING_WDT
|
||||
default n
|
||||
|
||||
config BSP_USING_SDIO
|
||||
bool "Enable SDIO"
|
||||
select RT_USING_SDIO
|
||||
select RT_USING_DFS
|
||||
default n
|
||||
|
||||
config BSP_USING_FMC
|
||||
bool
|
||||
default n
|
||||
|
||||
config BSP_USING_LTDC
|
||||
bool
|
||||
default n
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
|
|
|||
|
|
@ -18,6 +18,9 @@ if GetDepend(['BSP_USING_ETH']):
|
|||
if GetDepend(['BSP_USING_QSPI_FLASH']):
|
||||
src += Glob('ports/drv_qspi_flash.c')
|
||||
|
||||
if GetDepend(['BSP_USING_SDCARD']):
|
||||
src += Glob('ports/sdcard_port.c')
|
||||
|
||||
path = [cwd]
|
||||
path += [cwd + '/CubeMX_Config/Inc']
|
||||
path += [cwd + '/ports']
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@ void SystemClock_Config(void)
|
|||
RCC_OscInitStruct.PLL.PLLM = 25;
|
||||
RCC_OscInitStruct.PLL.PLLN = 432;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 9;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
|
|
@ -53,8 +53,17 @@ void SystemClock_Config(void)
|
|||
{
|
||||
Error_Handler();
|
||||
}
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_USART1
|
||||
|RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIR = 3;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
|
||||
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
|
||||
PeriphClkInitStruct.PLLSAIDivQ = 1;
|
||||
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
|
||||
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
|
||||
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
|
||||
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
|||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x2007FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K sram */
|
||||
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 512k /* 512K sram */
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ LR_IROM1 0x08000000 0x00100000 { ; load region size_region
|
|||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
RW_IRAM1 0x20020000 0x00060000 { ; RW data
|
||||
RW_IRAM1 0x2000000 0x00080000 { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,33 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-01-08 zylx first version
|
||||
*/
|
||||
|
||||
#ifndef __LCD_PORT_H__
|
||||
#define __LCD_PORT_H__
|
||||
|
||||
/* fire 5 inch screen, 800 * 480 */
|
||||
#define LCD_WIDTH 800
|
||||
#define LCD_HEIGHT 480
|
||||
#define LCD_BITS_PER_PIXEL 16
|
||||
#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
|
||||
#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
|
||||
|
||||
#define LCD_HSYNC_WIDTH 2
|
||||
#define LCD_VSYNC_HEIGHT 2
|
||||
#define LCD_HBP 46
|
||||
#define LCD_VBP 23
|
||||
#define LCD_HFP 22
|
||||
#define LCD_VFP 22
|
||||
|
||||
#define LCD_BACKLIGHT_USING_GPIO
|
||||
#define LCD_BL_GPIO_NUM GET_PIN(D, 7)
|
||||
#define LCD_DISP_GPIO_NUM GET_PIN(D, 4)
|
||||
/* fire 5 inch screen, 800 * 480 */
|
||||
|
||||
#endif /* __LCD_PORT_H__ */
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2018-12-13 balanceTWK add sdcard port file
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
#ifdef BSP_USING_SDCARD
|
||||
|
||||
#include <dfs_elm.h>
|
||||
#include <dfs_fs.h>
|
||||
#include <dfs_posix.h>
|
||||
#include "drv_gpio.h"
|
||||
|
||||
// #define DBG_ENABLE
|
||||
#define DBG_SECTION_NAME "app.card"
|
||||
#define DBG_COLOR
|
||||
|
||||
#define DBG_LEVEL DBG_INFO
|
||||
#include <rtdbg.h>
|
||||
|
||||
#define WIFI_RESET_PIN GET_PIN(G, 9)
|
||||
|
||||
int ewm1062_disable(void)
|
||||
{
|
||||
rt_pin_mode(WIFI_RESET_PIN, PIN_MODE_OUTPUT);
|
||||
rt_pin_write(WIFI_RESET_PIN,PIN_LOW);
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_BOARD_EXPORT(ewm1062_disable);
|
||||
|
||||
void sd_mount(void *parameter)
|
||||
{
|
||||
while (1)
|
||||
{
|
||||
rt_thread_mdelay(500);
|
||||
if(rt_device_find("sd0") != RT_NULL)
|
||||
{
|
||||
if (dfs_mount("sd0", "/", "elm", 0, 0) == RT_EOK)
|
||||
{
|
||||
LOG_I("sd card mount to '/'");
|
||||
break;
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_W("sd card mount to '/' failed!");
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int stm32_sdcard_mount(void)
|
||||
{
|
||||
rt_thread_t tid;
|
||||
|
||||
tid = rt_thread_create("sd_mount", sd_mount, RT_NULL,
|
||||
1024, RT_THREAD_PRIORITY_MAX - 2, 20);
|
||||
if (tid != RT_NULL)
|
||||
{
|
||||
rt_thread_startup(tid);
|
||||
}
|
||||
else
|
||||
{
|
||||
LOG_E("create sd_mount thread err!");
|
||||
}
|
||||
return RT_EOK;
|
||||
}
|
||||
INIT_ENV_EXPORT(stm32_sdcard_mount);
|
||||
|
||||
#endif /* BSP_USING_SDCARD */
|
||||
|
||||
|
|
@ -14,7 +14,7 @@
|
|||
/* parameters for sdram peripheral */
|
||||
/* Bank1 or Bank2 */
|
||||
#define SDRAM_TARGET_BANK 2
|
||||
/* stm32f4 Bank1:0XC0000000 Bank2:0XD0000000 */
|
||||
/* stm32f7 Bank1:0XC0000000 Bank2:0XD0000000 */
|
||||
#define SDRAM_BANK_ADDR ((uint32_t)0XD0000000)
|
||||
/* data width: 8, 16, 32 */
|
||||
#define SDRAM_DATA_WIDTH 16
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -54,7 +54,7 @@
|
|||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<BrowseInformation>0</BrowseInformation>
|
||||
<ListingPath>.\build\keil\List\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
|
|
|
|||
Loading…
Reference in New Issue