update serial driver of MB9BF506R
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2116 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
dzzxzz@gmail.com
parent
1641c9db4f
commit
e383470e01
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@ -10,7 +10,7 @@
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* Change Logs:
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* Date Author Notes
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* 2006-03-13 Bernard first version
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* 2011-05-15 lgnq modified according bernard's implementaion.
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* 2011-05-15 lgnq modified according bernard's implementation.
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*/
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#include <rtthread.h>
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@ -20,7 +20,7 @@
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/**
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* @addtogroup FM3 MB9B500
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*/
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/*@{*/
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/* RT-Thread Device Interface */
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@ -273,7 +273,7 @@ rt_err_t rt_hw_serial_register(rt_device_t device, const char *name,
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device->user_data = serial;
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/* register a character device */
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return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
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return rt_device_register(device, name, flag);
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}
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/* ISR for serial interrupt */
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@ -304,13 +304,12 @@ void rt_hw_serial_isr(rt_device_t device)
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}
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}
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#ifdef RT_USING_UART0
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#if (defined(RT_USING_UART0_0) || defined(RT_USING_UART0_1))
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/* UART0 device driver structure */
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#define UART0 FM3_MFS0_UART
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struct serial_int_rx uart0_int_rx;
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struct serial_device uart0 =
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{
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UART0,
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FM3_MFS0_UART,
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MFS0RX_IRQn,
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MFS0TX_IRQn,
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&uart0_int_rx,
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@ -320,21 +319,43 @@ struct rt_device uart0_device;
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void MFS0RX_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_hw_serial_isr(&uart0_device);
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/* leave interrupt */
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rt_interrupt_leave();
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/* enter interrupt */
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rt_interrupt_enter();
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rt_hw_serial_isr(&uart0_device);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef RT_USING_UART2
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#if (defined(RT_USING_UART1_0) || defined(RT_USING_UART1_1))
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/* UART1 device driver structure */
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struct serial_int_rx uart1_int_rx;
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struct serial_device uart1 =
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{
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FM3_MFS1_UART,
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MFS1RX_IRQn,
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MFS1TX_IRQn,
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&uart1_int_rx,
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RT_NULL
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};
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struct rt_device uart1_device;
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void MFS1RX_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_hw_serial_isr(&uart1_device);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#if (defined(RT_USING_UART2_0) || defined(RT_USING_UART2_1) || defined(RT_USING_UART2_2))
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/* UART2 device driver structure */
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#define UART2 FM3_MFS2_UART
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struct serial_int_rx uart2_int_rx;
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struct serial_device uart2 =
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{
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UART2,
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FM3_MFS2_UART,
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MFS2RX_IRQn,
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MFS2TX_IRQn,
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&uart2_int_rx,
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@ -344,41 +365,269 @@ struct rt_device uart2_device;
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void MFS2RX_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_hw_serial_isr(&uart2_device);
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/* leave interrupt */
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rt_interrupt_leave();
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/* enter interrupt */
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rt_interrupt_enter();
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rt_hw_serial_isr(&uart2_device);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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void rt_hw_serial_init(void)
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{
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#ifdef RT_USING_UART0
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/* initialize UART0 */
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/* Set Uart Ch0 Port, SIN0_0, SOT0_0 */
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FM3_GPIO->PFR2 = FM3_GPIO->PFR2 | 0x0006;
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FM3_GPIO->EPFR07 = FM3_GPIO->EPFR07 | 0x00000040;
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#if (defined(RT_USING_UART3_0) || defined(RT_USING_UART3_1) || defined(RT_USING_UART3_2))
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/* UART3 device driver structure */
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struct serial_int_rx uart3_int_rx;
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struct serial_device uart3 =
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{
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FM3_MFS3_UART,
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MFS3RX_IRQn,
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MFS3TX_IRQn,
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&uart3_int_rx,
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RT_NULL
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};
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struct rt_device uart3_device;
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uart0.uart_device->SMR = SMR_MD_UART | SMR_SOE;;
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void MFS3RX_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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rt_hw_serial_isr(&uart3_device);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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void uart_pin_setup(void)
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{
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#if defined(RT_USING_UART0_0)
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/* Set UART Ch0 Port, SIN0_0(P21), SOT0_0(P22) */
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FM3_GPIO->PFR2_f.P1 = 1;
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FM3_GPIO->PFR2_f.P2 = 1;
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FM3_GPIO->EPFR07_f.SIN0S0 = 1;
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FM3_GPIO->EPFR07_f.SIN0S1 = 0;
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FM3_GPIO->EPFR07_f.SOT0B0 = 1;
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FM3_GPIO->EPFR07_f.SOT0B1 = 0;
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#elif defined(RT_USING_UART0_1)
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/* Set UART Ch0 Port, SIN0_1(P14), SOT0_1(P15) */
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FM3_GPIO->PFR1_f.P4 = 1;
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FM3_GPIO->PFR1_f.P5 = 1;
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FM3_GPIO->EPFR07_f.SIN0S0 = 0;
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FM3_GPIO->EPFR07_f.SIN0S1 = 1;
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FM3_GPIO->EPFR07_f.SOT0B0 = 0;
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FM3_GPIO->EPFR07_f.SOT0B1 = 1;
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#endif
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#if defined(RT_USING_UART1_0)
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/* Set UART Ch1 Port, SIN1_0(P56), SOT1_0(P57) */
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FM3_GPIO->PFR5_f.P6 = 1;
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FM3_GPIO->PFR5_f.P7 = 1;
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FM3_GPIO->EPFR07_f.SIN1S0 = 1;
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FM3_GPIO->EPFR07_f.SIN1S1 = 0;
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FM3_GPIO->EPFR07_f.SOT1B0 = 1;
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FM3_GPIO->EPFR07_f.SOT1B1 = 0;
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#elif defined(RT_USING_UART1_1)
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/* Set UART Ch1 Port, SIN1_1(P11), SOT1_1(P12) */
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FM3_GPIO->PFR1_f.P1 = 1;
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FM3_GPIO->PFR1_f.P2 = 1;
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FM3_GPIO->EPFR07_f.SIN1S0 = 0;
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FM3_GPIO->EPFR07_f.SIN1S1 = 1;
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FM3_GPIO->EPFR07_f.SOT1B0 = 0;
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FM3_GPIO->EPFR07_f.SOT1B1 = 1;
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#endif
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#if defined(RT_USING_UART2_0)
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/* Set UART Ch2 Port, SIN2_0(P72), SOT2_0(P73) */
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FM3_GPIO->PFR7_f.P2 = 1;
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FM3_GPIO->PFR7_f.P3 = 1;
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FM3_GPIO->EPFR07_f.SIN2S0 = 1;
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FM3_GPIO->EPFR07_f.SIN2S1 = 0;
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FM3_GPIO->EPFR07_f.SOT2B0 = 1;
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FM3_GPIO->EPFR07_f.SOT2B1 = 0;
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#elif defined(RT_USING_UART2_1)
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/* Set UART Ch2 Port, SIN2_1(P24), SOT2_1(P25) */
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FM3_GPIO->PFR2_f.P4 = 1;
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FM3_GPIO->PFR2_f.P5 = 1;
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FM3_GPIO->EPFR07_f.SIN2S0 = 0;
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FM3_GPIO->EPFR07_f.SIN2S1 = 1;
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FM3_GPIO->EPFR07_f.SOT2B0 = 0;
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FM3_GPIO->EPFR07_f.SOT2B1 = 1;
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#elif defined(RT_USING_UART2_2)
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/* Set UART Ch2 Port, SIN2_2(P17), SOT2_2(P18) */
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FM3_GPIO->PFR1_f.P7 = 1;
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FM3_GPIO->PFR1_f.P8 = 1;
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FM3_GPIO->EPFR07_f.SIN2S0 = 1;
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FM3_GPIO->EPFR07_f.SIN2S1 = 1;
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FM3_GPIO->EPFR07_f.SOT2B0 = 1;
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FM3_GPIO->EPFR07_f.SOT2B1 = 1;
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#endif
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#if defined(RT_USING_UART3_0)
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/* Set UART Ch3 Port, SIN3_0(P66), SOT3_0(P67) */
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FM3_GPIO->PFR6_f.P6 = 1;
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FM3_GPIO->PFR6_f.P7 = 1;
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FM3_GPIO->EPFR07_f.SIN3S0 = 1;
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FM3_GPIO->EPFR07_f.SIN3S1 = 0;
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FM3_GPIO->EPFR07_f.SOT3B0 = 1;
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FM3_GPIO->EPFR07_f.SOT3B1 = 0;
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#elif defined(RT_USING_UART3_1)
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/* Set UART Ch3 Port, SIN3_1(P50), SOT3_1(P51) */
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FM3_GPIO->PFR5_f.P0 = 1;
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FM3_GPIO->PFR5_f.P1 = 1;
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FM3_GPIO->EPFR07_f.SIN3S0 = 0;
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FM3_GPIO->EPFR07_f.SIN3S1 = 1;
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FM3_GPIO->EPFR07_f.SOT3B0 = 0;
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FM3_GPIO->EPFR07_f.SOT3B1 = 1;
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#elif defined(RT_USING_UART3_2)
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/* Set UART Ch3 Port, SIN3_2(P48), SOT3_2(P49) */
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FM3_GPIO->PFR4_f.P8 = 1;
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FM3_GPIO->PFR4_f.P9 = 1;
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FM3_GPIO->EPFR07_f.SIN3S0 = 1;
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FM3_GPIO->EPFR07_f.SIN3S1 = 1;
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FM3_GPIO->EPFR07_f.SOT3B0 = 1;
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FM3_GPIO->EPFR07_f.SOT3B1 = 1;
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#endif
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#if defined(RT_USING_UART4_0)
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/* Set UART Ch4 Port, SIN4_0(P0A), SOT4_0(P0B), CTS4_0(P0E), RTS4_0(P0D) */
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FM3_GPIO->PFR0_f.PA = 1;
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FM3_GPIO->PFR0_f.PB = 1;
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FM3_GPIO->PFR0_f.PD = 1;
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FM3_GPIO->PFR0_f.PE = 1;
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FM3_GPIO->EPFR08_f.SIN4S0 = 1;
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FM3_GPIO->EPFR08_f.SIN4S1 = 0;
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FM3_GPIO->EPFR08_f.SOT4B0 = 1;
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FM3_GPIO->EPFR08_f.SOT4B1 = 0;
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FM3_GPIO->EPFR08_f.CTS4S0 = 1;
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FM3_GPIO->EPFR08_f.CTS4S1 = 0;
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FM3_GPIO->EPFR08_f.RTS4E0 = 1;
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FM3_GPIO->EPFR08_f.RTS4E1 = 0;
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#elif defined(RT_USING_UART4_1)
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/* Set UART Ch4 Port, SIN4_1(P1A), SOT4_1(P1B), CTS4_1(P1D), RTS4_1(P1E) */
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FM3_GPIO->PFR1_f.PA = 1;
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FM3_GPIO->PFR1_f.PB = 1;
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FM3_GPIO->PFR1_f.PD = 1;
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FM3_GPIO->PFR1_f.PE = 1;
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FM3_GPIO->EPFR08_f.SIN4S0 = 0;
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FM3_GPIO->EPFR08_f.SIN4S1 = 1;
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FM3_GPIO->EPFR08_f.SOT4B0 = 0;
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FM3_GPIO->EPFR08_f.SOT4B1 = 1;
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FM3_GPIO->EPFR08_f.CTS4S0 = 0;
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FM3_GPIO->EPFR08_f.CTS4S1 = 1;
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FM3_GPIO->EPFR08_f.RTS4E0 = 0;
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FM3_GPIO->EPFR08_f.RTS4E1 = 1;
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#elif defined(RT_USING_UART4_2)
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/* Set UART Ch4 Port, SIN4_2(P05), SOT4_2(P06), CTS4_2(P08), RTS4_2(P09)*/
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FM3_GPIO->PFR0_f.P5 = 1;
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FM3_GPIO->PFR0_f.P6 = 1;
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FM3_GPIO->PFR0_f.P8 = 1;
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FM3_GPIO->PFR0_f.P9 = 1;
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FM3_GPIO->EPFR08_f.SIN4S0 = 1;
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FM3_GPIO->EPFR08_f.SIN4S1 = 1;
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FM3_GPIO->EPFR08_f.SOT4B0 = 1;
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FM3_GPIO->EPFR08_f.SOT4B1 = 1;
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FM3_GPIO->EPFR08_f.CTS4S0 = 1;
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FM3_GPIO->EPFR08_f.CTS4S1 = 1;
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FM3_GPIO->EPFR08_f.RTS4E0 = 1;
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FM3_GPIO->EPFR08_f.RTS4E1 = 1;
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#endif
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#if defined(RT_USING_UART5_0)
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/* Set UART Ch5 Port, SIN5_0(P60), SOT5_0(P61) */
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FM3_GPIO->PFR6_f.P0 = 1;
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FM3_GPIO->PFR6_f.P1 = 1;
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FM3_GPIO->EPFR08_f.SIN5S0 = 1;
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FM3_GPIO->EPFR08_f.SIN5S1 = 0;
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FM3_GPIO->EPFR08_f.SOT5B0 = 1;
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FM3_GPIO->EPFR08_f.SOT5B1 = 0;
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#elif defined(RT_USING_UART5_1)
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/* Set UART Ch5 Port, SIN5_1(P63), SOT5_1(P64) */
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FM3_GPIO->PFR6_f.P3 = 1;
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FM3_GPIO->PFR6_f.P4 = 1;
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FM3_GPIO->EPFR08_f.SIN5S0 = 0;
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FM3_GPIO->EPFR08_f.SIN5S1 = 1;
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FM3_GPIO->EPFR08_f.SOT5B0 = 0;
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FM3_GPIO->EPFR08_f.SOT5B1 = 1;
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#elif defined(RT_USING_UART5_2)
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/* Set UART Ch5 Port, SIN5_2(P36), SOT5_2(P37) */
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FM3_GPIO->PFR3_f.P6 = 1;
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FM3_GPIO->PFR3_f.P7 = 1;
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FM3_GPIO->EPFR08_f.SIN5S0 = 1;
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FM3_GPIO->EPFR08_f.SIN5S1 = 1;
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FM3_GPIO->EPFR08_f.SOT5B0 = 1;
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FM3_GPIO->EPFR08_f.SOT5B1 = 1;
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#endif
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#if defined(RT_USING_UART6_0)
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/* Set UART Ch6 Port, SIN6_0(P53), SOT6_0(P54) */
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FM3_GPIO->PFR5_f.P3 = 1;
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FM3_GPIO->PFR5_f.P4 = 1;
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FM3_GPIO->EPFR08_f.SIN6S0 = 1;
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FM3_GPIO->EPFR08_f.SIN6S1 = 0;
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FM3_GPIO->EPFR08_f.SOT6B0 = 1;
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FM3_GPIO->EPFR08_f.SOT6B1 = 0;
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#elif defined(RT_USING_UART6_1)
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/* Set UART Ch6 Port, SIN6_1(P33), SOT6_1(P32) */
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FM3_GPIO->PFR3_f.P2 = 1;
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FM3_GPIO->PFR3_f.P3 = 1;
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FM3_GPIO->EPFR08_f.SIN6S0 = 0;
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FM3_GPIO->EPFR08_f.SIN6S1 = 1;
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FM3_GPIO->EPFR08_f.SOT6B0 = 0;
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FM3_GPIO->EPFR08_f.SOT6B1 = 1;
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#endif
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#if defined(RT_USING_UART7_0)
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/* Set UART Ch7 Port, SIN7_0(P59), SOT7_0(P5A) */
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FM3_GPIO->PFR5_f.P9 = 1;
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FM3_GPIO->PFR5_f.PA = 1;
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FM3_GPIO->EPFR08_f.SIN7S0 = 1;
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FM3_GPIO->EPFR08_f.SIN7S1 = 0;
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FM3_GPIO->EPFR08_f.SOT7B0 = 1;
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FM3_GPIO->EPFR08_f.SOT7B1 = 0;
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#elif defined(RT_USING_UART7_1)
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/* Set UART Ch7 Port, SIN7_1(P4E), SOT7_1(P4D) */
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FM3_GPIO->PFR4_f.PD = 1;
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FM3_GPIO->PFR4_f.PE = 1;
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FM3_GPIO->EPFR08_f.SIN7S0 = 0;
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FM3_GPIO->EPFR08_f.SIN7S1 = 1;
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FM3_GPIO->EPFR08_f.SOT7B0 = 0;
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FM3_GPIO->EPFR08_f.SOT7B1 = 1;
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#endif
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}
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void rt_hw_serial_init(void)
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{
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uart_pin_setup();
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#if (defined(RT_USING_UART0_0) || defined(RT_USING_UART0_1))
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/* initialize UART0 */
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uart0.uart_device->SMR = SMR_MD_UART | SMR_SOE;
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uart0.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
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uart0.uart_device->ESCR = ESCR_DATABITS_8;
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uart0.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
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/* register UART2 device */
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/* register UART0 device */
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rt_hw_serial_register(&uart0_device,
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"uart0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
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&uart0);
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#endif
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#ifdef RT_USING_UART2
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/* initialize UART2 */
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/* Set Uart Ch2 Port, SIN2_1, SOT2_1 */
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FM3_GPIO->PFR2 = FM3_GPIO->PFR2 | 0x0030;
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FM3_GPIO->EPFR07 = FM3_GPIO->EPFR07 | 0x000a0000;
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#if (defined(RT_USING_UART1_0) || defined(RT_USING_UART1_1))
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/* initialize UART1 */
|
||||
uart1.uart_device->SMR = SMR_MD_UART | SMR_SOE;
|
||||
uart1.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
|
||||
uart1.uart_device->ESCR = ESCR_DATABITS_8;
|
||||
uart1.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
|
||||
|
||||
uart2.uart_device->SMR = SMR_MD_UART | SMR_SOE;;
|
||||
/* register UART1 device */
|
||||
rt_hw_serial_register(&uart1_device,
|
||||
"uart1",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
|
||||
&uart1);
|
||||
#endif
|
||||
|
||||
#if (defined(RT_USING_UART2_0) || defined(RT_USING_UART2_1) || defined(RT_USING_UART2_2))
|
||||
/* initialize UART2 */
|
||||
uart2.uart_device->SMR = SMR_MD_UART | SMR_SOE;
|
||||
uart2.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
|
||||
uart2.uart_device->ESCR = ESCR_DATABITS_8;
|
||||
uart2.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
|
||||
|
|
@ -389,6 +638,20 @@ void rt_hw_serial_init(void)
|
|||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
|
||||
&uart2);
|
||||
#endif
|
||||
|
||||
#if (defined(RT_USING_UART3_0) || defined(RT_USING_UART3_1) || defined(RT_USING_UART3_2))
|
||||
/* initialize UART3 */
|
||||
uart3.uart_device->SMR = SMR_MD_UART | SMR_SOE;
|
||||
uart3.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
|
||||
uart3.uart_device->ESCR = ESCR_DATABITS_8;
|
||||
uart3.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
|
||||
|
||||
/* register UART3 device */
|
||||
rt_hw_serial_register(&uart3_device,
|
||||
"uart3",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
|
||||
&uart3);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2006-03-13 Bernard first version
|
||||
* 2011-05-15 lgnq modified according bernard's implementaion.
|
||||
* 2011-05-15 lgnq modified according bernard's implementaion.
|
||||
*/
|
||||
|
||||
#ifndef __RT_HW_SERIAL_H__
|
||||
|
|
@ -83,14 +83,14 @@ struct serial_int_tx
|
|||
|
||||
struct serial_device
|
||||
{
|
||||
FM3_MFS03_UART_TypeDef* uart_device;
|
||||
FM3_MFS03_UART_TypeDef *uart_device;
|
||||
/* irq number */
|
||||
IRQn_Type rx_irq, tx_irq;
|
||||
|
||||
/* rx structure */
|
||||
struct serial_int_rx* int_rx;
|
||||
struct serial_int_rx *int_rx;
|
||||
/* tx structure */
|
||||
struct serial_int_tx* int_tx;
|
||||
struct serial_int_tx *int_tx;
|
||||
};
|
||||
|
||||
void rt_hw_serial_isr(rt_device_t device);
|
||||
|
|
|
|||
|
|
@ -62,8 +62,46 @@
|
|||
|
||||
// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
|
||||
#define RT_USING_DEVICE
|
||||
// <bool name="RT_USING_UART0" description="Using UART0" default="true" />
|
||||
#define RT_USING_UART0
|
||||
// <bool name="RT_USING_UART0_0" description="Using UART0_0" default="true" />
|
||||
#define RT_USING_UART0_0
|
||||
// <bool name="RT_USING_UART0_1" description="Using UART0_1" default="false" />
|
||||
// #define RT_USING_UART0_1
|
||||
// <bool name="RT_USING_UART1_0" description="Using UART1_0" default="false" />
|
||||
// #define RT_USING_UART1_0
|
||||
// <bool name="RT_USING_UART1_1" description="Using UART1_1" default="false" />
|
||||
// #define RT_USING_UART1_1
|
||||
// <bool name="RT_USING_UART2_0" description="Using UART2_0" default="false" />
|
||||
// #define RT_USING_UART2_0
|
||||
// <bool name="RT_USING_UART2_1" description="Using UART2_1" default="false" />
|
||||
// #define RT_USING_UART2_1
|
||||
// <bool name="RT_USING_UART2_2" description="Using UART2_2" default="false" />
|
||||
// #define RT_USING_UART2_2
|
||||
// <bool name="RT_USING_UART3_0" description="Using UART3_0" default="false" />
|
||||
// #define RT_USING_UART3_0
|
||||
// <bool name="RT_USING_UART3_1" description="Using UART3_1" default="false" />
|
||||
// #define RT_USING_UART3_1
|
||||
// <bool name="RT_USING_UART3_2" description="Using UART3_2" default="false" />
|
||||
// #define RT_USING_UART3_2
|
||||
// <bool name="RT_USING_UART4_0" description="Using UART4_0" default="false" />
|
||||
// #define RT_USING_UART4_0
|
||||
// <bool name="RT_USING_UART4_1" description="Using UART4_1" default="false" />
|
||||
// #define RT_USING_UART4_1
|
||||
// <bool name="RT_USING_UART4_2" description="Using UART4_2" default="false" />
|
||||
// #define RT_USING_UART4_2
|
||||
// <bool name="RT_USING_UART5_0" description="Using UART5_0" default="false" />
|
||||
// #define RT_USING_UART5_0
|
||||
// <bool name="RT_USING_UART5_1" description="Using UART5_1" default="false" />
|
||||
// #define RT_USING_UART5_1
|
||||
// <bool name="RT_USING_UART5_2" description="Using UART5_2" default="false" />
|
||||
// #define RT_USING_UART5_2
|
||||
// <bool name="RT_USING_UART6_0" description="Using UART6_0" default="false" />
|
||||
// #define RT_USING_UART6_0
|
||||
// <bool name="RT_USING_UART6_1" description="Using UART6_1" default="false" />
|
||||
// #define RT_USING_UART6_1
|
||||
// <bool name="RT_USING_UART7_0" description="Using UART7_0" default="false" />
|
||||
// #define RT_USING_UART7_0
|
||||
// <bool name="RT_USING_UART7_1" description="Using UART7_1" default="false" />
|
||||
// #define RT_USING_UART7_1
|
||||
// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />
|
||||
#define RT_UART_RX_BUFFER_SIZE 64
|
||||
// </section>
|
||||
|
|
|
|||
Loading…
Reference in New Issue